Chip packaging heat dissipation structure

By forming an air circulation layer between the bottom and top plates of the package, and utilizing materials such as aluminum package and ceramic substrate, the problem of low heat dissipation efficiency in the package structure is solved, achieving efficient chip heat dissipation and improved reliability.

CN224069090UActive Publication Date: 2026-03-31SHANGHAI JUNJIE SEMICONDUCTOR TECHNOLOGY CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-12-31
Publication Date
2026-03-31

AI Technical Summary

Technical Problem

In existing technologies, the limited contact area between the filling metal and air results in low heat dissipation efficiency of the chip packaging structure, making it difficult to meet the heat dissipation requirements of high integration density and confined working environments.

Method used

An air circulation layer is formed between the bottom and top plates of the encapsulation shell, which is connected by a support component to increase the air contact area and utilize external air to carry away heat. Combined with the heat dissipation performance of the aluminum encapsulation shell, ceramic substrate, and thermally conductive adhesive, effective heat transfer is achieved.

Benefits of technology

It improves the heat dissipation efficiency and reliability of the chip, enhances the heat dissipation capacity of the packaging structure, and adapts to the heat dissipation requirements of high integration density and small space.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a chip packaging heat dissipation structure, which comprises a packaging shell, the packaging shell comprises a bottom plate and a top plate, the upper surface of the bottom plate is fixedly connected with a plurality of supporting pieces, and the upper surfaces of the supporting pieces are fixedly connected with the lower surface of the top plate; a chip groove is formed in the lower surface of the bottom plate, a chip is packaged in the chip groove, a packaging substrate is adhered to the lower surface of the bottom plate, and a plurality of pins are welded on the lower surface of the packaging substrate in an array manner. An air circulation layer is formed between the bottom plate and the top plate through the supporting piece, so that the contact area between the packaging shell and air is increased, heat is taken away through air circulation, and the purpose of efficient heat dissipation is achieved.
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Description

TECHNICAL FIELD

[0001] The utility model belongs to chip packaging technical field especially, it relates to the packaging structure with ventilation heat dissipation function. BACKGROUND

[0002] Packaging is the key link in integrated circuit, not only can effectively prevent chip and its internal metal wire from outside pollution, oxidation and physical damage, still can guarantee chip and outside environment smooth interaction, along with the improvement of integrated density, chip operation will produce a large amount of heat in the narrow packaging space, this can cause the temperature in the packaging structure to rise sharply, cause system performance to drop, even burn chip and make system completely ineffective.

[0003] In order to be able to dissipate the heat generated by the chip to the outside of the package, a heat sink will be provided on the package shell made of organic material, and the metal is filled in the heat sink as a heat dissipation structure, the heat generated by the chip is transmitted to the outside through the filled metal to achieve the purpose of heat dissipation, but due to the limited contact area of the filled metal and air, the heat dissipation efficiency is low, it is difficult to adapt to the heat dissipation demand of the chip with large integrated density and small working environment. UTILITY MODEL CONTENTS

[0004] The utility model aims at forming air circulation layer between bottom plate and top plate to solve the problem of limited contact area of filled metal and air in the above background technology, which leads to low heat dissipation efficiency.

[0005] The specific technical scheme of the utility model is as follows:

[0006] A chip packaging heat dissipation structure, comprising a packaging shell, the packaging shell comprises a bottom plate and a top plate, the upper surface of the bottom plate is fixedly connected with a plurality of supporting pieces, the upper surface of the supporting piece is fixedly connected with the lower surface of the top plate, the lower surface of the bottom plate is provided with a chip slot, the chip slot is packaged with a chip, the lower surface of the bottom plate is bonded with a packaging substrate, and a plurality of pins are arrayed and welded on the lower surface of the packaging substrate.

[0007] Further, one side of the chip is attached to the lower surface of the top of the chip slot, and the other side of the chip is flush with the opening surface of the chip slot.

[0008] Further, the chip is interconnected with the packaging substrate by flip-chip bonding.

[0009] Further, a silicon interlayer is laid between the chip and the packaging substrate.

[0010] Further, the supporting pieces are arrayed on the upper surface of the bottom plate, and the air between the bottom plate and the top plate is communicated with the external air.

[0011] Further, the packaging shell is made of aluminum.

[0012] Further, the packaging substrate is a ceramic substrate.

[0013] Further, the pins are solder balls, and the packaging type of the chip is BGA packaging.

[0014] Further, the solder balls are made of tin-lead alloy.

[0015] Further, the packaging shell and the packaging substrate are adhered by heat-conducting glue.

[0016] Compared with the prior art, the utility model has the advantages of the following:

[0017] By setting the support on the packaging shell, the air flow layer is formed between the bottom plate and the top plate, the contact area of the packaging shell and the air is increased, the external air flows through the bottom plate and the top plate, the heat conducted to the packaging shell by the chip can be taken away, the heat dissipation area is increased, the heat dissipation efficiency is improved, and the reliability of the chip during use is enhanced. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 It is a three-dimensional structure schematic view of the utility model embodiment;

[0019] Figure 2 It is Figure 1 It is a local amplification schematic view of A in the middle;

[0020] Figure 3 It is a front view of the utility model embodiment;

[0021] Figure 4 It is a bottom structure schematic view of the utility model embodiment;

[0022] Figure 5 It is an assembly explosion view of the packaging shell, the chip and the packaging substrate in the utility model embodiment;

[0023] Reference signs:

[0024] 1, packaging shell; 11, bottom plate; 111, chip slot; 12, top plate; 13, support;

[0025] 2, chip;

[0026] 3, packaging substrate;

[0027] 4, pin. DETAILED DESCRIPTION

[0028] In order to better understand the purpose, structure and function of the utility model, the technical scheme in the utility model embodiment will be described clearly and completely in combination with the drawings.

[0029] Refer toFigures 1 to 5 The embodiment discloses a chip packaging heat dissipation structure, which comprises a packaging shell 1, the packaging shell 1 comprises a bottom plate 11 and a top plate 12, a plurality of support pieces 13 are fixedly connected to the upper surface of the bottom plate 11, the upper surfaces of the support pieces 13 are fixedly connected to the lower surface of the top plate 12, and air between the bottom plate 11 and the top plate 12 can flow with external air; a chip groove 111 is arranged on the lower surface of the bottom plate 11, a chip 2 is packaged in the chip groove 111, a packaging substrate 3 is bonded to the lower surface of the bottom plate 11, a plurality of pins 4 are array-welded to the lower surface of the packaging substrate 3, and the pins 4 are connected with a PCB.

[0030] One surface of the chip 2 is attached to the lower surface of the top of the chip groove 111, and the other surface of the chip 2 is flush with the opening surface of the chip groove 111.

[0031] The chip 2 is interconnected with the packaging substrate 3 in a flip-chip bonding mode, the flip-chip bonding mode makes the electrical path shorter and is suitable for high-speed operation.

[0032] A silicon interlayer is arranged between the chip 2 and the packaging substrate 3, the silicon interlayer can improve the performance of the chip 2, improve the integration degree, reduce power consumption and improve reliability.

[0033] The support pieces 13 are array-distributed on the upper surface of the bottom plate 11, the array distribution can make the air between the bottom plate 11 and the top plate 12 flow more smoothly with the external air, and the heat dissipation is more uniform.

[0034] The packaging shell 1 is made of aluminum, the aluminum shell has good heat dissipation performance and electromagnetic shielding performance, and high mechanical strength.

[0035] The packaging substrate 3 is a ceramic substrate, the ceramic substrate has good heat conduction performance, helps to improve the heat dissipation efficiency of the chip 2, has compact structure, can realize high packaging density, has high moisture resistance, and can improve long-term reliability of packaging.

[0036] The pins 4 are solder balls, the packaging type of the chip 2 is BGA packaging, and more I / O port requirements can be met, and more functions can be expanded.

[0037] The solder balls are made of tin-lead alloy, the tin-lead alloy has stable performance, low melting point and good fluidity.

[0038] The packaging shell 1 and the packaging substrate 3 are bonded by heat-conducting glue, the heat-conducting glue has excellent heat conduction performance, can effectively transfer heat, is an elastomer after solidification, has the characteristics of impact resistance and vibration resistance, can provide good bonding strength and mechanical strength.

[0039] Working principle: through setting support 13 on the package shell 1, form air flow layer between bottom plate 11 and top plate 12, increase the contact area of package shell 1 and air, and outside air flows through between bottom plate 11 and top plate 12, can take away the heat of chip 2 conducted to package shell 1, increase the heat dissipation area and also improve the heat dissipation efficiency, enhance the reliability of chip 2 when using.

[0040] The above is only the preferred specific implementation of the present application, but the protection scope of the present application is not limited to this, any skilled person in the art can make equivalent replacement or change according to the technical scheme and the conception of the present application within the technical range disclosed by the present application, which should be covered in the protection scope of the present application.

Claims

1. A chip package heat dissipation structure, characterized by: The application relates to a packaging shell (1) comprising a bottom plate (11) and a top plate (12), the upper surface of the bottom plate (11) being fixedly connected with a plurality of supporting members (13), the upper surface of the supporting members (13) being fixedly connected with the lower surface of the top plate (12); the lower surface of the bottom plate (11) is provided with a chip groove (111), the chip groove (111) being internally packaged with a chip (2), the lower surface of the bottom plate (11) being bonded with a packaging substrate (3), and the lower surface of the packaging substrate (3) being array-welded with a plurality of pins (4).

2. The chip package heat dissipation structure of claim 1, wherein, One side of the chip (2) is attached to the lower surface of the top part of the chip groove (111), and the other side of the chip (2) is flush with the opening surface of the chip groove (111).

3. The chip package heat dissipation structure of claim 2, wherein, The chip (2) is interconnected with the packaging substrate (3) through a flip-chip bonding mode.

4. The chip package heat dissipation structure of claim 3, wherein, A silicon interlayer is laid between the chip (2) and the packaging substrate (3).

5. The chip package heat dissipation structure of claim 1, wherein, The supporting members (13) are array-distributed on the upper surface of the bottom plate (11), and the air between the bottom plate (11) and the top plate (12) is communicated with external air.

6. The chip package heat dissipation structure of claim 5, wherein, The material of the packaging shell (1) is aluminum.

7. The chip package heat dissipation structure of claim 1, wherein, The packaging substrate (3) is a ceramic substrate.

8. The chip package heat dissipation structure of claim 7, wherein, The pins (4) are solder balls, and the packaging type of the chip (2) is BGA packaging.

9. The chip package heat dissipation structure of claim 8, wherein, The material of the solder balls is tin-lead alloy.

10. The chip package heat dissipation structure of claim 1, wherein, The packaging shell (1) and the packaging substrate (3) are bonded through heat-conducting adhesive.