CIR-based audio and data conversion circuit

Abstract

A CIR-based audio and data conversion circuit relates to the technical field of railway application and comprises an interface unit, a power supply unit, a data conversion unit, an audio conversion unit and an audio amplification unit. According to the utility model, the interface unit is used for transmitting USB data and audio; the power supply unit is used for supplying power; the data conversion unit is used for mutual conversion between USB data and serial port data; the audio conversion unit is used for mutual conversion of USB audio and analog audio; the audio amplification unit is used for amplifying analog audio. The CIR-based audio and data conversion circuit is low in cost, can realize quick conversion of USB data, audio, serial port data and analog audio and an amplification function of the analog audio, is high in transmission rate, and improves the transmission efficiency of the USB data and the audio.

Description

Technical Field

[0001] This utility model relates to the field of railway application technology, and in particular to an audio and data conversion circuit based on CIR. Background Technology

[0002] Railway freight transport is one of the main modes of modern transportation. It is less affected by climate and natural conditions, and has a large transport capacity and single-carload loading capacity. It has an absolute advantage, especially in the transport of bulk and high-volume goods over medium and long distances. It is the most suitable regional backbone transport mode for my country's economic and geographical characteristics. It undertakes the transport of the vast majority of coal, timber, crude oil, steel and smelting materials in my country, ensuring the stable operation of the national economy and the production and living needs of the people.

[0003] Traditional CIR systems have slow audio and data conversion rates with external devices and are inconvenient to deploy. In addition, due to the complex operating environment of railway trains, there are often situations with high ambient noise. The above methods have problems with unclear voice reception and reception, which poses a significant risk to train operation safety. Summary of the Invention

[0004] To address the issues of slow audio and data conversion rates, inconvenient deployment, and unclear voice reception and reception associated with traditional CIR systems for external devices, this invention provides a CIR-based audio and data conversion circuit. This circuit enables rapid conversion between USB data, audio, serial port data, and analog audio, as well as analog audio amplification. The high transmission rate improves the efficiency of USB data and audio transmission, ensuring train safety and enhancing transportation efficiency.

[0005] To achieve the above objectives, the technical solution of this utility model is as follows:

[0006] A CIR-based audio and data conversion circuit includes: a power supply unit, an interface unit, a data conversion unit, an audio conversion unit, and an audio amplification unit. The interface unit is connected to both the data conversion unit and the audio conversion unit. The data conversion unit is connected to an external microphone and a printer. The audio conversion unit is connected to the audio amplification unit and the external microphone. The audio amplification unit is connected to a speaker. The power supply unit provides power to all components. The interface unit transmits USB data and audio. The data conversion unit converts between USB data and serial port data. The audio conversion unit converts between USB audio and analog audio. The audio amplification unit amplifies analog audio.

[0007] The beneficial effects of this utility model are:

[0008] First, the received audio signal can be amplified up to 18 times, significantly improving the strength of the audio signal. This effectively solves the problem of high ambient noise in the railway train operating environment, ensuring that voice content can still be clearly received and heard in noisy environments, thus guaranteeing railway traffic safety.

[0009] Secondly, the fast audio and data conversion response and low latency greatly shorten the communication response time between locomotive drivers and dispatch centers, thus improving the efficiency of railway transportation operations.

[0010] Furthermore, the circuit design optimizes the quality of the audio signal, ensuring that the distortion of both the input and output audio signals is less than 0.1%, thus guaranteeing high fidelity and stability of the signal.

[0011] Finally, the overall circuit design is relatively simple, reducing production, construction and maintenance costs, and has a high cost-performance ratio, making it easy to promote and apply in the railway industry. Attached Figure Description

[0012] Figure 1 This is a circuit connection block diagram of the present invention;

[0013] Figure 2 This is a detailed circuit diagram of the interface unit of this utility model;

[0014] Figure 3 This is a detailed circuit diagram of the power supply unit of this utility model;

[0015] Figure 4 This is a detailed circuit diagram of the data conversion unit of this utility model;

[0016] Figure 5 This is the circuit diagram of the data conversion unit 422 chip of this utility model;

[0017] Figure 6 This is a circuit diagram of the 485 chip data conversion unit of this utility model;

[0018] Figure 7 This is a detailed circuit diagram of the audio conversion unit of this utility model;

[0019] Figure 8 This is a detailed circuit diagram of the audio amplification unit of this utility model. Detailed Implementation

[0020] To better understand this utility model, the following description, in conjunction with the accompanying drawings, provides a more detailed account of the invention.

[0021] like Figure 1As shown, a CIR-based audio and data conversion circuit includes: a power supply unit, an interface unit, a data conversion unit, an audio conversion unit, and an audio amplification unit. The interface unit is connected to both the data conversion unit and the audio conversion unit. The data conversion unit is connected to an external microphone and a printer. The audio conversion unit is connected to the audio amplification unit and the external microphone. The audio amplification unit is connected to a speaker. The power supply unit provides power to all components, supplying the required voltage. The interface unit transmits USB data and audio signals. The data conversion unit converts USB data to serial data, supporting bidirectional protocol conversion between USB and serial data. The audio conversion unit converts USB audio to analog audio, supporting bidirectional conversion between USB and analog audio. The audio amplification unit amplifies the analog audio signal, i.e., it amplifies the power of the analog audio signal.

[0022] The specific circuit connection relationships of each unit in the audio and data conversion circuit are as follows:

[0023] The 13.8V power supply, after filtering, is connected to the SP signal amplifier chip and the 13.8V-5V power conversion chip; the 5V output from the 13.8V-5V power conversion chip is connected to the 5V-3.3V power conversion chip, the audio conversion chip, the 485 chip, and the 422 chip; the 3.3V output from the 5V-3.3V power conversion chip is connected to the data conversion chip; the interface unit interacts with the data conversion chip and the audio conversion chip to realize USB data and USB audio communication; the data conversion chip outputs serial port data to the 422 chip and the 485 chip respectively; the 422 chip outputs 422 messages to the printer; the 485 chip outputs 485 messages to the microphone; the audio conversion chip outputs the SP signal, which is connected to the audio power amplifier chip and the microphone; the microphone outputs the MIC signal, which is connected to the audio conversion chip; the SP signal amplifier chip outputs the amplified SP signal, which is connected to the speaker; the chip clock data output of 8MHz is connected to the data conversion chip.

[0024] like Figure 2 As shown, the interface unit consists of a JST TOP 9PIN socket and a cable. The specific circuit of the interface unit is as follows: Pin 2 of the XS3 socket is connected to the USB_A_N network and one end of capacitor C2, with the other end of capacitor C2 connected to GND; Pin 3 of the XS3 socket is connected to the USB_A_P network and one end of capacitor C3, with the other end of capacitor C3 connected to GND; Pin 6 of the XS3 socket is connected to the USB_C_N network and one end of capacitor C8, with the other end of capacitor C8 grounded; Pin 7 of the XS3 socket is connected to the USB_C_P network and one end of capacitor C10, with the other end of capacitor C10 grounded; Pins 8, 9, and 10 of the XS3 socket are all connected to GND. The XS3 socket is used for USB audio and data interaction.

[0025] like Figure 3As shown, the specific circuit of the power supply unit is as follows: pin 1 of the 13.8V-5V power conversion chip N60 is connected to the 13.8V network and one end of capacitor C60; the other end of capacitor C60 is connected to GND; pin 2 of chip N60 is connected to GND; pin 3 of chip N60 is connected to the 5V network, one end of capacitor C61 and capacitor C62; the other ends of capacitors C61 and C62 are both connected to GND; pins 1 and 3 of the 5V-3.3V power conversion chip N2 are connected to the 5V network and... One end of capacitor C14 is connected to pin 2 of chip N2, which is connected to the other end of capacitor C14 and GND. Pin 5 of chip N2 is connected to one end of capacitor C15 and the 3V3 network, while the other end of capacitor C15 is connected to GND. One end of capacitor C84 is connected to the 5V network and one end of inductor L3, while the other end of capacitor C84 is connected to GND and one end of inductor L4. One end of capacitor C85 is connected to the 5VA network and the other end of inductor L3, while the other end of capacitor C85 is connected to AGND and the other end of inductor L4. Among them, chip N60 is a 13.8V-5V power conversion chip of model L78M05, and chip N60 is a 5V-3.3V power conversion chip of model SPX3819-3.3. After the input power is applied, it steps down the voltage to output 5V and 3.3V to power the various devices.

[0026] like Figure 4 As shown, the specific circuit of the data conversion unit is as follows: Pin 5 of the USB-to-serial data conversion chip N5 is connected to one end of the 8MHz crystal oscillator Y1 and one end of capacitor C71; Pin 6 of chip N5 is connected to the other end of the 8MHz crystal oscillator and one end of capacitor C72; the other ends of capacitors C71 and C72 are both connected to GND; Pin 7 of chip N5 is connected to one end of capacitor C50 and resistor R29; the other end of capacitor C50 is connected to GND; the other end of resistor R29 is connected to the 3V3 network; Pin 8 of chip N5 is connected to GND and one end of capacitor C51; Pin 9 of chip N5 is connected to the 3V3 network and the other end of capacitor C51; Pin 20 of chip N5 is connected to GND; Pin 21 of chip N5 is connected to the UART0_TX network; Pin 22 of chip N5 is connected to the UART0_RX network. For the network, pin 23 of chip N5 is connected to one end of capacitor C59 and GND; pin 24 of chip N5 is connected to the 3V3 network and the other end of capacitor C59; pin 30 of chip N5 is connected to the UART1_TX network; pin 31 of chip N5 is connected to the UART1_RX network; pin 32 of chip N5 is connected to the USB_C_N network; pin 33 of chip N5 is connected to the USB_C_P network; pin 35 of chip N5 is connected to one end of capacitor C52 and GND; pin 36 of chip N5 is connected to the 3V3 network and the other end of capacitor C52; pin 44 of chip N5 is connected to one end of resistor R27, and the other end of resistor R27 is connected to GND; pin 47 of chip N5 is connected to one end of capacitor C46 and GND; pin 48 of chip N5 is connected to the 3V3 network and the other end of capacitor C46.

[0027] like Figure 5As shown, pin 1 of chip N6 is connected to the 5V network and one end of capacitors C45 and C34. The other ends of capacitors C45 and C34 are both connected to GND. Pin 2 of chip N6 is connected to the UART0_RX network; pin 3 of chip N6 is connected to the UART0_TX network; pin 4 of chip N6 is connected to GND; pin 5 of chip N6 is connected to one end of resistors R23 and R28. The other end of resistor R28 is connected to VD15, one end of capacitor C41, and the RS422_DATAA+ network; pin 6 of chip N6 is connected to the other end of resistor R23 and one end of resistor R22. The other end of resistor R22 is connected to VD14, one end of capacitor C42, and the RS422_DATAA- network. Pin 7 is connected to one end of resistors R17, R19, and R21. The other end of resistor R17 is connected to GND. The other end of resistor R21 is connected to VD16, one end of capacitor C43, and the RS422_DATAB- network. Pin 8 of chip N6 is connected to one end of resistors R16, R21, and R19. The other end of resistor R16 is connected to the 5V network. The other end of resistor R18 is connected to VD17, one end of capacitor C44, and the RS422_DATAB+ network. Capacitors C41, C42, C43, C44, VD14, VD15, VD16, and VD17 are all connected to GND. USB_C_N and USB_C_P network access interface units.

[0028] like Figure 6 As shown, pin 1 of the 485 chip N7 is connected to the UART1_RX network and one end of resistor R105. The other end of resistor R105 is connected to the 5V network. Pins 2 and 3 of chip N7 are connected to pin 3 of transistor VT1. Pin 2 of transistor VT1 is connected to GND. Pin 1 of transistor VT1 is connected to resistor R106 and one end of resistor R104. The other end of resistor R106 is connected to the 5V network. The other end of resistor R104 is connected to the UART1_TX network. Pin 4 of chip N7 is connected to GND. Pin 5 of chip N7 is connected to one end of resistor R75 and GND. Pin 7 of chip N7 is connected to the other end of resistor R75 and one end of resistor R71. The other end of resistor R71 is connected to the RS485- network. Pin 8 of chip N7 is connected to one end of resistor R74, one end of capacitor C70, and the 5V network. Pin 6 of chip N7 is connected to the other end of resistor R74 and one end of resistor R70. The other end of resistor R70 is connected to the RS485+ network.

[0029] RS485+ and RS485- are used to connect microphones, while RS422_DATAA+, RS422_DATAA-, RS422_DATAB-, and RS422_DATAB+ are used to connect printers. Specifically, chip N5 is a CH344L USB-to-serial data converter for converting data between USB and serial ports; chip N6 is a MAX490ESA+ 422 chip for 422-to-serial data conversion and transmission; chip N7 is an S-chip N75176 485 chip for 485-to-serial data conversion and transmission; and Y1 is an X50328MSB2G1 8MHz clock chip providing an 8MHz clock for the CH344L. 422 messages are used to connect printers, and 485 messages are used to connect microphones.

[0030] like Figure 7 As shown, the specific circuit of the audio conversion unit is as follows: pins 7 and 10 of the USB-analog audio conversion chip N1 are both connected to GND; pin 9 of chip N1 is connected to one end of capacitor C12, and the other end of capacitor C12 is connected to GND; pins 14, 16, and 23 of chip N1 are all connected to GND; pin 24 of chip N1 is connected to AGND; pin 26 of chip N1 is connected to one end of capacitor C16, and the other end of capacitor C16 is connected to AGND; pin 27 of chip N1 is connected to one end of capacitor C13, and the other end of capacitor C13 is connected to the MIC network; pin 29 of chip N1 is connected to the 5VA network and one end of capacitor C11, and the other end of capacitor C11 is connected to AGND; pin 32 of chip N1 is connected to the SPR network. Pin 33 of chip N1 is connected to AGND; pin 34 of chip N1 is connected to the 5VA network and one end of capacitor C7, with the other end of capacitor C7 connected to AGND; pin 35 of chip N1 is connected to the 5V network and one end of capacitor C6, with the other end of capacitor C6 connected to GND; pin 36 of chip N1 is connected to GND; pin 37 of chip N1 is connected to one end of capacitor C1, with the other end of capacitor C1 connected to AGND; pin 41 of chip N1 is connected to one end of resistor R3, with the other end of resistor R3 connected to the USB_A_P network; pin 42 of chip N1 is connected to one end of resistor R2, with the other end of resistor R2 connected to the USB_A_N network; the USB_A_N network and USB_A_P network access interface unit. Chip N1 is a CM108B USB-to-analog audio converter chip used for mutual conversion between USB audio and analog audio.

[0031] like Figure 8As shown, the audio amplification unit consists of the SSM3302ACPZ audio power amplifier chip N4 and a speaker. The SP audio signal before amplification is input to chip N4. After amplification, the SP audio signal is sent to the speaker. The specific circuit of the audio amplification unit is as follows: pin 0 of chip N4 is connected to GND; pin 7 of chip N4 is connected to GND and one end of capacitor C49; the other end of capacitor C49 is connected to pin 8 of chip N4; pin 10 of chip N4 is connected to the 5V_AVDD network; pins 14, 15, and 16 of chip N4 are connected to GND; pin 17 of chip N4 is connected to one end of resistor R37; the other end of resistor R37 is connected to the 3V3 network; pin 19 of chip N4 is connected to one end of capacitor C55; the other end of capacitor C55 is connected to GND; pin 20 of chip N4 is connected to one end of capacitor C56; the other end of capacitor C56 is connected to the SPR network; pin 21 of chip N4 is connected to the 5V_AVDD network; pin 23 of chip N4 is connected to one end of resistors R20 and R26; the other end of resistor R20 is connected to the 13.8V network; the other end of resistor R26 is connected to GND; and the chip N4... Pin 24 is connected to GND. Pin 25 of chip N4 is connected to one end of capacitor C48. Pins 26 and 27 of chip N4 are connected to the other end of capacitor C48 and one end of L9. The other end of L9 is connected to one end of capacitor C38 and capacitor C40, and the SPK- network. Pins 28 and 29 of chip N4 are connected to one end of capacitor C32 and one end of L7. The other end of L7 is connected to the other end of capacitor C38, one end of capacitor C36, and the SPK+ network. The other end of capacitor C36 is connected to the other end of capacitor C40 and GND. Pin 30 of chip N4 is connected to the other end of capacitor C32; pins 31, 32, and 33 of chip N4 are connected to one end of capacitor C31, the negative terminal of capacitor C29, and GND; pins 34, 35, 36, and 37 of chip N4 are connected to the other end of capacitor C31, the positive terminal of capacitor C29, one end of capacitor C30, and the 13.8V network; pins 38, 39, and 40 of chip N4 are connected to the other end of capacitor C30 and GND; SPK+ network and SPK- network are connected to the interface unit. Chip N4 is used to amplify the SP audio signal.

[0032] Example: The working process of the audio and data conversion circuit of this utility model is as follows:

[0033] I. Audio Conversion Process

[0034] The USB audio signal from an external device is first input to the USB audio converter chip through the interface unit, where it is decoded into a digital audio signal and output as an SP signal. This SP signal is then amplified by the SP signal amplifier chip and transmitted to the speaker, providing clear and high-intensity audio output. Additionally, analog audio signals (such as microphone signals) are input through an external microphone, processed by the USB audio converter chip, converted into USB audio signals, and transmitted to the target device through the interface unit, completing efficient bidirectional audio signal conversion and transmission.

[0035] II. Data Conversion Process

[0036] The USB data signal is input to the USB data conversion chip through the interface unit, completing the signal conversion from USB protocol to serial port protocol. The converted serial port data signal is distributed to the 422 chip and the 485 chip for further processing. Specifically, the 422 chip generates a 422 message and transmits it to the printer to complete the data printing task; the 485 chip generates a 485 message and transmits it to the external microphone to ensure communication and interaction with the microphone, achieving accurate data transmission and response.

[0037] III. Compatibility Description

[0038] In the specific implementation of this audio and data conversion circuit, the various chips involved (such as USB audio conversion chips, data conversion chips, 422 chips, 485 chips, etc.) can be replaced with different models according to different application requirements. As long as the functional consistency requirements are met, it can be flexibly applied to different scenarios, ensuring the high adaptability and stability of the system.

Claims

1. A CIR-based audio and data conversion circuit, characterized by, It includes: Power supply unit, interface unit, data conversion unit, audio conversion unit, audio amplification unit, interface unit is connected with data conversion unit and audio conversion unit respectively; Data conversion unit is connected with external microphone and printer respectively; Audio conversion unit is connected with audio amplification unit and external microphone; Audio amplification unit is connected with loudspeaker, the power supply unit provides required voltage for each unit; The interface unit is used for USB data and audio signal transmission; The data conversion unit supports USB data and serial data bidirectional protocol conversion; The audio conversion unit supports USB audio and analog audio bidirectional conversion; The audio amplification unit carries out power amplification to analog audio signal.

2. A CIR-based audio and data conversion circuit as defined in claim 1, wherein, The connection relationship of the circuit is: 13.8V power supply is filtered and connected to SP signal amplification chip and 13.8V-5V power conversion chip; The 5V output by the 13.8V-5V power conversion chip is connected to the 5V-3.3V power conversion chip, the audio conversion chip, the 485 chip and the 422 chip; The 3.3V output by the 5V-3.3V power conversion chip is connected to the data conversion chip; The interface unit realizes the interaction of USB data and USB audio with the data conversion chip and the audio conversion chip; The data conversion chip outputs serial port data to the 422 chip and the 485 chip, the 422 chip outputs 422 message to the printer, and the 485 chip outputs 485 message to the microphone; The audio conversion chip outputs SP signal connected to the audio power amplifier chip and the microphone; The microphone outputs MIC signal connected to the audio conversion chip; The amplified SP signal output by the SP signal amplification chip is connected to the loudspeaker; The chip clock data output 8MHZ is connected to the data conversion chip.

3. A CIR-based audio and data conversion circuit as defined in claim 1, wherein, The specific circuit of the interface unit is that the 2-pin of XS3 socket is connected with USB_A_N network and one end of capacitor C2, the other end of capacitor C2 is connected with GND; The 3-pin of XS3 socket is connected with USB_A_P network and one end of capacitor C3, the other end of capacitor C3 is connected with GND; The 6-pin of XS3 socket is connected with USB_C_N network and one end of capacitor C8, the other end of capacitor C8 is connected with ground; The 7-pin of XS3 socket is connected with USB_C_P network and one end of capacitor C10, the other end of capacitor C10 is connected with ground; The 8, 9 and 10-pin of XS3 socket are all connected with GND.

4. A CIR-based audio and data conversion circuit as defined in claim 1, wherein, The power supply unit circuit is that the 1st pin of 13.8V-5V power conversion chip N60 is connected with 13.8V network and one end of capacitor C60, the other end of capacitor C60 is connected with GND, the 2nd pin of chip N60 is connected with GND, the 3rd pin of chip N60 is connected with 5V network, one end of capacitor C61 and capacitor C62, the other end of capacitor C61 and capacitor C62 is connected with GND; the 1st pin and 3rd pin of 5V-3.3V power conversion chip N2 is connected with 5V network and one end of capacitor C14, the 2nd pin of chip N2 is connected with the other end of capacitor C14 and GND, the 5th pin of chip N2 is connected with one end of capacitor C15 and 3V3 network, the other end of capacitor C15 is connected with GND; one end of capacitor C84 is connected with 5V network and one end of inductor L3, the other end of capacitor C84 is connected with GND and one end of inductor L4; one end of capacitor C85 is connected with 5VA network and the other end of inductor L3, the other end of capacitor C85 is connected with AGND and the other end of inductor L4.

5. A CIR-based audio and data conversion circuit as recited in claim 1, wherein, The data conversion unit circuit is that the 5th pin of USB-serial data conversion chip N5 is connected with one end of 8MHZ crystal oscillator Y1 and one end of capacitor C71, the 6th pin of chip N5 is connected with the other end of 8MHZ crystal oscillator and one end of capacitor C72, the other end of capacitor C71 and capacitor C72 is connected with GND, the 7th pin of chip N5 is connected with one end of capacitor C50 and resistor R29, the other end of capacitor C50 is connected with GND, the other end of resistor R29 is connected with 3V3 network, the 8th pin of chip N5 is connected with GND and one end of capacitor C51, the 9th pin of chip N5 is connected with 3V3 network and the other end of capacitor C51, the 20th pin of chip N5 is connected with GND, the 21st pin of chip N5 is connected with UART0_TX network, the 22nd pin of chip N5 is connected with UART0_RX network, the 23rd pin of chip N5 is connected with one end of capacitor C59 and GND, the 24th pin of chip N5 is connected with 3V3 network and the other end of capacitor C59, the 30th pin of chip N5 is connected with UART1_TX network, the 31st pin of chip N5 is connected with UART1_RX network, the 32nd pin of chip N5 is connected with USB_C_N network, the 33rd pin of chip N5 is connected with USB_C_P network, the 35th pin of chip N5 is connected with one end of capacitor C52 and GND, the 36th pin of chip N5 is connected with 3V3 network and the other end of capacitor C52, the 44th pin of chip N5 is connected with one end of resistor R27, the other end of resistor R27 is connected with GND, the 47th pin of chip N5 is connected with one end of capacitor C46 and GND, the 48th pin of chip N5 is connected with 3V3 network and the other end of capacitor C46; 485 The 1st pin of the chip N7 is connected with the UART1 RX network and one end of the resistor R105, the other end of the resistor R105 is connected with the 5V network, the 2nd and 3rd pins of the chip N7 are connected with the 3rd pin of the triode VT1, the 2nd pin of the triode VT1 is connected with the GND, the 1st pin of the triode VT1 is connected with the resistor R106 and one end of the resistor R104, the other end of the resistor R106 is connected with the 5V network, the other end of the resistor R104 is connected with the UART1 TX network, the 4th pin of the chip N7 is connected with the GND, the 5th pin of the chip N7 is connected with one end of the resistor R75 and the GND, the 7th pin of the chip N7 is connected with the other end of the resistor R75 and one end of the resistor R71, the other end of the resistor R71 is connected with the RS485- network, the 8th pin of the chip N7 is connected with one end of the resistor R74, one end of the capacitor C70 and the 5V network; the 6th pin of the chip N7 is connected with the other end of the resistor R74 and one end of the resistor R70, the other end of the resistor R70 is connected with the RS485+ network; 422 The 1st pin of the chip N6 is connected with the 5V network and one end of the capacitor C45 and the capacitor C34, the other ends of the capacitor C45 and the capacitor C34 are connected with the GND, the 2nd pin of the chip N6 is connected with the UART0 RX network; the 3rd pin of the chip N6 is connected with the UART0 TX network; the 4th pin of the chip N6 is connected with the GND, the 5th pin of the chip N6 is connected with the resistor R23 and one end of the resistor R28, the other end of the resistor R28 is connected with the VD15, one end of the capacitor C41 and the RS422_DATAA+ network, the 6th pin of the chip N6 is connected with the other end of the resistor R23 and one end of the resistor R22, the other end of the resistor R22 is connected with the VD14, one end of the capacitor C42 and the RS422_DATAA- network, the 7th pin of the chip N6 is connected with the resistor R17, the resistor R19 and one end of the resistor R21, the other end of the resistor R17 is connected with the GND, the other end of the resistor R21 is connected with the VD16, one end of the capacitor C43 and the RS422_DATAB- network, the 8th pin of the chip N6 is connected with the resistor R16, one end of the resistor R21 and the other end of the resistor R19, the other end of the resistor R16 is connected with the 5V network, the other end of the resistor R18 is connected with the VD17, one end of the capacitor C44 and the RS422_DATAB+ network, the capacitor C41, the capacitor C42, the capacitor C43, the capacitor C44, the VD14, the VD15, the VD16 and the VD17 are connected with the GND; the USB_C_N network and the USB_C_P network are connected with the interface unit.

6. A CIR-based audio and data conversion circuit as recited in claim 1, wherein, The specific circuit of the audio conversion unit is that the pins 7 and 10 of the USB-analog audio conversion chip N1 are connected with GND, the pin 9 of the chip N1 is connected with one end of the capacitor C12, the other end of the capacitor C12 is connected with GND, the pins 14, 16 and 23 of the chip N1 are connected with GND, the pin 24 of the chip N1 is connected with AGND, the pin 26 of the chip N1 is connected with one end of the capacitor C16, the other end of the capacitor C16 is connected with AGND, the pin 27 of the chip N1 is connected with one end of the capacitor C13, the other end of the capacitor C13 is connected with the MIC network, the pin 29 of the chip N1 is connected with the 5VA network and one end of the capacitor C11, the other end of the capacitor C11 is connected with AGND, the pin 32 of the chip N1 is connected with the SPR network, the pin 33 of the chip N1 is connected with AGND, the pin 34 of the chip N1 is connected with the 5VA network and one end of the capacitor C7, the other end of the capacitor C7 is connected with AGND, the pin 35 of the chip N1 is connected with the 5V network and one end of the capacitor C6, the other end of the capacitor C6 is connected with GND, the pin 36 of the chip N1 is connected with GND, the pin 37 of the chip N1 is connected with one end of the capacitor C1, the other end of the capacitor C1 is connected with AGND, the pin 41 of the chip N1 is connected with one end of the resistor R3, the other end of the resistor R3 is connected with the USB_A_P network, the pin 42 of the chip N1 is connected with one end of the resistor R2, the other end of the resistor R2 is connected with the USB_A_N network; the USB_A_N network and the USB_A_P network are connected with the interface unit.

7. A CIR-based audio and data conversion circuit as recited in claim 1, wherein, The specific circuit of the audio amplification unit is that the 0th pin of the SP signal amplification chip N4 is connected with GND, the 7th pin of the chip N4 is connected with GND and one end of the capacitor C49, the other end of the capacitor C49 is connected with the 8th pin of the chip N4, the 10th pin of the chip N4 is connected with the 5V_AVDD network, the 14th, 15th and 16th pins of the chip N4 are connected with GND, the 17th pin of the chip N4 is connected with one end of the resistor R37, the other end of the resistor R37 is connected with the 3V3 network, the 19th pin of the chip N4 is connected with one end of the capacitor C55, the other end of the capacitor C55 is connected with GND, the 20th pin of the chip N4 is connected with one end of the capacitor C56, the other end of the capacitor C56 is connected with the SPR network, the 21st pin of the chip N4 is connected with the 5V_AVDD network, the 23rd pin of the chip N4 is connected with the resistor R20 and one end of the resistor R26, the other end of the resistor R20 is connected with the 13.8V network, the other end of the resistor R26 is connected with GND, the 24th pin of the chip N4 is connected with GND, the 25th pin of the chip N4 is connected with one end of the capacitor C48, the 26th and 27th pins of the chip N4 are connected with the other end of the capacitor C48 and one end of the L9, the other end of the L9 is connected with the capacitor C38, one end of the capacitor C40 and the SPK- network, the 28th and 29th pins of the chip N4 are connected with one end of the capacitor C32 and one end of the L7, the other end of the L7 is connected with the other end of the capacitor C38, one end of the capacitor C36 and the SPK+ network, the other end of the capacitor C36 is connected with the other end of the capacitor C40 and GND, the 30th pin of the chip N4 is connected with the other end of the capacitor C32, the 31st, 32nd and 33rd pins of the chip N4 are connected with one end of the capacitor C31, the negative end of the capacitor C29 and GND, the 34th, 35th, 36th and 37th pins of the chip N4 are connected with the other end of the capacitor C31, the positive end of the capacitor C29, one end of the capacitor C30 and the 13.8V network, the 38th, 39th and 40th pins of the chip N4 are connected with the other end of the capacitor C30 and GND; the SPK+ network and the SPK- network are connected with the interface unit.

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