Gallium nitride wafer level crystal back heat dissipation structure
By covering the back of the gallium nitride wafer with a grid-like PI layer and filling it with a metallic silver layer, the problems of cutting damage and poor heat conduction and dissipation caused by insufficient thickness of the back metal layer were solved, thus achieving improved mechanical strength and temperature stability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-12
- Publication Date
- 2026-04-03
AI Technical Summary
Existing gallium nitride wafer-level products cannot be cut or are damaged during cutting when the thickness of the metal layer on the back of the chip is insufficient, resulting in a decrease in yield. On the other hand, when the thickness of the metal layer is too large, it affects the heat conduction and heat dissipation of the chip, resulting in unstable temperature.
A grid-like protective layer is covered on the back of the thinned wafer. The protective layer is filled with a metal layer as a heat dissipation layer. The protective layer is composed of a PI layer and the metal layer is a silver layer with a thickness of 10-30um. The grid holes are square to enhance mechanical strength and accelerate heat conduction and dissipation.
The PI layer enhances mechanical strength and prevents breakage during cutting, while the metallic silver layer improves thermal conductivity and heat dissipation, ensuring stable chip temperature during operation.
Smart Images

Figure CN224084050U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to a gallium nitride wafer-level back-end heat dissipation structure, belonging to the field of semiconductor manufacturing technology. Background Technology
[0002] Gallium nitride (GaN) wafer-level manufacturing refers to semiconductor manufacturing processes based on gallium nitride materials and carried out at the wafer scale. Gallium nitride is a wide-bandgap semiconductor material with advantages such as high electron mobility, high breakdown voltage, high power density, and high-frequency characteristics, and is widely used in power electronics, radio frequency devices, and optoelectronics. Wafer-level manufacturing emphasizes the processing, integration, and packaging of devices at the entire wafer level, rather than the independent processing of individual chips.
[0003] In the current manufacturing process of gallium nitride wafer-level products, back-side thinning is one of the key processes, mainly used to reduce chip thickness, improve heat dissipation performance, and achieve 3D integration. A Ti 1k / Ni 3k / Ag10k metal layer (total thickness of approximately 1.4μm) is deposited on the back side of the thinned wafer (crystal back) to aid thermal conductivity and facilitate back-end assembly.
[0004] However, considering the existing cutting process, the metal layer on the back of the chip cannot be too thick. If the metal layer is too thick, it will cause problems such as being unable to cut or damage during cutting, thereby reducing the yield. If the metal layer is too thin, it will affect the heat conduction and heat dissipation of the chip, making the chip temperature unstable during operation.
[0005] In conclusion, the existing technology obviously has inconveniences and defects in practical use, so it is necessary to improve it. Utility Model Content
[0006] This invention addresses the shortcomings of the prior art by providing a gallium nitride wafer-level back-side heat dissipation structure. It can cover the back of the thinned wafer with a protective layer as a cutting path, and then fill it with a metal layer as a heat dissipation layer. This not only accelerates the heat conduction and dissipation of the chip by utilizing the thick metal layer, but also avoids the problem of cutting and cracking.
[0007] To solve the above technical problems, the present invention adopts the following technical solution:
[0008] The gallium nitride wafer-level back-side heat dissipation structure includes a thinned wafer, the back of which is covered with a grid-like protective layer that serves as a dicing channel, and the thickness of the protective layer is 10-30µm; the grid holes of the protective layer are filled with a metal layer that serves as a heat dissipation layer, the thickness of the metal layer is 10-30µm, and the bottom of the metal layer is connected to the back of the thinned wafer.
[0009] Furthermore, the protective layer consists of an outer circular segment and multiple horizontal and vertical segments arranged vertically inside.
[0010] Furthermore, the horizontal and vertical segments are evenly distributed, and multiple filling holes are arrayed between the horizontal and vertical segments, with the filling holes having a square structure.
[0011] Furthermore, the outer diameter of the circular segment is smaller than the diameter of the thinned wafer.
[0012] Furthermore, the cross-sectional width of the horizontal segment, vertical segment, and circular segment is greater than 20 μm.
[0013] Furthermore, the protective layer is a PI layer.
[0014] Furthermore, the metal layer is a silver layer.
[0015] Compared with the prior art, the present invention, by adopting the above technical solution, has the following advantages:
[0016] This invention creates a grid-shaped PI layer on the back side of the thinned wafer corresponding to the dicing position on the front side of the wafer. The PI layer can enhance the mechanical strength of the thinned wafer and prevent the wafer from breaking during dicing. A 10-30um thick metallic silver layer is filled into the grid holes of the PI layer as a heat dissipation layer. The thicker metallic silver layer can accelerate the heat conduction and heat dissipation of the chip, making the chip temperature stable during operation.
[0017] The present invention will now be described in detail with reference to the accompanying drawings and embodiments. Attached Figure Description
[0018] Figure 1 This is a schematic diagram of the structure of this utility model;
[0019] Figure 2 This is a schematic diagram of the grain structure;
[0020] Figure 3 yes Figure 2 Top view of the structure.
[0021] In the figure, 1-thinned wafer, 2-metal layer, 3-protective layer, 31-horizontal segment, 32-vertical segment, 33-circular segment. Detailed Implementation
[0022] To provide a clearer understanding of the technical features, objectives, and effects of this utility model, the specific embodiments of this utility model are now described with reference to the accompanying drawings.
[0023] like Figure 1 As shown, this utility model provides a gallium nitride wafer-level back-side heat dissipation structure, including a thinned wafer 1, a grid-shaped protective layer 3 covering the back side of the thinned wafer 1, the protective layer 3 serving as a cutting channel, a metal layer 2 filling the grid holes of the protective layer 3, the metal layer 2 serving as a heat dissipation layer, and the bottom of the metal layer 2 being connected to the back side of the thinned wafer 1.
[0024] The protective layer 3 consists of an outer circular segment 33 and multiple vertically intersecting horizontal segments 31 and vertical segments 32 inside. The horizontal segments 31 and vertical segments 32 are evenly distributed, and multiple filling holes are arrayed between the horizontal segments 31 and vertical segments 32. The filling holes have a square structure.
[0025] The thickness of the protective layer 3 is 10-30 μm.
[0026] The outer diameter of the circular segment 33 is smaller than the diameter of the thinned wafer 1.
[0027] The cross-sectional width of the horizontal segment 31, the vertical segment 32, and the circular segment 33 is greater than 20 μm.
[0028] The protective layer 3 is a PI layer (polyimide layer). The PI layer is coated on the back side of the thinned wafer 1 to enhance the mechanical strength of the thinned wafer 1 and to serve as a dicing channel to prevent breakage.
[0029] The thickness of the metal layer 2 is 10-30 μm.
[0030] The metal layer 2 is a silver layer.
[0031] like Figure 2 and Figure 3 The schematic diagram shown illustrates that the grains are composed of... Figure 1 The individual independent unit cut from the middle structure has a square protective layer 3 and a metal layer 2 covering the back of the grain.
[0032] The width of one side of the protective layer 3 is 10 μm.
[0033] The specific working principle of this utility model is as follows:
[0034] This invention creates a grid-shaped PI layer on the back side of the thinned wafer corresponding to the dicing position on the front side of the wafer. The PI layer can enhance the mechanical strength of the thinned wafer and prevent the wafer from breaking during dicing. A 10-30um thick metallic silver layer is filled into the grid holes of the PI layer as a heat dissipation layer. The thicker metallic silver layer can accelerate the heat conduction and heat dissipation of the chip, making the chip temperature stable during operation.
[0035] The above description provides examples of the preferred embodiments of this utility model. Any aspects not detailed herein are common knowledge to those skilled in the art. The scope of protection of this utility model is determined by the claims. Any equivalent modifications based on the technical teachings of this utility model are also within the scope of protection of this utility model.
Claims
1. A gallium nitride wafer-level back-end heat dissipation structure, characterized in that: The wafer includes a thinned wafer (1), the back of which is covered with a grid-like protective layer (3), which serves as a dicing channel and has a thickness of 10-30 μm; the grid holes of the protective layer (3) are filled with a metal layer (2), which serves as a heat dissipation layer and has a thickness of 10-30 μm; the bottom of the metal layer (2) is connected to the back of the thinned wafer (1).
2. The gallium nitride wafer-level back-end heat dissipation structure as described in claim 1, characterized in that: The protective layer (3) consists of an outer circular segment (33) and multiple vertical segments (31) and vertical segments (32) arranged vertically and intersectingly inside.
3. The gallium nitride wafer-level back-end heat dissipation structure as described in claim 2, characterized in that: The horizontal segment (31) and the vertical segment (32) are evenly distributed, and multiple filling holes are arranged in an array between the horizontal segment (31) and the vertical segment (32). The filling holes are square structures.
4. The gallium nitride wafer-level back-end heat dissipation structure as described in claim 2, characterized in that: The outer diameter of the circular segment (33) is smaller than the diameter of the thinned wafer (1).
5. The gallium nitride wafer-level back-end heat dissipation structure as described in claim 2, characterized in that: The cross-sectional width of the horizontal segment (31), vertical segment (32) and circular segment (33) is greater than 20 μm.
6. The gallium nitride wafer-level back-end heat dissipation structure as described in claim 1, characterized in that: The protective layer (3) is a PI layer.
7. The gallium nitride wafer-level back-end heat dissipation structure as described in claim 1, characterized in that: The metal layer (2) is a silver layer.