IO acquisition and control circuit suitable for subway train passive device

Abstract

The utility model discloses an IO acquisition and control circuit suitable for a subway train passive device. Comprising a train passive device left detection box interface CN1, a train passive device right detection box interface CN2, NOT gates U1-U4, a four-input AND gate U5, a double-input OR gate U6, a 20ms delay circuit, a reset control interface CN3, a brake control detection interface CN4, a brake output detection interface CN5, a reset control relay RY5, a reset relay RY2, a brake control relay RY1, brake output relays RY3-RY4, diodes D1-D2 and a toggle switch K1. And brake interfaces CN6 to CN7. The state of a passive device is collected through the left detection box interface and the right detection box interface, and train braking is controlled through the braking interface; after the circuit triggers a train to brake, control over a train braking system can be relieved through the reset control interface or the toggle switch. And the key loop and the output state of the circuit can be acquired and detected through the brake control detection interface and the brake output detection interface.

Description

Technical Field

[0001] This utility model relates to the field of data acquisition and control, and in particular to an IO acquisition and control circuit suitable for passive devices of subway trains. Background Technology

[0002] The passive devices of subway trains are generally multiple mechanical devices with simple limit switches. The electrical structure is simple, but the data acquisition system usually uses an independent data acquisition host. This data acquisition host requires independent installation space and a vehicle communication interface, which increases the complexity of the system.

[0003] To simplify system design and meet the requirements of high integration in metro train systems, an IO acquisition and control circuit suitable for passive devices in metro trains is proposed. This circuit can be embedded in other system hosts, and the status detection and control of passive devices can be completed by other systems providing simple detection and control interfaces. Summary of the Invention

[0004] This invention provides an IO acquisition and control circuit suitable for passive devices in subway trains, which simplifies the system design for passive device detection and improves the system integration of subway trains.

[0005] This utility model provides an IO acquisition and control circuit suitable for the passive device of a subway train, characterized in that it includes a left detection box interface CN1 for the passive device, a right detection box interface CN2 for the passive device, NOT gates U1~U4, a four-input AND gate U5, a two-input OR gate U6, a 20ms delay circuit, a reset control interface CN3, a brake control detection interface CN4, a brake output detection interface CN5, a reset control relay RY5, a reset relay RY2, a brake control relay RY1, brake output relays RY3~RY4, diodes D1~D2, a toggle switch K1, and brake interfaces CN6~CN7;

[0006] An IO acquisition and control circuit applicable to the aforementioned IO acquisition and control circuit for a subway train passive device is characterized in that: pins 1, 3, and 5 of the left detection box interface CN1 of the train passive device and pins 1 and 5 of the right detection box interface CN2 of the train passive device are electrically connected to the VDD24V network; pin 11 of the reset control relay RY5 is electrically connected to the VDD24V network; and the normally closed contact of the toggle switch K1 is electrically connected to the VDD24V network.

[0007] An IO acquisition and control circuit applicable to the aforementioned IO acquisition and control circuit for a subway train passive detection device is characterized in that: pins 2 and 6 of the left detection box interface CN1 and the right detection box interface CN2 of the train passive detection device are electrically connected to pin 1 of NOT gates U1 to U4, respectively; pins 4 and 7 of the left detection box interface CN1 are electrically connected; pins 4 and 7 of the right detection box interface CN2 are electrically connected; pin 8 of the left detection box interface CN1 is electrically connected to pin 3 of the right detection box interface CN2; pin 8 of the right detection box interface CN2 is electrically connected to pin 2 of a dual-input OR gate U6; pins 2 of NOT gates U1 to U4 are electrically connected to pins 1 to 4 of a quad-input AND gate U5, respectively; and pin 5 of the quad-input AND gate U5 is electrically connected to pin 1 of the dual-input OR gate U6.

[0008] An IO acquisition and control circuit applicable to the aforementioned IO acquisition and control circuit for a passive device of a subway train is characterized in that: pin 3 of the dual-input OR gate U6 is electrically connected to the input of the 20ms delay circuit; the output of the 20ms delay circuit is electrically connected to pin 43 of the braking control relay RY1 and pin 12 of the reset relay RY2.

[0009] An IO acquisition and control circuit applicable to the aforementioned IO acquisition and control circuit, suitable for a passive device of a subway train, is characterized in that: pin 44 and pin 1 of the braking control relay RY1, pin 11 of the reset relay RY2, and the positive terminal of diode D1 are electrically connected; pin 33 of the braking control relay RY1 is electrically connected to pins 1 and 44 of the reset relay RY2; pin 34 of the braking control relay RY1 is electrically connected to pin 43 of the reset relay RY2 and pin 12 of the reset control relay RY5; pin 11 of the braking control relay RY1 is electrically connected to pin 1 of the braking control detection interface CN4; pin 12 of the braking control relay RY1 is electrically connected to pin 2 of the braking control detection interface CN4; pin 2 of the braking control relay RY1 is electrically connected to the GND network; and pin 2 of the reset relay RY2 is electrically connected to the GND network.

[0010] An IO acquisition and control circuit applicable to the above-mentioned IO acquisition and control circuit is characterized in that: pin 2 of the reset control relay RY5 and pin 2 of the reset control interface CN3 are electrically connected to the GND network.

[0011] An IO acquisition and control circuit applicable to the above-mentioned IO acquisition and control circuit is characterized in that: pin 1 of the reset control relay RY5 is electrically connected to pin 1 of the reset control interface CN3.

[0012] An IO acquisition and control circuit applicable to the above-mentioned IO acquisition and control circuit for a passive device of a subway train is characterized in that: the common contact of the toggle switch is electrically connected to the VCC24V network, and the normally open contact of the toggle switch is electrically connected to the positive terminal of the diode D2.

[0013] An IO acquisition and control circuit applicable to the above-mentioned IO acquisition and control circuit is characterized in that: the negative terminal of diode D1 is electrically connected to the negative terminal of diode D2 and pin 1 of brake output relays RY3~RY4.

[0014] An IO acquisition and control circuit applicable to the aforementioned IO acquisition and control circuit for a passive device of a subway train is characterized in that: pin 21 of the brake output relay RY3 is electrically connected to pin 22 of the brake output relay RY4; pins 43, 44, 33, 34, 12, and 11 of the brake output relay RY3 are electrically connected to pins 1 to 6 of the brake interface CN6, respectively; pin 22 of the brake output relay RY3 is electrically connected to pin 1 of the brake output detection interface CN5; and pin 2 of the brake output relay RY3 is electrically connected to the GND network.

[0015] An IO acquisition and control circuit applicable to the aforementioned IO acquisition and control circuit for a passive device of a subway train is characterized in that: pins 43, 44, 33, 34, 12, and 11 of the brake output relay RY4 are electrically connected to pins 1 to 6 of the brake interface CN7, respectively; pin 21 of the brake output relay RY4 is electrically connected to pin 2 of the brake output detection interface CN5; and pin 2 of the brake output relay RY4 is electrically connected to the GND network.

[0016] An IO acquisition and control circuit applicable to a passive device of a subway train, applied to the aforementioned IO acquisition and control circuit, is characterized in that: the VCC24V network and VDD24V network are power supply networks, and the GND network is a power reference ground network. The working principle of this IO acquisition and control circuit applicable to a passive device of a subway train is as follows:

[0017] Pins 1 and 2, and pins 5 and 6 of the left detection box interface CN1 and the right detection box interface CN2 of the train passive device are respectively connected to the four sets of normally open limit switch contacts of the train passive device. Pins 3 and 4, and pins 7 and 8 of the left detection box interface CN1 and the right detection box interface CN2 of the train passive device are respectively connected to the four sets of normally closed limit switch contacts of the train passive device.

[0018] When the VCC24V network and GND network of the IO acquisition and control circuit are connected to a DC24V power supply, the potential of pin 1 of NOT gates U1~U4 is the same as the potential of the GND network, and pin 2 of NOT gates U1~U4 is DC24V. Therefore, pin 5 of the four-input AND gate U5 is DC24V, and pins 1 and 2 of the two-input OR gate U6 are DC24V, thus pin 3 of the two-input OR gate U6 is DC24V. After a 20ms delay, the output of the 20ms delay circuit is DC24V. Furthermore, pin 1 of the braking control relay RY1 is DC24V, causing the braking control relay RY1 to engage. After engagement, pins 43, 44, and pin 3 of the braking control relay RY1... 3. Pins 3 and 4 are conducting, while pins 21 and 22, and pins 11 and 12 are not conducting. Furthermore, reset relay RY2 is energized and engaged. After engagement, pins 43 and 44, and pins 33 and 34 of reset relay RY2 are conducting, while pins 21 and 22, and pins 11 and 12 are not conducting. Further, pin 1 of brake output relays RY3~RY4 is DC24V, causing brake relays RY3~RY4 to engage. After engagement, pins 43 and 44, and pins 33 and 34 of brake output relays RY3~RY4 are conducting, while pins 21 and 22, and pins 11 and 12 are not conducting. Users can connect the train braking circuit to brake interfaces CN6~CN7 as needed to achieve train braking control. When the left or right detection box of the passive device is triggered, the normally open limit switch contacts connected to pins 1 and 2 and pins 5 and 6 of the left detection box interface CN1 and the right detection box interface CN2 of the train passive device close, and the normally closed limit switch contacts connected to pins 3 and 4 and pins 7 and 8 of the left detection box interface CN1 and the right detection box interface CN2 of the train passive device open. Then, the potential of the logic judgment circuit composed of NOT gates U1~U4, four-input AND gate U5, and two-input OR gate U6 input to the 20ms delay circuit is the same as that of the GND network. After a 20ms delay, the 20ms delay... The output potential of the circuit is the same as that of the GND network. Furthermore, the potential of pin 1 of the brake control relay RY1 is the same as that of the GND network, causing the brake control relay RY1 to drop. After dropping, pins 43 and 44, and pins 33 and 34 of the brake control relay RY1 are not conducting, while pins 21 and 22, and pins 11 and 12 are conducting. Furthermore, the potential of pin 1 of the brake output relays RY3-RY4 is the same as that of GND, causing the brake output relays RY3-RY4 to drop. Furthermore, because the brake output relays RY3-RY4 have dropped, the brake circuit connected to the brake interface triggers braking.

[0019] When the left or right detection box of the passive device is triggered and automatically recovers, after passing through the logic judgment circuit composed of NOT gates U1~U4, four-input AND gate U5, and two-input OR gate U6, and the 20ms delay circuit, the output potential of the 20ms delay circuit recovers to DC24V. Since the 43 and 44 contacts of the brake control relay RY1 are not conducting, and the 11 and 12 contacts of the reset relay RY2 are not conducting, the potential of pin 1 of the brake output relays RY3~RY4 still cannot recover to DC24V, thus maintaining the braking state.

[0020] By connecting a DC24V power supply to the reset control interface, the reset control relay RY5 is activated. After activation, contacts 11 and 12 of the reset control relay open, causing the reset relay RY2 to drop. Then, contacts 11 and 12 of the reset relay RY2 close. Furthermore, since the output potential of the 20ms delay circuit has returned to DC24V, the potential of pin 1 of the brake control relay RY1 returns to DC24V. Consequently, the potential of pin 1 of the brake output relays RY3~RY4 also returns to DC24V, and the brake output relays RY3~RY4 are activated, thereby releasing the train braking state.

[0021] Alternatively, by turning the toggle switch K1 to the normally open contact, the positive potential of D2 is made to DC24V, which in turn makes the potential of pin 1 of the brake output relays RY3~RY4 DC24V, thereby causing the brake output relays RY3~RY4 to be energized, thus releasing the train's braking state.

[0022] The engagement of the brake control relay RY1 can be detected by connecting to the brake control detection interface CN4; the engagement of the brake output relays RY3~RY4 can be detected by connecting to the brake output detection interface CN5. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of an IO acquisition and control circuit for a passive device of a subway train, according to Embodiment 1 of this utility model. Detailed Implementation

[0024] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, not the entire structure.

[0025] Figure 1 This is a schematic diagram of an I / O acquisition and control circuit for a passive device in a subway train, provided in an embodiment of this utility model. (Reference) Figure 1The IO acquisition and control circuit includes the left detection box interface CN1 of the train passive device, the right detection box interface CN2 of the train passive device, NOT gates U1~U4, four-input AND gate U5, two-input OR gate U6, a 20ms delay circuit, a reset control interface CN3, a brake control detection interface CN4, a brake output detection interface CN5, a reset control relay RY5, a reset relay RY2, a brake control relay RY1, a brake output relay RY3~RY4, diodes D1~D2, a toggle switch K1, and brake interfaces CN6~CN7.

[0026] Pins 1, 3, and 5 of the left detection box interface CN1 of the train passive device and pins 1 and 5 of the right detection box interface CN2 of the train passive device are electrically connected to the VDD24V network; pin 11 of the reset control relay RY5 is electrically connected to the VDD24V network; the normally closed contact of the toggle switch K1 is electrically connected to the VDD24V network.

[0027] Pins 2 and 6 of the left detection box interface CN1 and the right detection box interface CN2 of the train passive detection device are electrically connected to pin 1 of NOT gates U1 to U4, respectively; pins 4 and 7 of the left detection box interface CN1 are electrically connected; pins 4 and 7 of the right detection box interface CN2 are electrically connected; pin 8 of the left detection box interface CN1 is electrically connected to pin 3 of the right detection box interface CN2; pin 8 of the right detection box interface CN2 is electrically connected to pin 2 of the dual-input OR gate U6; pins 2 of NOT gates U1 to U4 are electrically connected to pins 1 to 4 of the four-input AND gate U5, respectively; pin 5 of the four-input AND gate U5 is electrically connected to pin 1 of the dual-input OR gate U6.

[0028] Pin 3 of the dual-input OR gate U6 is electrically connected to the input of the 20ms delay circuit; the output of the 20ms delay circuit is electrically connected to pin 43 of the braking control relay RY1 and pin 12 of the reset relay RY2.

[0029] Pin 44 and pin 1 of brake control relay RY1, pin 11 of reset relay RY2, and the positive terminal of diode D1 are electrically connected; pin 33 of brake control relay RY1 is electrically connected to pins 1 and 44 of reset relay RY2; pin 34 of brake control relay RY1 is electrically connected to pin 43 of reset relay RY2 and pin 12 of reset control relay RY5; pin 11 of brake control relay RY1 is electrically connected to pin 1 of brake control detection interface CN4; pin 12 of brake control relay RY1 is electrically connected to pin 2 of brake control detection interface CN4; pin 2 of brake control relay RY1 is electrically connected to the GND network; pin 2 of reset relay RY2 is electrically connected to the GND network.

[0030] Pin 2 of the reset control relay RY5 and pin 2 of the reset control interface CN3 are electrically connected to the GND network;

[0031] Pin 1 of the reset control relay RY5 is electrically connected to pin 1 of the reset control interface CN3;

[0032] The common contact of the toggle switch is electrically connected to the VCC24V network, and the normally open contact of the toggle switch is electrically connected to the positive terminal of diode D2.

[0033] The cathode of diode D1 is electrically connected to the cathode of diode D2 and pin 1 of brake output relays RY3~RY4;

[0034] Pin 21 of brake output relay RY3 is electrically connected to pin 22 of brake output relay RY4; pins 43, 44, 33, 34, 12, and 11 of brake output relay RY3 are electrically connected to pins 1 to 6 of brake interface CN6, respectively; pin 22 of brake output relay RY3 is electrically connected to pin 1 of brake output detection interface CN5; pin 2 of brake output relay RY3 is electrically connected to the GND network.

[0035] Pins 43, 44, 33, 34, 12, and 11 of the brake output relay RY4 are electrically connected to pins 1 to 6 of the brake interface CN7, respectively; pin 21 of the brake output relay RY4 is electrically connected to pin 2 of the brake output detection interface CN5; pin 2 of the brake output relay RY4 is electrically connected to the GND network.

[0036] The VCC24V and VDD24V networks are power supply networks, while the GND network is the power reference ground network.

[0037] In the technical solution of this embodiment, the implementation process of the IO acquisition and control circuit is as follows: (Refer to...) Figure 1When pins 1 and 2, and pins 5 and 6 of the left detection box interface CN1 and the right detection box interface CN2 of the train passive device are respectively connected to the four sets of normally open limit switch contacts of the train passive device, and pins 3 and 4, and pins 7 and 8 of the left detection box interface CN1 and the right detection box interface CN2 of the train passive device are respectively connected to the four sets of normally closed limit switch contacts of the train passive device, and the VCC24V network and GND network of the IO acquisition and control circuit are connected to the DC24V power supply, the potential of pin 1 of NOT gates U1~U4 is the same as the potential of the GND network, and pin 2 of NOT gates U1~U4 is DC24V, then pin 5 of the four-input AND gate U5 is DC24V, and pins 1 and 2 of the two-input OR gate U6 are DC24V, thus making pin 3 of the two-input OR gate U6 DC24V. After a 20ms delay, the output of the 20ms delay circuit is DC24V; First, pin 1 of the brake control relay RY1 is energized with DC 24V, causing RY1 to engage. Pins 43 and 44, and 33 and 34 of RY1 are then conducting, while pins 21 and 22, and 11 and 12 are de-energized. Next, the reset relay RY2 is energized and engaged, with pins 43 and 44, and 33 and 34 conducting, while pins 21 and 22, and 11 and 12 are de-energized. Finally, pin 1 of the brake output relays RY3-RY4 is energized with DC 24V, causing them to engage. Pins 43 and 44, and 33 and 34 of RY3-RY4 are then conducting, while pins 21 and 22, and 11 and 12 are de-energized. Users can connect the train braking circuit to brake interfaces CN6-CN7 as needed to achieve train braking control.

[0038] When the left or right detection box of the passive device is triggered, the normally open limit switch contacts connected to pins 1 and 2 and pins 5 and 6 of the left detection box interface CN1 and the right detection box interface CN2 of the train passive device close, and the normally closed limit switch contacts connected to pins 3 and 4 and pins 7 and 8 of the left detection box interface CN1 and the right detection box interface CN2 of the train passive device open. Then, the potential of the logic judgment circuit composed of NOT gates U1~U4, four-input AND gate U5, and two-input OR gate U6 input to the 20ms delay circuit is the same as that of the GND network. After a 20ms delay, the 20ms delay... The output potential of the circuit is the same as that of the GND network. Furthermore, the potential of pin 1 of the brake control relay RY1 is the same as that of the GND network, causing the brake control relay RY1 to drop. After dropping, pins 43 and 44, and pins 33 and 34 of the brake control relay RY1 are not conducting, while pins 21 and 22, and pins 11 and 12 are conducting. Furthermore, the potential of pin 1 of the brake output relays RY3-RY4 is the same as that of GND, causing the brake output relays RY3-RY4 to drop. Furthermore, because the brake output relays RY3-RY4 have dropped, the brake circuit connected to the brake interface triggers braking.

[0039] When the left or right detection box of the passive device is triggered and automatically recovers, after passing through the logic judgment circuit composed of NOT gates U1~U4, four-input AND gate U5, and two-input OR gate U6, and the 20ms delay circuit, the output potential of the 20ms delay circuit recovers to DC24V. Since the 43 and 44 contacts of the brake control relay RY1 are not conducting, and the 11 and 12 contacts of the reset relay RY2 are not conducting, the potential of pin 1 of the brake output relays RY3~RY4 still cannot recover to DC24V, thus maintaining the braking state.

[0040] By connecting a DC24V power supply to the reset control interface, the reset control relay RY5 is activated. After activation, contacts 11 and 12 of the reset control relay open, causing the reset relay RY2 to drop. Then, contacts 11 and 12 of the reset relay RY2 close. Furthermore, since the output potential of the 20ms delay circuit has returned to DC24V, the potential of pin 1 of the brake control relay RY1 returns to DC24V. Consequently, the potential of pin 1 of the brake output relays RY3~RY4 also returns to DC24V, and the brake output relays RY3~RY4 are activated, thereby releasing the train braking state.

[0041] Alternatively, by turning the toggle switch K1 to the normally open contact, the positive potential of D2 is made to DC24V, which in turn makes the potential of pin 1 of the brake output relays RY3~RY4 DC24V, thereby causing the brake output relays RY3~RY4 to be energized, thus releasing the train's braking state.

[0042] The engagement of the brake control relay RY1 can be detected by connecting to the brake control detection interface CN4; the engagement of the brake output relays RY3~RY4 can be detected by connecting to the brake output detection interface CN5.

Claims

1. An I / O acquisition and control circuit suitable for passive devices in subway trains, characterized in that, Includes train passive device left detection box interface CN1, train passive device right detection box interface CN2, NOT gates U1~U4, four-input AND gate U5, two-input OR gate U6, 20ms delay circuit, reset control interface CN3, brake control detection interface CN4, brake output detection interface CN5, reset control relay RY5, reset relay RY2, brake control relay RY1, brake output relays RY3~RY4, diodes D1~D2, toggle switch K1, and brake interface CN6~CN7; Pins 1, 3, and 5 of the left detection box interface CN1 of the train passive device and pins 1 and 5 of the right detection box interface CN2 of the train passive device are electrically connected to the VDD24V network. Pin 11 of the reset control relay RY5 is electrically connected to the VDD24V network; The normally closed contact of the toggle switch K1 is electrically connected to the VDD24V network; Pins 2 and 6 of the left detection box interface CN1 and the right detection box interface CN2 of the train passive detection device are electrically connected to pin 1 of NOT gates U1~U4, respectively. The left detection box interface CN1 of the train passive detection device is electrically connected to pins 4 and 7. The right detection box interface CN2 of the train passive detection device is electrically connected to pins 4 and 7. Pin 8 of the left detection box interface CN1 of the train passive detection device is electrically connected to pin 3 of the right detection box interface CN2 of the train passive detection device. The 8th pin of the right detection box interface CN2 of the train passive detection device is electrically connected to the 2nd pin of the dual-input OR gate U6.

2. The I / O acquisition and control circuit for a passive device in a subway train according to claim 1, characterized in that, Pin 2 of NOT gates U1~U4 is electrically connected to pins 1~4 of four-input AND gate U5, respectively; Pin 5 of the four-input AND gate U5 is electrically connected to pin 1 of the two-input OR gate U6.

3. The IO acquisition and control circuit for a passive device in a subway train according to claim 1, characterized in that, Pin 3 of the dual-input OR gate U6 is electrically connected to the input of the 20ms delay circuit; The output of the 20ms delay circuit is electrically connected to pin 43 of the braking control relay RY1 and pin 12 of the reset relay RY2.

4. The IO acquisition and control circuit for a passive device in a subway train according to claim 1, characterized in that, The brake control relay RY1 has pins 44 and 1, the reset relay RY2 has pin 11, and the positive terminal of the diode D1 is electrically connected. The 33rd pin of the braking control relay RY1 is electrically connected to the 1st and 44th pins of the reset relay RY2; The 34th pin of the brake control relay RY1 is electrically connected to the 43rd pin of the reset relay RY2 and the 12th pin of the reset control relay RY5. Pin 11 of the brake control relay RY1 is electrically connected to pin 1 of the brake control detection interface CN4, and pin 12 of the brake control relay RY1 is electrically connected to pin 2 of the brake control detection interface CN4. Pin 2 of the brake control relay RY1 is electrically connected to the GND network.

5. The IO acquisition and control circuit for a passive device in a subway train according to claim 1, characterized in that, Pin 2 of the reset relay RY2 is electrically connected to the GND network.

6. The IO acquisition and control circuit for a passive device in a subway train according to claim 1, characterized in that, Pin 2 of the reset control relay RY5 and pin 2 of the reset control interface CN3 are electrically connected to the GND network. Pin 1 of the reset control relay RY5 is electrically connected to pin 1 of the reset control interface CN3.

7. The IO acquisition and control circuit for a passive device in a subway train according to claim 1, characterized in that, The common contact of the toggle switch is electrically connected to the VCC24V network, and the normally open contact of the toggle switch is electrically connected to the positive terminal of diode D2.

8. The IO acquisition and control circuit for a passive device of a subway train according to claim 1, characterized in that, The negative terminal of diode D1 is electrically connected to the negative terminal of diode D2 and pin 1 of brake output relays RY3~RY4.

9. The IO acquisition and control circuit for a passive device in a subway train according to claim 1, characterized in that, Pin 21 of the brake output relay RY3 is electrically connected to pin 22 of the brake output relay RY4; Pins 43, 44, 33, 34, 12, and 11 of the brake output relay RY3 are electrically connected to pins 1 to 6 of the brake interface CN6, respectively. Pin 22 of the brake output relay RY3 is electrically connected to pin 1 of the brake output detection interface CN5; Pin 2 of the brake output relay RY3 is electrically connected to the GND network.

10. The I / O acquisition and control circuit for a passive device in a subway train according to claim 1, characterized in that, Pins 43, 44, 33, 34, 12, and 11 of the brake output relay RY4 are electrically connected to pins 1 to 6 of the brake interface CN7, respectively. Pin 21 of the brake output relay RY4 is electrically connected to pin 2 of the brake output detection interface CN5; Pin 2 of the brake output relay RY4 is electrically connected to the GND network.

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