Multistage filter circuit of encoder and electronic equipment

Abstract

The utility model provides an encoder multistage filter circuit and electronic equipment, and relates to the technical field of encoders. The encoder multistage filter circuit comprises an encoder filter circuit, a first comparator filter circuit and a second comparator filter circuit. The encoder filter circuit comprises an encoder, an A phase of the encoder is grounded through a first resistor and a first capacitor in sequence, the first comparator filter circuit comprises a first comparator, and the A phase is further connected with a negative phase of the first comparator through the first resistor; the B phase of the encoder is grounded through a second resistor and a second capacitor in sequence, the second comparator filter circuit comprises a second comparator, the B phase is further connected with the negative phase of the second comparator through the second resistor, and a phase difference exists between the A phase and the B phase. The multi-stage filter circuit of the encoder can thoroughly filter noise generated by the encoder and improve the accuracy of signal analysis.

Description

Technical Field

[0001] This application relates to the field of encoder technology, and in particular to an encoder multi-stage filtering circuit and electronic device. Background Technology

[0002] A dual-output rotary encoder can output two sets of pulses, A and B, with a specific phase difference. These two sets of pulses can not only measure the rotational speed but also determine the direction of encoder rotation.

[0003] In related technologies, interference noise is generated due to switching jitter at the encoder's positioning teeth and sliding jitter during rotation. Additionally, after a period of use, contact oxidation and damping oil aging can lead to poor contact, causing significant jitter in the output waveform and generating interference noise. These noises are random and can affect the stability of the effective signal, reduce sampling accuracy, or even cause inaccurate sampling leading to malfunctions.

[0004] Therefore, a multi-stage encoder filtering circuit is needed that can completely filter out the noise generated by the encoder itself and improve the accuracy of signal analysis. Utility Model Content

[0005] This application provides an encoder multi-stage filtering circuit and electronic device that can completely filter out noise generated by the encoder itself and improve the accuracy of signal analysis.

[0006] In a first aspect, embodiments of this application provide an encoder multi-stage filtering circuit, including: an encoder filtering circuit, a first comparator filtering circuit, and a second comparator filtering circuit;

[0007] The encoder filtering circuit includes an encoder, and the A phase of the encoder is grounded in sequence through a first resistor and a first capacitor. The first comparator filtering circuit includes a first comparator, and the A phase is also connected to the negative phase of the first comparator through the first resistor.

[0008] The encoder's B phase is grounded sequentially through a second resistor and a second capacitor. The second comparator filter circuit includes a second comparator. The B phase is also connected to the negative phase of the second comparator through the second resistor. The A phase and the B phase have a phase difference.

[0009] In one possible implementation, when the signal frequency output by phase A is greater than or equal to a preset first cutoff frequency, the first capacitor is in a low-impedance state; when the signal frequency output by phase B is greater than or equal to the first cutoff frequency, the second capacitor is in a low-impedance state.

[0010] The first cutoff frequency is determined based on the resistance values ​​of the first resistor / second resistor and the capacitance values ​​of the first capacitor / second capacitor, wherein the resistance values ​​of the first resistor and the second resistor are the same, and the capacitance values ​​of the first capacitor and the second capacitor are the same.

[0011] In one possible implementation, the output phase of the encoder filter circuit is grounded sequentially through a third resistor and a third capacitor, and the output phase is also connected to the microcontroller unit (MCU) through the third resistor.

[0012] In one possible implementation, when the signal frequency output by the output phase is greater than or equal to a preset second cutoff frequency, the third capacitor is in a low impedance state.

[0013] The second cutoff frequency is determined based on the resistance value of the third resistor and the capacitance value of the third capacitor.

[0014] In one possible implementation, phase A is further connected to the pull-up power supply via a fourth resistor, phase B is further connected to the pull-up power supply via a fifth resistor, and the output phase is further connected to the pull-up power supply via a sixth resistor.

[0015] In one possible implementation, the first comparator filter circuit further includes a seventh resistor, an eighth resistor, and a ninth resistor;

[0016] The seventh resistor is connected to the power supply, and the seventh resistor is also grounded through the eighth resistor;

[0017] The ninth resistor is a feedback resistor, and the seventh resistor is also connected to the output terminal of the first comparator through the ninth resistor.

[0018] In one possible implementation, when the signal input from phase A to the negative phase of the first comparator is a low-level signal, the seventh resistor and the ninth resistor are connected in parallel, and a first threshold voltage value is output to the positive phase of the first comparator.

[0019] When the signal input from phase A to the negative phase of the first comparator is a high-level signal, the eighth resistor and the ninth resistor are connected in parallel and output a second threshold voltage value to the positive phase of the first comparator. The first threshold voltage value is greater than the second threshold voltage value.

[0020] The first threshold voltage value / the second threshold voltage value is determined based on the resistance values ​​of the seventh resistor, the eighth resistor, and the ninth resistor.

[0021] In one possible implementation, the second comparator filter circuit further includes a tenth resistor with the same resistance value as the seventh resistor, an eleventh resistor with the same resistance value as the eighth resistor, and a twelfth resistor with the same resistance value as the ninth resistor;

[0022] The tenth resistor is connected to the power supply, and the tenth resistor is also grounded through the eleventh resistor;

[0023] The twelfth resistor is a feedback resistor, and the tenth resistor is also connected to the output terminal of the second comparator through the twelfth resistor.

[0024] In one possible implementation, when the signal input from phase B to the negative phase of the second comparator is a low-level signal, the tenth resistor and the twelfth resistor are connected in parallel, and the first threshold voltage value is output to the positive phase of the second comparator.

[0025] When the signal input from phase B to the negative phase of the second comparator is a high-level signal, the eleventh resistor and the twelfth resistor are connected in parallel and the second threshold voltage value is output to the positive phase of the second comparator, and the first threshold voltage value is greater than the second threshold voltage value.

[0026] In one possible implementation, when the signal input to the negative phase of the comparator in phase A or phase B is a low-level signal, if the noise voltage of the negative phase is not higher than the first threshold voltage value of the positive phase, the first comparator / second comparator outputs a high-level signal to the MCU.

[0027] When the signal input to the negative phase of the comparator in phase A or phase B is a high-level signal, if the noise voltage of the negative phase is not lower than the second threshold voltage value of the positive phase, the first comparator / second comparator outputs a low-level signal to the MCU.

[0028] Secondly, embodiments of this application provide an electronic device, including: as described in the first aspect and / or various possible encoder multi-stage filtering circuits of the first aspect.

[0029] This application provides a multi-stage filter circuit and electronic device for encoders, which can perform two-stage filtering on the output signals of the encoder's A / B phases. First, the high-frequency noise of the A / B phase outputs is filtered out by resistors and capacitors connected in series in the encoder filter circuit, and the amplitude of mid- and low-frequency noise is reduced. Then, a comparator filter circuit connected in series with the encoder filter circuit is used to further and thoroughly filter out the encoder's own switching jitter and sliding jitter noise, as well as noise generated inside the encoder due to contact oxidation, damping oil aging, etc., which greatly improves the accuracy of signal analysis. Attached Figure Description

[0030] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0031] Figure 1 This is a schematic diagram of the structure of an encoder multi-stage filtering circuit according to an embodiment of this application;

[0032] Figure 2 This is a schematic diagram of the structure of a first comparator filter circuit according to an embodiment of this application;

[0033] Figure 3 This is a schematic diagram of the structure of a second comparator filter circuit according to an embodiment of this application;

[0034] Figure 4 This is a schematic diagram of encoder pulse output according to an embodiment of this application.

[0035] Reference numerals: 1. Encoder; 2. First resistor; 3. First capacitor; 4. Second resistor; 5. Second capacitor; 6. Third resistor; 7. Third capacitor; 8. Fourth resistor; 9. Fifth resistor; 10. Sixth resistor; 11. First comparator; 12. Seventh resistor; 13. Eighth resistor; 14. Ninth resistor; 15. Pull-up resistor; 16. Second comparator; 17. Tenth resistor; 18. Eleventh resistor; 19. Twelfth resistor.

[0036] The accompanying drawings have illustrated specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to specific embodiments. Detailed Implementation

[0037] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0038] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0039] It should be noted that in the embodiments of this application, certain software, components, models and other existing solutions in the industry may be mentioned. These should be regarded as exemplary and are only intended to illustrate the feasibility of implementing the technical solution of this application. However, it does not mean that the applicant has used or necessarily used the solution.

[0040] The encoder multi-stage filtering circuit and electronic device of this application can be used in the field of encoder technology, or in any field other than encoder technology, such as signal filtering technology. The application field of the encoder multi-stage filtering circuit and electronic device of this application is not limited.

[0041] The encoder multi-stage filtering circuit and electronic device of this application can be applied to electronic devices containing mechanical encoders, such as remote controls, game joysticks, mechanical knobs, etc. Any electronic device containing a mechanical encoder can use the encoder multi-stage filtering circuit and electronic device of this application.

[0042] Mechanical encoders (also known as mechanical encoder switches, hereinafter referred to as encoders) are widely used in buttons, remote controls, and in scenarios such as moving icons left and right on a display screen, and adjusting volume, brightness, fan speed, temperature, or channel.

[0043] A dual-output rotary encoder can output two sets of pulses, A and B, with a specific phase difference. These two sets of pulses can be used not only to measure the rotational speed but also to determine the direction of encoder rotation. Interference noise is generated due to switching jitter at the encoder's positioning teeth and sliding jitter during rotation.

[0044] In addition, after a period of use, encoders may experience poor contact due to contact oxidation and damping oil aging, resulting in significant jitter in the output waveform and generating interference noise. This noise is random and can affect the stability of the effective signal, reduce sampling accuracy, or even cause inaccurate sampling leading to malfunctions.

[0045] Among related technologies, there are four solutions to interference noise: Solution 1, using hardware circuits. Solution 2, using software, such as software filtering or delayed signal acquisition; however, filtering only weakens the amplitude of the interference signal, not completely eliminates it. Delaying sacrifices signal integrity. Solution 3, combining hardware and software. Solution 4, not taking any countermeasures against the interference signal, suitable for scenarios where sampling accuracy requirements are not high.

[0046] Since solutions two through four cannot completely filter out the noise generated by the encoder itself, and may even have negative effects, the problem is usually solved through hardware circuitry. For example, a capacitor can be connected in series at the output of phases A and B to filter the output signals of phases A and B. However, this only reduces the amplitude of the interference signal and cannot completely filter out the interference noise.

[0047] Based on the above-mentioned technical problems, the utility model concept of this application is: how to provide a multi-stage encoder filtering circuit that can completely filter out the noise generated by the encoder itself and improve the accuracy of signal analysis.

[0048] This application provides an encoder multi-stage filtering circuit and electronic device. The encoder filtering circuit and comparator filtering circuit can be connected in series to form a cascaded filtering circuit. The resistors and capacitors connected in series in the encoder filtering circuit initially filter out high-frequency noise from the A / B phase output and reduce the amplitude of mid- and low-frequency noise. The comparator filtering circuit connected in series with the encoder filtering circuit further thoroughly filters out the switching jitter and sliding jitter noise of the encoder itself, as well as the noise generated inside the encoder due to contact oxidation, damping oil aging, etc., which greatly improves the accuracy of signal analysis.

[0049] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will be described below with reference to the accompanying drawings.

[0050] Figure 1 This is a schematic diagram of the structure of an encoder multi-stage filtering circuit according to an embodiment of this application, as shown below. Figure 1 As shown, the encoder multi-stage filtering circuit includes: an encoder filtering circuit, a first comparator filtering circuit, and a second comparator filtering circuit.

[0051] The encoder filtering circuit includes an encoder 1. Phase A of the encoder 1 is grounded through a first resistor 2 and a first capacitor 3 in sequence. The first comparator filtering circuit includes a first comparator 11. Phase A is also connected to the negative phase of the first comparator 11 through a first resistor 2.

[0052] The B phase of encoder 1 is grounded sequentially through the second resistor 4 and the second capacitor 5. The second comparator filter circuit includes the second comparator 16. The B phase is also connected to the negative phase of the second comparator 16 through the second resistor 4. There is a phase difference between the A phase and the B phase.

[0053] In this embodiment, phase A and phase B of encoder 1 can be two sets of pulses, A and B, that can output a specific phase difference.

[0054] In this embodiment, the resistance value of the first resistor 2 can be the same as the resistance value of the second resistor 4, and the capacitance value of the first capacitor 3 can be the same as the capacitance value of the second capacitor 5.

[0055] In this embodiment, the first resistor 2 and the first capacitor 3, the second resistor 4 and the second capacitor 5 connected in series can form a first-stage low-pass filter circuit to filter the signals output from phases A and B, initially filtering out high-frequency noise from phases A and B, and reducing the amplitude of mid- and low-frequency noise.

[0056] In this embodiment, the signal output by phase A of encoder EC1 may include normal signals and interference signals, with the interference signals having a higher frequency than the normal signals. Therefore, after the signal output by phase A passes through a first-stage low-pass filter circuit composed of a first resistor 2 and a first capacitor 3, signals with frequencies greater than or equal to a preset first cutoff frequency can be filtered out. The signal after the first-stage filtering of phase A can be named EC1_QEPA.

[0057] In this embodiment, the signal output by phase B of encoder EC1 may include normal signals and interference signals, with the interference signals having a higher frequency than the normal signals. Therefore, after the signal output by phase B passes through the first-stage low-pass filter circuit composed of the second resistor 4 and the second capacitor 5, signals with frequencies greater than or equal to a preset first cutoff frequency can be filtered out. The signal after the first-stage filtering of phase B can be named EC1_QEPB. The parameters of the first-stage low-pass filter circuit of phase B are the same as those of phase A, so the cutoff frequency of the low-pass filter circuit of phase B is the same as that of phase A.

[0058] In this embodiment, the first cutoff frequency can be determined based on the first resistor 2 / second resistor 4 and the first capacitor 3 / second capacitor 5, and the frequency of the filtered signal can be adjusted by adjusting the resistance and capacitance values.

[0059] In this embodiment, the first-stage filtered signal EC1_QEPA of phase A can be input to the first comparator filter circuit for second-stage filtering to completely remove interference signals in EC1_QEPA; the first-stage filtered signal EC1_QEPB of phase B can be input to the second comparator filter circuit for second-stage filtering to completely remove interference signals in EC1_QEPB.

[0060] In this embodiment, the encoder filtering circuit can be connected in series with the first comparator filtering circuit and the second comparator filtering circuit, respectively, to perform two-stage filtering on the output signals of the encoder's A / B phases. Specifically, the high-frequency noise of the A / B phase outputs can first be filtered out by the resistors and capacitors connected in series in the encoder filtering circuit, and the amplitude of mid- and low-frequency noise can be reduced. Then, the comparator filtering circuit connected in series with the encoder filtering circuit is used to further and thoroughly filter out the encoder's own switching jitter and sliding jitter noise, as well as the noise generated inside the encoder due to contact oxidation, damping oil aging, etc., which greatly improves the accuracy of signal analysis.

[0061] In one possible implementation, when the signal frequency output by phase A is greater than or equal to a preset first cutoff frequency, the first capacitor 3 is in a low-impedance state; when the signal frequency output by phase B is greater than or equal to the first cutoff frequency, the second capacitor 5 is in a low-impedance state.

[0062] The first cutoff frequency is determined based on the resistance values ​​of the first resistor 2 and the second resistor 4, and the capacitance values ​​of the first capacitor 3 and the second capacitor 5. The resistance values ​​of the first resistor 2 and the second resistor 4 are the same, and the capacitance values ​​of the first capacitor 3 and the second capacitor 5 are the same.

[0063] In this embodiment, when the signal frequency output by phase A is greater than or equal to the preset first cutoff frequency, the first capacitor 3 is in a low impedance state, and the signal will be filtered out by grounding through the first resistor 2 and the first capacitor 3; when the signal frequency output by phase B is greater than or equal to the first cutoff frequency, the second capacitor 5 is in a low impedance state, and the signal will be filtered out by grounding through the second resistor 4 and the second capacitor 5.

[0064] In this embodiment, when the capacitor is in a low impedance state, the capacitor conducts approximately as a short circuit, and when the capacitor is in a high impedance state, the capacitor resistance is very large, approximately as an open circuit.

[0065] In this embodiment, when the frequency of the signal output by phase A is less than the first cutoff frequency, the first capacitor 3 is in a high impedance state, and the signal will be output to the negative phase of the first comparator 11 through the first resistor 2; when the frequency of the signal output by phase B is less than the first cutoff frequency, the second capacitor 5 is in a high impedance state, and the signal will be output to the negative phase of the second comparator 16 through the second resistor 4.

[0066] In this embodiment, the first cutoff frequency ,in, The resistance value is the ratio of the first resistor 2 to the second resistor 4. The capacitance values ​​are the first capacitor 3 and the second capacitor 5.

[0067] In this embodiment, the first resistor and the second resistor have the same resistance value, and the first capacitor and the second capacitor have the same capacitance value. That is, the parameters of the first-stage low-pass filter circuit in phase A (the first resistor and the first capacitor connected in series) are the same as those in phase B (the second resistor and the second capacitor connected in series). Therefore, the cutoff frequency of the low-pass filter circuit in phase B is the same as that in phase A, making the signal filtering results of phases A and B consistent. Furthermore, the first cutoff frequency can be adjusted by adjusting the resistance values ​​of the first resistor / second resistor and the capacitance values ​​of the first capacitor / second capacitor to adjust the signal frequencies that phases A and B can filter.

[0068] In one possible implementation, the output phase of the encoder filter circuit is grounded sequentially through a third resistor 6 and a third capacitor 7, and the output phase is also connected to the microcontroller unit (MCU) through the third resistor 6.

[0069] In this embodiment, the signal output by the third resistor 6 can be transmitted to PD9 or other IO pins of the MCU, depending on the MCU's programming.

[0070] In this embodiment, in addition to the A / B phase, the encoder also includes an output phase (usually the D phase). The signal output method of the output phase is different from that of the A / B phase, and it usually does not generate much noise interference. Therefore, the output signal of the output phase can be low-pass filtered by a third resistor and a third capacitor connected in series. The filtered signal can be directly output to the MCU.

[0071] In one possible implementation, when the frequency of the signal output by the output phase is greater than or equal to the preset second cutoff frequency, the third capacitor 7 is in a low impedance state.

[0072] The second cutoff frequency is determined based on the resistance value of the third resistor 6 and the capacitance value of the third capacitor 7.

[0073] In this embodiment, the second cutoff frequency can be determined based on the third resistor 6 and the third capacitor 7, and the frequency of the filtered signal can be adjusted by adjusting the corresponding resistance and capacitance values. The second cutoff frequency and the first cutoff frequency can be the same or different. Correspondingly, the resistance value of the third resistor 6 can be the same or different from the resistance value of the first resistor 2 / second resistor 4; the capacitance value of the third capacitor 7 can be the same or different from the capacitance value of the first capacitor 3 / second capacitor 5.

[0074] In this embodiment, the signal output by the output phase (D phase) of encoder EC1 may include normal signals and interference signals, and the frequency of the interference signals is higher than that of the normal signals. Therefore, after the signal output by the D phase passes through the low-pass filter circuit composed of the third resistor 6 and the third capacitor 7, signals with frequencies greater than or equal to the preset second cutoff frequency can be filtered out, and the filtered signal PD9_KEY_OK is output to the MCU.

[0075] In this embodiment, when the frequency of the signal output by phase D is greater than or equal to the preset second cutoff frequency, the third capacitor 7 is in a low impedance state, and the signal will be filtered out by grounding through the third resistor 6 and the third capacitor 7; when the frequency of the signal output by phase D is less than the second cutoff frequency, the third capacitor 7 is in a high impedance state, and the signal will be output to the MCU through the third resistor 6.

[0076] In this embodiment, when the capacitor is in a low impedance state, the capacitor conducts approximately as a short circuit, and when the capacitor is in a high impedance state, the capacitor resistance is very large, approximately as an open circuit.

[0077] In this embodiment, the second cutoff frequency can be adjusted by adjusting the resistance value of the third resistor and the capacitance value of the third capacitor, thereby adjusting the signal frequency that the output phase can filter out.

[0078] In one possible implementation, phase A is also connected to the pull-up power supply via a fourth resistor 8, phase B is also connected to the pull-up power supply via a fifth resistor 9, and the output phase is also connected to the pull-up power supply via a sixth resistor 10.

[0079] In this embodiment, the pull-up power supply can be the same +3V3 power supply.

[0080] In this embodiment, phase A / phase B / output phase can also be connected to a pull-up power supply through corresponding resistors, and the pull-up power supply can provide a high level for its output signal.

[0081] In one possible implementation, Figure 2 This is a schematic diagram of the structure of a first comparator filter circuit according to an embodiment of this application, as shown below. Figure 2 As shown, the first comparator filter circuit also includes a seventh resistor 12, an eighth resistor 13, and a ninth resistor 14;

[0082] The seventh resistor 12 is connected to the power supply, and the seventh resistor 12 is also grounded through the eighth resistor 13;

[0083] The ninth resistor 14 is a feedback resistor, and the seventh resistor 12 is also connected to the output terminal of the first comparator 11 through the ninth resistor 14.

[0084] In this embodiment, the first comparator 11 in the first comparator filter circuit can be an open-drain (OD) output. In this case, the first comparator 11 is also connected to the power supply through a pull-up resistor 15. The output of the first comparator 11 is compatible with TTL, DTL, ECL, MOS, and CMOS type signals. Of course, the output of the first comparator may not be an OD output; that is, if the first comparator output has an internal pull-up resistor, the external pull-up resistor connected to the first comparator output pin can be removed.

[0085] In this embodiment, the signal PH10_QEPA output from the output terminal of the first comparator 11 can be pulled up to +3V3 via a pull-up resistor and then sent to the IO pin of the MCU (such as PH10).

[0086] In this embodiment, the power supply can also be connected to a capacitor to filter the power supply voltage.

[0087] In this embodiment, the seventh resistor is grounded through the eighth resistor, and the seventh resistor is also connected to the output of the first comparator through the ninth resistor, which serves as a feedback resistor, forming a hysteresis loop that can be set with dual threshold voltages.

[0088] In one possible implementation, when the signal input to the negative phase of the first comparator 11 in phase A is a low-level signal, the seventh resistor 12 and the ninth resistor 14 are connected in parallel and output the first threshold voltage value to the positive phase of the first comparator 11.

[0089] When the signal input to the negative phase of the first comparator 11 in phase A is a high-level signal, the eighth resistor 13 and the ninth resistor 14 are connected in parallel and output the second threshold voltage value to the positive phase of the first comparator 11. The first threshold voltage value is greater than the second threshold voltage value.

[0090] The first threshold voltage value and the second threshold voltage value are determined based on the resistance values ​​of the seventh resistor 12, the eighth resistor 13, and the ninth resistor 14.

[0091] In this embodiment, when the signal input to the negative phase of the first comparator 11 in phase A is a low-level signal, the first comparator 11 outputs a high-level signal. At this time, the seventh resistor 12 and the ninth resistor 14 are connected in parallel, thereby outputting the first threshold voltage value to the positive phase of the first comparator 11. When the signal input to the negative phase of the first comparator 11 in phase A is a high-level signal, the first comparator 11 outputs a low-level signal. At this time, the eighth resistor 13 and the ninth resistor 14 are connected in parallel, thereby outputting the second threshold voltage value to the positive phase of the first comparator 11.

[0092] In this embodiment, the first threshold voltage value / second threshold voltage value can be adjusted by adjusting the resistance values ​​of the seventh resistor, the eighth resistor, and the ninth resistor, thereby completely filtering out interference noise.

[0093] In one possible implementation, Figure 3 This is a schematic diagram of the structure of a second comparator filter circuit according to an embodiment of this application, as shown below. Figure 3 As shown, the second comparator filter circuit also includes a tenth resistor 17 with the same resistance value as the seventh resistor 12, an eleventh resistor 18 with the same resistance value as the eighth resistor 13, and a twelfth resistor 19 with the same resistance value as the ninth resistor 14.

[0094] The tenth resistor 17 is connected to the power supply, and the tenth resistor 17 is also grounded through the eleventh resistor 18;

[0095] The twelfth resistor 19 is a feedback resistor, and the tenth resistor 17 is also connected to the output terminal of the second comparator 16 through the twelfth resistor 19.

[0096] In this embodiment, the second comparator 16 in the second comparator filter circuit can be an open-drain (OD) output. In this case, the second comparator 16 is also connected to the power supply through a pull-up resistor 15. The output of the second comparator 16 is compatible with TTL, DTL, ECL, MOS, and CMOS type signals. Of course, the output of the second comparator does not have to be an OD output; that is, if the second comparator output has an internal pull-up resistor, the external pull-up resistor connected to the output pin of the second comparator can be removed.

[0097] In this embodiment, the signal PH11_QEPB output from the output terminal of the second comparator 16 can be pulled up to +3V3 via pull-up resistor 15 and then sent to the MCU's IO pin (such as PH11).

[0098] In this embodiment, the power supply can also be connected to a capacitor to filter the power supply voltage.

[0099] In this embodiment, the parameters and connection method of the second comparator filter circuit are the same as those of the first comparator filter circuit, thereby forming a hysteresis loop with a set dual threshold voltage, which is the same as that of the first comparator filter circuit.

[0100] In one possible implementation, when the signal input from phase B to the negative phase of the second comparator 16 is a low-level signal, the tenth resistor 17 and the twelfth resistor 19 are connected in parallel and the first threshold voltage value is output to the positive phase of the second comparator 16.

[0101] When the signal input to the negative phase of the second comparator 16 in phase B is a high-level signal, the eleventh resistor 18 and the twelfth resistor 19 are connected in parallel and output the second threshold voltage value to the positive phase of the second comparator 16. The first threshold voltage value is greater than the second threshold voltage value.

[0102] In this embodiment, when the signal input to the negative phase of the second comparator 16 in phase B is a low-level signal, the second comparator 16 outputs a high-level signal. At this time, the tenth resistor 17 and the twelfth resistor 19 are connected in parallel, thereby outputting the first threshold voltage value to the positive phase of the second comparator 16. When the signal input to the negative phase of the second comparator 16 in phase B is a high-level signal, the second comparator 16 outputs a low-level signal. At this time, the eleventh resistor 18 and the twelfth resistor 19 are connected in parallel, thereby outputting the second threshold voltage value to the positive phase of the second comparator 16.

[0103] It should be noted that the threshold voltage can also be input from the negative phase (-) of the comparator. The encoder pulse signal is input to the positive phase (+) of the comparator after passing through a low-pass filter circuit and being connected in series with a resistor. The feedback resistor is connected across the positive phase (+) of the comparator and the comparator output.

[0104] In this embodiment, the first threshold voltage value Second threshold voltage value ,in, This indicates the power supply voltage, which can be 3V3. This indicates the resistance value of the seventh resistor 12 / the tenth resistor 17. This indicates the resistance value of the eighth resistor 13 / the eleventh resistor 18. This indicates the resistance value of the ninth resistor 14 / the twelfth resistor 19. This represents the resistance value when the seventh resistor 12 and the ninth resistor 14 are connected in parallel / the resistance value when the tenth resistor 17 and the twelfth resistor 19 are connected in parallel. This indicates the resistance value when the eighth resistor 13 and the ninth resistor 14 are connected in parallel / the resistance value when the eleventh resistor 18 and the twelfth resistor 19 are connected in parallel.

[0105] In this embodiment, the first threshold voltage value / second threshold voltage value can be adjusted by adjusting the resistance values ​​of the tenth resistor, the eleventh resistor, and the twelfth resistor, thereby completely filtering out interference noise.

[0106] In one possible implementation, when the signal (including noise) input to the negative phase of the comparator in phase A or phase B is a low-level signal, if the noise voltage of the negative phase is not higher than the first threshold voltage value of the positive phase, the first comparator 11 / second comparator 16 outputs a high-level signal to the MCU.

[0107] When the signal (including noise) input to the negative phase of the comparator in phase A or phase B is a high-level signal, if the noise voltage of the negative phase is not lower than the second threshold voltage value of the positive phase, the first comparator 11 / second comparator 16 outputs a low-level signal to the MCU.

[0108] In this embodiment, Figure 4 This is a schematic diagram of encoder pulse output according to an embodiment of this application, as shown below. Figure 4 As shown, during encoder rotation, when phase A and phase C are connected, phase A outputs a low level (voltage 0V, denoted as binary 1); when phase A and phase C are not connected, phase A outputs a high level (voltage 3.3V, denoted as binary 0). During rotation, when phase B and phase C are connected, phase B outputs a low level (voltage 0V, denoted as binary 1); when phase B and phase C are not connected, phase B outputs a high level (voltage 3.3V, denoted as binary 0).

[0109] At the rising edge of the encoder's A-phase (or B-phase) pulse waveform, i.e., the instant from low level to high level, it is recorded as 1→0; at the falling edge of the encoder's A-phase (or B-phase) pulse waveform, i.e., the instant from high level to low level, it is recorded as 0→1. The encoder's forward (CW) and reverse (CCW) rotation are determined in Table 1 below:

[0110] Table 1

[0111]

[0112] In this embodiment, when phases A and C (or B and C) just begin to connect and conduct, and when phase A (or B) is fully conducting, the output pulse waveform is low. As long as the noise level does not exceed the first threshold voltage value, the comparator output will remain high. When phases A and C (or B and C) just begin to disconnect, and when phase A (or B) is completely deconducting, the output pulse waveform is high. As long as the noise level does not fall below the second threshold voltage value, the comparator output will remain low.

[0113] In this embodiment, the signal input to the negative phase of the comparator from phase A or phase B can include normal signals and noise signals. When the signal (including noise) input to the negative phase of the comparator from phase A or phase B is a low-level signal, as long as the noise voltage of the negative phase is not higher than the first threshold voltage value of the positive phase, the first comparator / second comparator will continuously output a high-level signal, thereby completely filtering out the influence of interference noise in the signal. Similarly, when the signal (including noise) input to the negative phase of the comparator from phase A or phase B is a high-level signal, as long as the noise voltage of the negative phase is not lower than the second threshold voltage value of the positive phase, the first comparator / second comparator will continuously output a low-level signal, thereby completely filtering out the influence of interference noise in the signal. The noise voltage can be adjusted so that it is not higher than the first threshold voltage value or not lower than the second threshold voltage value.

[0114] The application process of the encoder multi-stage filtering circuit of this application is described below with a specific embodiment.

[0115] In one specific embodiment, the encoder signal output process is filtered by its built-in encoder multi-stage filtering circuit, and the specific process is as follows:

[0116] (1) The A phase of encoder EC1 outputs the first initial signal (including normal signal and interference signal). The interference signal passes through the first low-pass filter circuit composed of the first resistor 2 and the first capacitor 3. Since the first capacitor 3 is in a low impedance state, it is grounded and filtered out. The normal signal is output through the first resistor 2. The filtered signal EC1_QEPA is output to the negative phase of the first comparator 11.

[0117] (2) The B phase output of encoder EC1 is the second initial signal (including normal signal and interference signal). The interference signal passes through the first stage low-pass filter circuit composed of the second resistor 4 and the second capacitor 5. Since the second capacitor 5 is in a low impedance state, it is grounded and filtered out. The normal signal is output through the second resistor 4. The filtered signal EC1_QEPB is output to the negative phase of the second comparator 16.

[0118] (3) The D phase output of encoder EC1 is the third initial signal (including normal signal and interference signal). The interference signal passes through the low-pass filter circuit composed of the third resistor 6 and the third capacitor 7. Since the third capacitor 7 is in a low impedance state, it is grounded and filtered out. The normal signal is output through the third resistor 6. The filtered signal PD9_KEY_OK is output to the MCU.

[0119] (4) EC1_QEPA is input to the negative phase of the first comparator 11. When EC1_QEPA is a low-level signal, the seventh resistor 12 and the ninth resistor 14 are connected in parallel and output the first threshold voltage value to the positive phase of the first comparator 11. When EC1_QEPA is a high-level signal, the eighth resistor 13 and the ninth resistor 14 are connected in parallel and output the second threshold voltage value to the positive phase of the first comparator 11.

[0120] (5) EC1_QEPB is input to the negative phase of the second comparator 16. When EC1_QEPB is a low-level signal, the tenth resistor 17 and the twelfth resistor 19 are connected in parallel and the first threshold voltage value is output to the positive phase of the second comparator 16. When EC1_QEPB is a high-level signal, the eleventh resistor 18 and the twelfth resistor 19 are connected in parallel and the second threshold voltage value is output to the positive phase of the second comparator 16.

[0121] (6) When EC1_QEPA or EC1_QEPB is a low-level signal, if the noise voltage of the negative phase (including noise) is not higher than the first threshold voltage value of the positive phase, the first comparator 11 / second comparator 16 outputs a high-level signal to the MCU; when EC1_QEPA or EC1_QEPB is a high-level signal, if the noise voltage of the negative phase (including noise) is not lower than the second threshold voltage value of the positive phase, the first comparator 11 / second comparator 16 outputs a low-level signal to the MCU.

[0122] One embodiment of this application also provides an electronic device, including such as Figure 1 The encoder multi-stage filtering circuit is shown. The specific type of electronic device is not limited here; examples include remote controls, game joysticks, mechanical knobs, etc., as long as they include... Figure 1 The encoder multi-stage filtering circuit shown is sufficient.

[0123] In the above embodiments, the descriptions of each embodiment have their own emphasis. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments. The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as the combination of these technical features does not contradict each other, it should be considered within the scope of this specification.

[0124] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the utility model disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the appended claims.

[0125] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. An encoder multi-stage filter circuit, characterized by, include: Encoder filter circuit, first comparator filter circuit, and second comparator filter circuit; The encoder filtering circuit includes an encoder, and the A phase of the encoder is grounded in sequence through a first resistor and a first capacitor. The first comparator filtering circuit includes a first comparator, and the A phase is also connected to the negative phase of the first comparator through the first resistor. The encoder's B phase is grounded sequentially through a second resistor and a second capacitor. The second comparator filter circuit includes a second comparator. The B phase is also connected to the negative phase of the second comparator through the second resistor. The A phase and the B phase have a phase difference.

2. The encoder multi-stage filter circuit of claim 1, wherein, When the signal frequency output by phase A is greater than or equal to the preset first cutoff frequency, the first capacitor is in a low impedance state; when the signal frequency output by phase B is greater than or equal to the first cutoff frequency, the second capacitor is in a low impedance state. The first cutoff frequency is determined based on the resistance values ​​of the first resistor / second resistor and the capacitance values ​​of the first capacitor / second capacitor, wherein the resistance values ​​of the first resistor and the second resistor are the same, and the capacitance values ​​of the first capacitor and the second capacitor are the same.

3. The encoder multi-stage filter circuit of claim 1, wherein, The output phase of the encoder filter circuit is grounded sequentially through a third resistor and a third capacitor, and the output phase is also connected to the microcontroller unit (MCU) through the third resistor.

4. The encoder multi-stage filter circuit of claim 3, wherein, When the frequency of the signal output by the output phase is greater than or equal to the preset second cutoff frequency, the third capacitor is in a low impedance state. The second cutoff frequency is determined based on the resistance value of the third resistor and the capacitance value of the third capacitor.

5. The encoder multi-stage filter circuit of claim 3, wherein, Phase A is also connected to the pull-up power supply via a fourth resistor, Phase B is also connected to the pull-up power supply via a fifth resistor, and the output phase is also connected to the pull-up power supply via a sixth resistor.

6. The encoder multi-stage filter circuit according to any of claims 1-5, characterized by, The first comparator filter circuit also includes a seventh resistor, an eighth resistor, and a ninth resistor; The seventh resistor is connected to the power supply, and the seventh resistor is also grounded through the eighth resistor; The ninth resistor is a feedback resistor, and the seventh resistor is also connected to the output terminal of the first comparator through the ninth resistor.

7. The encoder multi-stage filter circuit of claim 6, wherein, When the signal input from phase A to the negative phase of the first comparator is a low-level signal, the seventh resistor and the ninth resistor are connected in parallel, and the first threshold voltage value is output to the positive phase of the first comparator. When the signal input from phase A to the negative phase of the first comparator is a high-level signal, the eighth resistor and the ninth resistor are connected in parallel and output a second threshold voltage value to the positive phase of the first comparator. The first threshold voltage value is greater than the second threshold voltage value. The first threshold voltage value / the second threshold voltage value is determined based on the resistance values ​​of the seventh resistor, the eighth resistor, and the ninth resistor.

8. The encoder multi-stage filter circuit of claim 7, wherein, The second comparator filter circuit also includes a tenth resistor with the same resistance value as the seventh resistor, an eleventh resistor with the same resistance value as the eighth resistor, and a twelfth resistor with the same resistance value as the ninth resistor; The tenth resistor is connected to the power supply, and the tenth resistor is also grounded through the eleventh resistor; The twelfth resistor is a feedback resistor, and the tenth resistor is also connected to the output terminal of the second comparator through the twelfth resistor.

9. The encoder multi-stage filter circuit of claim 8, wherein, When the signal input from phase B to the negative phase of the second comparator is a low-level signal, the tenth resistor and the twelfth resistor are connected in parallel, and the first threshold voltage value is output to the positive phase of the second comparator. When the signal input from phase B to the negative phase of the second comparator is a high-level signal, the eleventh resistor and the twelfth resistor are connected in parallel and the second threshold voltage value is output to the positive phase of the second comparator, and the first threshold voltage value is greater than the second threshold voltage value.

10. An electronic device, comprising: include: The encoder multi-stage filtering circuit as described in any one of claims 1-9.

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