Power-on circuit of on-off machine based on single self-reset switch

By using a P-MOS power-on circuit based on a single self-reset switch, the problem of repeated power-on/power-off caused by the self-locking button is solved, improving the reliability and safety of the device, saving hardware costs and space, and extending battery life.

CN224154199UActive Publication Date: 2026-04-21CHEARIHI (ANHUI) TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
CHEARIHI (ANHUI) TECH CO LTD
Filing Date
2025-05-07
Publication Date
2026-04-21

AI Technical Summary

Technical Problem

Existing self-locking buttons may cause repeated power-on/power-off of the device due to mechanical contact jitter when pressed or released, affecting the reliability and safety of electronic components.

Method used

A P-MOS power-on circuit based on a single self-reset switch is adopted. The power-on and power-off functions are realized by controlling the power-on timing through the MCU, avoiding mechanical jitter interference, reducing the number of hardware buttons, and omitting components such as relays or high-power MOSFETs.

Benefits of technology

This improved the reliability and safety of the equipment, reduced PCB space and cost, and extended the equipment's battery life.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a power-on circuit of a startup and shutdown machine based on a single self-reset switch, which belongs to the field of startup and shutdown circuits and comprises a P-MOS power-on circuit and a self-reset switch circuit. The P-MOS power-on circuit comprises a P-MOS transistor Q1; the source electrode of the P-MOS transistor Q1 is in power supply connection with an external battery module; the self-reset switch circuit comprises a switch K1; the grid electrode of the P-MOS tube Q1 is connected with a switch K1 in the self-reset switch circuit; the source electrode of the P-MOS tube Q1 is connected with one end of the resistor R45, and the other end of the resistor R45 is connected with the grid electrode of the P-MOS tube Q1. The grid electrode of the P-MOS tube Q1 is connected with one end of a capacitor C37 and one end of a resistor R46 at the same time; and the other end of the resistor R46 is connected with the collector electrode of the triode N2. The number of hardware keys is reduced, and the cost is saved; repeated power-on / power-off of equipment is avoided, and the reliability and safety of electronic components are improved.
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Description

Technical Field

[0001] This utility model relates to the field of power-on / off circuits, specifically a power-on circuit based on a single self-reset switch. Background Technology

[0002] Currently, the development trend of handheld devices such as electronic thermometers and handheld blood pressure monitors is towards miniaturization and simplification, which also creates various requirements for the buttons used to control their power on / off. Existing buttons are generally self-locking buttons. The main function of a self-locking button is to maintain its state after being pressed until it is pressed again. Specifically, after a self-locking button is pressed, even if the finger is released, the button remains in its current state, usually by closing or opening the circuit, until it is pressed again to return to its initial state.

[0003] While traditional self-locking buttons can enable power on / off functions, they may generate multiple on / off signals due to mechanical contact jitter when pressed or released during power-on. If directly connected to a power source, this could lead to repeated power-on / off cycles, affecting the reliability and safety of electronic components. Utility Model Content

[0004] To address the aforementioned problems in the prior art, the purpose of this invention is to provide a power-on circuit for switching on and off based on a single self-resetting switch, thereby resolving the issues raised in the background section.

[0005] To achieve the above objectives, this utility model provides the following technical solution:

[0006] The power-on circuit based on a single self-reset switch includes a P-MOS power-on circuit and a self-reset switch circuit. The P-MOS power-on circuit includes a P-MOS transistor Q1. The source of the P-MOS transistor Q1 is connected to an external battery module for power supply. The self-reset switch circuit includes a switch K1. The gate of the P-MOS transistor Q1 is connected to the switch K1 in the self-reset switch circuit. The source of the P-MOS transistor Q1 is also connected to one end of a resistor R45, and the other end of the resistor R45 is connected to the gate of the P-MOS transistor Q1. The gate of the P-MOS transistor Q1 is also connected to one end of a capacitor C37 and one end of a resistor R46, and the other end of the capacitor C37 is grounded.

[0007] The other end of resistor R46 is connected to the collector of transistor N2, and the emitter of transistor N2 is grounded;

[0008] The gate of P-MOS transistor Q1 is connected to the anode of diode D1, the cathode of diode D1 is connected to one end of resistor R56, and the other end of resistor R56 is connected to one end of switch K1 in the self-reset switch; the other end of switch K1 is grounded.

[0009] As a further embodiment of this utility model: in the self-reset switch, one end of switch K1 is connected to one end of resistor R47, the other end of resistor R47 is connected to the negative terminal of diode D2, and the positive terminal of diode D2 is connected to a +3.3V power supply.

[0010] As a further embodiment of this utility model: a capacitor C36 is connected in parallel across the two ends of the self-resetting switch K1.

[0011] As a further aspect of this utility model, the P-MOS transistor Q1 is of model number Si3407DVT1-GE3.

[0012] As a further embodiment of this utility model: the drain of P-MOS transistor Q1 in the P-MOS power-on circuit and the external switching power supply circuit, the switching power supply circuit includes chip U7, and pins 3 and 6 of chip U7 are simultaneously connected to the drain of P-MOS transistor Q1 in the P-MOS power-on circuit.

[0013] As a further embodiment of this invention: pin 2 of the chip U7 is grounded; pin 5 of the chip U7 is connected to the +3.3V power supply.

[0014] As a further aspect of this utility model: the chip U7 is a step-down constant current driver chip, model AP2002.

[0015] As a further embodiment of this invention: the base of transistor N2 in the P-MOS power-on circuit is connected to pin 16 of chip IC1 in the MCU.

[0016] As a further embodiment of this invention: pin 7 of the chip IC1 is grounded; pin 9 of the chip IC1 is connected to a +3.3V power supply.

[0017] As a further aspect of this utility model: the model number of the chip IC1 is HC32Ll 10C6PA.

[0018] Compared with the prior art, the beneficial effects of this utility model are:

[0019] This invention requires only a single self-reset switch to achieve power-on, power-off, and reset functions, reducing the number of hardware buttons and saving PCB space and BOM costs. The self-reset switch only serves as a signal input and does not handle high-current switching, eliminating the need for relays or high-power MOSFETs. It avoids mechanical vibration interference and repeated power-on / off cycles, increasing the reliability and safety of electronic components. The switch does not directly control power supply; instead, the MCU controls the power timing, enabling soft start and protecting downstream circuitry from impacts. The MCU controls the power module's power-on, significantly extending battery life. Attached Figure Description

[0020] Figure 1 The circuit diagram for power on / off based on a single self-reset switch is disclosed in the embodiment.

[0021] Figure 2 This is a schematic diagram of the power-on circuit based on a single self-reset switch disclosed in the embodiment.

[0022] Figure 3 The schematic diagram of the switching power supply circuit connected externally to the power-on circuit of the power-on device based on a single self-reset switch disclosed in the embodiment.

[0023] Figure 4 The schematic diagram of the MCU connected externally to the power-on circuit of the power-on circuit based on a single self-reset switch disclosed in the embodiment is shown. Detailed Implementation

[0024] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present utility model.

[0025] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installed," "equipped with," "connected," and "linked" should be interpreted broadly; for example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0026] Please see Figure 1-4 A power-on circuit based on a single self-reset switch includes a P-MOS power-on circuit and a self-reset switch circuit. The P-MOS power-on circuit includes a P-MOS transistor Q1. The source of the P-MOS transistor Q1 is connected to an external battery module for power supply. The self-reset switch circuit includes a switch K1. The gate of the P-MOS transistor Q1 is connected to the switch K1 in the self-reset switch circuit. The source of the P-MOS transistor Q1 is also connected to one end of a resistor R45, and the other end of the resistor R45 is connected to the gate of the P-MOS transistor Q1. The gate of the P-MOS transistor Q1 is also connected to one end of a capacitor C37 and one end of a resistor R46, and the other end of the capacitor C37 is grounded.

[0027] The other end of resistor R46 is connected to the collector of transistor N2, and the emitter of transistor N2 is grounded;

[0028] The gate of P-MOS transistor Q1 is connected to the anode of diode D1, the cathode of diode D1 is connected to one end of resistor R56, and the other end of resistor R56 is connected to one end of switch K1 in the self-reset switch; the other end of switch K1 is grounded.

[0029] In the self-reset switch, one end of switch K1 is connected to one end of resistor R47, the other end of resistor R47 is connected to the negative terminal of diode D2, and the positive terminal of diode D2 is connected to a +3.3V power supply.

[0030] A capacitor C36 is connected in parallel across the two ends of the self-reset switch K1;

[0031] The model of P-MOS transistor Q1 is Si3407DVT1-GE3;

[0032] In the P-MOS power-on circuit, when the self-reset switch K1 is clicked for the first time, K1 is shorted to GND, the gate of the P-MOS transistor Q1 is pulled low, Q1 is turned on, and the voltage of the dry cell battery or lithium battery is supplied to the switching power supply circuit. The switching power supply outputs +3.3V to the MCU. The MCU detects that the Vin_check signal changes from low level to high level after the self-reset switch is clicked. Therefore, the MCU considers that a power-on action is being performed. The MCU outputs the Vin_control signal as high level, the N2 transistor is turned on, and the gate of the P-MOS transistor Q1 is continuously pulled low. Thus, Q1 is in a continuously conducting state, completing the power-on action.

[0033] When the self-reset switch K1 is clicked again, K1 is shorted to GND again. The MCU's monitoring Vin_check signal changes from high to low level after the self-reset switch is clicked. The MCU therefore believes that a power-off action is being performed. The MCU outputs the Vin_control signal to a low level, the N2 transistor is turned off, and the gate of the P-MOS transistor Q1 is pulled up to the power supply voltage high level by R45. Thus, the P-MOS transistor is turned off, and the switching power supply stops working, thereby completing the power-off action.

[0034] The P-MOS power-on circuit includes the drain of P-MOS transistor Q1 and an external switching power supply circuit. Upon power-up, the switching power supply circuit outputs +3.3V, the voltage required for MCU operation.

[0035] The switching power supply circuit includes a chip U7, and pins 3 and 6 of the chip U7 are connected to the drain of the P-MOS transistor Q1 in the P-MOS power-on circuit.

[0036] Pin 1 of chip U7 is connected to one end of inductor L2, and the other end of inductor L2 is connected to the drain of P-MOS transistor Q1 in the P-MOS power-on circuit.

[0037] Pin 3 of chip U7 is connected to one end of capacitor C24, and the other end of capacitor C24 is grounded;

[0038] Pin 5 of chip U7 is connected to one end of resistor R48, the other end of resistor R48 is connected to one end of resistor R49, the other end of resistor R49 is connected to pin 2 of chip U7, and the connection line between resistor R48 and resistor R49 is also connected to pin 4 of chip U7.

[0039] Pin 2 of chip U7 is grounded;

[0040] Pin 5 of chip U7 is connected to one end of capacitor C25, and the other end of capacitor C25 is grounded;

[0041] Pin 5 of chip U7 is connected to the +3.3V power supply;

[0042] The aforementioned chip U7 is a step-down constant current driver chip, model AP2002. Chip U7 has an input voltage range from 6V to 55V, making it suitable for various power supply environments. Chip U7's maximum output current can reach 1.2A, meeting the circuit's requirements.

[0043] The base of transistor N2 in the P-MOS power-on circuit is connected to pin 16 of chip IC1 in the MCU.

[0044] Pin 15 of chip IC1 is connected to one end of switch K1 in the self-reset switch; the other end of switch K1 is grounded.

[0045] Pin 8 of chip IC1 is connected to one end of capacitor C39, and the other end of capacitor C39 is connected to one end of capacitor C39.

[0046] Pin 7 of chip IC1 is grounded;

[0047] Pin 9 of chip IC1 is connected to the +3.3V power supply;

[0048] The model number of chip IC1 is HC32L110C6PA;

[0049] The MCU is used to detect the Vin_check signal when the self-reset button is clicked and to output the Vin_control signal that controls the continuous on / off state of the P-MOS transistor Q1. When the Vin_check signal changes from low to high, it is considered that a power-on action is being performed, and the Vin_control signal is output as high. When the Vin_check signal changes from high to low, it is considered that a power-off action is being performed, and the Vin_control signal is output as low.

[0050] In the P-MOS power-on circuit, when the self-reset switch is pressed once, the gate of the P-MOS transistor is pulled low, and the P-MOS transistor is turned on. When the switching power supply is powered on, it will output a +5V voltage. When the MCU is powered on and detects that the self-reset switch has been pressed, the MCU will output a signal to control the gate signal of the P-MOS transistor to be low, so that the P-MOS transistor will continue to be turned on, thus completing the power-on action.

[0051] The switching power supply circuit operates after receiving power, outputting a +5V voltage to the MCU;

[0052] The MCU is used to monitor the self-reset button signal. When the self-reset button is detected to be pressed for the first time, it will output a signal to control the gate signal of the P-MOS transistor to go low, thereby realizing the power-on action. When the self-reset button is detected to be pressed again, it will output a signal to control the gate signal of the P-MOS transistor to go high, thereby realizing the power-off action.

[0053] This invention requires only a single self-reset switch to achieve power-on, power-off, and reset functions, reducing the number of hardware buttons and saving PCB space and BOM costs. The self-reset switch only serves as a signal input and does not handle high-current switching, eliminating the need for relays or high-power MOSFETs. It avoids mechanical vibration interference and repeated power-on / off cycles, increasing the reliability and safety of electronic components. The switch does not directly control power supply; instead, the MCU controls the power timing, enabling soft start and protecting downstream circuitry from impacts. The MCU controls the power module's power-on, significantly extending battery life.

[0054] It will be apparent to those skilled in the art that this invention is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or essential characteristics of this invention. Therefore, the embodiments should be considered exemplary and not restrictive in all respects. The scope of this invention is defined by the appended claims rather than the foregoing description, and therefore all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0055] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A power-on circuit for a single self-resetting switch based on / off switch, characterized in that, It includes a P-MOS power-on circuit and a self-reset switch circuit; the P-MOS power-on circuit includes a P-MOS transistor Q1; the source of the P-MOS transistor Q1 is connected to the external battery module for power supply; the self-reset switch circuit includes a switch K1; the gate of the P-MOS transistor Q1 is connected to the switch K1 in the self-reset switch circuit; the source of the P-MOS transistor Q1 is also connected to one end of a resistor R45, and the other end of the resistor R45 is connected to the gate of the P-MOS transistor Q1; the gate of the P-MOS transistor Q1 is also connected to one end of a capacitor C37 and one end of a resistor R46, and the other end of the capacitor C37 is grounded; The other end of resistor R46 is connected to the collector of transistor N2, and the emitter of transistor N2 is grounded; The gate of P-MOS transistor Q1 is connected to the anode of diode D1, the cathode of diode D1 is connected to one end of resistor R56, and the other end of resistor R56 is connected to one end of switch K1 in the self-reset switch; the other end of switch K1 is grounded.

2. The single self-resetting switch based power-on / off circuit of claim 1, wherein, In the self-reset switch, one end of switch K1 is connected to one end of resistor R47, the other end of resistor R47 is connected to the negative terminal of diode D2, and the positive terminal of diode D2 is connected to a +3.3V power supply.

3. The single self-resetting switch based power-on / off circuit of claim 2, wherein, A capacitor C36 is connected in parallel across the two ends of the self-resetting switch K1.

4. The single self-resetting switch based power-on / off circuit of claim 3, wherein, The P-MOS transistor Q1 is model Si3407DVT1-GE3.

5. The single self-resetting switch based power-on / off circuit of claim 4, wherein, The drain of P-MOS transistor Q1 in the P-MOS power-on circuit and the external switching power supply circuit, the switching power supply circuit includes chip U7, pins 3 and 6 of chip U7 are connected to the drain of P-MOS transistor Q1 in the P-MOS power-on circuit.

6. The single self-resetting switch based power-on / off circuit of claim 5, wherein, Pin 5 of the chip U7 is connected to the +3.3V power supply.

7. The single self-resetting switch based power-on / off circuit of claim 6, wherein, The chip U7 is a step-down constant current driver chip, model AP2002.

8. The single self-resetting switch based power-on / off circuit of claim 7, wherein, The base of transistor N2 in the P-MOS power-on circuit is connected to pin 16 of chip IC1 in the MCU.

9. The single self-resetting switch based power-on / off circuit of claim 8, wherein, Pin 7 of the chip IC1 is grounded, and pin 9 of the chip IC1 is connected to the +3.3V power supply.

10. The single self-resetting switch based power-on / off circuit of claim 9, wherein, The model number of the chip IC1 is HC32Ll 10C6PA.