LED support and LED packaging structure

Abstract

The utility model provides an LED support and an LED packaging structure, the LED support comprises a substrate, the front surface of the substrate is provided with a chip supporting part and a pole plate part, the chip supporting part and the pole plate part are arranged at an interval and are electrically isolated through an insulation structure, a light-emitting chip is fixedly installed on the chip supporting part, and the pole plate part is used for being electrically connected with the light-emitting chip to realize electric conduction. And the polar plate part extends along the side edge direction of the substrate and is positioned on one side of the chip supporting part, so that the effective mounting area of the chip supporting part is maximized, more light-emitting chips can be carried in a limited space, and the light output efficiency per unit area is improved. The chip supporting part penetrates through the substrate and extends to the back surface of the substrate, a continuous heat conduction path from the chip mounting surface to the back surface of the substrate is formed, heat generated when the light-emitting chip works can be quickly conducted to the outside, and the junction temperature of the chip is effectively reduced. By optimizing the spatial arrangement relationship between the chip supporting part and the polar plate part, the luminous efficiency and reliability of the LED device are improved.

Description

Technical Field

[0001] This application belongs to the field of power distribution equipment technology, and more specifically, relates to an LED bracket and LED packaging structure. Background Technology

[0002] LED chips typically consist of a chip, phosphor layer, support frame, and wiring. The support frame, as the core load-bearing component, not only provides physical support for the chip and phosphor layer but also performs crucial functions in electrical connection and heat conduction. Traditional support frame structures limit the maximum number of chips that can be mounted and their spatial arrangement density, thus affecting the light output efficiency per unit area. Furthermore, under prolonged operation, localized heat buildup can easily occur, leading to increased junction temperature and luminous efficacy degradation. Utility Model Content

[0003] The purpose of this application is to provide an LED bracket and LED packaging structure to solve the technical problem of low luminous efficiency of LED beads in the prior art.

[0004] To achieve the above objectives, the technical solution adopted in this application is as follows:

[0005] An LED bracket is provided, including a substrate. The front side of the substrate has a chip support portion and an electrode portion that are spaced apart from each other and insulated from each other. The electrode portion extends along the side edge of the substrate and is located on one side of the chip support portion. The chip support portion extends through the substrate to the back side of the substrate.

[0006] As a further improvement to the above technical solution:

[0007] Optionally, the electrode portion includes a positive electrode portion and a negative electrode portion, which are located on the same side of the chip support portion and are spaced apart from each other and insulated from each other.

[0008] Optionally, the minimum spacing between the positive electrode plate portion and the negative electrode plate portion is 0.2 mm.

[0009] Optionally, the minimum distance between the chip support portion and the electrode portion is 0.17 mm.

[0010] Optionally, the number of chip support portions is at least two, and the minimum spacing between each chip support portion is 0.2 mm.

[0011] Optionally, the length and width of the substrate are both in the range of 54mm-58mm.

[0012] This application also provides an LED packaging structure, including:

[0013] The aforementioned LED bracket;

[0014] A chipset is connected to the chip support portion of the bracket, and the chipset includes a plurality of chips connected in series.

[0015] Wires are used to connect two chips, or to connect a chip and an electrode plate.

[0016] As a further improvement to the above technical solution:

[0017] Optionally, the chips are arranged in a rectangular array, with each chip spaced apart from the others.

[0018] Optionally, the positive and negative electrodes of the chips in the same column are oriented in the same direction, while the positive and negative electrodes of the chips in adjacent columns are oriented in opposite directions.

[0019] Optionally, there may be multiple chipsets, and the minimum spacing between each chipset is 0.2 mm.

[0020] The beneficial effects of the LED bracket and LED packaging structure provided in this application are as follows:

[0021] The LED support provided in this application includes a substrate, which can be square, circular, or other suitable shapes to meet the needs of different application scenarios. The front side of the substrate has a chip support portion and an electrode portion, which are spaced apart and electrically isolated from each other by an insulating structure. The light-emitting chip is fixedly mounted on the chip support portion, and the electrode portion forms an electrical connection with the light-emitting chip to enable current conduction. The electrode portion extends along the side edge of the substrate and is located on one side of the chip support portion, maximizing the effective mounting area of ​​the chip support portion. This allows for a larger number of light-emitting chips to be mounted within a limited space, improving the light output efficiency per unit area. The chip support portion is made of a high thermal conductivity metal material and extends through the substrate to its back side, forming a continuous heat conduction path from the chip mounting surface to the back side of the substrate. This facilitates the rapid conduction of heat generated by the light-emitting chip during operation to an external heat dissipation system, effectively reducing the chip junction temperature. By optimizing the spatial arrangement of the chip support portion and the electrode portion, this application improves chip mounting density while ensuring good electrical insulation performance and heat dissipation efficiency, thereby enhancing the luminous efficacy and reliability of the LED device.

[0022] The LED packaging structure provided in this application includes a chipset, wires, and the aforementioned LED bracket. The chipset is fixedly mounted on the chip support portion of the bracket, and the chipset is composed of multiple chips connected in series. The wires are used to achieve electrical interconnection between the chips or to connect the chips to the electrode plate for circuit conduction. This packaging structure improves space utilization while ensuring electrical performance by optimizing the arrangement of the chips on the chip support portion and coordinating the connection layout of the wires. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a front view schematic diagram of the LED packaging structure provided in this application;

[0025] Figure 2 This is a schematic diagram of the front view structure of the LED bracket provided in this application;

[0026] Figure 3 This is a rear view structural diagram of the LED bracket provided in this application.

[0027] The following are the labeling elements in the figure:

[0028] 1. Substrate; 11. Chip support;

[0029] 12. Electrode section; 121. Positive electrode section;

[0030] 122. Negative electrode plate; 2. Chip

[0031] 3. Wires. Detailed Implementation

[0032] The embodiments of this utility model are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this utility model, and should not be construed as limiting this utility model.

[0033] In the description of this utility model, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this utility model and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model.

[0034] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this utility model, "a plurality of" means two or more, unless otherwise explicitly specified.

[0035] In this utility model, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0036] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0037] Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of this utility model.

[0038] In the following description, suffixes such as "circuit," "component," "assembly," or "unit" are used only for the purpose of describing this utility model and have no specific meaning in themselves. Therefore, they can be used in combination.

[0039] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0040] like Figure 2 and Figure 3As shown, this application provides an LED bracket, including a substrate 1. The substrate 1 can be square, circular, or other suitable shapes to meet the needs of different application scenarios. A chip support portion 11 and an electrode portion 12 are provided on the front side of the substrate 1. These two portions are spaced apart and electrically isolated by an insulating structure. A light-emitting chip is fixedly mounted on the chip support portion 11, and the electrode portion 12 is used to form an electrical connection with the light-emitting chip to achieve current conduction. The electrode portion 12 extends along the side edge of the substrate 1 and is located on one side of the chip support portion 11, maximizing the effective mounting area of ​​the chip support portion 11. This allows for the mounting of more light-emitting chips within a limited space, improving the light output efficiency per unit area. The chip support portion 11 is made of a high thermal conductivity metal material and extends through the substrate 1 to its back side, forming a continuous heat conduction path from the chip mounting surface to the back side of the substrate. This facilitates the rapid conduction of heat generated by the light-emitting chip during operation to an external heat dissipation system, effectively reducing the chip junction temperature. By optimizing the spatial arrangement of the chip support portion 11 and the electrode portion 12, this application improves the chip mounting density while ensuring good electrical insulation performance and heat dissipation efficiency, thereby enhancing the luminous efficiency and reliability of LED devices.

[0041] like Figure 2 As shown, in a specific embodiment of this application, the electrode portion 12 includes a positive electrode portion 121 and a negative electrode portion 122, both disposed on the same side of the chip support portion 11 and arranged at intervals. The positive electrode portion 121 and the negative electrode portion 122 are electrically isolated from each other by an insulating material or insulating structure to avoid the risk of short circuits. This same-side arrangement effectively reduces the area occupied by the electrode portion 12 on the usable area of ​​the chip support portion 11, thereby achieving a higher density of light-emitting chips within the limited space of the substrate 1. Simultaneously, the parallel arrangement of the positive electrode portion 121 and the negative electrode portion 122 helps to shorten the conductive connection path with the light-emitting chip, reduce line impedance, and improve current transmission efficiency. This structure of the electrode portion 12 optimizes space utilization and facilitates subsequent packaging processes while ensuring electrical performance.

[0042] like Figure 2 As shown, in one specific embodiment of this application, the minimum spacing L between the positive electrode plate portion 121 and the negative electrode plate portion 122 is set to 0.2 mm to achieve optimal space utilization while ensuring electrical safety. Specifically, the 0.2 mm spacing not only meets the insulation withstand voltage requirements between the two plates, effectively preventing the risk of breakdown under operating voltage, but also minimizes the area occupied by the electrode plate portion 12 on the effective usable area of ​​the substrate 1.

[0043] like Figure 2As shown, in one specific embodiment of this application, the minimum spacing M between the chip support portion 11 and the electrode portion 12 is set to 0.17 mm. This spacing optimizes the structural layout while ensuring reliable insulation. The 0.17 mm spacing meets the insulation requirements under operating voltage, effectively preventing electrical short circuits between the chip support portion 11 and the electrode portion 12. Simultaneously, this spacing design helps control the overall size of the support structure, providing more usable space for the arrangement of the light-emitting chips, thereby improving the light output efficiency per unit area.

[0044] like Figure 2 As shown in one specific embodiment of this application, at least two chip support portions 11 are provided on the substrate 1, and the minimum spacing N between each chip support portion 11 is limited to 0.2 mm. By controlling the spacing of the chip support portions 11, the heat dissipation space requirements between adjacent light-emitting chips are ensured, and the surface space of the substrate 1 is efficiently utilized. When there are two chip support portions 11, a symmetrical arrangement is adopted, so that the two chip support portions 11 are mirror-symmetrically distributed with respect to the central axis of the substrate 1. The symmetrical arrangement is beneficial for balancing the heat distribution of the substrate 1, reducing local thermal stress concentration, and facilitating the electrical connection wiring of the light-emitting chips.

[0045] like Figure 2 As shown, in one specific embodiment of this application, the length (X) and width (Y) of the substrate 1 are set to a range of 54mm-58mm. This size range takes into account compatibility with existing LED packaging processes, particularly matching the industry-standard 50mm×50mm bracket size. By controlling the size of the substrate 1 within the range of 54mm-58mm, it ensures that the bracket structure has sufficient mounting area to accommodate multiple chip support portions 11 and electrode portions 12, while also being fully compatible with downstream customers' existing aluminum substrate and other surface mount technology (SMT) equipment. This size design does not require changes to the customer's existing production process and equipment parameters, and can directly replace the traditional 50mm×50mm bracket, effectively reducing the conversion costs associated with product upgrades.

[0046] like Figure 1 and Figure 2 As shown, this application also provides an LED packaging structure, including a chipset, wires 3, and the LED bracket described in the foregoing embodiments. The chipset is fixedly mounted on the chip support portion 11 of the bracket, and the chipset is composed of multiple chips 2 connected in series. The wires 3 are used to realize electrical interconnection between the chips 2, or to connect the circuit between the chips 2 and the electrode portion 12. This packaging structure improves space utilization while ensuring electrical performance by optimizing the arrangement of the chips 2 on the chip support portion 11 and coordinating the connection layout of the wires 3.

[0047] like Figure 1 and Figure 2 As shown, in one specific embodiment of this application, multiple chips 2 are arranged in a rectangular array on the chip support 11, with a preset spacing between each chip 2. This arrangement effectively avoids the problem of side light emission blocking due to excessively small spacing between adjacent chips 2. Specifically, the spacing between each chip 2 ensures that the light emitted by each chip 2 (including side light) can be fully discharged, thereby improving the overall light efficiency. At the same time, this rectangular array arrangement not only facilitates the connection and wiring of the wires 3, but also helps to achieve uniform heat distribution.

[0048] like Figure 1 and Figure 2 As shown, in one specific embodiment of this application, the electrodes of the chip 2 are arranged in a specific orientation: all chips 2 in the same column maintain the same positive and negative electrode orientation, while chips 2 in adjacent columns adopt opposite positive and negative electrode orientations. By keeping the electrode orientations of chips 2 in the same column consistent, the connection path of the wires 3 can be simplified and wiring crossings can be reduced; secondly, the opposite electrode orientations of adjacent columns facilitate the connection of wires 3 between chips 2 in each column.

[0049] like Figure 1 and Figure 2 As shown, in one specific embodiment of this application, the LED packaging structure includes multiple chip groups, and the minimum spacing P between each chip group is 0.2mm, so as to ensure sufficient heat dissipation between adjacent chip groups while optimizing the space utilization of the overall structure.

[0050] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. An LED bracket, characterized in that, The substrate (1) includes a chip support portion (11) and an electrode portion (12) that are spaced apart from each other and insulated from each other. The electrode portion (12) extends along the side edge of the substrate (1) and is located on one side of the chip support portion (11). The chip support portion (11) extends through the substrate (1) to the back side of the substrate (1).

2. The LED bracket as described in claim 1, characterized in that, The electrode portion (12) includes a positive electrode portion (121) and a negative electrode portion (122). The positive electrode portion (121) and the negative electrode portion (122) are located on the same side of the chip support portion (11) and are spaced apart from each other and insulated from each other.

3. The LED bracket as described in claim 2, characterized in that, The minimum distance between the positive electrode plate portion (121) and the negative electrode plate portion (122) is 0.2 mm.

4. The LED bracket as described in any one of claims 1 to 3, characterized in that, The minimum distance between the chip support portion (11) and the electrode portion (12) is 0.17 mm.

5. The LED bracket as described in any one of claims 1 to 3, characterized in that, The number of chip support portions (11) is at least two, and the minimum spacing between each chip support portion (11) is 0.2 mm.

6. The LED bracket as described in any one of claims 1 to 3, characterized in that, The length and width of the substrate (1) are both in the range of 54mm-58mm.

7. An LED packaging structure, characterized in that, include: The LED bracket as described in any one of claims 1 to 6; A chipset is connected to the chip support portion (11) of the bracket, and the chipset includes a plurality of chips (2) connected in series. The wire (3) is used to connect the two chips (2) or to connect the chip (2) and the electrode plate (12).

8. The LED packaging structure as described in claim 7, characterized in that, Each of the chips (2) is arranged in a rectangular array and is spaced apart from each other.

9. The LED packaging structure as described in claim 8, characterized in that, The positive and negative electrodes of the chips (2) in the same column are oriented in the same direction, while the positive and negative electrodes of the chips (2) in adjacent columns are oriented in opposite directions.

10. The LED packaging structure as described in claim 7, characterized in that, The number of chipsets is multiple, and the minimum spacing between each chipset is 0.2mm.

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