Integrated data acquisition and control module

Abstract

The utility model provides an integrated data acquisition and control module. The integrated data acquisition and control module comprises a circuit board and a shell for accommodating the circuit board, the circuit board is divided into a central area and a peripheral area surrounding the central area, the core control unit is arranged in the central area, and the power supply unit, the communication unit and the signal input and output unit are arranged in the peripheral area; the circuit board is a multi-layer circuit board and comprises a digital signal processing layer, an analog signal processing layer, a power supply layer and a grounding layer, wherein the power supply layer and the grounding layer are arranged between the digital signal processing layer and the analog signal processing layer. According to the utility model, through combination of a specific plane layout and a three-dimensional layered structure, digital signals and analog signals are physically isolated and electrically shielded, signal crosstalk under a high-density layout is fundamentally inhibited, the anti-interference performance and the operation stability of the module are improved, and the module is suitable for severe industrial environments such as rail transit and the like.

Description

Integrated data acquisition and control module Technical Field

[0001] This utility model relates to the field of industrial automation control technology, specifically to an integrated data acquisition and control module, and more particularly to an integrated data acquisition and control module for complex environments such as rail transit. Background Technology

[0002] In fields such as rail transportation and industrial automation, centralized acquisition and control of status signals from field devices is a common technical requirement. Existing solutions typically employ a distributed, modular design. For example, the central processing unit, power supply, digital input / output, and communication functions are made into independent modules, which are then connected into a system via an external bus or backplane. While this distributed architecture offers some flexibility in functional expansion, it suffers from a series of inherent technical drawbacks. First, the system integration is low; the combination of multiple modules results in a large overall physical space occupation, increasing the size and cost of the control cabinet. Second, the connections between modules rely on extensive external cabling, which not only complicates the system structure and time-consuming installation and commissioning, but also makes long-distance external cables susceptible to electromagnetic interference, reducing the reliability of signal transmission. Third, the functional modules are usually of a generic design, lacking unified and integrated protection designs for harsh industrial environments such as rail transportation, including humidity, dust, vibration, wide temperature ranges, and strong electromagnetic interference, resulting in insufficient overall environmental adaptability and long-term operational stability of the system. Therefore, existing technologies have failed to provide a solution that combines a specific physical layout with a specific electrical structure to simultaneously address the issues of high integration, high interference immunity, and high environmental adaptability within a single module. Summary of the Invention

[0003] In view of the deficiencies in the existing technology, the purpose of this utility model is to provide an integrated data acquisition and control module.

[0004] An integrated data acquisition and control module according to the present invention includes: a circuit board and a housing for accommodating the circuit board;

[0005] The circuit board is equipped with a core control unit, a power supply unit, a communication interface unit, and a signal input / output unit; the circuit board is divided into a central area and a peripheral area surrounding the central area;

[0006] The core control unit is located in the central area, and the power supply unit, the communication interface unit, and the signal input / output unit are located in the peripheral area.

[0007] The circuit board is a multilayer circuit board, including a digital signal processing layer, an analog signal processing layer, and a power layer and a ground layer disposed between the digital signal processing layer and the analog signal processing layer;

[0008] The digital signal processing layer arranges the digital components of the core control unit, the power supply unit, and the communication interface unit; the power supply layer arranges the power supply circuit of the power supply unit independently; the grounding layer arranges the grounding interface of each unit; and the analog signal processing layer arranges the DI / DO channel components of the signal input / output unit.

[0009] Preferably, the multilayer circuit board is a four-layer circuit board, wherein the first layer is the digital signal processing layer, the fourth layer is the analog signal processing layer, the second layer is the power supply layer, and the third layer is the ground layer.

[0010] Preferably, the outer casing is a plastic casing, with a silicone rubber dustproof sealing gasket inside that seals against the circuit board, and the surface of the circuit board is coated with conformal coating.

[0011] Preferably, the back of the housing is provided with two symmetrical movable buckles.

[0012] Preferably, the grounding layer is divided into digital ground and analog ground, and the digital ground and the analog ground are connected at a single point through copper foil traces at the grounding output terminal of the power supply unit.

[0013] Preferably, the core control unit includes: a main control chip U200, a memory chip U201, a crystal oscillator Y201, a crystal oscillator Y200, and a first multi-stage filter capacitor;

[0014] The first multi-stage filter capacitor includes filter capacitor C201, filter capacitor C202, filter capacitor C203, filter capacitor C204, filter capacitor C205 and filter capacitor C206.

[0015] Pin 80 of the main control chip U200 is connected to pin 5 of the storage chip U201, pin 79 of the main control chip U200 is connected to pin 2 of the storage chip U201, and pin 78 of the main control chip U200 is connected to pin 6 of the storage chip U201.

[0016] The two ends of the crystal oscillator Y201 are respectively connected to pins 12 and 13 of the main control chip U200, and the two ends of the crystal oscillator Y200 are respectively connected to pins 9 and 8 of the main control chip U200;

[0017] The filter capacitors C201, C202, C203, C204, C205, and C206 are connected in parallel.

[0018] The power supply unit is connected to the core control unit through the first multi-stage filter capacitor;

[0019] The Ethernet communication pin of the main control chip U200 is connected to the Ethernet interface subunit of the communication interface unit, and the RS485 pin of the main control chip U200 is connected to the RS485 interface subunit of the communication interface unit.

[0020] The signal input pins and signal output pins of the main control chip U200 are connected to the signal input / output unit.

[0021] Preferably, the power supply unit includes: a DC-DC chip U1, a linear regulator chip U2, a rectifier diode D1, a rectifier diode D3, a transient suppression diode D2, a varistor VR1, and a second multi-stage filter capacitor;

[0022] The second multi-stage filter capacitor includes filter capacitor C1, filter capacitor C2, filter capacitor C3, filter capacitor C4, filter capacitor C5, filter capacitor C6, filter capacitor C7 and filter capacitor C8;

[0023] The positive terminal of the rectifier diode D1 is connected to pin 1 of connector CON1 and one end of the varistor VR1, respectively. The negative terminal of the rectifier diode D1 is connected to the negative terminal of transient suppression diode D2, one end of filter capacitor C5, one end of filter capacitor C4, one end of filter capacitor C2, one end of filter capacitor C1, one end of filter capacitor C3, one end of filter capacitor C6, and one end of filter capacitor C7, respectively, and is connected to pin 5 and pin 4 of DC-DC chip U1.

[0024] The other end of the varistor VR1 is connected to pin 2 of connector CON1, the positive terminal of transient suppression diode D2, the other end of filter capacitor C5, the other end of filter capacitor C4, the other end of filter capacitor C2, one end of filter capacitor C8, the other end of filter capacitor C3, the other end of filter capacitor C6, and the other end of filter capacitor C7, and is grounded.

[0025] The other end of the filter capacitor C1 is connected to the other end of the filter capacitor C8;

[0026] The first pin of the DC-DC chip U1 is connected to one end of the capacitor C9, and the other end of the capacitor C9 is connected to the sixth pin of the DC-DC chip U1, the negative terminal of the rectifier diode D3, and one end of the inductor L3.

[0027] The positive terminal of the rectifier diode D3 is connected to one end of capacitor C11, one end of capacitor C13, and one end of capacitor C12, respectively, and is grounded.

[0028] The other end of the inductor L3 is connected to the other end of the capacitor C11, the other end of the capacitor C13, the other end of the capacitor C12, the Ethernet interface subunit of the communication interface unit, the RS485 interface subunit of the communication interface unit, the third pin of the linear regulator chip U2, one end of the capacitor C15, and one end of the capacitor C16.

[0029] The second pin of the linear voltage regulator chip U2 is connected to one end of capacitor C17, one end of capacitor C18, the core control unit, and the signal input / output unit, respectively.

[0030] The other end of capacitor C15 is connected to the other end of capacitor C16, the other end of capacitor C17, and the other end of capacitor C18, and is grounded.

[0031] Preferably, the communication interface unit includes: an Ethernet interface subunit and an RS485 interface subunit;

[0032] The Ethernet interface subunit includes: interface chip U300, electrostatic discharge protection chip U301, common mode inductor L300, RJ45 interface J2, and crystal oscillator Y300;

[0033] The interface chip U300 is connected to the Ethernet communication pin of the main control chip U200 of the core control unit;

[0034] One end of the common-mode inductor L300 is connected to the second pin of the linear regulator chip U2 of the power supply unit, and the other end of the common-mode inductor L300 is connected to the differential signal receiving pins RDN and RDP of the interface chip U300.

[0035] The differential signal transmitting pins TDN and TDP of the interface chip U300 are connected to the differential signal receiving pins RDN and RDP of the electrostatic protection chip U301.

[0036] The differential signal transmitting pins TDN and TDP of the electrostatic discharge protection chip U301 are connected to the differential signal receiving pins RDN and RDP of the RJ45 interface J2, and the differential signal receiving pins RDN and RDP of the electrostatic discharge protection chip U301 are connected to the differential signal transmitting pins TDN and TDP of the RJ45 interface J2.

[0037] The two ends of the crystal oscillator Y300 are respectively connected to pin 8 and pin 9 of the interface chip U300;

[0038] The RS485 interface subunit includes: transceiver U601, transceiver U602, transient suppression diode D600, transient suppression diode D601, transient suppression diode D602, transient suppression diode D603, matching resistor R601, matching resistor R603, matching resistor R609, matching resistor R610, pull-up resistor R602, and pull-up resistor R616;

[0039] Pin 2 of the transceiver U601 is connected to the power supply unit, and pins 3 to 6 of the transceiver U601 are connected to the RS485 pin of the core control unit.

[0040] One end of the pull-up resistor R602 is connected to pin 2 of the transceiver U601, and the other end of the pull-up resistor R602 is connected to pin 6 of the transceiver U601.

[0041] Pin 14 of the transceiver U601 is connected to one end of the matching resistor R601, and pin 13 of the transceiver U601 is connected to one end of the matching resistor R603.

[0042] The other end of the matching resistor R601 is connected to the negative terminal of the transient suppression diode D601, and the other end of the matching resistor R603 is connected to the negative terminal of the transient suppression diode D600.

[0043] The positive terminal of the transient suppression diode D601 is connected to the positive terminal of the transient suppression diode D600, and is grounded;

[0044] Pin 2 of the transceiver U602 is connected to the power supply unit, and pins 3 to 6 of the transceiver U602 are connected to the RS485 pin of the core control unit.

[0045] One end of the pull-up resistor R616 is connected to pin 2 of the transceiver U602, and the other end of the pull-up resistor R616 is connected to pin 6 of the transceiver U602.

[0046] Pin 14 of the transceiver U602 is connected to one end of the matching resistor R609, and pin 13 of the transceiver U602 is connected to one end of the matching resistor R610.

[0047] The other end of the matching resistor R609 is connected to the negative terminal of the transient suppression diode D603, and the other end of the matching resistor R610 is connected to the negative terminal of the transient suppression diode D602.

[0048] The positive terminal of the transient suppression diode D603 is connected to the positive terminal of the transient suppression diode D602, and is grounded.

[0049] Preferably, the signal input / output unit includes: a signal input subunit and a signal output subunit;

[0050] The signal input subunit includes an opto-isolation chip U407, a current-limiting resistor R424, a current-limiting resistor R423, a pull-up resistor R422, a protection diode D400, a protection diode D401, a protection diode D402, a protection diode D403, a protection diode D404, a protection diode D405, a protection diode D406, and a protection diode D407.

[0051] Pins 1, 3, 5, 7, 9, 11, 13, and 15 of connector CON3 are respectively connected to the negative terminals of the protection diodes D400, D401, D402, D403, D404, D405, D406, and D407.

[0052] Pins 2, 4, 6, 8, 10, 12, 14, and 16 of connector CON3 are all grounded;

[0053] The positive terminals of the protection diodes D400, D401, D402, D403, D404, D405, D406, and D407 are all connected to one end of the current-limiting resistor R423 and one end of the capacitor C407.

[0054] The other end of the current-limiting resistor R423 is connected to the first pin of the opto-isolation chip U407, and the other end of the capacitor C407 is connected to the second pin of the opto-isolation chip U407.

[0055] The fourth pin of the opto-isolation chip U407 is connected to one end of the pull-up resistor R422 and one end of the current-limiting resistor R424; the third pin of the opto-isolation chip U407 is grounded.

[0056] The other end of the pull-up resistor R422 is connected to the power supply unit, and the other end of the current-limiting resistor R424 is connected to the core control unit;

[0057] The signal output subunit includes: current limiting resistor R500, current limiting resistor R501, current limiting resistor R505, protection diode D4, protection diode D5, protection diode D6, and protection diode D7.

[0058] Pins 1, 3, 5, and 7 of connector CON4 are connected to the negative terminals of protection diodes D4, D5, D6, and D7, respectively, and are also connected to one end of current-limiting resistor R500 and one end of capacitor C502.

[0059] The other end of the current-limiting resistor R500 is connected to one end of capacitor C500 and the source of field-effect transistor Q500, respectively; the other end of capacitor C502 is connected to the other end of capacitor C500 and the drain of field-effect transistor Q500, respectively, and grounded.

[0060] The gate of the field-effect transistor Q500 is connected to one end of the current-limiting resistor R501 and one end of the current-limiting resistor R505, respectively; the other end of the current-limiting resistor R501 is connected to the core control unit; and the other end of the current-limiting resistor R505 is grounded.

[0061] Compared with the prior art, the present invention has the following beneficial effects:

[0062] 1. This utility model integrates multiple functional units such as core control, power supply, communication, and signal input / output into one board through a single-board integrated design with "core in the center and functions surrounding it". This greatly improves the integration level, effectively reduces the physical size of the module and the installation space occupied, and significantly reduces the external wiring requirements. Combined with the tool-free installation snap-fit, it significantly improves the efficiency of installation and maintenance.

[0063] 2. The composite structure of "planar surround layout" and "three-dimensional layered isolation" of this utility model uses the power layer and ground layer of the multilayer circuit board to physically isolate and electrically shield the digital signal layer and analog signal layer, which fundamentally suppresses signal crosstalk and electromagnetic interference between components under high-density layout, and ensures the stability and accuracy of signal transmission.

[0064] 3. The triple integrated protection structure of "plastic shell, silicone rubber sealing gasket, and three-proof paint" adopted by this utility model enables the module to have excellent moisture-proof, dust-proof, and salt spray-proof capabilities. Combined with optimized power supply and heat dissipation design, it ensures long-term high-reliability operation of the module in harsh industrial environments such as wide temperature, high humidity, and vibration.

[0065] 4. The preferred triple protection structure of the power supply in this utility model enables the power input terminal of the module to have excellent surge tolerance, effectively resisting the impact of power grid fluctuations and lightning surges, and further ensuring the safety and stability of the equipment itself. Attached Figure Description

[0066] Other features, objects, and advantages of this invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0067] Figure 1 is a schematic diagram of the overall structure of the integrated data acquisition and control module;

[0068] Figure 2 is a schematic diagram of the circuit board layout;

[0069] Figure 3 is a schematic cross-sectional view of the layered structure of the circuit board;

[0070] Figure 4 is a circuit diagram of the core control unit and its connection with other units;

[0071] Figures 4A to 4H are sub-circuit diagrams of the core control unit at positions A to H in Figure 4.

[0072] Figure 5 is a circuit diagram of the power supply unit and its connection with other units;

[0073] Figures 5A to 5C are sub-circuit diagrams of each part of the power supply unit at positions A to C in Figure 5;

[0074] Figure 6 is a circuit diagram of the Ethernet communication unit and its connection with other units.

[0075] Figures 6A to 6C are sub-circuit diagrams of each part of the Ethernet communication unit at positions A to C in Figure 6;

[0076] Figure 7 is a circuit diagram of the RS485 communication unit and its connection with other units;

[0077] Figures 7A to 7E are sub-circuit diagrams of each part of the RS485 communication unit at positions A to E in Figure 7;

[0078] Figure 8 is a circuit diagram of the signal input / output unit and its connection with other units;

[0079] Figures 8A to 8F are sub-circuit diagrams of the signal input / output units at positions A to F in Figure 8;

[0080] Figure 9 is a circuit diagram of the status indicator unit and its connection with other units;

[0081] Figures 9A to 9E are sub-circuit diagrams of each part of the status indicator unit at positions A to E in Figure 9.

[0082] The diagram shows:

[0083] 10-ABS plastic housing; 11-Interface opening; 12-Observation window; 13-Modible latch; 20-Core control unit; 21-Power supply unit; 22-Ethernet communication unit; 23-RS485 communication unit; 24-Signal input unit; 25-Signal output unit; 26-Status indication unit; 31-Digital signal processing area; 32-Power supply layer; 33-Grounding layer; 34-Analog signal processing area; 35-Insulating medium; 36-Via. Detailed Implementation

[0084] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the present invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the protection scope of the present invention.

[0085] Example 1

[0086] In one embodiment of this application, an integrated data acquisition and control module is provided. This module, through a specific spatial layout, electrical layering structure, and integrated protective assembly, achieves a high degree of integration of multiple functional units, including core control, power supply, communication, signal input / output, and status indication, within a single module. This technical solution aims to address the technical problems commonly found in existing data acquisition and control systems that employ distributed module solutions, such as low integration, large space occupation, complex wiring, weak electromagnetic interference resistance, poor environmental adaptability, and inconvenient installation and maintenance.

[0087] Please refer to Figure 1, which shows a schematic diagram of the overall structure of an integrated data acquisition and control module provided in an embodiment of this application. As shown, the module includes a circuit board (not shown in Figure 1, see Figure 2 for details) and a housing to house the circuit board. As a preferred embodiment, the housing is an ABS plastic housing 10, which combines good insulation performance and mechanical strength. It can be understood that the overall physical dimensions of the module are designed to be very compact; for example, its length can be 210mm, its width can be 105mm, and its height can be 30mm. This compact design significantly improves space utilization, reducing the installation space occupied by approximately 70% compared to traditional distributed solutions.

[0088] Specifically, the front panel of the housing has multiple interface openings 11 for connecting external cables and an observation window 12 for observing the status indicator lights of the internal circuit board. The centralized arrangement of the interface openings 11 and the observation window 12 greatly facilitates the user's wiring operations and status monitoring. For convenient installation and removal, two movable latches 13 are symmetrically arranged on the back of the housing. These two movable latches 13 can mate with standard control cabinet mounting rails such as DIN rails, allowing installers to securely install or remove modules from the rails without the need for any tools, simply by pressing or moving the latches. The opening force of the latches can be designed to be no more than 5 Newtons, thereby reducing installation and maintenance time by approximately 80%.

[0089] To enhance the module's reliability in harsh industrial environments, this embodiment employs an integrated environmental protection structure. Specifically, inside the ABS plastic housing 10, along its edge that mates with the internal circuit board, a ring-shaped silicone rubber dustproof gasket (not shown in the figure) is provided. This gasket is 2mm thick, and when the housing is assembled and closed, the pressure applied to it effectively prevents external dust and moisture from penetrating the module. Furthermore, the entire surface of the internal circuit board is coated with a layer of conformal coating with a thickness of not less than 0.1mm. It should be noted that conformal coating is a specially formulated coating with excellent moisture-proof, salt spray-proof, and mildew-proof properties. Through the synergistic effect of these three integrated protective measures—the ABS plastic housing 10, the silicone rubber dustproof gasket, and the conformal coating—the module achieves an IP54 dust and water resistance rating and can operate stably within a wide temperature range of -40℃ to +85℃, with a mean time between failures (MTBF) of not less than 50,000 hours, sufficient to meet the stringent reliability requirements of complex industrial environments such as rail transportation.

[0090] Please refer to Figure 2, which is a schematic diagram of the circuit board layout provided in an embodiment of this application. One of the core innovations of this embodiment is that the circuit board adopts a specific spatial layout principle of "central core and surrounding functions". Specifically, a central area and a surrounding area are divided on the circuit board. The core control unit 20, which serves as the core of module control, is arranged in the central area of ​​the circuit board. By centrally arranging the core control unit 20, the physical distance to all other functional units on the circuit board is minimized and balanced, which is crucial for shortening the wiring length of high-frequency signals, reducing signal delay, and suppressing signal reflection.

[0091] Surrounding the core control unit 20 are other auxiliary functional units, including a power supply unit 21 that provides power to the entire module, a communication unit responsible for data exchange with a host computer or other devices (e.g., including an Ethernet communication unit 22 and one or more RS485 communication units 23), a signal input unit 24 and a signal output unit 25 responsible for acquiring external field signals and outputting control signals to external devices, and a status indicator unit 26 for displaying the module's operating status. These functional units are circumferentially distributed around the core control unit 20, and the spacing between them is designed to be no less than 8 mm to reduce electromagnetic coupling interference. This layout not only optimizes internal wiring but also allows external connection interfaces to be centrally located at the edge of the circuit board, facilitating alignment with the interface openings 11 on the housing shown in Figure 1.

[0092] Please refer to Figure 3, which is a cross-sectional schematic diagram of the circuit board layer structure provided in this embodiment. Another core innovation of this embodiment lies in the use of a specific multi-layer circuit board electrical layer structure to fundamentally solve the signal crosstalk problem under high-density layout. In this embodiment, the circuit board is preferably a four-layer printed circuit board. The functions of these four layers are clearly defined and divided, and they are physically isolated by the insulating medium 35.

[0093] Specifically, the first layer (top layer) is defined as the digital signal processing area 31. All components that generate and process high-frequency digital signals, such as the main chips in the core control unit 20 and the Ethernet communication unit 22 and RS485 communication unit 23, are arranged in this layer. The related digital signal traces are also mainly completed in this layer, and the trace width can be designed to be 0.25mm to accommodate high-density wiring.

[0094] Layer 4 (bottom layer) is defined as the analog signal processing area 34. All components that process analog signals or are susceptible to interference, such as the opto-isolators and drivers in the signal input unit 24 and signal output unit 25, are arranged in this layer. The related analog signal traces are also mainly completed in this layer, and their trace width can be designed to be 0.35mm to obtain better current carrying capacity and lower impedance.

[0095] Crucially, two complete planar layers are inserted between the digital signal processing area 31 and the analog signal processing area 34: the second layer is defined as the power layer 32, and the third layer is defined as the ground layer 33. The power layer 32 is typically a single piece of copper foil connected to the module's main power supply, powering the components on each layer. Its trace width can be designed to be 2.5mm to carry a large current. The ground layer 33 is also a single piece of copper foil, serving as the return path and reference plane for all signals. Its copper area can account for more than 45% of the entire circuit board area.

[0096] This four-layer stacked structure, consisting of a digital signal processing area, a power layer, a ground layer, and an analog signal processing area, physically forms a large, continuous electromagnetic shielding layer between the power layer 32 and the ground layer 33. This shielding layer effectively isolates the high-frequency digital signal noise on the top layer from the sensitive analog signals on the bottom layer, greatly suppressing crosstalk between them. Understandably, this internal signal physical isolation achieved through three-dimensional layering is key to the module's superior anti-interference performance (40% improvement in electromagnetic interference suppression capability, signal transmission error less than or equal to 0.5%). The figure also schematically shows vias 36 used to connect circuits on different layers.

[0097] The following section, in conjunction with Figures 4 to 9, will provide a detailed explanation of the specific implementation methods of each functional unit on the circuit board.

[0098] Please refer to Figures 4 and 4A-4H, which show the circuit schematic of the core control unit 20. In this embodiment, the main control chip U200 is preferably an STM32F107VCT microcontroller from STMicroelectronics, which has powerful processing capabilities and rich peripheral interfaces. To store program code and user data, the main control chip U200 is connected to a W25Q128JVSIQ memory chip U201 through a set of serial peripheral interfaces. In addition, the main control chip U200 is connected to an Ethernet physical layer chip through a media-independent interface to realize network communication. A 25MHz crystal oscillator provides a precise master clock for the main control chip U200.

[0099] Please refer to Figures 5 and 5A-5C, which show the circuit schematic of power supply unit 21. This unit is responsible for converting a wide range of externally input DC voltage (e.g., 9-32VDC) into the stable 5V and 3.3V operating voltages required by the module. After the external power input, it first passes through an optimized input protection circuit. This protection circuit employs a triple protection structure integrating series current limiting, parallel filtering, and surge clamping functions. Specifically, it includes: transient suppression diodes for surge clamping to suppress lightning surges and electrostatic discharge; fuses for series current limiting to prevent overcurrent damage; and a multi-stage filter network composed of multiple capacitors of different capacitance values ​​for parallel filtering. This design enables the module's power input port to withstand surge impacts of ±2KV. After protection and filtering, the voltage is sent to a DC-DC chip U1 of model MP2451dt, which efficiently steps it down to 5V (VCC5). Subsequently, part of the 5V voltage is directly supplied to units requiring 5V power, while the other part is sent to a low-dropout linear regulator chip U2 (model LD1117S33), which further converts it into a quieter 3.3V voltage (VCC3.3), specifically for powering digital chips such as the main control chip U200 that have extremely high requirements for power purity. This series topology, consisting of input filtering, DC-DC conversion, linear regulation, and branched output, ensures stable and reliable power supply.

[0100] As a preferred implementation, please refer to Figures 3 and 5 for understanding. To further optimize grounding performance, grounding layer 33 is divided into two independent regions: digital ground and analog ground. The grounding elements for digital circuits are connected to the digital ground region, while the grounding elements for analog circuits are connected to the analog ground region. Finally, these two grounds are connected at a single point at the grounding output terminal of power supply unit 21, specifically below the DC-DC chip U1, via a 1mm wide copper foil trace. It should be noted that this single-point grounding technique effectively prevents digital ground noise from being conducted to analog ground through the ground plane, which is another important measure to reduce internal noise interference.

[0101] Please refer to Figures 6, 6A-6C, and 7, 7A-7E, which show the circuit schematic of the communication unit. This embodiment integrates two commonly used industrial communication interfaces: Ethernet and RS485. For the Ethernet interface, a PHY chip U300 (model KSZ8081MNX), a common-mode inductor, and an RJ45 interface are connected sequentially along the signal path. Furthermore, an electrostatic discharge (ESD) protection chip is connected along the signal path between the PHY chip U300 and the common-mode inductor. This multi-level processing and protection design ensures the stability and reliability of Ethernet communication. For the RS485 interface, this embodiment provides two independent channels. Each channel includes an RS485 transceiver U601 (model TD541S485H), with a matching resistor for bus impedance matching and a transient suppression diode for absorbing surge voltages on the bus connected to its differential signal output (A / B line) for protection.

[0102] Please refer to Figures 8 and 8A-8F, which show the circuit schematic of the signal input / output unit. This embodiment provides 12 digital input (DI) channels and 4 digital output (DO) channels. For each DI channel, the core component is a PS2801-1 opto-isolation chip U407. The external DI input signal, after current limiting, drives the primary-side LED of the optocoupler, while the secondary-side phototransistor transmits the isolated signal to the main control chip U200. This design achieves complete electrical isolation between external field signals and the module's internal processing circuitry, effectively preventing damage to the internal core circuitry from external interference and high-voltage intrusion. For each DO channel, a driving structure is based on a NTD3055L104 MOSFET Q500. The control signal from the main control chip U200 drives the gate of the MOSFET Q500, controlling its on or off state, thereby driving the external load (such as a relay, solenoid valve, etc.) connected to the DO output terminal.

[0103] Please refer to Figures 9 and 9A-9E, which show the circuit schematic of the status indication unit 26. This unit visually displays various operating states of the module to the user through multiple LEDs on the panel. For example, the flashing of the run indicator LED_RUN indicates that the main control chip U200 is working normally, and the on / off state of DIxLED and DOxLED indicates the current status of the corresponding DI / DO channels, respectively. Each LED is connected in series with a current-limiting resistor to ensure that it operates under appropriate current and brightness.

[0104] The working process of this embodiment is as follows: The module is installed on the guide rail via the movable buckle 13, and an external power supply of 9-32VDC is connected. The power supply unit 21 converts the input voltage into stable 5V and 3.3V to supply all other functional units within the module. After the main control chip U200 is powered on and reset, it loads the pre-stored application program from the storage chip U201 and begins execution. In its main loop program, the main control chip U200 periodically scans the status of the 12 DI channels through the GPIO pins (these status signals have been isolated by the opto-isolation chip U407); at the same time, according to the internal control logic or the host computer instructions received from the communication interface, it drives the external load of the 4 DO channels by controlling the on and off of the corresponding MOS transistor Q500; in addition, it also interacts with the PHY chip U300 through the media-independent interface to realize the transmission and reception of Ethernet data, and communicates with the RS485 transceiver U601 through the UART interface to realize the transmission and reception of serial port data. The real-time operating status of all these units will be displayed by the corresponding LEDs (such as LED_RUN, DIxLED, DOxLED, etc.) of the status indicator unit 26, which greatly facilitates on-site debugging and troubleshooting.

[0105] This embodiment provides an integrated data acquisition and control module, which includes a circuit board and a housing for the circuit board. The circuit board is divided into a central region and a peripheral region surrounding the central region. The core control unit is arranged in the central region, and the power supply unit, communication unit and signal input / output unit are arranged in the peripheral region. The circuit board is a multilayer circuit board, including a digital signal processing layer, an analog signal processing layer, and a power supply layer and a ground layer disposed between the digital signal processing layer and the analog signal processing layer.

[0106] This embodiment combines a specific planar layout with a three-dimensional layered structure to physically isolate and electrically shield digital signals from analog signals, fundamentally suppressing signal crosstalk under high-density layout, improving the module's anti-interference performance and operational stability, and making it suitable for harsh industrial environments such as rail transit.

[0107] Example 2

[0108] This embodiment provides an integrated data acquisition and control module for rail transit, including an external assembly structure and a functional unit connection structure. The functional units are electrically connected via an in-board star bus topology. The external assembly structure and the functional unit connection structure work together to achieve integrated operation.

[0109] The physical dimensions of the external assembly structure are 210mm (length) × 105mm (width) × 30mm (height). The circuit board adopts a layout structure of "core in the center, interface on the side, and analog / digital partitions". Signal connections are made by pluggable screws with a 2.54mm pitch. The module is encapsulated in an ABS plastic shell with a silicone rubber dustproof sealing gasket on the inside of the shell. It is detachably connected to the control box / cabinet mounting beam via a backplate snap-fit. The circuit board is coated with a conformal coating with a thickness of ≥0.1mm.

[0110] Furthermore, the functional units include a core control unit, a power supply unit, a multi-functional communication unit, a signal input / output unit, and a status indicator unit. Each unit is connected via copper foil traces and vias. The circuit board has a 4-layer PCB structure, with the following layering functions: the first layer (top layer) is the digital signal processing area, the second layer is the power supply layer, the third layer is the ground layer, and the fourth layer (bottom layer) is the analog signal processing area. Each layer is physically isolated by an insulating medium. The core control unit is centrally located and surrounded by a copper heat dissipation area with a width of ≥3mm. The power supply unit and communication unit are distributed around the core control unit on the first layer (top layer) of the circuit board. The signal input / output unit is located on the fourth layer (bottom layer) of the circuit board, vertically corresponding to the area below the core control unit, forming a composite layout structure of "planar surround + three-dimensional layering". The spacing between each unit is ≥8mm. The width of the digital signal trace is 0.25mm, the width of the analog signal trace is 0.35mm, and the width of the power supply trace is 2.5mm. The ground copper area covers 45% of the circuit board area, and the analog ground and digital ground are connected at a single point near the power supply unit via copper foil traces with a width of 1mm.

[0111] Furthermore, the main control chip (U200), memory chip (U201), crystal oscillator, and filter capacitors are all arranged in the digital signal area of ​​the first layer (top layer) of the circuit board. The main control chip is connected to the SCK, SI, SO, and CS pins of the memory chip via SPI bus topology, and to the corresponding pins of the Ethernet PHY chip via MII interface topology. It is also connected to the isolation chip of the signal input / output unit via point-to-point topology. The two ends of the 25MHz crystal oscillator are connected to the OSC_IN and OSC_OUT pins of the main control chip, and a 22pF capacitor is connected in parallel to the third layer (ground layer). The 32.768KHz crystal oscillator is connected to the RTC module of the main control chip via a dedicated pin, and a 12pF filter capacitor is connected in parallel to ground.

[0112] Furthermore, a series topology of "input filtering - DC-DC conversion - linear regulation - branch output" is adopted; the core components are arranged on the first layer (top layer) of the circuit board, and the power supply circuit is connected to the second layer (power layer) through vias; the input side is configured with a multi-stage parallel filtering structure of "high voltage capacitor - intermediate frequency capacitor - high frequency capacitor", and the output side is connected to the power layer through vias, which is divided into digital power area and analog power area, each equipped with filter capacitors; the input circuit is soldered with fuses and transient suppression diodes in series to form a dual protection topology; the digital ground and analog ground are connected through a single-point connection structure under the DC-DC chip after being routed through independent copper areas.

[0113] Furthermore, it includes one Ethernet interface and two independent RS485 interfaces, with all components arranged in the digital signal area of ​​the first layer (top layer) of the circuit board; the Ethernet interface adopts a series soldering structure of "PHY chip-common mode inductor-electrostatic protection chip-RJ45", and the RS485 interface adopts a series soldering structure of "current limiting resistor-transceiver-matching resistor-protection diode"; the two RS485 interfaces are symmetrically arranged, sharing the power supply of the second layer (power layer) but independently soldered to the third layer (ground layer); all communication interfaces are connected to the core unit by soldering through opto-isolation chips.

[0114] Furthermore, all components are arranged in the analog signal area of ​​the 4th layer (bottom layer) of the circuit board; the DI channel adopts a series soldering structure of "current limiting resistor-opto-isolation chip-pull-up resistor", and the 12 DI channels are divided into two groups and independently soldered to the 3rd layer (ground layer); the DO channel adopts a topology of "drive resistor-MOS transistor-freewheeling diode-protection diode", and the 4 DO channels are partitioned with the DI channels; the analog signal path adopts a shielded wiring structure, and the distance between it and the digital signal path is ≥5mm.

[0115] Furthermore, the indicator lights are arranged linearly in groups according to "power status - communication status - channel status", close to the module panel side; all LED indicator lights adopt a series soldering structure of "main control chip GPIO / signal feedback terminal - current limiting resistor - LED - layer 3 (ground layer)". The power indicator light is directly soldered to the power supply of layer 2 (power layer), the running indicator light and the fault indicator light are soldered to the timer pin and fault detection pin of the main control chip, respectively, the channel indicator light is soldered to the signal feedback terminal of the corresponding input / output unit, the Ethernet indicator light is soldered to the LED0 and LED1 pins of the PHY chip (layer 1), the RS485 indicator light is soldered to the TXD and RXD pins of the transceiver (layer 1), and all LED cathodes are connected to the ground layer (layer 3) through vias.

[0116] This embodiment optimizes the standard 4-layer PCB structure, module layout, and component matching, achieving the following practical effects:

[0117] a. Advantages of integrated construction: Through the layout of "core in the center and functions around" and the copper foil routing and via soldering connection in the board, the five major functional units are integrated into a single circuit board. Compared with distributed modules, the space utilization rate is increased by 60%, external wiring is reduced by 90%, and the installation space occupied is reduced by 70%. The centralized layout of interfaces, combined with the movable buckle assembly structure, shortens the installation and maintenance time by 80%.

[0118] b. Anti-interference construction advantages: The 4-layer PCB standard layering (digital layer-power layer-ground layer-analog layer) achieves physical isolation of signals. Combined with analog / digital partitioned wiring, independent grounding + single-point connection construction, the module's electromagnetic interference suppression capability is improved by 40%, and the signal transmission error is ≤0.5%. The power unit has a triple protection structure of "series current limiting-parallel filtering-surge clamping", and the surge withstand capability reaches ±2KV, which is suitable for the complex electromagnetic environment of rail transit.

[0119] c. Stable protection advantages: The dual protection structure of circuit board conformal coating + shell silicone rubber sealing gasket provides a moisture and dust resistance rating of IP54 and extends the operating temperature range to -40℃~+85℃; the copper heat dissipation of key components, the nearby soldering of filter capacitors, and the independent power supply layer structure enable the module's mean time between failures (MTBF) to be ≥50,000 hours.

[0120] d. Practical Adaptability Advantages: The compact design, wide voltage input (9-32VDC), and dual RS485 + Ethernet interfaces make it directly adaptable to various scenarios such as rail transit vehicle-mounted and trackside applications without the need for additional adapter modules, and it has broad prospects for promotion and application.

[0121] The module in this embodiment achieves a highly integrated, stable, and reliable practical effect through a combination of specific circuit topology and construction. It can be widely used in fields such as rail transit and industrial automation, and has broad market prospects.

[0122] Currently, the industry uses distributed remote I / O modules to collect device information, and then the central controller performs data processing and logical operations. The overall system architecture is complex, with many network nodes and relatively simple terminal module functions. It does not have the advantages of the four-layer hierarchical isolation, high integration, strong anti-interference performance, and good environmental adaptability of this embodiment.

[0123] Example 3

[0124] Those skilled in the art can understand this embodiment as a more specific description of Embodiment 1 and Embodiment 2.

[0125] This embodiment provides an integrated data acquisition and control module for rail transit, relating to the field of industrial automation control technology, specifically an integrated data acquisition and control module suitable for the complex industrial environment of rail transit, based on a specific structural layout and component connection relationship.

[0126] The core technical solution of this embodiment is: through the organic combination of specific circuit board layout structure, component connection topology and assembly structure, a high degree of integration of functional units such as core control, power supply, communication, signal I / O and status indication is achieved, and each unit works together through copper foil traces and via soldering connections within the board.

[0127] I. Overall structure and layout coordination.

[0128] 1) Physical Dimensions and Layout: The module adopts a compact cubic structure with dimensions of 210mm (length) × 105mm (width) × 30mm (height). The circuit board follows the layout principle of "central core, surrounding functions, and centralized interfaces". The core control unit is centrally located, and the power supply unit, communication unit, and signal I / O unit are distributed around the core unit in a circumferential manner. The spacing between each unit component is ≥8mm. The interface terminals are concentrated at the edge of the circuit board (occupying 80% of the board edge length), and the terminal spacing is 2.54mm (standard pin spacing). The status indicator lights are arranged linearly along the side of the panel for easy observation and operation.

[0129] 2) Protection and assembly structure: The entire surface of the circuit board is coated with conformal coating (thickness ≥ 0.1mm) and encapsulated in an ABS plastic shell; the inner side of the shell has a circular opening and a transparent observation window respectively corresponding to the positions of the circuit board interface and indicator light; an annular dustproof sealing gasket (made of silicone rubber, 2mm thick) is set between the shell and the circuit board; two symmetrical movable buckles are provided on the back of the shell, which can be detachably connected to the mounting beam inside the control box / cabinet through the buckles. The buckle opening force is ≤ 5N, which can realize quick assembly and disassembly.

[0130] 3) Wiring Structure: The circuit board is a standard 4-layer PCB structure, employing a "layered and zoned wiring + component functional area isolation" approach. Each layer is physically isolated by insulating media, with interlayer connectivity achieved through vias within the board, conforming to industry-standard layer numbering specifications. Layer 1 (top layer) is the digital signal processing area, centrally housing the core control unit, communication unit, and power supply unit's digital components. Digital signal traces use 0.25mm wide copper foil, with point-to-point wiring and no crossing. Layer 2 (middle layer) is the power layer, independently housing the power supply circuits for the power supply unit. Power traces use 2.5mm wide copper foil, forming an independent power supply network with no signal trace crossings. Layer 3 (middle layer two) is the ground layer, employing a large-area copper plating structure (covering 45% of the board area) to provide a unified grounding reference for all units. Layer 4 (bottom layer) is the analog signal processing area, corresponding to the DI / DO channel components of the signal I / O unit. Analog signal traces use 0.35mm wide copper foil, and are doubly isolated from the digital signal layer (layer 1) through the power layer and ground layer to further suppress crosstalk. Analog ground (CGND) and digital ground (DGND) are independently routed on their respective signal layers (layer 4 and layer 1), and then extended to the ground layer (layer 3) via vias. Near the power supply unit, they are connected at a single point via a 1mm wide copper foil trace. The soldering area between the grounding copper and the component pins is ≥1mm², improving grounding reliability. This composite structure retains the advantages of a "centralized core" layout (shortening signal transmission paths and facilitating routing), while achieving physical isolation between digital / analog / power signals through a standard 4-layer PCB, solving the signal crosstalk problem of traditional single-layer surround circuits.

[0131] 4) Component packaging structure: All components on the circuit board are surface mount (SMD) packaged: the main control chip and PHY chip are QFP packaged; resistors and capacitors are 0603 / 0805 packaged; the interface terminals are pin-type packaged and fixed to the circuit board by a combination of "through-hole soldering + surface mount" to improve connection reliability.

[0132] II. Core Control Unit.

[0133] The core components include: STM32F107VCT / STM32F207VET6 main control chip (U200), W25Q128JVSIQ memory chip (U201), 25MHz crystal oscillator (Y201), 32.768KHz crystal oscillator (matching Y200), and filter capacitors (C201~C206). The main control chip is centrally located, with a pre-reserved annular heat dissipation copper plating area (width ≥3mm) around it. The memory chip and crystal oscillator are close to the main control chip (spacing ≤3mm). The debugging header (CON200) is located at the edge of the circuit board for easy operation.

[0134] Component connection structure:

[0135] The main control chip (U200B) and the memory chip (U201) are physically connected via the SPI bus. The SPI1_CLK, SPI1_MOSI, SPI1_MISO, and FLSH-CS pins of the main control chip are respectively point-to-point soldered to the SCK, SI, SO, and CS pins of the memory chip. The length of the connection line is ≤5mm, and the trace is located in the first layer of the digital signal area.

[0136] Main control chip and crystal oscillator: The two ends of the 25MHz crystal oscillator (Y200) are soldered to the OSC_IN and OSC_OUT pins of the main control chip, respectively. After connecting the two ends of the crystal oscillator in parallel, the 22pF capacitors (C211, C213) are connected to the ground layer (layer 3) through vias. The 32.768KHz crystal oscillator is soldered to the RTC module of the main control chip through dedicated pins and grounded in parallel with a 12pF filter capacitor (C208).

[0137] Main control chip and power supply: The VDD_1 to VDD_4, VDDA and VDD_5 pins of the main control chip are connected to the VCC3.3 power supply network of the power layer (layer 2) through copper foil traces and vias. A 100nF filter capacitor (C201~C206) is connected in parallel next to each power supply pin. One end of the capacitor is soldered to the pin, and the other end is connected to the ground layer (layer 3) through a via.

[0138] III. Power Supply Unit.

[0139] The core components include: MP2451dtDC-DC chip (U1), LD1117S33 linear regulator chip (U2), B340A-13-F rectifier diodes (D1, D3), SMBJ33.0CA transient suppression diode (D2), 390A-LF varistor (VR1), and multi-stage filter capacitors (C1, C2, C5, etc.).

[0140] Key components of the power supply unit are located on the edge of the board on Layer 1 (top layer), adjacent to the core control unit, facilitating quick connection to the power layer (Layer 2) via vias and shortening power supply links with other units. Power supply traces (such as the branch power supply networks for VCC5 and VCC3.3) are separately located on Layer 2 (power layer), isolated from the digital signals of Layer 1 and the analog signals of Layer 4 by insulating media, preventing power signals from interfering with other types of signals and improving power supply stability. Power supply components on Layer 1 are vertically connected to the power supply network of Layer 2 via 2mm diameter copper foil vias; VCC3.3 and VCC5 on the power layer then supply power to the core control unit and communication unit on Layer 1, and the signal I / O unit on Layer 4, respectively, through vias, achieving cross-layer collaboration between the "component layout layer - functional routing layer - power consumption unit layer".

[0141] Component connection structure:

[0142] a. Input protection structure: After the 24VIN+ is connected through the input terminal (CON1), first, a rectifier diode (D1) is soldered in series. Then, a varistor (VR1) and a transient suppression diode (D2) are soldered in parallel at the output of D1 (D2 is connected to the third ground plane through a via). After that, 1206-0R current-limiting resistors (R1, R2) are soldered in series. On the output side of the resistor, a multi-stage filter network of "10nF / 2KV high voltage capacitor (C1, C10) + 0.47uF / 250V intermediate frequency capacitor (C3) + 0.22uF / 250V intermediate frequency capacitor (C2)" is soldered in parallel to form a protection structure of "series current limiting - parallel filtering - surge clamping".

[0143] b. Voltage regulation and branch circuit construction: The VIN pin of the DC-DC chip (U1) is soldered to the filtered voltage. The EN pin is soldered to the VIN pin through a 130KΩ resistor (R3). The FB pin is soldered to VCC5 through a 124KΩ resistor (R11) and connected in parallel with a 33pF capacitor (C19). Then, it is soldered to GND through a 23.7KΩ resistor (R4). The SW pin is soldered to form a freewheeling circuit through an inductor (L3) and a rectifier diode (D3). After filtering, VCC5 is soldered to the VIN pin of the linear regulator chip (U2). The VOUT pin outputs VCC3.3. The input terminal is connected in parallel with capacitors (C15, C16) for filtering, and the output terminal is connected in parallel with capacitors (C17, C18) for filtering and connected to the power layer (layer 2) through vias.

[0144] c. Grounding structure: Digital ground (DGND) and analog ground (CGND) are wired through independent copper areas and connected at a single point under the DC-DC chip (U1) through a copper foil via with a diameter of 2mm. A grounding pad (5mm in diameter) is soldered at the connection point.

[0145] IV. Multifunctional communication interface unit.

[0146] 1) Ethernet interface subunit.

[0147] Core components: KSZ8081MNX / KSZ8091MNX PHY chip (U300), TPD4E001DBVR electrostatic discharge protection chip (U301), BLM21BB331SN1J common mode inductor (L300), RJ45 interface (J2), 25MHz crystal oscillator (Y300); adopts a series structure of "PHY chip-common mode inductor-protection chip-RJ45", and all components are arranged in the first layer of digital signal area.

[0148] Component connection structure:

[0149] The MII interface pins of the PHY chip (U300) are soldered point-to-point to the corresponding pins of the main control chip (U200B) (MII_TXD0→PB12, MII_TX_EN→PB11, etc.), with a connection length ≤8mm and the traces located on the first layer;

[0150] The PHY chip's TD_P / TD_N / RD_P / RD_N pins are soldered to one end of a common-mode inductor (L300), and the other end of the inductor is soldered to the IO1~IO4 pins of the protection chip (U301). The protection chip's VCC pin is connected to the power layer (layer 2) VCC3.3 through a via, and its GND pin is connected to the ground layer (layer 3) through a via. The output is directly soldered to the corresponding pin of the RJ45 interface (J2).

[0151] 2) RS485 interface subunit.

[0152] Core components: TD541S485H transceiver (U601, U602), SMBJ15.0CA transient suppression diodes (D600~D603), 33Ω matching resistors (R603, R609, etc.), 10KΩ pull-up resistors (R602, R616); adopts a dual independent channel symmetrical structure and is arranged in the first layer digital signal area.

[0153] Component connection structure:

[0154] The first RS485 channel: the main control chip UART2_TX (PD5) is soldered to the transceiver (U601) TXD pin via a 0603-33R resistor (R613); UART2_RX (PD6) is soldered to the transceiver RXD pin via a 0603-33R resistor (R614); and COM_DIR1 (PD10) is soldered to the transceiver #RE / DE pin.

[0155] After soldering a 33Ω matching resistor to the transceiver A / B pins, connect the transient suppression diodes (D600, D601) in parallel to the ground plane (layer 3) through vias, and finally solder the interface terminal (CON2) COM1+ / COM1- pins.

[0156] The second RS485 channel is symmetrically arranged with the first channel, sharing the power layer (layer 2) VCC5 power supply, but is independently connected to the ground layer (layer 3) through a via. The distance between the two channels is ≥10mm to avoid crosstalk.

[0157] V. Signal Input / Output Unit.

[0158] 1) 12-channel DI configuration

[0159] Core components: PS2801-1 opto-isolation chip (U407), 0603-33R current-limiting resistors (R424, R421, etc.), 10KΩ pull-up resistors (R422, R419, etc.), SMBJ33.0CA protection diodes (D400~D407); adopts a series structure of "input protection-current limiting isolation-pull-up output", and all components are arranged in the 4th layer (bottom layer) analog signal area.

[0160] Component connection structure:

[0161] After the external DI signal is connected through the terminal (CON16), the protection diode (D400) is connected in parallel and then connected to the ground layer (layer 3) through a via. It is then connected to the input terminal of the isolation chip via a current-limiting resistor.

[0162] The isolation chip's VCC pin is connected to the power layer (layer 2) VCC3.3 via a via, and the GND pin is connected to the ground layer (layer 3) via a via. The output terminal is soldered to VCC3.3 via a 10KΩ pull-up resistor, and is also connected to the main control chip's dedicated GPIO pins (PE4~PE15) via a current-limiting resistor, via a via, and cross-layer trace.

[0163] The 12-channel DI is divided into two groups (6 channels in each group). Each group is independently connected to the grounding layer (3rd layer) through a via. The spacing between groups is ≥8mm and the spacing between channels is ≥1mm.

[0164] 2) 4-channel DO configuration.

[0165] Core components: NTD3055L104 MOSFETs (Q500, Q502, Q504, Q506), 0603_1K drive resistors (R501, R508, etc.), 220R_2512-1W load resistors (R500, R507, etc.), and SMBJ33.0CA protection diodes (D500~D503); adopting a "drive-power output-protection" structure, all components are arranged in the 4th layer (bottom layer) analog signal area.

[0166] Component connection structure:

[0167] The dedicated GPIO pins (PE0~PE3) of the main control chip are extended to the 4th layer through drive resistors and vias, and are soldered to the gate of the MOS transistor. The source of the MOS transistor is connected to the ground layer (3rd layer) through vias, and the drain is soldered to the output terminal (CON4) through a series load resistor.

[0168] A protection diode is connected in parallel to the output terminal of the load resistor and connected to the ground plane (layer 3) through a via. A 100nF capacitor (C500, C504, etc.) is connected in parallel next to the gate of the MOSFET and connected to the ground plane (layer 3) through a via, forming a stable drive structure.

[0169] VI. Status Indicator Unit.

[0170] Core components: various status LEDs (power LED, LED_RUN, DI1~DI12LED, DO1~DO4LED, etc.), 1KΩ current limiting resistors (R319, R320, R707, etc.); adopts a "group layout-series drive" structure, with indicator lights arranged linearly in groups along the side of the panel, in the order of "power status group - communication status group - channel status group", with a spacing of ≥3mm between each group and a center-to-center spacing of ≥2mm between LEDs, and arranged on the edge of the circuit board (layer 1 or layer 4, depending on the ease of installation).

[0171] Component connection structure: All LEDs adopt a series soldering structure of "anode-current limiting resistor-control terminal-cathode-ground". The anode of the power LED is connected to the power layer (layer 2) VCC3.3 via a via through a current limiting resistor; the running indicator and fault indicator are soldered to the timer pin and fault detection pin of the main control chip, respectively; the anode of the DI channel LED is soldered to the corresponding isolation chip output terminal (layer 4) via a current limiting resistor; the anode of the DO channel LED is soldered to the corresponding MOSFET drain (layer 4) via a current limiting resistor; the anode of the Ethernet indicator is soldered to the LED0 and LED1 pins of the PHY chip (layer 1) via a current limiting resistor, and all LED cathodes are connected to the ground layer (layer 3) via vias; the anode of the RS485 indicator is soldered to the transceiver TXD and RXD pins (layer 1) via a current limiting resistor, and all LED cathodes are connected to the ground layer (layer 3) via vias.

[0172] The purpose of this embodiment is to overcome the shortcomings of the prior art and provide an integrated data acquisition and control module based on a "core-centered-functional-interface-centralized" layout, star bus connection topology, and integrated protection assembly. By clarifying the positional relationship of each functional unit, the component connection method, and the assembly cooperation, it solves the problems of low integration, weak anti-interference, poor environmental adaptability, and inconvenient installation and maintenance of the prior art.

[0173] This utility model discloses an integrated data acquisition and control module for rail transit, belonging to the field of industrial automation control technology. The module adopts a compact structure of 210mm×105mm×30mm, with a 4-layer PCB standard layered structure (layer 1 top = digital signal area, layer 2 = power layer, layer 3 = ground layer, layer 4 bottom = analog signal area). Following the layout principle of "core in the center, interfaces on the edge, analog / digital partitioned," it integrates core control, power supply, communication, signal input / output, and status indication units. Each unit is connected via copper foil traces and via soldering. The power supply unit adopts a triple protection structure of "series current limiting - parallel filtering - surge clamping." The core control unit is connected to the memory chip via an SPI bus. The communication unit is equipped with Ethernet and dual independent RS485 interfaces, as well as opto-isolation / electrostatic protection structures. The signal I / O channels adopt an opto-isolated, MOSFET-driven topology design.

[0174] This utility model, through a composite structure of "planar surround + three-dimensional layering", retains the wiring advantages of the core-centered layout, and achieves signal isolation through a 4-layer PCB standard layering. It solves the problems of low integration, weak anti-interference ability, poor environmental adaptability and inconvenient maintenance of existing modules. It has the advantages of high integration, stable operation and convenient installation, and is suitable for complex industrial environments such as rail transit.

[0175] In the description of this application, it should be understood that the terms "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0176] The specific embodiments of this utility model have been described above. It should be understood that this utility model is not limited to the specific embodiments described above, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the substantive content of this utility model. Unless otherwise specified, the embodiments and features described in this application can be arbitrarily combined with each other.

Claims

1. An integrated data acquisition and control module, characterized in that, include: The circuit board and a housing containing the circuit board are provided. A core control unit, a power supply unit, a communication interface unit, and a signal input / output unit are disposed on the circuit board. The circuit board is divided into a central region and a peripheral region surrounding the central region. The core control unit is located within the central region, and the power supply unit, the communication interface unit, and the signal input / output unit are located within the peripheral region. The circuit board is a multilayer circuit board, including a digital signal processing layer, an analog signal processing layer, and a power layer and a ground layer disposed between the digital signal processing layer and the analog signal processing layer. The digital signal processing layer houses the digital components of the core control unit, the power supply unit, and the communication interface unit. The power layer houses... The power supply circuit of the power supply unit is arranged independently; the grounding layer arranges the grounding interface of each unit; the analog signal processing layer arranges the DI / DO channel elements of the signal input / output unit; the multilayer circuit board is a 4-layer circuit board, with the first layer being the digital signal processing layer, the fourth layer being the analog signal processing layer, the second layer being the power supply layer, and the third layer being the grounding layer; the outer shell is a plastic shell, with a silicone rubber dustproof sealing gasket inside that seals against the circuit board, and the surface of the circuit board is coated with conformal coating; the back of the outer shell has two symmetrical movable buckles; the grounding layer is divided into digital ground and analog ground, and the digital ground and the analog ground are connected at a single point through copper foil traces at the grounding output terminal of the power supply unit.

2. The integrated data acquisition and control module according to claim 1, characterized in that, The core control unit includes: a main control chip U200, a memory chip U201, a crystal oscillator Y201, a crystal oscillator Y200, and a first multi-stage filter capacitor; the first multi-stage filter capacitor includes filter capacitors C201, C202, C203, C204, C205, and C206; pin 80 of the main control chip U200 is connected to pin 5 of the memory chip U201, pin 79 of the main control chip U200 is connected to pin 2 of the memory chip U201, and pin 78 of the main control chip U200 is connected to pin 6 of the memory chip U201; the two ends of the crystal oscillator Y201 are respectively connected to pins 12 and 1... The system has three pins: the two ends of the crystal oscillator Y200 are connected to pins 9 and 8 of the main control chip U200, respectively; the filter capacitors C201, C202, C203, C204, C205, and C206 are connected in parallel; the power supply unit is connected to the core control unit through the first multi-stage filter capacitors; the Ethernet communication pin of the main control chip U200 is connected to the Ethernet interface subunit of the communication interface unit, and the RS485 pin of the main control chip U200 is connected to the RS485 interface subunit of the communication interface unit; the signal input pin and signal output pin of the main control chip U200 are connected to the signal input / output unit.

3. The integrated data acquisition and control module according to claim 1, characterized in that, The power supply unit includes: a DC-DC chip U1, a linear regulator chip U2, rectifier diodes D1 and D3, a transient suppression diode D2, a varistor VR1, and a second multi-stage filter capacitor; the second multi-stage filter capacitor includes filter capacitors C1, C2, C3, C4, C5, C6, C7, and C8; the positive terminal of the rectifier diode D1 is connected to pin 1 of connector CON1 and one end of the varistor VR1, and the negative terminal of the rectifier diode D1 is connected to the negative terminal of the transient suppression diode D2. One end of the filter capacitor C5, one end of the filter capacitor C4, one end of the filter capacitor C2, one end of the filter capacitor C1, one end of the filter capacitor C3, one end of the filter capacitor C6, and one end of the filter capacitor C7 are connected to pins 5 and 4 of the DC-DC chip U1, respectively; the other end of the varistor VR1 is connected to pin 2 of the connector CON1, the positive terminal of the transient suppression diode D2, the other end of the filter capacitor C5, the other end of the filter capacitor C4, the other end of the filter capacitor C2, one end of the filter capacitor C8, and the filter capacitor... The other end of capacitor C3, the other end of filter capacitor C6, and the other end of filter capacitor C7 are connected and grounded; the other end of filter capacitor C1 is connected to the other end of filter capacitor C8; pin 1 of DC-DC chip U1 is connected to one end of capacitor C9, and the other end of capacitor C9 is connected to pin 6 of DC-DC chip U1, the negative terminal of rectifier diode D3, and one end of inductor L3; the positive terminal of rectifier diode D3 is connected to one end of capacitor C11, one end of capacitor C13, and one end of capacitor C12, and grounded; the other end of inductor L3 is connected to capacitor C1... The other end of capacitor C12, the other end of capacitor C13, the other end of capacitor C12, the Ethernet interface subunit of the communication interface unit, the RS485 interface subunit of the communication interface unit, the third pin of the linear regulator chip U2, one end of capacitor C15, and one end of capacitor C16; the second pin of the linear regulator chip U2 is connected to one end of capacitor C17, one end of capacitor C18, the core control unit, and the signal input / output unit; the other end of capacitor C15 is connected to the other end of capacitor C16, the other end of capacitor C17, and the other end of capacitor C18, and is grounded.

4. The integrated data acquisition and control module according to claim 1, characterized in that, The communication interface unit includes an Ethernet interface subunit and an RS485 interface subunit. The Ethernet interface subunit includes an interface chip U300, an electrostatic discharge (ESD) protection chip U301, a common-mode inductor L300, an RJ45 interface J2, and a crystal oscillator Y300. The interface chip U300 is connected to the Ethernet communication pin of the main control chip U200 of the core control unit. One end of the common-mode inductor L300 is connected to the second pin of the linear regulator chip U2 of the power supply unit, and the other end of the common-mode inductor L300 is connected to the differential signal receiving pins RDN and RDP of the interface chip U300. The differential signal transmitting pins TDN and TDP of the interface chip U300 are connected to the ESD protection chip U301. The differential signal receiving pins RDN and RDP of the electrostatic discharge (ESD) protection chip U301 are connected; the differential signal transmitting pins TDN and TDP of the ESD protection chip U301 are connected to the differential signal receiving pins RDN and RDP of the RJ45 interface J2; the two ends of the crystal oscillator Y300 are respectively connected to pins 8 and 9 of the interface chip U300; the RS485 interface subunit includes: transceiver U601, transceiver U602, transient suppression diode D600, transient suppression diode D601, and transient suppression diode... D602, transient suppression diode D603, matching resistor R601, matching resistor R603, matching resistor R609, matching resistor R610, pull-up resistor R602, and pull-up resistor R616; pin 2 of transceiver U601 is connected to the power supply unit, and pins 3 to 6 of transceiver U601 are connected to the RS485 pin of the core control unit; one end of pull-up resistor R602 is connected to pin 2 of transceiver U601, and the other end of pull-up resistor R602 is connected to pin 6 of transceiver U601; pin 14 of transceiver U601 is connected to one end of matching resistor R601, and pin 13 of transceiver U601 is connected to the... One end of the matching resistor R603 is connected to the power supply unit; the other end of the matching resistor R601 is connected to the cathode of the transient suppression diode D601, and the other end of the matching resistor R603 is connected to the cathode of the transient suppression diode D600; the anode of the transient suppression diode D601 is connected to the anode of the transient suppression diode D600 and grounded; pin 2 of the transceiver U602 is connected to the power supply unit, and pins 3 to 6 of the transceiver U602 are connected to the RS485 pin of the core control unit; one end of the pull-up resistor R616 is connected to pin 2 of the transceiver U602, and the other end of the pull-up resistor R616 is connected to pin 6 of the transceiver U602;Pin 14 of transceiver U602 is connected to one end of matching resistor R609, and pin 13 of transceiver U602 is connected to one end of matching resistor R610. The other end of matching resistor R609 is connected to the cathode of transient suppression diode D603, and the other end of matching resistor R610 is connected to the cathode of transient suppression diode D602. The anode of transient suppression diode D603 is connected to the anode of transient suppression diode D602 and grounded.

5. The integrated data acquisition and control module according to claim 1, characterized in that, The signal input / output unit includes a signal input subunit and a signal output subunit; the signal input subunit includes an opto-isolation chip U407, current-limiting resistors R424 and R423, a pull-up resistor R422, and protection diodes D400, D401, D402, D403, D404, D405, D406, and D407; pins 1, 3, 5, 7, 9, 11, 13, and 15 of connector CON3 are respectively connected to the negative terminals of protection diodes D400, D401, and D407. The negative terminals of diodes D402, D403, D404, D405, D406, and D407; pins 2, 4, 6, 8, 10, 12, 14, and 16 of connector CON3 are all grounded; the positive terminals of diodes D400, D401, D402, D403, D404, D405, and D406, and the... The positive terminals of the protection diode D407 are connected to one end of the current-limiting resistor R423 and one end of the capacitor C407; the other end of the current-limiting resistor R423 is connected to pin 1 of the opto-isolation chip U407, and the other end of the capacitor C407 is connected to pin 2 of the opto-isolation chip U407; pin 4 of the opto-isolation chip U407 is connected to one end of the pull-up resistor R422 and one end of the current-limiting resistor R424; pin 3 of the opto-isolation chip U407 is grounded; the other end of the pull-up resistor R422 is connected to the power supply unit, and the other end of the current-limiting resistor R424 is connected to the core control unit; the signal output subunit includes: a current-limiting resistor R500, a current-limiting resistor R422, and a current-limiting resistor R424. Resistor R501, current-limiting resistor R505, protection diodes D4, D5, D6, and D7; pins 1, 3, 5, and 7 of connector CON4 are connected to the negative terminals of protection diodes D4, D5, D6, and D7, respectively, and are also connected to one end of current-limiting resistor R500 and one end of capacitor C502; the other end of current-limiting resistor R500 is connected to one end of capacitor C500 and the source of MOSFET Q500; the other end of capacitor C502 is connected to the other end of capacitor C500 and the drain of MOSFET Q500, and is grounded.The gate of the field-effect transistor Q500 is connected to one end of the current-limiting resistor R501 and one end of the current-limiting resistor R505; the other end of the current-limiting resistor R501 is connected to the core control unit; the other end of the current-limiting resistor R505 is grounded.

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