Control power supply circuit capable of reducing power consumption

Abstract

The utility model discloses a control power supply circuit capable of reducing power consumption, and belongs to the technical field of switching power supplies. In order to solve the problems of high standby power consumption and slow dynamic response in the existing scheme, the utility model proposes that a 220mu F electrolytic capacitor EC2 is bridged at + 5V and + 12V output ends, dummy load current is reduced through charge transfer during light load, the current is increased to 10K omega from 5K omega by matching with a bleeder resistor, and the static power consumption is reduced by more than 50%; the PWM duty ratio is adjusted in real time by adopting an optical coupled isolator and a PI algorithm, and + 12V ripples are suppressed to be below 500mV; an overcurrent protection mechanism is designed, and the thyristor cuts off overcurrent within 2 ms and executes graded recovery; dynamic load response is optimized, the voltage is rapidly stabilized through EC2 charge release and RC absorption circuits, and the duty ratio adjusting speed reaches five switching periods. The system is compatible with an original power supply framework, standby power consumption is smaller than or equal to 0.5 W, energy efficiency and transient performance are remarkably improved, and the system is suitable for energy-saving transformation of air conditioners and the like.

Description

Technical Field

[0001] This utility model specifically relates to a control power supply circuit for reducing power consumption. Background Technology

[0002] With the rapid development of smart home appliances, the market demand for low power consumption and high efficiency in appliances such as air conditioners is becoming increasingly urgent. Currently, air conditioner switching power supplies mostly adopt traditional designs. Although their chip solutions have high stability, they suffer from problems such as high standby power consumption, slow dynamic response, and low energy efficiency. For example, in existing solutions, the bleeder resistor is fixed at 5KΩ, resulting in significant redundant power consumption under light loads. Furthermore, the energy conversion efficiency across voltage domains is low, and there is a lack of rapid adjustment mechanisms for sudden load changes. Especially in scenarios where air conditioners are powered on for extended periods, traditional power supply solutions cannot effectively balance stability and energy-saving requirements, leading to energy waste and failing to meet the industry trend of green and low-carbon development. Although attempts have been made to optimize existing solutions, limitations such as fixed circuit structures and simple feedback mechanisms make it difficult to achieve significant power reduction without replacing core components. For example, in existing technologies, the fixed bleeder resistor of 5KΩ results in static power consumption ≥0.6W under light load conditions and a dynamic response time >20ms. Therefore, an innovative solution that is compatible with existing architectures and reduces power consumption through intelligent control strategies is urgently needed. Summary of the Invention

[0003] The present invention aims to at least solve one of the technical problems existing in the prior art. Therefore, one objective of the present invention is to provide a control power supply circuit that reduces power consumption, thereby reducing standby power consumption and the actual power used by the switching power supply.

[0004] This utility model also provides a control power supply circuit for reducing power consumption, including the following.

[0005] The main power module includes a bridge rectifier BD1 and a transformer T1; as well as a PWM control chip U1 connected to the primary side of the transformer.

[0006] The secondary output module includes: a +12V branch: rectified by the first diode D1 and connected in sequence to the fifth resistor R5, the fifth electrolytic capacitor EC5, and the second capacitor C2; and a +5V branch: rectified by the second diode D2 and the first diode D1.

[0007] In the cross-voltage domain coupling module, the positive terminal of the second electrolytic capacitor EC2 is connected to the +12V terminal, and the negative terminal is connected to the +5V terminal, so as to realize the transfer of charge from the +5V terminal to the +12V terminal in light load mode. It is connected in parallel to an RC absorption unit consisting of the fifth resistor R5=2kΩ±5% accuracy and the third capacitor C3=100nF.

[0008] The feedback protection module includes: an optocoupler U2, whose input terminal samples the +5V output voltage through a voltage divider network composed of the eighth resistor R8, the ninth resistor R9, and the sixth resistor R6; and a thyristor U4, whose trigger electrode is set with an overcurrent threshold through a voltage divider circuit composed of the tenth resistor R10 and the eleventh resistor R11. The anode of the thyristor U4 is connected to the +12V terminal, and the cathode is grounded.

[0009] Specifically, the frequency control terminal of the PWM control chip U1 is connected to a fourth electrolytic capacitor EC4 with a capacitance of 10μF±20%, which is used to set the switching frequency to 65kHz±5% accuracy.

[0010] Specifically, the feedback input terminal of the PWM control chip U1 is connected to the output terminal of the optocoupler U2 through the fifth capacitor C5=1nF.

[0011] Specifically, a ferrite bead FB1 is connected in series between the first inductor L1 and the +5V terminal, and its impedance characteristic is: impedance ≥100Ω at a frequency of 100MHz.

[0012] Specifically, a fourth capacitor C4 with a capacitance of 47nF is connected in reverse parallel between the cathode of the Zener diode ZD1 and the +5V terminal.

[0013] Specifically, the fifth resistor R5 in the RC absorption unit is a metal film resistor with a power tolerance of 1W; the third capacitor C3 is a multilayer ceramic capacitor made of X7R material with a voltage rating of 50V; the resistance ratio of the eighth resistor R8 and the ninth resistor R9 in the voltage divider network is 1:2, and the adjustable terminal of the ninth resistor R9 is connected to the positive terminal of the light-emitting diode of the optocoupler U2, forming an output voltage fine-tuning mechanism; the primary and secondary windings of the transformer T1 are provided with a double safety isolation structure, including: a first safety capacitor CY1 connected across the primary ground PGND and the secondary ground SGND, with a capacitance of 2.2nF ± 10% accuracy; and a second safety capacitor CY2 connected in parallel on the shielding pin of the transformer T1, with a capacitance of 4.7nF ± 10% accuracy.

[0014] This invention significantly improves the energy efficiency and stability of the power supply system through the following technical means, and the specific beneficial effects include the following.

[0015] 1. By using the 220μF second electrolytic capacitor EC2 to bridge the +5V and +12V output terminals, charge transfer across domains is achieved in light load mode, reducing the dummy load current requirement. The discharge resistor is increased from 5KΩ to 10KΩ±5% accuracy, directly reducing static power consumption by more than 50%.

[0016] 2. The optocoupler U2 and voltage divider network are used to monitor the +5V voltage in real time. Combined with PI regulation triggered by ripple amplitude (Kp=0.05% / mV, Ki=0.2% / (mV·ms) calibrated by experiment), the duty cycle is dynamically compensated to ensure that the output voltage accuracy is within ±2%. The specific method is as follows: a step load disturbance is applied to the +12V output terminal, and the optimal parameter combination is determined through closed-loop debugging to make the ripple suppression efficiency reach more than 90%, which can achieve dynamic charge sharing to reduce redundant power consumption and achieve multi-level feedback precise control.

[0017] Third, the thyristor U4 and the PWM control chip U1 work together to cut off the overcurrent within 2ms and restore it in stages to avoid hardware damage; the three-level recovery mechanism (cut-off-soft start-lock) takes into account both safety and fault tolerance, and plays the role of overcurrent collaborative protection mechanism.

[0018] Fourth, by adjusting the time constant of the RC absorption circuit to an accuracy of 200μs±10%, combined with the charge release / absorption function of EC2, the output voltage oscillation amplitude is reduced by more than 60% when the load changes stepwise (such as the duty cycle rising to 95% within 5 cycles), thereby improving the system's transient performance and enabling rapid response to dynamic loads.

[0019] Fifth, the core architecture of the original transformer T1 and PWM control chip U1 is retained. Energy efficiency optimization is achieved with low modification cost by adding new modules (such as cross-domain coupling and RC absorption unit). At the same time, the first safety capacitor CY1 and the second safety capacitor CY2 ensure EMI and isolation safety, thereby enhancing compatibility and reliability. Attached Figure Description

[0020] The above and / or additional aspects and advantages of this invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings.

[0021] Figure 1 This is the circuit diagram of this utility model. Detailed Implementation

[0022] The embodiments of this utility model are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this utility model, and should not be construed as limiting this utility model.

[0023] The following is for reference. Figure 1 The present invention describes a control power supply circuit for reducing power consumption, comprising the following components.

[0024] The main power module includes a bridge rectifier BD1 and a transformer T1; and a PWM control chip U1 connected to the primary side of the transformer.

[0025] The secondary output module includes: a +12V branch: rectified by the first diode D1 and connected in sequence to the fifth resistor R5, the fifth electrolytic capacitor EC5, and the second capacitor C2; and a +5V branch: rectified by the second diode D2 and the first diode D1.

[0026] In the cross-voltage domain coupling module, the positive terminal of the second electrolytic capacitor EC2 is connected to the +12V terminal, and the negative terminal is connected to the +5V terminal, so as to realize the transfer of charge from the +5V terminal to the +12V terminal in light load mode. It is connected in parallel to an RC absorption unit consisting of the fifth resistor R5=2kΩ±5% accuracy and the third capacitor C3=100nF.

[0027] The feedback protection module includes: an optocoupler U2, whose input terminal samples the +5V output voltage through a voltage divider network composed of the eighth resistor R8, the ninth resistor R9, and the sixth resistor R6; and a thyristor U4, whose trigger electrode is set with an overcurrent threshold through a voltage divider circuit composed of the tenth resistor R10 and the eleventh resistor R11. The anode of the thyristor U4 is connected to the +12V terminal, and the cathode is grounded.

[0028] Specifically, the frequency control terminal of the PWM control chip U1 is connected to a fourth electrolytic capacitor EC4 with a capacitance of 10μF±20%, which is used to set the switching frequency to 65kHz±5% accuracy; the feedback input terminal of the PWM control chip U1 is connected to the output terminal of the optocoupler U2 through a fifth capacitor C5=1nF.

[0029] Specifically, a ferrite bead FB1 is connected in series between the first inductor L1 and the +5V terminal, with an impedance characteristic of ≥100Ω at a frequency of 100MHz; a fourth capacitor C4 with a capacitance of 47nF is connected in reverse parallel between the cathode of the Zener diode ZD1 and the +5V terminal. The ferrite bead FB1 is an electronic component mainly used to suppress high-frequency noise and spike interference on signal lines and power lines, and has the ability to absorb electrostatic pulses.

[0030] Specifically, the fifth resistor R5 in the RC absorption unit is a metal film resistor with a power tolerance of 1W; the third capacitor C3 is a multilayer ceramic capacitor made of X7R material with a voltage rating of 50V; the resistance ratio of the eighth resistor R8 and the ninth resistor R9 in the voltage divider network is 1:2, and the adjustable terminal of the ninth resistor R9 is connected to the positive terminal of the light-emitting diode of the optocoupler U2, forming an output voltage fine-tuning mechanism; the primary and secondary windings of the transformer T1 are provided with a double safety isolation structure, including: a first safety capacitor CY1 connected across the primary ground PGND and the secondary ground SGND, with a capacitance of 2.2nF ± 10% accuracy; and a second safety capacitor CY2 connected in parallel on the shielding pin of the transformer T1, with a capacitance of 4.7nF ± 10% accuracy.

[0031] The specific connections in the circuit are further explained as follows: bridge rectifier BD1, PWM control chip U1, transformer T1, optocoupler U2, +5V terminal, +12V terminal, and second electrolytic capacitor EC2. Bridge rectifier BD1 is connected to PWM control chip U1, which is connected to the primary winding of transformer T1. The secondary winding of transformer T1 is connected to the +5V terminal and the +12V terminal respectively. The +5V terminal and the +12V terminal are connected through the second electrolytic capacitor EC2. The input terminal of optocoupler U2 is connected to the secondary winding of transformer T1, and the output terminal of optocoupler U2 is connected to PWM control chip U1.The transformer T1 has its 7th pin connected to the +5V terminal via a fourth diode D4, and the +5V terminal connected to the fourth diode D4 via a first inductor L1. The secondary winding of the transformer T1 is connected to the +12V terminal via a first diode D1 and a second diode D2. A fifth resistor R5 is connected to the +12V terminal, and a fifth electrolytic capacitor EC5 and a second capacitor C2 are connected in parallel with R5. A first safety capacitor CY1 and a second safety capacitor CY2 are connected between the primary and secondary windings of the transformer T1. The common terminal between the first safety capacitor CY1 and the 4th pin of the transformer T1 is connected to signal ground SGND. The second safety capacitor CY2 is connected to pin 6 of transformer T1. A third electrolytic capacitor EC3 is connected between the fourth diode D4 and the first inductor L1. EC3 is connected to the second safety capacitor CY2. One end of the first inductor L1 is connected to the ninth resistor R9, and the other end is connected to the eighth resistor R8. The other end of the ninth resistor R9 is connected to pin 1 of optocoupler U2. The eighth resistor R8 is connected to pin 2 of optocoupler U2. A sixth resistor is connected between pins 1 and 2 of optocoupler U2. Resistor R6, the eighth resistor R8, and pin 2 of optocoupler U2 are connected to the fifth capacitor C5 and the tenth resistor R10. The common terminal between the sixth resistor R6 and the fifth capacitor C5 is connected to thyristor U4. The gate (G) terminal of thyristor U4 is connected to the common terminal between the tenth resistor R10 and the eighth resistor R8. The base (K) terminal of thyristor U4 is connected to the eleventh resistor R11. The other end of the eleventh resistor R11 is connected to the common terminal between the tenth resistor R10 and the eighth resistor R8. The second electrolytic capacitor EC2 is connected to the third capacitor C3. A fourth electrolytic capacitor, EC4, is connected in parallel with capacitor C3. A Zener diode, ZD1, is connected in parallel between pins 3 and 4 of the PWM control chip U1. A thermistor, NTC, is connected between pins 3 and 4 of the bridge rectifier group BD1. A second high-voltage film capacitor, CX2, is connected in parallel between pins 4 and 3 of the filter inductor FL1. A first high-voltage film capacitor, CX1, is connected in parallel between pins 1 and 2 of the filter inductor FL1. The seventh resistor R7, the thirteenth resistor R13, and the twelfth resistor R12 are connected in series. One end of the seventh resistor R7 is connected to the common terminal between pin 3 of the filter inductor FL1 and the thermistor NTC. One end of the twelfth resistor R12 is connected to the common terminal between pin 4 of the filter inductor FL1 and pin 3 of the bridge rectifier BD1. The first high-voltage film capacitor CX1 is connected in parallel with a varistor ZNR1. The filter inductor FL has pin 1 connected to the N terminal, and a fuse FS1 is connected to pin 2. The fuse FS1 has the L terminal. The thermistor NT has parameters (e.g., model MF72, resistance 10KΩ±5% at 25℃), and its function is to limit surge current.In addition, the capacitance of the first safety capacitor CY1 and the second safety capacitor CY2 is 1000pF, with an error range of ±20%, and an operating voltage of 400V AC (model JNA09F102ML02N). According to IEC standards, the safety distance needs to be sufficiently large to avoid arcing when high voltage is applied. Furthermore, the thermistor, model MF72, has a resistance of 10KΩ±5% at 25℃ and is used to suppress inrush current during startup.

[0032] The core of this invention lies in achieving low power consumption and high stability of the power supply system through strategies such as dynamic charge transfer, multi-level feedback control, overcurrent collaborative protection, and dynamic load response, combined with optimized circuit structure design. The working principle is explained in detail below: I. Dynamic Charge Transfer Channel and Dummy Load Optimization Mechanism. Cross-Voltage Domain Charge Sharing: A second 220μF / 25V electrolytic capacitor EC2 is connected between the +5V output terminal and the +12V output terminal to construct a dynamic charge transfer channel.

[0033] Light load mode: When the +5V load current is <100mA, EC2, through its low impedance characteristics, transfers excess charge from the +5V terminal to the +12V terminal, handling over 80% of the dummy load current. In this mode, the bleeder resistor is increased from 5KΩ to 10KΩ±5% accuracy, reducing static power consumption by over 50%. Heavy load mode: When the +5V load current is ≥500mA, the RC absorption circuit consisting of the fifth resistor R5 (2kΩ±5% accuracy) and the third capacitor C3 (100nF) is automatically disconnected to prevent energy loss due to EC2 shunting, ensuring efficient output from the main power path.

[0034] Charge distribution and voltage balance: The second electrolytic capacitor EC2 has a capacitance of 220μF and a voltage rating of 25V. Through optimized design, it can achieve dynamic charge balance under different load conditions and suppress voltage fluctuations across voltage domains.

[0035] II. The precise adjustment of dual-loop control, including primary feedback and secondary feedback, is as follows.

[0036] Primary Feedback Control: Voltage Sampling and Error Generation: Through the input terminal of the optocoupler U2, a voltage divider network consisting of the eighth resistor R8 (lower end of the 1:2 resistance ratio), the ninth resistor R9 (adjustable terminal connected to the positive terminal of the U2 LED), and the sixth resistor R6, acquires the +5V output voltage in real time. The voltage signal generated after voltage division is compared with a reference value to form the first error signal. The optocoupler U2 can be a PC817 or an equivalent model, with a current transfer ratio (CTR) of 50%-600%, ensuring the linearity and isolation performance of signal transmission.

[0037] Optical coupler transmission and duty cycle adjustment: The error signal is transmitted to the feedback input terminal of the PWM control chip U1 through the optical coupler U2 (filtered by the fifth capacitor C5=1nF), which drives the PWM control chip U1 to dynamically adjust the duty cycle of the drive signal of the primary winding to ensure that the +5V output accuracy is controlled within ±2%.

[0038] Secondary feedback control: Ripple monitoring and PI compensation: Real-time monitoring of the ripple voltage amplitude at the +12V output terminal. When it exceeds the threshold of 500mV, the proportional-integral (PI) algorithm is triggered to adjust the duty cycle.

[0039] The specific formula is: D(n) = D(n−1) + Kp × ΔV + Ki × ∫ΔVdt, where Kp = 0.05% / mV, Ki = 0.2% / (mV⋅ms), and ΔV is the ripple voltage deviation value. This algorithm quickly suppresses high-frequency ripple and ensures the stability of the +12V output voltage.

[0040] III. The overcurrent collaborative protection and hierarchical recovery mechanism is as follows.

[0041] Overcurrent detection and fast response: When the output current exceeds the rated value by 20%, the voltage divider circuit composed of the tenth resistor R10 and the eleventh resistor R11 triggers the thyristor U4 to conduct (anode connected to +12V terminal, cathode grounded), forcing the duty cycle of the PWM control chip U1 to be reduced to below 5% within 2ms, cutting off the energy transmission path.

[0042] Three-level recovery strategy: Level 1 Cutoff: Within 10ms after triggering, the PWM control chip U1 completely cuts off the primary winding drive signal to prevent continuous overcurrent from damaging the device. Level 2 Soft Start: After 50ms, the PWM control chip U1 restarts with a 10% duty cycle, gradually restoring power supply. Level 3 Lockout: If overcurrent is detected after three consecutive restarts, it enters a permanent lockout state, requiring external reset to release, ensuring system safety.

[0043] IV. Transient optimization of dynamic load response is as follows.

[0044] Load surge response: Charge release: When the load increases stepwise, the second electrolytic capacitor EC2 preferentially releases the stored charge (capacity 220μF) to maintain the stability of the +5V and +12V terminal voltages.

[0045] Duty cycle rapidly increases: Within 5 switching cycles (the switching frequency is set to 65kHz ± 5% accuracy by the fourth electrolytic capacitor EC4 = 10μF ± 20%), the PWM control chip U1 linearly increases the duty cycle from the current value to the maximum value of 95%, quickly replenishing the energy gap.

[0046] Load Reduction Response: Energy Absorption: Excess energy is absorbed through an RC absorption circuit (the fifth resistor R5 is a 1W metal film resistor, and the third capacitor C3 is an X7R material, 50V withstand voltage multilayer ceramic capacitor), with the time constant strictly controlled within 200μs±10% accuracy. Duty Cycle Gradual Decrease: The PWM control chip U1 reduces the duty cycle to 80% of the reference value within 10 switching cycles, avoiding output voltage overshoot and oscillation, reducing the oscillation amplitude by more than 60%.

[0047] V. The collaborative design of the circuit modules is as follows.

[0048] Main power module: Bridge rectifier BD1 converts AC input to DC, which is then isolated and stepped down by transformer T1 (with a first safety capacitor CY1=2.2nF±10% accuracy and a second safety capacitor CY2=4.7nF±10% accuracy between the primary and secondary windings). PWM control chip U1 (frequency set by EC4) drives the primary side of the transformer to adjust energy transfer efficiency.

[0049] Secondary output module: +12V branch: After rectification by the first diode D1, the voltage is limited by the fifth resistor R5, and then output as a stable voltage by the fifth electrolytic capacitor EC5 (energy storage) and the second capacitor C2 (high-frequency filtering). +5V branch: After rectification by the second diode D2 and the first diode D1.

[0050] The bridge is filtered by the first inductor L1 (with series ferrite bead FB1, impedance ≥100Ω at 100MHz) and the voltage is clamped by the Zener diode ZD1 (with the fourth capacitor C4=47nF in parallel).

[0051] VI. The cross-domain coupling and feedback protection module is as follows.

[0052] Cross-voltage domain charge transfer is accomplished collaboratively by EC2 and the RC absorption unit (fifth resistor R5 / third capacitor C3), achieving dynamic energy distribution. Optocoupler U2 and thyristor U4 form a dual protection network, which, combined with a voltage divider resistor network (eighth resistor R8 / ninth resistor R9 / sixth resistor R6, tenth resistor R10 / eleventh resistor R11), ensures precise monitoring of voltage and current. Specifically, the tenth resistor R10 has a resistance of 1kΩ ± 1%, the eleventh resistor R11 has a resistance of 470Ω ± 1%, the voltage division ratio is 1kΩ / (1kΩ+470Ω) = 0.68, and the overcurrent threshold is set to 120% of the rated current.

[0053] VII. Safety regulations and EMI design are as follows.

[0054] Safety isolation: A first safety capacitor CY1 (connected across primary ground PGND and secondary ground SGND) and a second safety capacitor CY2 (connected in parallel to the shielding pin) are installed between the primary and secondary windings of transformer T1 to effectively suppress common-mode noise and meet electrical isolation requirements. EMI suppression: The ferrite bead FB1 (connected in series with the +5V branch) and the third capacitor C3 (low ESR characteristic) made of X7R material work together to reduce high-frequency interference and ensure system electromagnetic compatibility.

[0055] Through the above technical solution, this utility model, while retaining the original power supply architecture (such as transformer T1 and PWM control chip U1), adds dynamic charge transfer, multi-level feedback control, and intelligent protection mechanisms to achieve standby power consumption ≤0.5W (measured value), dynamic response time shortened to 5 switching cycles (approximately 77μs), while maintaining output voltage accuracy of ±2% and system reliability, significantly improving energy efficiency and meeting the low-carbon requirements of green home appliances. Furthermore, a comparison of measured data under light load / heavy load modes is provided: I. Light load mode (80mA): static power consumption 0.25W, ripple voltage ≤500mV, and response time 77μs. II. Heavy load mode (600mA): static power consumption 0.5W, ripple voltage ≤100mV, and response time 100μs.

[0056] The application of the above-mentioned control method for reducing power consumption in a power supply circuit according to this utility model embodiment includes the following steps.

[0057] Step S1: Establish a dynamic charge transfer channel between the +5V output terminal and the +12V output terminal, and achieve cross-voltage domain charge sharing by directly bridging the gap through the 220μF / 25V second electrolytic capacitor EC2.

[0058] Step S2: Configure a dummy load regulation strategy: increase the original 5KΩ bleeder resistor to 10KΩ±5% accuracy, and compensate the load current through the shunt effect of the second electrolytic capacitor EC2.

[0059] Step S3: Construct a dual-loop control system including primary feedback and secondary feedback: Primary feedback: The +5V output voltage is acquired in real time through the optocoupler U2, and the first error signal is generated by the voltage divider network of the eighth resistor R8, the ninth resistor R9 and the sixth resistor R6; Secondary feedback: The ripple voltage amplitude of the +12V output terminal is monitored, and duty cycle compensation is triggered when it exceeds 500mV.

[0060] Step S4: Implement overcurrent collaborative protection: When the output current is detected to exceed the rated value by 20%, the thyristor U4 is triggered to conduct within 2ms, and at the same time the PWM control chip U1 reduces the duty cycle to below 5%.

[0061] Step S5: Perform dynamic load response: When the load changes abruptly, suppress the output voltage oscillation by adjusting the time constant of the RC snubber circuit (fifth resistor R5 and third capacitor C3) to an accuracy of 200μs±10%.

[0062] Specifically, the duty cycle compensation in step S3 is implemented as follows: when the +12V ripple voltage exceeds the threshold, the PWM control chip U1 dynamically adjusts the duty cycle according to the following formula: D(n)=D(n-1)+Kp×ΔV+Ki×∫ΔV dt.

[0063] Where D(n) is the current duty cycle, Kp=0.05% / mV, Ki=0.2% / (mV·ms), and ΔV is the ripple voltage deviation value. The values ​​of Kp and Ki are determined experimentally. Specifically, by applying a ±1A step load, Kp and Ki are adjusted until the ripple stabilization time is ≤10ms, and finally Kp=0.05% / mV and Ki=0.2% / (mV·ms) are determined to be the optimal parameter combination.

[0064] Specifically, after the overcurrent protection is triggered in step S4, a three-level recovery mechanism is executed.

[0065] Level 1: Cut off the primary winding drive signal within 10ms after triggering.

[0066] Level 2: Attempt to restart with a 10% duty cycle after 50ms.

[0067] Level 3: If overcurrent is detected after three consecutive restarts, the system will enter a permanent lockout state.

[0068] Specifically, the implementation of the dynamic load response in step S5 includes the following:

[0069] When the load increases stepwise, the stored charge is released first through the second electrolytic capacitor EC2 to maintain voltage stability, while the PWM control chip U1 linearly increases the duty cycle to the maximum value of 95% within 5 switching cycles.

[0070] When the load step decreases, excess energy is absorbed by the RC snubber circuit (fifth resistor R5 and third capacitor C3), and the duty cycle is reduced to 80% of the reference value within 10 switching cycles.

[0071] The operating modes of the dynamic charge transfer channel include: Light load mode: When the +5V load current is <100mA, the second electrolytic capacitor EC2 transfers charge through its low impedance characteristics, bearing more than 80% of the dummy load current; Heavy load mode: When the +5V load current is ≥500mA, the RC snubber circuit is automatically disconnected via relay K1. More specifically: When the +5V load current is 80mA (light load mode), EC2 transfers 12mC of charge, the dummy load resistor current drops from 1mA to 0.4mA, and the static power consumption drops from 0.6W to 0.25W; When the +5V load current is 600mA (heavy load mode), the RC snubber circuit is automatically disconnected, EC2 stops transferring charge, and the main power path efficiency is increased to 92%.

[0072] Although embodiments of the present invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the claims and their equivalents.

Claims

1. A control power supply circuit for reducing power consumption, characterized in that, include: The main power module includes a bridge rectifier BD1 and a transformer T1, as well as a PWM control chip U1 connected to the primary side of the transformer. The secondary output module includes: a +12V branch: rectified by the first diode D1 and connected in sequence to the fifth resistor R5, the fifth electrolytic capacitor EC5, and the second capacitor C2; and a +5V branch: rectified by the second diode D2 and the first diode D1. In the cross-voltage domain coupling module, the positive terminal of the second electrolytic capacitor EC2 is connected to the +12V terminal and the negative terminal is connected to the +5V terminal to realize the transfer of charge from the +5V terminal to the +12V terminal in light load mode. It is connected in parallel to an RC absorption unit consisting of a fifth resistor R5 with a resistance of 2kΩ±5% accuracy and a third capacitor C3 with a capacitance of 100nF. The feedback protection module includes: an optocoupler U2, whose input terminal samples the +5V output voltage through a voltage divider network composed of the eighth resistor R8, the ninth resistor R9, and the sixth resistor R6; and a thyristor U4, whose trigger electrode is set with an overcurrent threshold through a voltage divider circuit composed of the tenth resistor R10 and the eleventh resistor R11. The anode of the thyristor U4 is connected to the +12V terminal, and the cathode is grounded.

2. The power supply control circuit for reducing power consumption according to claim 1, characterized in that: The frequency control terminal of the PWM control chip U1 is connected to a fourth electrolytic capacitor EC4 with a capacitance of 10μF±20%, which is used to set the switching frequency to 65kHz±5% accuracy.

3. The power supply control circuit for reducing power consumption according to claim 1, characterized in that: The feedback input terminal of the PWM control chip U1 is connected to the output terminal of the optocoupler U2 through the fifth capacitor C5=1nF.

4. The control power supply circuit for reducing power consumption according to claim 1, characterized in that: A ferrite bead FB1 is connected in series between the first inductor L1 and the +5V terminal. Its impedance characteristic is: impedance ≥100Ω at a frequency of 100MHz. A fourth capacitor C4=47nF is connected in reverse parallel between the cathode of the Zener diode ZD1 and the +5V terminal.

5. The control power supply circuit for reducing power consumption according to claim 1, characterized in that: The fifth resistor R5 in the RC absorption unit is a metal film resistor with a power tolerance of 1W; the third capacitor C3 is a multilayer ceramic capacitor made of X7R material with a voltage rating of 50V.

6. The control power supply circuit for reducing power consumption according to claim 1, characterized in that: The resistance ratio of the eighth resistor R8 and the ninth resistor R9 in the voltage divider network is 1:2, and the adjustable terminal of the ninth resistor R9 is connected to the positive terminal of the light-emitting diode of the optocoupler U2, forming an output voltage fine-tuning mechanism.

7. The control power supply circuit for reducing power consumption according to claim 1, characterized in that: The transformer T1 has a dual safety isolation structure between its primary and secondary windings, including: a first safety capacitor CY1 connected between the primary ground PGND and the secondary ground SGND, with a capacitance of 2.2nF ± 10% accuracy; and a second safety capacitor CY2 connected in parallel to the shielding pin of the transformer T1, with a capacitance of 4.7nF ± 10% accuracy.

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