Optical coupling simulator
By designing the circuit structure of the optical coupler simulator, the compatibility problem of low power consumption and high operating speed of the optical coupler was solved, achieving compatibility between low power consumption and high-speed transmission, and improving the reliability and turn-on speed of the output circuit.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- BEIJING GL MICROELECTRONICS TECHNOLOGY CO LTD
- Filing Date
- 2025-05-22
- Publication Date
- 2026-05-12
AI Technical Summary
Existing optical couplers cannot meet the requirements of high operating speed while meeting the requirements of low power consumption, and cannot be compatible with the needs of low power consumption and high-speed transmission.
An optical coupling simulator was designed, including a bias voltage/current generation circuit, a current limiting circuit, an oscillator circuit, a coupling transmission circuit, a rectifier circuit, a drive circuit, a control circuit, and an output circuit. Through the combination of these circuits, low power consumption is achieved while meeting high operating speed.
It achieves high operating speed while maintaining low power consumption, thus improving the turn-on speed and reliability of the output circuit.
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Figure CN224233678U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] Embodiments of the present disclosure relate to the technical field of integrated circuits, and in particular to an optical coupling simulator. BACKGROUND
[0002] In electronic systems and medical devices, in order to eliminate the noise of signals, protect devices and users from high voltage injury, an isolator is usually added in the electronic device. The optical coupler has always been the main choice of the isolator, but it has the disadvantages of easy aging, high power consumption and short service life, which limits its use scenarios. Therefore, an isolator manufactured by integrated circuit technology can be selected. Such an isolator has more advantages in power consumption, performance and reliability, and can be used to replace the optical coupler.
[0003] However, at present, the optical coupling simulation structure for replacing the optical coupler cannot meet the requirement of high working rate when meeting the requirement of low power consumption working, and cannot meet the requirement of low power consumption working when meeting the requirement of high working rate, that is, it cannot meet the requirements of low power consumption and high speed transmission. CONTENT OF THE INVENTION
[0004] The optical coupling simulator provided by the embodiments of the present disclosure can meet the requirement of high working rate while meeting the requirement of low power consumption working.
[0005] In a first aspect, the present disclosure provides an optical coupling simulator, comprising a bias voltage / current generating circuit, a current limiting circuit, an oscillator circuit, a coupling transmission circuit, a rectifier circuit, a driving circuit, a control circuit and an output circuit. The voltage output end of the bias voltage / current generating circuit is connected to the power supply end of the current limiting circuit, the current output end of the bias voltage / current generating circuit is connected to the input end of the current limiting circuit, the output end of the current limiting circuit is connected to the input end of the coupling transmission circuit through the oscillator circuit, the output end of the coupling transmission circuit is connected to the input end of the driving circuit and the control end of the control circuit through the rectifier circuit, the output end of the driving circuit is connected to the input end of the control circuit, and the output end of the control circuit is connected to the control end of the output circuit.
[0006] The bias voltage / current generation circuit is configured to provide a bias voltage and a bias current according to an input voltage. The current limiting circuit is configured to limit a maximum working current according to the bias current. The oscillator circuit is configured to generate an alternating current (AC) oscillation signal. The coupling transmission circuit is configured to couple the AC oscillation signal to obtain an AC oscillation coupling signal. The rectifier circuit is configured to rectify the AC oscillation coupling signal to a direct current (DC) voltage signal. The driving circuit is configured to boost the DC voltage signal, and couple the DC voltage signal and the boosted DC voltage signal to an input terminal of a control circuit. The control circuit is configured to control the driving circuit to provide a driving voltage to an output circuit according to the DC voltage signal, so as to turn on the output circuit.
[0007] In some embodiments of the present disclosure, the bias voltage / current generation circuit comprises an open-loop low dropout (LDO) circuit and a bandgap reference circuit. The open-loop LDO circuit is configured to step down the input voltage to obtain the bias voltage, and the bandgap reference circuit is configured to provide the bias current.
[0008] In some embodiments of the present disclosure, the current limiting circuit comprises a first transistor and a second transistor. A first terminal of the first transistor and a first terminal of the second transistor are connected to a voltage output terminal of the bias voltage / current generation circuit, a control terminal of the first transistor is connected to a second terminal of the first transistor, a control terminal of the second transistor, and a current output terminal of the bias voltage / current generation circuit, and a second terminal of the second transistor is connected to an input terminal of the oscillator circuit.
[0009] In some embodiments of the present disclosure, the driving circuit comprises a first driving circuit and a second driving circuit. A first control terminal of the first driving circuit is connected to a non-inverted output terminal of the coupling transmission circuit, a second control terminal of the first driving circuit is connected to an inverted output terminal of the coupling transmission circuit, an input terminal of the first driving circuit and an input terminal of the second driving circuit are connected to an output terminal of the rectifier circuit, and an output terminal of the first driving circuit and an output terminal of the second driving circuit are connected to an input terminal of the control circuit.
[0010] The first driving circuit is configured to boost and output a first driving voltage according to a non-inverted AC oscillation coupling signal and an inverted AC oscillation coupling signal, and the second driving circuit is configured to output a second driving voltage.
[0011] In some embodiments of the present disclosure, the first driving circuit comprises a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a first capacitor, a second capacitor and an output load capacitor. The first end of the third transistor and the first end of the fourth transistor are connected to the output end of the rectifier circuit, the first end of the fifth transistor and the first end of the sixth transistor are connected to the input end of the control circuit, the first end of the sixth transistor is connected to an output reference ground through the output load capacitor, the lower plate of the first capacitor is connected to the positive phase output end of the coupling transmission circuit, and the lower plate of the second capacitor is connected to the negative phase output end of the coupling transmission circuit.
[0012] The control end of the third transistor is connected to the control end of the fifth transistor, the second end of the fourth transistor, the second end of the sixth transistor and the upper plate of the second capacitor, and the second end of the third transistor is connected to the second end of the fifth transistor, the control end of the fourth transistor, the control end of the sixth transistor and the upper plate of the first capacitor.
[0013] In some embodiments of the present disclosure, the second driving circuit comprises a switching diode, the anode of the switching diode is connected to the output end of the rectifier circuit, and the cathode of the switching diode is connected to the input end of the control circuit.
[0014] In some embodiments of the present disclosure, the control circuit comprises a first control circuit and a second control circuit. The input end of the first control circuit is connected to the output end of the rectifier circuit, the output end of the first control circuit is connected to the control end of the second control circuit, the input end of the second control circuit is connected to the output end of the driving circuit, and the output end of the second control circuit is connected to the control end of the output circuit.
[0015] The first control circuit is configured to perform logical operation on the direct current voltage signal to obtain a driving control signal, and the second control circuit is configured to turn on the output end of the driving circuit and the control end of the output circuit when the driving control signal is an up pull control signal.
[0016] In some embodiments of the present disclosure, the first control circuit comprises an inverter circuit, the input end of the inverter circuit is connected to the output end of the rectifier circuit, and the output end of the inverter circuit is connected to the control end of the second control circuit.
[0017] In some embodiments of the present disclosure, the second control circuit includes a seventh transistor and an eighth transistor. A first end of the seventh transistor is connected to an output end of the driving circuit, a second end of the seventh transistor is connected to a second end of the eighth transistor and a control end of the output circuit, a first end of the eighth transistor is connected to an output reference ground, and a control end of the seventh transistor and a control end of the eighth transistor are connected to an output end of the first control circuit.
[0018] In some embodiments of the present disclosure, the first control circuit includes an under-voltage lockout circuit, a level detection circuit, and a logic circuit. An output end of the under-voltage lockout circuit is connected to a first input end of the logic circuit, an output end of the level detection circuit is connected to a second input end of the logic circuit, a third input end of the logic circuit is connected to an output end of the rectifier circuit, and an output end of the logic circuit is connected to a control end of the second control circuit.
[0019] The logic circuit is configured to generate the driving control signal according to the direct current voltage signal when the power supply voltage is greater than a first voltage threshold and a voltage difference between the positive-phase alternating current oscillation signal and the negative-phase alternating current oscillation signal is greater than a second voltage threshold.
[0020] In a second aspect, the present disclosure provides an optical coupling simulator chip, including any optical coupling simulator provided in the first aspect.
[0021] In the technical solution of the embodiments of the present disclosure, the optical coupling simulator includes a bias voltage / current generation circuit, a current limiting circuit, an oscillator circuit, a coupling transmission circuit, a rectifier circuit, a driving circuit, a control circuit, and an output circuit. The bias voltage / current generation circuit provides a bias voltage and a bias current according to an input voltage. The current limiting circuit limits the maximum working current according to the bias current, thereby realizing low power consumption. The oscillator circuit generates an alternating current oscillation signal. The coupling transmission circuit couples the alternating current oscillation signal to obtain an alternating current oscillation coupling signal. The rectifier circuit rectifies the alternating current oscillation coupling signal into a direct current voltage signal. The driving circuit performs voltage boosting processing on the direct current voltage signal. The direct current voltage signal and the boosted direct current voltage signal are coupled to the input end of the control circuit. The control circuit controls the driving circuit to provide a driving voltage to the output circuit according to the direct current voltage signal to turn on the output circuit. A higher driving voltage can be obtained, which can ensure the normal turning on of the output circuit and improve the turning on speed of the output circuit, thereby meeting the requirements of low power consumption and high working speed at the same time. BRIEF DESCRIPTION OF DRAWINGS
[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without any creative effort based on these drawings.
[0023] Figure 1 A structural schematic diagram of an optical coupling simulator provided for the disclosed embodiments.
[0024] Figure 2 A circuit schematic diagram of an optical coupling simulator provided for the disclosed embodiments.
[0025] Figure 3 A voltage waveform schematic diagram of each node in the optical coupling simulator provided for the disclosed embodiments.
[0026] Figure 4 A circuit schematic diagram of a first driving circuit provided for the disclosed embodiments.
[0027] Figure 5 A working timing diagram of the first driving circuit shown in Figure 4 DETAILED DESCRIPTION
[0028] In order to make the purpose, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be described clearly and completely below with reference to the drawings. Obviously, the described embodiments are some of the embodiments of the present application, rather than all the embodiments. Based on the described embodiments of the present application, all other embodiments obtained by those skilled in the art without any creative effort also belong to the scope of protection of the present application.
[0029] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this present subject matter belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the specification and relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. As used herein, the statement that two or more parts are "connected" together shall mean that the parts are joined directly or through one or more intermediate parts.
[0030] Reference to“an embodiment” or“the embodiment” in this disclosure means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase“an embodiment” or“in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily mutually exclusive of one another. It is expressly understood that any of the embodiments described in this disclosure can be incorporated in a combination of embodiments.
[0031] In addition, the terms“first”,“second”, and the like in the description and claims of this disclosure or the above drawings are used to distinguish different objects, and are not used to describe a particular order, and can explicitly or implicitly include one or more of the features.
[0032] The term“and / or” in this disclosure is only a description of the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the existence of A, the existence of A and B, and the existence of B. In addition, the character“ / ” herein generally represents an“or” relationship between the front and rear associated objects.
[0033] In the description of the present disclosure, unless otherwise specified, the meanings of“a plurality of” and“at least two” are two or more (including two), and similarly,“a plurality of groups” and“at least two groups” mean two or more groups (including two groups).
[0034] In order for those skilled in the art to better understand the scheme of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings.
[0035] Figure 1 A structural schematic diagram of an optical coupling simulator provided for the disclosed embodiments is shown in FIG. 1. Figure 1 As shown in FIG. 1, the optical coupling simulator 100 includes a bias voltage / current generating circuit 110, a current limiting circuit 120, an oscillator circuit 130, a coupling transmission circuit 140, a rectifier circuit 150, a driving circuit 160, a control circuit 170, and an output circuit 180.
[0036] The voltage output end of the bias voltage / current generating circuit 110 is connected to the power supply end of the current limiting circuit 120, the current output end of the bias voltage / current generating circuit 110 is connected to the input end of the current limiting circuit 120, the output end of the current limiting circuit 120 is connected to the input end of the coupling transmission circuit 140 through the oscillator circuit 130, the output end of the coupling transmission circuit 140 is connected to the input end of the driving circuit 160 and the control end of the control circuit 170 through the rectifier circuit 150, the output end of the driving circuit 160 is connected to the input end of the control circuit 170, and the output end of the control circuit 170 is connected to the control end of the output circuit 180.
[0037] The bias voltage / current generation circuit 110 is configured to provide a bias voltage VDD and a bias current IIN based on the input voltage VIN. The current limiting circuit 120 is configured to limit the maximum operating current based on the bias current IIN. The oscillator circuit 130 is configured to generate AC oscillation signals VINP and VINN. The coupling transmission circuit 140 is configured to couple the AC oscillation signals VINP and VINN to obtain AC oscillation coupled signals VOP and VON.
[0038] The rectifier circuit 150 is configured to rectify the AC oscillation coupling signals VOP and VON into a DC voltage signal VREC. The drive circuit 160 is configured to boost the DC voltage signal VREC and couple both the DC voltage signal VREC and the boosted DC voltage signal to the input terminal of the control circuit 170. The control circuit 170 is configured to control the drive circuit 160 to provide a drive voltage OUT to the output circuit 180 according to the DC voltage signal VREC, thereby turning on the output circuit 180.
[0039] For example, Figure 2 This is a circuit diagram of an optical coupling simulator provided in an embodiment of the present disclosure, such as... Figure 2 As shown, the bias voltage / current generation circuit 110 consists of an open-loop LDO circuit and a bandgap reference circuit. The open-loop LDO circuit can step down the input voltage VIN to obtain the bias voltage VDD, and the bandgap reference circuit provides the bias current IIN. For example, the input voltage VIN is typically 2.5V to 5V, the bias voltage VDD obtained by the open-loop LDO circuit is 1.8V, and the bias current IIN provided by the bandgap reference circuit is on the order of μA.
[0040] See also Figure 2 The current limiting circuit 120 includes a first transistor M1 and a second transistor M2. The first terminal of the first transistor M1 and the first terminal of the second transistor M2 are connected to the voltage output terminal of the bias voltage / current generating circuit 110. The control terminal of the first transistor M1 is connected to the second terminal of the first transistor M1, the control terminal of the second transistor M2 and the current output terminal of the bias voltage / current generating circuit 110. The second terminal of the second transistor M2 is connected to the input terminal of the oscillator circuit 130.
[0041] The first transistor M1 and the second transistor M2 form a current mirror, and the aspect ratio of the first transistor M1 to the second transistor M2 is 1:n. The current flowing through the first transistor M1 is the bias current IIN. The second transistor M2 can mirror the bias current IIN to the maximum operating current n*IIN, so as to limit the operating current of the optical coupling simulator 100 and thus reduce power consumption.
[0042] See also Figure 2The oscillator circuit 130 is a complementary cross-coupled oscillator, and includes a first PMOS transistor PM1, a second PMOS transistor PM2, a first NMOS transistor NM1, a second NMOS transistor NM2, and a capacitor C. The first end of the first PMOS transistor PM1 and the first end of the second PMOS transistor PM2 are connected to the output end of the current limiting circuit 120. The control end of the first PMOS transistor PM1 is connected to the second end of the second PMOS transistor PM2, the inverting input end of the coupling transmission circuit 140, the first plate of the capacitor C, the second end of the second NMOS transistor NM2, and the control end of the first NMOS transistor NM1. The control end of the second PMOS transistor PM2 is connected to the second end of the first PMOS transistor PM1, the non-inverting input end of the coupling transmission circuit 140, the second plate of the capacitor C, the second end of the first NMOS transistor NM1, and the control end of the second NMOS transistor NM2. The first end of the first NMOS transistor NM1 and the first end of the second NMOS transistor NM2 are connected to the input reference ground GND1.
[0043] Figure 3 A voltage waveform diagram of each node in the optical coupling simulator provided by the embodiment of the present disclosure is shown in FIG. 4. As shown in FIG. 4, when the input voltage VIN is a high-level signal, the oscillator circuit 130 converts the input voltage VIN into a high-frequency non-inverting alternating oscillation signal VINP and an inverting alternating oscillation signal VINN. The inverting alternating oscillation signal VINN has the same period and amplitude as the non-inverting alternating oscillation signal VINP, and the phase difference is 180°. When the input voltage VIN is a low-level signal, the non-inverting alternating oscillation signal VINP and the inverting alternating oscillation signal VINN are pulled to the input reference ground GND1. Figure 3
[0044] Continuing to refer to FIG. 4, Figure 2 The coupling transmission circuit 140 is a transformer, for example, the coupling transmission circuit 140 is a step-up transformer. The coupling transmission circuit 140 includes a primary coil T1 and a secondary coil T2. The primary coil T1 is connected between the non-inverting output end and the inverting output end of the oscillator circuit 130. The secondary coil T2 is connected between the non-inverting input end and the inverting input end of the rectifier circuit 150.
[0045] The coupling transmission circuit 140 can couple the non-inverting alternating oscillation signal VINP to obtain a non-inverting alternating oscillation coupling signal VOP as shown in FIG. 5, and output the non-inverting alternating oscillation coupling signal VOP to the non-inverting input end of the rectifier circuit 150. The coupling transmission circuit 140 can also couple the inverting alternating oscillation signal VINN to obtain an inverting alternating oscillation coupling signal VON, and output the inverting alternating oscillation coupling signal VON to the inverting input end of the rectifier circuit 150. Figure 3
[0046] When the input voltage VIN is a high-level signal, the positive-phase alternating oscillation coupling signal VOP and the negative-phase alternating oscillation coupling signal VON have the same period and amplitude and a phase difference of 180°. When the input voltage VIN is a low-level signal, both the positive-phase alternating oscillation coupling signal VOP and the negative-phase alternating oscillation coupling signal VON are pulled to the output reference ground GND2.
[0047] With continued reference to Figure 2 The rectifier circuit 150 can be a Schottky full-bridge rectifier circuit, including a first rectifier diode D1, a second rectifier diode D2, a third rectifier diode D3, and a fourth rectifier diode D4. The anode of the first rectifier diode D1 is connected to the cathode of the third rectifier diode D3 and the positive-phase input end of the rectifier circuit 150, the cathode of the first rectifier diode D1 is connected to the cathode of the second rectifier diode D2, the input end of the drive circuit 160, and the control end of the control circuit 170, the anode of the second rectifier diode D2 is connected to the cathode of the fourth rectifier diode D4 and the negative-phase input end of the rectifier circuit 150, and the anode of the third rectifier diode D3 and the anode of the fourth rectifier diode D4 are connected to the output reference ground GND2.
[0048] The rectifier circuit 150 can rectify the received alternating oscillation coupling signals VOP and VON into a pulsed direct current signal, i.e., a direct current voltage signal VREC, as shown in Figure 3 , and transmit the direct current voltage signal VREC to the drive circuit 160 and the control circuit 170.
[0049] Since the current limiting circuit 120 limits the oscillation circuit 130, the oscillation circuit 130 can be made of low-voltage tubes and is in a low-power consumption mode, so the amplitudes of the alternating oscillation signals VINP and VINN are low, and the amplitudes of the alternating oscillation coupling signals VOP and VON are low, and thus the voltage value of the direct current voltage signal VREC is low, resulting in that the output circuit 180 cannot be turned on.
[0050] To avoid the above situation, the driving circuit 160 provided by the embodiment of the present disclosure includes a first driving circuit 161 and a second driving circuit 162. The first control end of the first driving circuit 161 is connected to the non-inverted output end of the coupling transmission circuit 140, the second control end of the first driving circuit 161 is connected to the inverted output end of the coupling transmission circuit 140, the input end of the first driving circuit 161 and the input end of the second driving circuit 162 are connected to the output end of the rectifier circuit 150, the output end of the first driving circuit 161 and the output end of the second driving circuit 162 are connected to the input end of the control circuit 170, the first driving circuit 161 boosts the direct current voltage signal VREC according to the non-inverted alternating current oscillation coupling signal VOP and the inverted alternating current oscillation coupling signal VON and outputs the first driving voltage OUT1, and the second driving circuit 162 outputs the second driving voltage OUT2, so that the first driving voltage OUT1 and the second driving voltage OUT2 are superimposed and provided to the output circuit 180, the voltage value of the driving voltage of the output circuit 180 can be improved, the output circuit 180 can be normally turned on, the reliability of the device can be ensured, and the turning-on speed of the output circuit 180 can be improved, so that the low-power working requirement and the high working speed requirement can be met at the same time.
[0051] Exemplarily, Figure 4 The circuit schematic diagram of the first driving circuit provided by the embodiment of the present disclosure is shown in FIG. 1. As shown in FIG. 1, the first driving circuit 161 is a charge pump circuit, which includes a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a first capacitor C1, a second capacitor C2 and an output load capacitor Cload. The first end of the third transistor M3 and the first end of the fourth transistor M4 are connected to the output end of the rectifier circuit 150 to receive the direct current voltage signal VREC, the first end of the fifth transistor M5 and the first end of the sixth transistor M6 are connected to the input end of the control circuit 170 to output the first driving voltage OUT1, and the first end of the sixth transistor M6 is connected to the output reference ground GND2 through the output load capacitor Cload. Figure 4 The lower plate of the first capacitor C1 is connected to the non-inverted output end of the coupling transmission circuit 140 to receive the non-inverted alternating current oscillation coupling signal VOP, and the lower plate of the second capacitor C2 is connected to the inverted output end of the coupling transmission circuit 140 to receive the inverted alternating current oscillation coupling signal VON. The control end of the third transistor M3 is connected to the control end of the fifth transistor M5, the second end of the fourth transistor M4, the second end of the sixth transistor M6 and the upper plate of the second capacitor C2, and the second end of the third transistor M3 is connected to the second end of the fifth transistor M5, the control end of the fourth transistor M4, the control end of the sixth transistor M6 and the upper plate of the first capacitor C1.
[0052]
[0053] It should be noted that the first driving circuit 161 may also include a shaping circuit. The shaping circuit first shapes the positive-phase AC oscillation coupling signal VOP and the negative-phase AC oscillation coupling signal VON, and then provides the shaped positive-phase AC oscillation coupling signal VOP to the lower plate of the first capacitor C1, and provides the shaped negative-phase AC oscillation coupling signal VON to the lower plate of the second capacitor C2. For example, the shaping circuit may be a buffer or other device.
[0054] Figure 5 for Figure 4 The timing diagram of the first driving circuit shown is as follows: Figure 5 As shown, in the initial state, the shaped positive AC oscillation coupling signal VOP' and the shaped negative AC oscillation coupling signal VON' are in a floating state. Due to the presence of the parasitic PN junction of the transistor in the first driving circuit 161, the voltage of the upper plate of the first capacitor C1 and the voltage of the upper plate of the second capacitor C2 are equal to the voltage value of the DC voltage signal VREC. Here, it is assumed that the forward voltage drop of the PN junction is 0.
[0055] When the shaped positive-phase AC oscillation coupling signal VOP' is high and the shaped negative-phase AC oscillation coupling signal VON' is low, the voltage of the lower plate of the first capacitor C1 is equal to the voltage value of the DC voltage signal VREC, that is, the voltage VM at node M rises to the value of the DC voltage signal VREC. Simultaneously, the voltage of the lower plate of the second capacitor C2 is set to 0 (GND2), therefore the voltage of the upper plate of the second capacitor C2 drops to 0, the fifth transistor M5 turns on, and the voltage VM at node M charges the output load capacitor Cload.
[0056] At this time, the fourth transistor M4 turns on, and the DC voltage signal VREC charges the second capacitor C2. The voltage of the upper-level board of the second capacitor C2, i.e., the N-node voltage VN, increases, and the fifth transistor M5 is gradually turned off. During the above process, the output load capacitor Cload gains a certain amount of charge. This charging charge is related to the turn-on time of the fifth transistor M5, and the first drive voltage OUT1 increases.
[0057] When the shaped positive-phase AC oscillation coupling signal VOP' is low and the shaped negative-phase AC oscillation coupling signal VON' is high, the N-node voltage VN in the previous state is charged to turn off the fifth transistor M5. After the state transition, the voltage of the lower plate of the second capacitor C2 equals the voltage value of the DC voltage signal VREC, so the voltage of the upper plate of the second capacitor C2 increases by a step, turning on the third transistor M3. At the same time, the voltage of the lower plate of the first capacitor C1 is the output reference ground GND2, so the voltage of the upper plate of the first capacitor C1 decreases by a step, the sixth transistor M6 turns on, and the N-node voltage VN charges the output load capacitor Cload.
[0058] At this time, the third transistor M3 is turned on, the direct current voltage signal VREC charges the first capacitor C1, and the M-node voltage VM gradually rises to gradually turn off the sixth transistor M6. During the above process, the output load capacitor Cload also obtains a certain charge, and the charging charge is related to the opening time of the sixth transistor M6. The first drive voltage OUT1 continues to rise.
[0059] The above state is repeated, so that the third transistor M3 and the fourth transistor M4 are alternately turned on, and the fifth transistor M5 and the sixth transistor M6 are alternately turned on, so that the first drive voltage OUT1 can be equal to 2*VREC in an ideal state.
[0060] Continuing to refer to Figure 2 , the second drive circuit 162 includes a switching diode D5, the anode of the switching diode D5 is connected to the output end of the rectifier circuit 150, and the cathode of the switching diode D5 is connected to the input end of the control circuit 170. Among them, the conduction voltage drop of the switching diode D5 is Von, and the output second drive voltage OUT2 is equal to VREC-Von.
[0061] In this way, the drive circuit 160 can superimpose the first drive voltage OUT1 and the second drive voltage OUT2 to obtain the drive voltage OUT, and provide the drive voltage OUT to the control circuit 170.
[0062] For example, as shown in Figure 3 , the voltage peak value of the input voltage VIN is V1, the voltage peak value of the positive-phase alternating oscillation signal VINP is V2, the voltage peak value of the positive-phase alternating oscillation coupling signal VOP is V3, the voltage peak value of the direct current voltage signal VREC is V4, the voltage peak value of the second drive voltage OUT2 is V5, the voltage peak value of the first drive voltage OUT1 is V6, and the voltage peak value of the drive voltage OUT is V7. Among them, V2<V1, V4<V3, V5<V4, V5<V7≤V6+V5, V3>V2 or V3≤V2.
[0063] Continuing to refer to Figure 2 , the control circuit 170 includes a first control circuit 171 and a second control circuit 172, wherein the input end of the first control circuit 171 is connected to the output end of the rectifier circuit 150, the output end of the first control circuit 171 is connected to the control end of the second control circuit 172, the input end of the second control circuit 172 is connected to the output end of the drive circuit 160, and the output end of the second control circuit 172 is connected to the control end of the output circuit 180.
[0064] For example, the first control circuit 171 includes an inverter circuit, an input end of the inverter circuit is connected to an output end of the rectifier circuit 150, and an output end of the inverter circuit is connected to a control end of the second control circuit 172. For example, when the input voltage VIN is a high-level signal, the direct-current voltage signal VREC is inverted by the inverter circuit, and a driving control signal obtained after inversion is a low-level signal, and the driving control signal is provided to the control end of the second control circuit 172.
[0065] In other embodiments, the first control circuit 171 can include other types of logic operation circuits to perform other types of logic operations on the direct-current voltage signal VREC. In this way, the first control circuit 171 can perform logic operations on the direct-current voltage signal VREC to obtain the driving control signal.
[0066] As shown in Figure 2 The second control circuit 172 includes a seventh transistor M7 and an eighth transistor M8, wherein a first end of the seventh transistor M7 is connected to an output end of the driving circuit 160, a second end of the seventh transistor M7 is connected to a second end of the eighth transistor M8 and a control end of the output circuit 180, a first end of the eighth transistor M8 is connected to an output reference ground GND2, and a control end of the seventh transistor M7 and a control end of the eighth transistor M8 are connected to an output end of the first control circuit 171.
[0067] The driving control signal is a pull-up control signal or a pull-down control signal. When the input voltage VIN is a high-level signal, the first control circuit 171 outputs the pull-up control signal, for example, the pull-up control signal is a low-level signal, the seventh transistor M7 is in an open state, and the eighth transistor M8 is in a closed state. Then, the second control circuit 172 can connect the output end of the driving circuit 160 and the control end of the output circuit 180 to provide the driving voltage OUT to the control end of the output circuit 180.
[0068] When the input voltage VIN is a low-level signal, the first control circuit 171 outputs the pull-down control signal, for example, the pull-down control signal is a high-level signal, the seventh transistor M7 is in a closed state, and the eighth transistor M8 is in an open state. Then, the second control circuit 172 can connect the output end of the driving circuit 160 and the output reference ground GND2 to pull down the control end of the output circuit 180 to the output reference ground GND2.
[0069] Continuing to refer to Figure 2The output circuit 180 is an open drain (OD) gate, including a ninth transistor M9, a gate of the ninth transistor M9 being connected to an output end of the driving circuit 170, a source of the ninth transistor M9 being connected to an output reference ground GND2, and a drain of the ninth transistor M9 being connected to an output end of the optocoupler simulator 100. When the input voltage VIN is a high-level signal, a gate voltage of the ninth transistor M9 is the driving voltage OUT, and when the input voltage VIN is a low-level signal, the gate voltage of the ninth transistor M9 is the output reference ground potential.
[0070] In some embodiments, the first control circuit 171 includes an under-voltage lockout circuit, a level detection circuit, and a logic circuit. An output end of the under-voltage lockout circuit is connected to a first input end of the logic circuit, an output end of the level detection circuit is connected to a second input end of the logic circuit, a third input end of the logic circuit is connected to an output end of the rectifier circuit 150, and an output end of the logic circuit is connected to a control end of the second control circuit 172.
[0071] When the power supply voltage is greater than the first voltage threshold Vth1 and a voltage difference VINP-VINN between the positive-phase alternating oscillation signal VINP and the negative-phase alternating oscillation signal VINN is greater than the second voltage threshold Vth2, the logic circuit generates the driving control signal according to the direct-current voltage signal VREC.
[0072] The present disclosure also provides an optocoupler simulator chip, including the optocoupler simulator 100 provided in any of the above embodiments.
[0073] For example, the optocoupler simulator chip is a hybrid chip, including a first chip and a second chip, wherein the first chip is integrated with the bias voltage / current generation circuit 110, the current limiting circuit 120, the oscillator circuit 130, and the coupling transmission circuit 140, and the second chip is integrated with the rectifier circuit 150, the driving circuit 160, the control circuit 170, and the output circuit 180.
[0074] The optocoupler simulator chip provided by the present disclosure includes the optocoupler simulator 100, and has the functional modules and beneficial effects of the optocoupler simulator 100, which will not be repeated here.
[0075] Unless the context clearly indicates otherwise, as used herein and in the appended claims, the singular form "a," "an," and "the" include plural references unless the context clearly dictates otherwise. Accordingly, the use of the articles "a," "an," and "the" as well as grammatical variations thereof are to be construed as including one or more structures, unless the context clearly indicates otherwise. Similarly, the words "comprise," "comprises," and "comprising" are to be construed as inclusive or open-ended, unless the context clearly indicates otherwise. Likewise, the terms "include," "including," and "comprise," "comprising," along with grammatical variations thereof, are to be construed as inclusive or open-ended, unless the context clearly indicates otherwise. As used herein, the term "exemplary" is merely meant to be an example and is not to be construed as an exclusive or exhaustive example, unless the context clearly indicates otherwise.
[0076] Further aspects and scope of adaptation will become apparent from the description provided herein. It should be understood that various aspects of the application can be practiced alone or in combination with one or more other aspects. It should also be understood that the description and specific examples herein are intended to be illustrative only and are not intended to limit the scope of the present application.
[0077] The above detailed description of several embodiments of the disclosure has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the disclosure to the precise form disclosed. Many modifications and variations are possible in light of the disclosure. It is intended that the scope of the disclosure be limited not with this detailed description.
Claims
1. An optical coupling simulator, characterized in that, include: Bias voltage / current generation circuit, current limiting circuit, oscillator circuit, coupling transmission circuit, rectifier circuit, drive circuit, control circuit and output circuit; The voltage output terminal of the bias voltage / current generation circuit is connected to the power supply terminal of the current limiting circuit, the current output terminal of the bias voltage / current generation circuit is connected to the input terminal of the current limiting circuit, the output terminal of the current limiting circuit is connected to the input terminal of the coupling transmission circuit through the oscillator circuit, the output terminal of the coupling transmission circuit is connected to the input terminal of the drive circuit and the control terminal of the control circuit through the rectifier circuit, the output terminal of the drive circuit is connected to the input terminal of the control circuit, and the output terminal of the control circuit is connected to the control terminal of the output circuit. The bias voltage / current generation circuit is configured to provide a bias voltage and a bias current based on the input voltage; the current limiting circuit is configured to limit the maximum operating current based on the bias current; the oscillator circuit is configured to generate an AC oscillation signal; and the coupling transmission circuit is configured to couple the AC oscillation signal to obtain an AC oscillation coupling signal. The rectifier circuit is configured to rectify the AC oscillation coupling signal into a DC voltage signal; the drive circuit is configured to boost the DC voltage signal and couple the DC voltage signal and the boosted DC voltage signal to the input terminal of the control circuit; the control circuit is configured to control the drive circuit to provide a drive voltage to the output circuit according to the DC voltage signal, so as to turn on the output circuit.
2. The optical coupling simulator according to claim 1, characterized in that, The bias voltage / current generation circuit consists of an open-loop LDO circuit and a bandgap reference circuit. The open-loop LDO circuit is configured to step down the input voltage to obtain the bias voltage, and the bandgap reference circuit is configured to provide the bias current.
3. The optical coupling simulator according to claim 1, characterized in that, The current limiting circuit includes a first transistor and a second transistor; The first terminal of the first transistor and the first terminal of the second transistor are connected to the voltage output terminal of the bias voltage / current generation circuit. The control terminal of the first transistor is connected to the second terminal of the first transistor, the control terminal of the second transistor, and the current output terminal of the bias voltage / current generation circuit. The second terminal of the second transistor is connected to the input terminal of the oscillator circuit.
4. The optical coupling simulator according to claim 1, characterized in that, The driving circuit includes a first driving circuit and a second driving circuit. The first control terminal of the first driving circuit is connected to the non-inverting output terminal of the coupling transmission circuit, the second control terminal of the first driving circuit is connected to the inverting output terminal of the coupling transmission circuit, the input terminals of the first driving circuit and the second driving circuit are connected to the output terminal of the rectifier circuit, and the output terminals of the first driving circuit and the second driving circuit are connected to the input terminal of the control circuit. The first driving circuit is configured to boost the DC voltage signal and output a first driving voltage based on the positive-phase AC oscillation coupling signal and the negative-phase AC oscillation coupling signal; the second driving circuit is configured to output a second driving voltage.
5. The optical coupling simulator according to claim 4, characterized in that, The first driving circuit includes: a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a first capacitor, a second capacitor, and an output load capacitor; The first terminal of the third transistor and the first terminal of the fourth transistor are connected to the output terminal of the rectifier circuit. The first terminal of the fifth transistor and the first terminal of the sixth transistor are connected to the input terminal of the control circuit. The first terminal of the sixth transistor is connected to the output reference ground through the output load capacitor. The lower plate of the first capacitor is connected to the non-inverting output terminal of the coupling transmission circuit. The lower plate of the second capacitor is connected to the inverting output terminal of the coupling transmission circuit. The control terminal of the third transistor is connected to the control terminal of the fifth transistor, the second terminal of the fourth transistor, the second terminal of the sixth transistor, and the upper plate of the second capacitor. The second terminal of the third transistor is connected to the second terminal of the fifth transistor, the control terminal of the fourth transistor, the control terminal of the sixth transistor, and the upper plate of the first capacitor.
6. The optical coupling simulator according to claim 4, characterized in that, The second driving circuit includes a switching diode, the anode of which is connected to the output terminal of the rectifier circuit, and the cathode of which is connected to the input terminal of the control circuit.
7. The optical coupling simulator according to claim 1, characterized in that, The control circuit includes a first control circuit and a second control circuit. The input terminal of the first control circuit is connected to the output terminal of the rectifier circuit, the output terminal of the first control circuit is connected to the control terminal of the second control circuit, the input terminal of the second control circuit is connected to the output terminal of the drive circuit, and the output terminal of the second control circuit is connected to the control terminal of the output circuit. The first control circuit is configured to perform logical operations on the DC voltage signal to obtain a drive control signal; the second control circuit is configured to turn on the output terminal of the drive circuit and the control terminal of the output circuit when the drive control signal is a pull-up control signal.
8. The optical coupling simulator according to claim 7, characterized in that, The first control circuit includes an inverter circuit, the input terminal of which is connected to the output terminal of the rectifier circuit, and the output terminal of which is connected to the control terminal of the second control circuit.
9. The optical coupling simulator according to claim 7, characterized in that, The second control circuit includes a seventh transistor and an eighth transistor; The first terminal of the seventh transistor is connected to the output terminal of the driving circuit, the second terminal of the seventh transistor is connected to the second terminal of the eighth transistor and the control terminal of the output circuit, the first terminal of the eighth transistor is connected to the output reference ground, and the control terminals of the seventh transistor and the eighth transistor are connected to the output terminal of the first control circuit.
10. The optical coupling simulator according to claim 7, characterized in that, The first control circuit includes an undervoltage lockout circuit, a level detection circuit, and a logic circuit; The output of the undervoltage lockout circuit is connected to the first input of the logic circuit, the output of the level detection circuit is connected to the second input of the logic circuit, the third input of the logic circuit is connected to the output of the rectifier circuit, and the output of the logic circuit is connected to the control terminal of the second control circuit. The logic circuit is configured to generate the drive control signal based on the DC voltage signal when the power supply voltage is greater than a first voltage threshold and the voltage difference between the positive AC oscillation signal and the negative AC oscillation signal is greater than a second voltage threshold.