X-waveband driving amplifier
By designing a three-stage amplification path and feedback loop, combined with filtering and matching networks, the problems of bias instability and signal distortion in traditional driver amplifiers in high-frequency communication systems are solved, achieving stable gain, wide bandwidth, and efficient signal transmission.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SICHUAN YIFENG ELECTRONICS SCI & TECH CO LTD
- Filing Date
- 2025-05-23
- Publication Date
- 2026-05-15
AI Technical Summary
Traditional driver amplifiers suffer from problems such as unstable bias voltage, signal distortion due to power supply noise interference, insufficient gain flatness in the high-frequency band, and low interstage matching efficiency in high-frequency communication, radar, and microwave systems, making it difficult to achieve stable and efficient signal amplification.
A three-stage amplification path design is adopted, with an active bias circuit and a feedback loop introduced in each amplification path. Combined with filter capacitors and choke inductors, a stable bias and negative feedback are formed. Impedance matching is achieved through π-type attenuators and matching capacitors and inductors, and the transistor is grounded to form a low-impedance loop.
It achieves stable gain and low distortion amplification, expands the operating frequency band, improves signal transmission efficiency and gain stability, and meets the high-efficiency amplification requirements of X-band high-frequency signals.
Smart Images
Figure CN224249671U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of drive amplifiers, and in particular to an X-band drive amplifier. Background Technology
[0002] In high-frequency communication, radar, and microwave systems, driver amplifiers, as key components for signal amplification, place extremely high demands on gain, output power, linearity, bandwidth, and stability. Existing technologies, particularly traditional driver amplifiers, commonly suffer from problems in this frequency band, such as unstable bias voltage during multi-stage amplification, signal distortion due to power supply noise, insufficient gain flatness at high frequencies, and low inter-stage matching efficiency. Specifically, the gate bias circuit is susceptible to temperature drift and power supply fluctuations, leading to transistor operating point shifts and reduced linear amplification capability; the drain power supply path lacks effective voltage division and filtering design, making it difficult to meet the voltage requirements of different gain stages in multi-stage amplification, and high-frequency signals are prone to crosstalk through the power supply path; simultaneously, the lack of a targeted feedback mechanism results in large gain fluctuations and high return loss across a wide bandwidth, hindering stable and efficient signal amplification.
[0003] To address the aforementioned issues, there is an urgent need for a driver amplifier structure that can achieve stable bias, wide bandwidth matching, high gain, and high P1dB amplification. Utility Model Content
[0004] The purpose of this invention is to provide an X-band drive amplifier that solves the problems mentioned in the background art.
[0005] This utility model is achieved through the following technical solution:
[0006] An X-band driver amplifier includes a DC power supply terminal, a filter capacitor, an RF input port, and an RF output port. The DC power supply terminal and the filter capacitor are connected, and the filter capacitor connects three amplification paths. The RF input port and the RF output port are connected by an RF transmission circuit, from the RF input port through the three amplification paths to the RF output port. The three amplification paths are divided into a first amplification path, a second amplification path, and a third amplification path according to the order in which the RF signal passes. The first amplification path and the second amplification path contain a first feedback loop and a second feedback loop, respectively.
[0007] Furthermore,
[0008] The first amplification path includes a first active bias circuit, a first gate power supply filter capacitor, a first gate power supply choke inductor, a first transistor, a first drain power supply filter capacitor, a first drain power supply choke inductor, and a first feedback loop. One end of the first active bias circuit is connected to the filter capacitor, and the other end is connected to the input terminal of the first gate power supply choke inductor. A first gate power supply filter capacitor is connected in parallel between the first active bias circuit and the first gate power supply choke inductor. The output terminal of the first gate power supply choke inductor is connected to the gate of the first transistor and a first feedback DC blocking capacitor in the first feedback loop. The first feedback DC blocking capacitor is connected in series with a first feedback resistor, and the first feedback resistor is connected in series with the first feedback inductor to form a first feedback loop. The first feedback inductor is connected to one end of the first drain power supply choke inductor, and the other end of the first drain power supply choke inductor is connected to the filter capacitor. A first drain power supply filter capacitor is connected in parallel between the first drain power supply choke inductor and the filter capacitor.
[0009] Furthermore,
[0010] The second amplification path includes a second active bias circuit, a second gate power supply filter capacitor, a second gate power supply choke inductor, a second transistor, a second drain power supply filter capacitor, a second drain power supply choke inductor, and a second feedback loop. One end of the second active bias circuit is connected to the filter capacitor, and the other end is connected to the input terminal of the second gate power supply choke inductor. A second gate power supply filter capacitor is connected in parallel between the second active bias circuit and the second gate power supply choke inductor. The output terminal of the second gate power supply choke inductor is connected to the gate of the second transistor and the second feedback DC blocking capacitor in the second feedback loop, respectively. The second feedback DC blocking capacitor is connected in series with the second feedback resistor, and the second feedback resistor is connected in series with the second feedback inductor to form the second feedback loop. The second feedback inductor is connected to one end of the second drain power supply choke inductor, and the other end of the second drain power supply choke inductor is connected to the filter capacitor and the drain of the second transistor, respectively. A second drain power supply filter capacitor is connected in parallel between the second drain power supply choke inductor and the filter capacitor.
[0011] Furthermore,
[0012] The third amplification path includes a third active bias circuit, a third gate power supply filter capacitor, a third gate power supply choke inductor, a third transistor, a third drain power supply filter capacitor, and a third drain power supply choke inductor. One end of the third active bias circuit is connected to the filter capacitor, and the other end is connected to the input terminal of the third gate power supply choke inductor. A third gate power supply filter capacitor is connected in parallel between the third active bias circuit and the third gate power supply choke inductor. The output terminal of the third gate power supply choke inductor is connected to the gate of the third transistor. The drain of the third transistor is connected to the third drain power supply choke inductor. The other end of the third drain power supply choke inductor is connected to the filter capacitor. A third drain power supply filter capacitor is connected in parallel between the third drain power supply choke inductor and the filter capacitor.
[0013] Furthermore,
[0014] The radio frequency (RF) transmission circuit includes an RF input port, a π-type attenuator, a first DC blocking capacitor, a first matching capacitor, a first transistor gate matching inductor, a first transistor, a first transistor drain matching inductor, a second DC blocking capacitor, a second matching capacitor, a second transistor, a second transistor gate matching inductor, a third DC blocking capacitor, a third matching capacitor, a third transistor gate matching inductor, a third transistor, a third transistor drain matching inductor, a fourth DC blocking capacitor, a fourth matching capacitor, and an output RF terminal. The RF input port is directly connected to the π-type attenuator. The π-type attenuator is connected to the first DC blocking capacitor and then connected in parallel to ground through the first matching capacitor. The first DC blocking capacitor is then connected in series with the first transistor gate matching inductor. The first transistor is connected to the gate of the first transistor. The drain of the first transistor is connected to the drain matching inductor of the first transistor. The other end of the drain matching inductor of the first transistor is connected to the second DC blocking capacitor and connected in parallel to ground through the second matching capacitor. The second DC blocking capacitor is connected to the gate of the second transistor through the gate matching inductor of the second transistor. A third DC blocking capacitor is set after the drain of the second transistor and connected in parallel to ground through the third matching capacitor. The third DC blocking capacitor is connected to the gate matching inductor of the third transistor and the drain matching inductor of the third transistor is connected to the drain of the third transistor. The other end of the drain matching inductor of the third transistor is connected to the fourth DC blocking capacitor and connected to ground through the fourth matching capacitor. The fourth DC blocking capacitor is then connected in series to the RF output port.
[0015] Furthermore,
[0016] The first transistor, the second transistor, and the third transistor are all grounded through transistor grounding holes.
[0017] The beneficial effects of this utility model are:
[0018] 1. Stable gain and low distortion amplification, achieved through negative feedback loop and active bias design to realize precise gain control and linearity optimization:
[0019] The first and second stage amplification paths introduce feedback loops containing DC blocking capacitors, feedback resistors, and feedback inductors to form intra-stage negative feedback, suppressing nonlinear distortion, adjusting gain stability, and avoiding strong signal distortion; the feedback resistor precisely controls the feedback amount, and the feedback inductor compensates for high-frequency phase shift, reducing the risk of self-oscillation.
[0020] Each stage of active bias circuitry provides a stable DC bias for the transistor, enabling it to operate in the optimal amplification region, improving efficiency, avoiding saturation / cutoff distortion, and ensuring the consistency and reliability of signal amplification.
[0021] 2. Wide bandwidth characteristics and high stability
[0022] Wideband high-efficiency operation is achieved through phase compensation, power supply filtering, and low-impedance grounding:
[0023] Feedback inductors compensate for high-frequency phase shift, extending the operating bandwidth within the X-band (8-12GHz), and, in conjunction with a matching network, achieve a flat gain response (e.g., Figure 2 , 3 (As shown).
[0024] The gate / drain filter capacitors and choke inductors form a power supply filter network to stabilize the bias voltage and reduce the interference of power supply fluctuations on the signal; the transistor is directly grounded through a grounding hole to form a low-impedance high-frequency loop, reduce grounding inductance, and improve high-frequency stability.
[0025] 3. High-efficiency signal transmission and multi-level matching design
[0026] Efficient signal amplification and transmission are achieved through an RF matching network and a three-stage cascaded structure.
[0027] A multi-stage matching network, consisting of a π-type attenuator, DC blocking capacitor, and matching inductor / capacitor, achieves input-output impedance matching (e.g., in a 50Ω system) and reduces signal reflection (e.g., ...). Figure 4 (Return loss curve), improving transmission efficiency; the π-type attenuator can also adjust the input amplitude and protect the subsequent circuitry.
[0028] The three-stage cascaded amplification path (the first two stages have feedback to optimize linearity, and the third stage has no feedback to achieve high power output) amplifies the signal step by step, balancing gain and output power to meet the high-efficiency amplification requirements of X-band high-frequency signals. Attached Figure Description
[0029] The accompanying drawings, which are included to provide a further understanding of the embodiments of the present invention and form part of this application, do not constitute a limitation thereof. In the drawings:
[0030] Figure 1 This is a schematic diagram of the structure of this utility model;
[0031] Figure 2This is a comparison chart of the wideband gain curve and the maximum gain curve of this utility model;
[0032] Figure 3 This is a wideband gain curve diagram of this utility model;
[0033] Figure 4 This is a return loss curve diagram of this utility model;
[0034] Figure 5 This is a curve showing the P1dB compression of this invention.
[0035] The attached diagram shows the markings and corresponding component names:
[0036] 1-DC power supply terminal, 2-Filter capacitor, 3-RF input port, 4-RF output port, 5-First feedback loop, 50-First feedback DC blocking capacitor, 51-First feedback resistor, 52-First feedback inductor, 6-First active bias circuit, 7-First gate power supply filter capacitor, 8-First gate power supply choke inductor, 9-First transistor, 10-First drain power supply filter capacitor, 11-First drain power supply choke inductor, 12-Second active bias circuit, 13-Second gate power supply filter capacitor, 14-Second gate power supply choke inductor, 15-Second transistor, 16-Second drain power supply filter capacitor, 17-Second drain power supply choke inductor, 18-Third active bias circuit, 19-Third gate power supply filter capacitor, 20-Third gate power supply filter capacitor 21-Third transistor, 22-Third drain power supply filter capacitor, 23-Third drain power supply choke inductor, 24-π-type attenuator, 25-First DC blocking capacitor, 26-First matching capacitor, 27-First transistor gate matching inductor, 28-First transistor drain matching inductor, 29-Second DC blocking capacitor, 30-Second matching capacitor, 31-Second transistor gate matching inductor, 32-Third DC blocking capacitor, 33-Third matching capacitor, 34-Third transistor gate matching inductor, 35-Third transistor drain matching inductor, 36-Fourth DC blocking capacitor, 37-Fourth matching capacitor, 38-Second feedback loop, 380-Second feedback DC blocking capacitor, 381-Second feedback resistor, 382-Second feedback inductor. Detailed Implementation
[0037] The present invention will be further described in detail below with reference to the embodiments and accompanying drawings, but the implementation of the present invention is not limited thereto.
[0038] In the description of this utility model, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "longitudinal", "lateral", "horizontal", "inner", "outer", "front", "rear", "top", "bottom", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the utility model product is in use. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.
[0039] In the description of this utility model, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set up," "have," "install," "connect," and "connect" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.
[0040] Example
[0041] See Figures 1 to 5 :
[0042] An X-band drive amplifier includes a DC power supply terminal 1, a filter capacitor 2, an RF input port 3, and an RF output port 4. The DC power supply terminal 1 and the filter capacitor 2 are connected, and the filter capacitor 2 connects three amplification paths. The RF input port 3 and the RF input terminal are connected by an RF transmission circuit, from the RF input port 3 through the three amplification paths to the RF output port 4. The three amplification paths are divided into a first amplification path, a second amplification path, and a third amplification path according to the order in which the RF signal passes through. The first amplification path and the second amplification path respectively contain a first feedback loop 5 and a second feedback loop 38.
[0043] Furthermore,
[0044] The first amplification path includes a first active bias circuit 6, a first gate power supply filter capacitor 7, a first gate power supply choke inductor 8, a first transistor 9, a first drain power supply filter capacitor 10, a first drain power supply choke inductor 11, and a first feedback loop 5. One end of the first active bias circuit 6 is connected to the filter capacitor 2, and the other end is connected to the input terminal of the first gate power supply choke inductor 8. The first gate power supply filter capacitor 7 is connected in parallel between the first active bias circuit 6 and the first gate power supply choke inductor 8. The output terminal is connected to the gate of the first transistor 9 and the first feedback DC blocking capacitor 50 in the first feedback loop 5. The first feedback DC blocking capacitor 50 is connected in series to the first feedback resistor 51. The first feedback resistor 51 is connected in series to the first feedback inductor 52 to form the first feedback loop 5. The first feedback inductor 52 is connected to one end of the first drain power supply choke inductor 11. The other end of the first drain power supply choke inductor 11 is connected to the filter capacitor 2. The first drain power supply filter capacitor 10 is connected in parallel between the first drain power supply choke inductor 11 and the filter capacitor 2.
[0045] The first active bias circuit 6 provides a stable DC bias for the first transistor 9, ensuring that it operates in the optimal amplification region and improving efficiency and linearity; the DC blocking capacitor of the first feedback loop 5 is connected to the gate, and the first feedback inductor 52 is connected to the drain power supply choke inductor, forming an intra-stage negative feedback, which stabilizes the gain and reduces distortion in the initial stage of signal amplification of the amplification path of this stage.
[0046] Furthermore,
[0047] The second amplification path includes a second active bias circuit 12, a second gate power supply filter capacitor 13, a second gate power supply choke inductor 14, a second transistor 15, a second drain power supply filter capacitor 16, a second drain power supply choke inductor 17, and a second feedback loop 38. One end of the second active bias circuit 12 is connected to the filter capacitor 2, and the other end is connected to the input terminal of the second gate power supply choke inductor 14. A second gate power supply filter capacitor 13 is connected in parallel between the second active bias circuit 12 and the second gate power supply choke inductor 14. The output terminal of the second gate power supply choke inductor 14 is... The second feedback DC blocking capacitor 380 in the second feedback loop 38 is connected to the gate of the second transistor 15. The second feedback DC blocking capacitor 380 is connected in series to the second feedback resistor 381. The second feedback resistor 381 is connected in series to the second feedback inductor 382 to form the second feedback loop 38. The second feedback inductor 382 is connected to one end of the second drain power supply choke inductor 17. The other end of the second drain power supply choke inductor 17 is connected to the filter capacitor 2 and the drain of the second transistor 15 respectively. The second drain power supply filter capacitor 16 is connected in parallel between the second drain power supply choke inductor 17 and the filter capacitor 2.
[0048] Similar to the first amplification path structure, the second active bias circuit 12, the gate and drain filter capacitors 2, and the choke inductor work together to provide a stable bias and clean power supply for the second transistor 15; the second feedback loop 38 also plays the role of adjusting gain, compensating for phase, and improving stability. As an intermediate amplification stage, it connects the previous and subsequent stages, further enhancing the signal on the basis of the first stage amplification, while ensuring signal quality.
[0049] This path receives the signal after the first stage of amplification, stabilizes the amplified signal through its own feedback and bias circuit, and provides a high-quality input signal for the third stage of amplification.
[0050] Furthermore,
[0051] The third amplification path includes a third active bias circuit 18, a third gate power supply filter capacitor 19, a third gate power supply choke inductor 20, a third transistor 21, a third drain power supply filter capacitor 22, and a third drain power supply choke inductor 23. One end of the third active bias circuit 18 is connected to the filter capacitor 2, and the other end is connected to the input terminal of the third gate power supply choke inductor 20. The third gate power supply filter capacitor 19 is connected in parallel between the third active bias circuit 18 and the third gate power supply choke inductor 20. The output terminal of the third gate power supply choke inductor 20 is connected to the gate of the third transistor 21. The drain of the third transistor 21 is connected to the third drain power supply choke inductor 23. The other end of the third drain power supply choke inductor 23 is connected to the filter capacitor 2. The third drain power supply filter capacitor 22 is connected in parallel between the third drain power supply choke inductor 23 and the filter capacitor 2.
[0052] One end of the third active bias circuit 18 is connected to the filter capacitor 2, and the other end is connected to the gate of the third transistor 21 via the third gate power supply choke inductor 20, with the third gate power supply filter capacitor 19 connected in parallel for filtering. The drain of the third transistor 21 is connected to the third drain power supply choke inductor 23, and the other end is connected to the filter capacitor 2, with the third drain power supply filter capacitor 22 connected in parallel to stabilize the drain power supply. This path receives the signal after the second stage amplification. Utilizing the amplification characteristics of the transistor, without feedback, by optimizing the bias and circuit parameters, the final stage amplification of the signal is achieved, outputting an X-band RF signal that meets the requirements.
[0053] Furthermore,
[0054] The radio frequency transmission circuit includes an RF input port 3, a π-type attenuator 24, a first DC blocking capacitor 25, a first matching capacitor 26, a first transistor gate matching inductor 27, a first transistor 9, a first transistor drain matching inductor 28, a second DC blocking capacitor 29, a second matching capacitor 30, a second transistor 15, a second transistor gate matching inductor 31, a third DC blocking capacitor 32, a third matching capacitor 33, a third transistor gate matching inductor 34, a third transistor 21, a third transistor drain matching inductor 35, a fourth DC blocking capacitor 36, a fourth matching capacitor 37, and an output RF terminal. The RF input port 3 is directly connected to the π-type attenuator 24. The π-type attenuator 24 is connected to the first DC blocking capacitor 25 and connected in parallel to ground through the first matching capacitor 26. The first DC blocking capacitor 25 is then connected in series with the first transistor gate matching inductor 27. Inductor 27 is connected to the gate of the first transistor 9. The drain of the first transistor 9 is connected to the drain matching inductor 28. The other end of the drain matching inductor 28 is connected to the second DC blocking capacitor 29 and connected in parallel to ground through the second matching capacitor 30. The second DC blocking capacitor 29 is connected to the gate of the second transistor 15 through the gate matching inductor 31. A third DC blocking capacitor 32 is set after the drain of the second transistor 15 and connected in parallel to ground through the third matching capacitor 33. The third DC blocking capacitor 32 is connected to the gate matching inductor 34 of the third transistor, and the drain matching inductor 35 of the third transistor is connected to the drain of the third transistor 21. The other end of the drain matching inductor 35 is connected to the fourth DC blocking capacitor 36 and connected to ground through the fourth matching capacitor 37. The fourth DC blocking capacitor 36 is then connected in series to the RF output port 4.
[0055] The π-type attenuator 24 can adjust the input signal amplitude to prevent strong signals from damaging subsequent circuits, while also achieving impedance matching; the DC blocking capacitor isolates DC and ensures that each stage has independent DC bias; the matching capacitor and inductor form a matching network to optimize impedance matching between stages, reduce signal reflection, improve signal transmission efficiency, and enable the RF signal to be transmitted efficiently between each amplification path, ensuring the RF performance of the entire amplifier in the X-band.
[0056] Furthermore,
[0057] The first transistor 9, the second transistor 15, and the third transistor 21 are all grounded through transistor grounding holes.
[0058] The first, second, and third transistors 21 are grounded through grounding holes to form a low-impedance grounding loop, which can quickly release high-frequency current, reduce grounding inductance, improve the circuit's anti-interference capability, and ensure stable operation of the transistors. Especially in the high-frequency X-band, good grounding is crucial to circuit performance.
[0059] The method of using this utility model is as follows:
[0060] DC power supply terminal 1 is connected to filter capacitor 2, providing a stable DC power supply for the three amplification paths. The RF signal enters from RF input port 3, and after amplitude adjustment and impedance matching by the π-type attenuator 24 in the RF transmission circuit, it sequentially enters the three amplification paths. The first and second amplification paths use active bias circuits to provide optimal DC bias for the transistors. The gate and drain filter capacitors 2, along with the choke inductor, filter and stabilize the bias. The DC blocking capacitor, feedback resistor, and feedback inductor in the first feedback loop 5 and the second feedback loop 38 form negative feedback, stabilizing the gain, controlling nonlinear distortion, compensating for high-frequency phase shift to expand bandwidth and enhance stability, thus performing the first two stages of signal amplification. The third amplification path, without feedback, completes the final stage of amplification by optimizing the bias and circuit parameters and utilizing the transistor's amplification characteristics. Each stage of transistors is grounded through a grounding hole, forming a low-impedance grounding loop. The amplified signal is output from RF output port 4 through the DC blocking capacitor and matching network of the RF transmission circuit, achieving a gain of 25.5dB to 27.5dB and a P1dB of >24.5dBm in the X-band, demonstrating superior performance.
[0061] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of this utility model. It should be understood that the above description is only a specific embodiment of this utility model and is not intended to limit the scope of protection of this utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.
Claims
1. An X-band drive amplifier, comprising a DC power supply terminal (1), a filter capacitor (2), an RF input port (3), and an RF output port (4), characterized in that, The DC power supply terminal (1) is connected to the filter capacitor (2), which is connected to three amplification paths. The RF input port (3) and the RF input terminal are connected through the RF transmission circuit, from the RF input port (3) through the three amplification paths to the RF output port (4). The three amplification paths are divided into the first amplification path, the second amplification path, and the third amplification path according to the order in which the RF signal passes. The first amplification path and the second amplification path contain the first feedback loop (5) and the second feedback loop (38), respectively.
2. The X-band drive amplifier according to claim 1, characterized in that, The first amplification path includes a first active bias circuit (6), a first gate power supply filter capacitor (7), a first gate power supply choke inductor (8), a first transistor (9), a first drain power supply filter capacitor (10), a first drain power supply choke inductor (11), and a first feedback loop (5). One end of the first active bias circuit (6) is connected to the filter capacitor (2), and the other end is connected to the input terminal of the first gate power supply choke inductor (8). The first gate power supply filter capacitor (7) is connected in parallel between the first active bias circuit (6) and the first gate power supply choke inductor (8). The output terminal is connected to the gate of the first transistor (9) and the first feedback DC blocking capacitor (50) in the first feedback loop (5). The first feedback DC blocking capacitor (50) is connected in series to the first feedback resistor (51). The first feedback resistor (51) is connected in series to the first feedback inductor (52) to form the first feedback loop (5). The first feedback inductor (52) is connected to one end of the first drain power supply choke inductor (11). The other end of the first drain power supply choke inductor (11) is connected to the filter capacitor (2). A first drain power supply filter capacitor (10) is connected in parallel between the first drain power supply choke inductor (11) and the filter capacitor (2).
3. An X-band drive amplifier according to claim 2, characterized in that, The second amplification path includes a second active bias circuit (12), a second gate power supply filter capacitor (13), a second gate power supply choke inductor (14), a second transistor (15), a second drain power supply filter capacitor (16), a second drain power supply choke inductor (17), and a second feedback loop (38). One end of the second active bias circuit (12) is connected to the filter capacitor (2), and the other end is connected to the input terminal of the second gate power supply choke inductor (14). A second gate power supply filter capacitor (13) is connected in parallel between the second active bias circuit (12) and the second gate power supply choke inductor (14). The output terminal of the second gate power supply choke inductor (14) is connected to the input terminal of the second gate power supply choke inductor (14). The gate of the second transistor (15) is connected to the second feedback DC blocking capacitor (380) in the second feedback loop (38). The second feedback DC blocking capacitor (380) is connected in series to the second feedback resistor (381). The second feedback resistor (381) is connected in series to the second feedback inductor (382) to form the second feedback loop (38). The second feedback inductor (382) is connected to one end of the second drain power supply choke inductor (17). The other end of the second drain power supply choke inductor (17) is connected to the filter capacitor (2) and the drain of the second transistor (15) respectively. A second drain power supply filter capacitor (16) is connected in parallel between the second drain power supply choke inductor (17) and the filter capacitor (2).
4. An X-band drive amplifier according to claim 3, characterized in that, The third amplification path includes a third active bias circuit (18), a third gate power supply filter capacitor (19), a third gate power supply choke inductor (20), a third transistor (21), a third drain power supply filter capacitor (22), and a third drain power supply choke inductor (23). One end of the third active bias circuit (18) is connected to the filter capacitor (2), and the other end is connected to the input end of the third gate power supply choke inductor (20). The third gate power supply filter capacitor (19) is connected in parallel between the third active bias circuit (18) and the third gate power supply choke inductor (20). The output end of the third gate power supply choke inductor (20) is connected to the gate of the third transistor (21). The drain of the third transistor (21) is connected to the third drain power supply choke inductor (23). The other end of the third drain power supply choke inductor (23) is connected to the filter capacitor (2). The third drain power supply filter capacitor (22) is connected in parallel between the third drain power supply choke inductor (23) and the filter capacitor (2).
5. An X-band drive amplifier according to claim 4, characterized in that, The radio frequency transmission circuit includes a radio frequency input port (3), a π-type attenuator (24), a first DC blocking capacitor (25), a first matching capacitor (26), a first transistor gate matching inductor (27), a first transistor (9), a first transistor drain matching inductor (28), a second DC blocking capacitor (29), a second matching capacitor (30), a second transistor (15), a second transistor gate matching inductor (31), a third DC blocking capacitor (32), a third matching capacitor (33), a third transistor gate matching inductor (34), a third transistor (21), a third transistor drain matching inductor (35), a fourth DC blocking capacitor (36), a fourth matching capacitor (37), and an output radio frequency terminal. The radio frequency input port (3) is directly connected to the π-type attenuator (24). The π-type attenuator (24) is connected to the first DC blocking capacitor (25) and connected in parallel to ground through the first matching capacitor (26). The first DC blocking capacitor (25) is then connected in series with the first transistor. The gate matching inductor (27) is connected to the gate of the first transistor (9), the drain of the first transistor (9) is connected to the drain matching inductor (28) of the first transistor, the other end of the drain matching inductor (28) of the first transistor is connected to the second DC blocking capacitor (29) and connected to ground in parallel through the second matching capacitor (30), the second DC blocking capacitor (29) is connected to the gate of the second transistor (15) through the gate matching inductor (31) of the second transistor, a third DC blocking capacitor (32) is set after the drain of the second transistor and connected to ground in parallel through the third matching capacitor (33), the third DC blocking capacitor (32) is connected to the gate matching inductor (34) of the third transistor and the drain matching inductor (35) of the third transistor is connected to the drain of the third transistor (21), the other end of the drain matching inductor (35) of the third transistor is connected to the fourth DC blocking capacitor (36) and connected to ground through the fourth matching capacitor (37), and the fourth DC blocking capacitor (36) is then connected in series to the RF output port (4).
6. An X-band drive amplifier according to claim 5, characterized in that, The first transistor (9), the second transistor (15), and the third transistor (21) are all grounded through transistor grounding holes.