Communication circuit supporting multiple protocols

Abstract

The utility model discloses a communication circuit supporting multiple protocols, which comprises a master control module circuit, a power supply module circuit and a butt joint socket, and the butt joint socket is compatible with a Jlink burner. Wherein a change-over switch in the main control module is respectively connected with a power supply interface, a USB communication interface and a first control switch, a controller chip is connected with the USB communication interface, the first control switch is connected with a 485 module, and the 485 module is respectively connected with a protocol pin of the controller chip through a second control switch and a third control switch; first voltage is connected to the input end of an LDO chip in the power module circuit, second voltage is output by the output end of the LDO chip, and a Jlink burner is connected with a pin header of a butt joint socket. According to the utility model, the communication circuit is compatible with USB communication, 485 communication and TTL communication by adjusting the on or off of each switch, and the LDO chip is adopted for voltage conversion, so that the interface provides two power supply modes, the stability and reliability of the circuit are ensured, the circuit can be compatible with debugging of products with different power supplies, and the debugging efficiency is improved.

Description

Technical Field

[0001] This utility model relates to the field of communication interfaces, specifically to a communication circuit that supports multiple protocols. Background Technology

[0002] A printed circuit board (PCB) is a piece of hardware used for mechanical support and electrical connection of electronic components. By designing circuit diagrams on a printed circuit board, different communication protocols can be supported, thereby enabling different functions.

[0003] Current technology involves designing multiple PCBs in electronic devices, with each PCB containing a separate communication protocol. Switching between different communication protocols is achieved through debugging tools or adapter boards. However, this design requires developers to frequently change debugging tools or adapter boards during the debugging process, resulting in low debugging efficiency. Utility Model Content

[0004] To address the shortcomings of existing technologies, this utility model provides a communication circuit that supports multiple protocols, aiming to be compatible with various communication protocols and improve the debugging efficiency of equipment.

[0005] This utility model discloses a communication circuit that supports multiple protocols, including a main control module circuit, a power supply module circuit, and a docking socket, the docking socket being compatible with J-Link programmers;

[0006] The main control module includes a controller chip. The differential data pins of the controller chip are connected to a USB communication interface. The USB communication interface is connected to the communication pins of a switch. The power supply pins of the switch are connected to the power supply interface. The switching pins of the switch are connected to the first terminal of a first control switch. The second terminal of the first control switch is connected to the power supply pins of a 485 module. The 485 module is connected to the protocol pins of the controller chip through a second control switch and a third control switch. The 485 module is connected to the first pin header of a docking socket. The second and third control switches are both connected to the second pin header of the docking socket. The power supply interface, the switch, and the USB communication interface are all connected to the power supply ground. The 485 module, the second control switch, the third control switch, and the controller chip are all connected to the communication ground.

[0007] The power module circuit includes an LDO chip. The input terminal of the LDO chip is connected to the fourth capacitor, and the output terminal of the LDO chip is connected to the fifth and sixth capacitors respectively. The input terminal of the LDO chip is connected to a first voltage and is connected to the first and second pins of the docking socket respectively. The output terminal of the LDO chip outputs a second voltage and is connected to the third and fifth pins of the docking socket respectively.

[0008] The input pins of the J-Link programmer are connected to the fourth row of pins on the docking socket; the output pins of the J-Link programmer are connected to the third and fifth rows of pins on the docking socket, respectively.

[0009] Preferably, the controller chip is a USB to TTL bridge controller chip.

[0010] Preferably, the power supply ground and the communication ground are connected via a pin header jumper.

[0011] Preferably, the switch is connected to one end of the diode, and the other end of the diode is connected to the communication ground.

[0012] Preferably, the first terminal of the first control switch is connected to the third capacitor, and the second terminal of the first control switch is connected to the first voltage.

[0013] Preferably, the first power supply pin of the controller chip is connected to the first capacitor; the second power supply pin of the controller chip is connected to the second capacitor; the reset pin of the controller chip is connected to the third resistor; and the first capacitor, the second capacitor, and the third resistor are all connected to the communication ground.

[0014] Preferably, the controller chip is connected to a first voltage.

[0015] Preferably, the first voltage is 5V and the second voltage is 3.3V.

[0016] Preferably, a first resistor and a second resistor are provided between the controller chip and the USB communication interface.

[0017] Compared with existing technologies, the advantages of this invention are as follows: By adjusting the on / off state of the switch, the communication circuit is compatible with three communication methods: USB, RS-485, and TTL. This makes switching between various communication methods more flexible and convenient, eliminating the need for hardware replacement or rewiring, greatly saving time and costs, and facilitating device debugging for developers. Simultaneously, the use of an LDO chip for voltage conversion allows the interface to provide two power supply methods, ensuring circuit stability and reliability, and enabling debugging of products with different power supplies. Attached Figure Description

[0018] Figure 1 A circuit diagram of a communication circuit supporting multiple protocols provided by this utility model;

[0019] Figure 2 A front view of the printed circuit board provided by this utility model;

[0020] Figure 3 This is a schematic diagram of the back side of the printed circuit board provided by this utility model.

[0021] Figure label:

[0022] QFN - Controller chip; USB - USB communication interface; S1 - Switch; DC - Power supply interface; K1 - First control switch; K2 - Second control switch; K3 - Third control switch; D1 - LDO chip; D2 - 485 module; X1 - First pin header; X2 - Second pin header; X3 - Third pin header; X4 - Fourth pin header; X5 - Fifth pin header; GND1 - Power ground; GND - Communication ground; C1 - First capacitor; C2 - Second capacitor; C3 - Third capacitor; C4 - Fourth capacitor; C5 - Fifth capacitor; C6 - Sixth capacitor; VD - Diode; R1 - First resistor; R2 - Second resistor. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0024] The present invention will now be described in further detail with reference to the accompanying drawings.

[0025] like Figure 1 , Figure 2 and Figure 3 As shown, this embodiment of the utility model provides a communication circuit that supports multiple protocols. The communication circuit is applied on a printed circuit board and includes a main control module circuit, a power supply module circuit, and a docking socket. The docking socket is compatible with J-Link programmers.

[0026] The main control module includes a QFN controller chip. The QFN can be a USB-to-TTL bridge controller chip, used to establish a bidirectional communication bridge between the USB interface and the TTL-level UART serial port, enabling the conversion between different protocols and levels. The protocol conversion process involves converting the USB differential signal protocol (D+ / D-) to the UART asynchronous serial protocol (TX / RX). The level conversion process involves converting the USB signal (3.3V differential level) to the TTL level (3.3V / 5V).

[0027] In this embodiment of the invention, the differential data pin of the controller chip QFN is connected to the USB communication interface USB. A first resistor R1 and a second resistor R2 are provided between the controller chip QFN and the USB communication interface USB. The resistance values ​​of the first resistor R1 and the second resistor R2 are 22 ohms, and the accuracy error of the resistance value is ±5%. The USB communication interface USB is connected to the communication pin of the switch S1, and the power supply pin of the switch S1 is connected to the DC power supply interface. In this way, by controlling the conduction or disconnection of each pin of the switch S1, the communication function and the power supply function are switched.

[0028] The controller chip QFN is connected to a first voltage. The first power supply pin of the controller chip QFN is connected to the first capacitor C1; the second power supply pin of the controller chip QFN is connected to the second capacitor C2; and the reset pin of the controller chip QFN is connected to the third resistor R3. The first capacitor C1, the second capacitor C2, and the third resistor R3 are all connected to the communication ground GND. A first resistor R1 and a second resistor R2 are provided between the controller chip QFN and the USB communication interface USB.

[0029] The switching pin of the toggle switch S1 is connected to the first terminal of the first control switch K1, and the second terminal of the first control switch K1 is connected to the power supply pin of the 485 module D2. The first terminal of the first control switch K1 is connected to the third capacitor C3, and the second terminal of the first control switch K1 is connected to a first voltage. Thus, by controlling the on / off state of each pin of the first control switch K1, the power supply to the 485 module D2 is controlled.

[0030] The 485 module D2 is connected to the protocol pins of the controller chip QFN via the second control switch K2 and the third control switch K3. The 485 module D2 is connected to the first pin header X1 of the docking socket; the second control switch K2 and the third control switch K3 are both connected to the second pin header X2 of the docking socket. Thus, by controlling the on / off state of the pins of the second control switch K2 and the third control switch K3, the TX and RX signals of the controller chip QFN are adjusted to connect to different protocols.

[0031] In this embodiment of the invention, the power supply interface DC, the switch S1, and the USB communication interface USB are all connected to the power supply ground GND1, while the 485 module D2, the second control switch K2, the third control switch K3, and the controller chip QFN are all connected to the communication ground GND. The power supply ground GND1 and the communication ground GND are connected via jumper pins. This connection method effectively reduces interference caused by unstable power input, thereby preventing the chip from being affected by crosstalk. By physically connecting the power supply ground GND1 and the communication ground GND, the potential difference between them can be minimized, thus improving the stability and reliability of the system. Furthermore, this connection method can also reduce electromagnetic interference, further enhancing the performance of the entire system.

[0032] In this embodiment of the invention, the power module circuit includes an LDO chip D1. The input terminal of the LDO chip D1 is connected to a fourth capacitor C4, and the output terminal of the LDO chip D1 is connected to a fifth capacitor C5 and a sixth capacitor C6, respectively. The input terminal of the LDO chip D1 receives a first voltage and is connected to the first pin header X1 and the second pin header X2 of the connector. The output terminal of the LDO chip D1 outputs a second voltage and is connected to the third pin header X3 and the fifth pin header X5 of the connector, respectively. The first voltage is 5V, and the second voltage is 3.3V.

[0033] In this way, the LDO chip D1 can be used to convert 5V to 3.3V, thus enabling compatibility with communication debugging of more products. For example, by connecting a 5V power supply to the input of the LDO chip, the LDO chip will automatically maintain the output voltage at 3.3V.

[0034] In this embodiment of the invention, the input pins of the J-Link programmer are connected to the fourth row of pins X4 of the docking socket, and the output pins of the J-Link programmer are connected to the third row of pins X3 and the fifth row of pins X5 of the docking socket, respectively. Thus, the third row of pins X3 and the fifth row of pins X5 are connected to the J-Link interface, the first row of pins X1 is connected to the communication interface of the 485 module D2, and the second row of pins X2 is connected to the TTL-based UART communication interface. This allows the J-Link interface to be connected and operated simultaneously with interfaces of other communication protocols. Developers only need to switch computer software during communication debugging or firmware modification, eliminating the need for repeated plugging and unplugging of lines, thereby improving debugging efficiency.

[0035] In this embodiment of the invention, the switching switch S1 is connected to one end of diode VD, and the other end of diode VD is connected to communication ground GND. This fully utilizes the conduction characteristics of diode VD to prevent incorrect input voltage connection, thereby protecting the chip. Specifically, when the polarity of the input voltage is reversed, diode VD automatically conducts, forming a low-impedance path that diverts excess voltage to communication ground GND, thus preventing direct voltage application to the chip and ensuring its safety. This design not only improves circuit reliability but also reduces the risk of damage due to wiring errors, further enhancing the stability and safety of the entire system.

[0036] As can be seen from the above technical solution, this utility model discloses a communication circuit supporting multiple protocols, including a main control module circuit, a power supply module circuit, and a docking socket, which is compatible with the J-Link programmer. In the main control module, a switch is connected to the power supply interface, the USB communication interface, and a first control switch. The controller chip is connected to the USB communication interface, and the first control switch is connected to the 485 module. The 485 module is connected to the protocol pins of the controller chip through a second control switch and a third control switch. In the power supply module circuit, the input terminal of the LDO chip receives a first voltage, and the output terminal outputs a second voltage. The J-Link programmer is connected to the pin header of the docking socket. This utility model enables the communication circuit to be compatible with three communication methods—USB, 485, and TTL—by adjusting the on / off state of the switches. This makes switching between various communication methods more flexible and convenient, eliminating the need for hardware replacement or rewiring, greatly saving time and costs, and facilitating device debugging for developers. Simultaneously, the use of an LDO chip for voltage conversion allows the interface to provide two power supply methods, ensuring the stability and reliability of the circuit and enabling debugging of products with different power supplies.

[0037] The above are merely preferred embodiments of this utility model and are not intended to limit the scope of this utility model. Various modifications and variations can be made to this utility model by those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A communication circuit supporting multiple protocols, characterized by, It includes a main control module circuit, a power supply module circuit, and a docking socket, wherein the docking socket is compatible with a J-Link programmer; The main control module includes a controller chip (QFN). The differential data pins of the controller chip (QFN) are connected to a USB communication interface (USB). The USB communication interface (USB) is connected to the communication pins of a switch (S1). The power supply pins of the switch (S1) are connected to a power supply interface (DC). The switching pins of the switch (S1) are connected to the first terminal of a first control switch (K1). The second terminal of the first control switch (K1) is connected to the power supply pins of a 485 module (D2). The 485 module (D2) is connected to a second control switch (K2) and a third control switch. The switch (K3) is connected to the protocol pin of the controller chip (QFN); the 485 module (D2) is connected to the first pin header (X1) of the docking socket; the second control switch (K2) and the third control switch (K3) are both connected to the second pin header (X2) of the docking socket; the power supply interface (DC), the switching switch (S1), and the USB communication interface (USB) are all connected to the power supply ground (GND1); the 485 module (D2), the second control switch (K2), the third control switch (K3), and the controller chip (QFN) are all connected to the communication ground (GND). The power module circuit includes an LDO chip (D1). The input terminal of the LDO chip (D1) is connected to the fourth capacitor (C4), and the output terminal of the LDO chip (D1) is connected to the fifth capacitor (C5) and the sixth capacitor (C6). The input terminal of the LDO chip (D1) is connected to a first voltage and is connected to the first pin header (X1) and the second pin header (X2) of the docking socket. The output terminal of the LDO chip (D1) outputs a second voltage and is connected to the third pin header (X3) and the fifth pin header (X5) of the docking socket. The input pins of the J-Link programmer are connected to the fourth row of pins (X4) of the docking socket; the output pins of the J-Link programmer are connected to the third row of pins (X3) and the fifth row of pins (X5) of the docking socket, respectively.

2. The communication circuit of claim 1, wherein The controller chip (QFN) is a USB to TTL bridge controller chip.

3. The communication circuit of claim 1, wherein, The power supply ground (GND1) and the communication ground (GND) are connected via a pin header jumper.

4. The communication circuit of claim 1, wherein The switching switch (S1) is connected to one end of the diode (VD), and the other end of the diode (VD) is connected to the communication ground (GND).

5. The communication circuit of claim 1, wherein, The first terminal of the first control switch (K1) is connected to the third capacitor (C3), and the second terminal of the first control switch (K1) is connected to the first voltage.

6. The communication circuit of claim 1, wherein The first power supply pin of the controller chip (QFN) is connected with the first capacitor (C1); the second power supply pin of the controller chip (QFN) is connected with the second capacitor (C2); the reset pin of the controller chip (QFN) is connected with the third resistor (R3); the first capacitor (C1), the second capacitor (C2) and the third resistor (R3) are all connected with the communication ground (GND).

7. The communication circuit of claim 6, wherein, The controller chip (QFN) accesses the first voltage.

8. The communication circuit of claim 1, wherein The first voltage is 5V, and the second voltage is 3.3V.

9. The communication circuit of claim 1, wherein First resistor (R1) and second resistor (R2) are arranged between the controller chip (QFN) and the USB communication interface (USB).

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