Dual protection circuit for suppressing surge and overshoot during quick startup and shutdown of PFC (Power Factor Correction)

Abstract

The utility model relates to a dual protection circuit for suppressing surge and overshoot during PFC rapid startup and shutdown. The dual protection circuit comprises a protection unit 1 control circuit, a protection unit 1, a protection unit 2, a protection unit 2 control circuit, an auxiliary power supply circuit, an IC main control module, an APFC circuit, a rectification filter circuit and a load end. An IC main control module; the IC main control module is connected with a signal input end and the APFC circuit; the APFC circuit is respectively connected with the protection unit 1, the protection unit 2 and the IC main control module; the rectification filter circuit is connected with the input port. The protection unit 1 is connected with the protection unit 1 control circuit, the rectification filter circuit and the APFC circuit; the protection unit 2 is connected with the protection unit 2 control circuit, the APFC circuit and the load end; the APFC circuit is an active power factor correction circuit; therefore, a dual protection circuit for suppressing surge overshoot during PFC rapid ignition startup and shutdown is formed. The power supply stability is improved.

Description

Technical Field

[0001] This utility model belongs to the field of circuit protection switch control signal transmission technology, specifically relating to a dual protection circuit for PFC fast power-on and power-off to suppress surge overshoot. Background Technology

[0002] In traditional switching power supplies with a power rating greater than 75 watts, a power correction circuit (PFC circuit) is required. However, with a PFC circuit, a large spike current flows through the switching transistor (MOSFET) at the moment of power-on and power-off. This is because the output of the circuit is equipped with a large electrolytic capacitor. At the moment of power-on, the charge of the large electrolytic capacitor is zero. At the same time, the transient capacitor voltage cannot change abruptly, which is equivalent to a short circuit at the output. Therefore, the input spike current is particularly large. At this time, the current flowing through the PFC inductor is very large, so the energy stored in the inductor is very large. At the moment the MOSFET turns on, this stored energy will be released through the MOSFET. Therefore, the current flowing through the MOSFET is very large at this time. If it is not suppressed, the MOSFET will be damaged due to overcurrent. The principle is the same during the power-off process. Since the energy of the large electrolytic capacitor has been used to supply the load, and the input energy of the power grid is cut off due to the power-off, the energy stored in the PFC inductor must be released. At this time, the reverse peak current is also very large and must be suppressed. Therefore, it is necessary to propose a dual protection circuit for PFC fast power-on and power-off to suppress surge overshoot, so as to at least partially solve the problems existing in the prior art. Utility Model Content

[0003] To at least partially solve the above problems, this utility model provides a dual protection circuit for PFC fast power-on / off to suppress surge overshoot, comprising:

[0004] The system includes a protection unit 1 control circuit, protection unit 1, protection unit 2, protection unit 2 control circuit, auxiliary power supply circuit, IC main control module, APFC circuit, rectifier and filter circuit, and load terminal; IC main control module; IC main control module is connected to signal input terminal and APFC circuit; APFC circuit is connected to protection unit 1, protection unit 2 and IC main control module respectively; rectifier and filter circuit is connected to input port; protection unit 1 is connected to protection unit 1 control circuit, rectifier and filter circuit and APFC circuit; protection unit 2 is connected to protection unit 2 control circuit, APFC circuit and load terminal; APFC circuit is active power factor correction circuit; PFC fast ignition switching suppresses surge overshoot dual protection circuit, improving power supply stability.

[0005] Preferably, the protection unit 1 includes: an R229NTC thermistor, an R10NTC thermistor, a K202 module, and a D204 module; the R229NTC thermistor is connected in series with the R10NTC thermistor and then connected in parallel to pin 3 and pin 4 of the K202 module; pin 1 and pin 2 of the K202 module are connected in parallel to the D204 module.

[0006] Preferably, the protection unit 2 includes:

[0007] The components are: OT502-A optocoupler, Q307 transistor, Q308 transistor, resistors R8, R26, R27, R28, R12, R51, capacitor C3, and capacitor C322. The OT502-A optocoupler's pin 4 is connected in parallel to VCC-1 and resistor R28. The OT502-A optocoupler's pin 3 is connected to resistor R8. The Q307 transistor's pin 2D is connected in parallel to resistors R12 and R51. The Q307 transistor's pin G1 is connected in parallel to pin 3 of the Q308 transistor, capacitor C3, and resistor R27. The Q307 transistor's pin S3 is connected in parallel to pin 2 of the Q308 transistor. Resistor R8 is connected in series with resistor R26 and capacitor C322.

[0008] Preferably, the control circuit of protection unit 2 includes:

[0009] The system consists of an OT502-B optocoupler, a Q201 transistor, an U2 op-amp, resistors R247, R246, R245, and R189, diodes D207 and D208, capacitors C212 and C211. Pin 1 of the OT502-B optocoupler is connected to VCC-AUX via resistor R247. Pin 2 of the OT502-B optocoupler is connected to pin 2D of the Q201 transistor. Pin G1 of the Q201 transistor is connected in parallel to pin 4 of the U2 op-amp, the anode of diode D207, the cathode of diode D208, and resistor R246. Pin 2 of the U2 op-amp is grounded. Pin 1 of the U2 op-amp is connected in parallel to VCC-AUX and AC-OK. The +5V power supply, pin 3 of the U2 op-amp, resistor R245, capacitor C212, and the cathode of diode D207 are connected in parallel.

[0010] Preferably, the control circuit of protection unit 1 includes:

[0011] Q7 transistor, U7 three-terminal adjustable voltage regulator module, R70 resistor, R66 resistor, R22 resistor, D2 diode; pin 2 of Q7 transistor is connected in parallel to VCC1 and R66; pin 1 of U7 three-terminal adjustable voltage regulator module is connected in parallel to VREF2.5 and the negative terminal of D2 diode; pin 3 of U7 three-terminal adjustable voltage regulator module is grounded; pin 3 of Q7 transistor is connected in parallel to VCC2 and R22 resistor; pin 1 of Q7 transistor is connected in parallel to R70 resistor and R66 resistor; pin 2 of U7 three-terminal adjustable voltage regulator module is connected to R66 resistor and VCC1.

[0012] Preferably, the IC main control module includes:

[0013] The U1 control chip, capacitors C10, C24, C11, C7, C6, and C9, resistors R21, R30, R33, R68, R5, R9, R14, and R67; pin 1 of the U1 control chip is connected to resistors R30, R67, R68, R33, and capacitor C9; resistor R67 is connected in series with resistor R14, resistor R14 with resistor R9, and resistor R9 with one end of resistor R5. The other end of resistor R5 is connected to VPFC; pin 2 of control chip U1 is connected in parallel with capacitors C7 and C6; pin 3 of control chip U1 is the NC pin; pin 4 of control chip U1 is connected in parallel with resistor R30 and capacitor C11; pin 5 of control chip U1 is connected to ZCDA; pin 6 of control chip U1 is grounded; pin 7 of control chip U1 is connected to GDA; pin 8 of control chip U1 is connected to capacitors C10, C24 and VCC1 respectively; the PFC power loop circuit is controlled through control chip U1.

[0014] The beneficial effects of this utility model are:

[0015] This invention implements a dual protection circuit for PFC fast ignition switching and surge overshoot suppression, improving power supply stability; it features simple, reliable, and stable control to reduce standby power consumption; and it improves the PFC power factor correction topology by adding a delay control circuit and PFC shutdown discharge, thereby reducing the power supply's failure rate and enhancing its power quality. Attached Figure Description

[0016] The accompanying drawings are provided to further illustrate the present invention and form part of the specification. They are used together with the embodiments of the present invention to explain the present invention, but do not constitute a limitation thereof. In the drawings:

[0017] Figure 1 This is a diagram of an embodiment of the dual protection circuit structure for PFC fast power-on and power-off suppression of surge overshoot described in this utility model;

[0018] Figure 2 A diagram showing an embodiment of the dual protection circuit for PFC fast power-on and power-off suppression of surge overshoot described in this utility model.

[0019] Figure 3 This is a diagram of an embodiment of the protection circuit 1 of the dual protection circuit for PFC fast power-on and power-off suppression of surge overshoot described in this utility model.

[0020] Figure 4 This is a diagram of an embodiment of the dual protection circuit protection unit 1 and protection circuit 1 control circuit of the PFC fast power-on and power-off suppression surge overshoot described in this utility model.

[0021] Figure 5 This is a diagram of an embodiment of the dual protection circuit protection unit 2 for PFC fast power-on and power-off suppression of surge overshoot described in this utility model.

[0022] Figure 6 This is a diagram of an embodiment of the dual protection circuit protection unit 2 and protection circuit 2 control circuit of the PFC fast power-on and power-off suppression surge overshoot described in this utility model.

[0023] Figure 7 This is a diagram of an embodiment of the main control module of the PFC fast power-on and power-off dual protection circuit IC for suppressing surge overshoot described in this utility model.

[0024] Figure 8 This diagram shows an embodiment of the auxiliary power supply circuit for a dual protection circuit that suppresses surge overshoot during PFC fast power-on / off, as described in this utility model. Detailed Implementation

[0025] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0026] like Figures 1-2 As shown, this utility model provides a dual protection circuit for PFC fast power-on / off to suppress surge overshoot, including: a protection unit 1 control circuit, protection unit 1, protection unit 2, protection unit 2 control circuit, auxiliary power supply circuit, IC main control module, APFC circuit, rectifier and filter circuit, and load terminal; IC main control module; IC main control module is connected to the signal input terminal and APFC circuit; APFC circuit is connected to protection unit 1, protection unit 2, and IC main control module respectively; rectifier and filter circuit is connected to the input port; protection unit 1 is connected to the protection unit 1 control circuit, rectifier and filter circuit, and APFC circuit; protection unit 2 is connected to the protection unit 2 control circuit, APFC circuit, and load terminal; APFC circuit is an active power factor correction circuit; the dual protection circuit for PFC fast power-on / off to suppress surge overshoot improves power supply stability.

[0027] The principle and effect of the above technical solution are as follows: When VPFC discharges, the VPFC voltage drops, and the voltage of pin 1 of U7 AZ431 in (protection circuit 1 control circuit) drops to below 2.5V. When U7 is turned off, the VCC1 charge cannot be converted into VCC2 through Q7. At this time, the relay is not powered by VCC2, and the coil of the short-circuited NTC thermistor R229 and R10 will be disconnected.

[0028] At this time, due to the action of (protection circuit 2) and (protection circuit 2 control circuit), the potential of VCC2 is at a low level, and the relay cannot work; R229 and R10 of (protection circuit 1) achieve the function of limiting surge impact for fast power-on and power-off and input line ignition, and (protection circuit 2) releases the energy in the PFC inductor; thus achieving dual protection of PFC fast ignition power-on and power-off to suppress surge overshoot.

[0029] In one embodiment, the protection unit 1 includes: an R229NTC thermistor, an R10NTC thermistor, a K202 module, and a D204 module; the R229NTC thermistor is connected in series with the R10NTC thermistor and then connected in parallel to pin 3 and pin 4 of the K202 module; pin 1 and pin 2 of the K202 module are connected in parallel to the D204 module.

[0030] The principle and effect of the above technical solution are as follows: When the power supply is powered on, the input terminal LN is supplied with alternating positive and negative half-cycles of AC mains power. LN passes through MOV1, CX1 and LF101 to form an LC filter, forming an EMI circuit, and then enters the rectifier bridge BD101 through pins 2-3 for rectification. Pin 1 of BD1 is the positive potential of DC voltage, and pin 4 is the negative potential (negative terminal) of DC voltage;

[0031] The positive voltage at pin 1 of BD1 passes through two NTC thermistors R229 and R10 in series (protection circuit 1), then through L201 to HV+. After HV+, the voltage splits into two branches: [1] through D212 and D213 to the large electrolytic capacitor CE202 for filtering and charging; [2] through L202A-L202C, BC205, and D214 to the large electrolytic capacitor CE202 for filtering and charging; finally, it returns to pin 4 of BD101 from the negative terminal of the large electrolytic capacitor CE202, thus forming a power circuit (charging circuit).

[0032] At this time, the VPFC signal, which is the positive charge of the electrolytic CE202, flows through the auxiliary power source transformer T3 and waits for the DRAIN signal. At the same time, the VPFC also enters the auxiliary power source IC U3's pin 1 VCC through R2, R4, R6, R7 and R11 to provide power to IC U3. When IC U3 is working, PIN-2 of T3 is rectified by D16 and current limited by R91, and then splits into two branches. (1) Through D17, it continues to provide the energy charge required for IC U3 to work.

[0033] <2> After being filtered by C27, C44, and CE10, the signal enters a linear three-terminal regulator composed of Q11, R24, and D3. At this time, the power supply for signal VCC1 is provided by the three-terminal regulator (regardless of whether the PFC circuit is working), and VCC1 is always at a high level.

[0034] At the moment of power-on, the charge of the large electrolytic capacitor CE202 is zero. Simultaneously, the transient capacitor voltage cannot change abruptly, effectively creating an output short circuit. Therefore, resistors R229 and R10 play a crucial role in limiting inrush current, a significant factor in power loss. Traditional protection involves R229 and R10 tripping instantaneously upon power-on, regardless of whether the power supply has completed startup and reset. Relay K202, after reaching its relay on-threshold at VCC2, will quickly open, shorting R229 and R10 to reduce conduction losses in the power loop circuit and improve power efficiency.

[0035] In one embodiment, the protection unit 2 includes:

[0036] The components are: OT502-A optocoupler, Q307 transistor, Q308 transistor, resistors R8, R26, R27, R28, R12, R51, capacitor C3, and capacitor C322. The OT502-A optocoupler's pin 4 is connected in parallel to VCC-1 and resistor R28. The OT502-A optocoupler's pin 3 is connected to resistor R8. The Q307 transistor's pin 2D is connected in parallel to resistors R12 and R51. The Q307 transistor's pin G1 is connected in parallel to pin 3 of the Q308 transistor, capacitor C3, and resistor R27. The Q307 transistor's pin S3 is connected in parallel to pin 2 of the Q308 transistor. Resistor R8 is connected in series with resistor R26 and capacitor C322.

[0037] The principle and effect of the above technical solution are as follows: (Protection circuit 2) exists to address the issue that when some power supplies are turned off by the VPFC output under conditions such as fast power-on / off, arcing test of the input line, and poor contact of the input line, the charge energy of CE202 needs a certain amount of time to discharge (about 3-10 seconds). However, the VCC2 power supply of the relay has charge and cannot discharge in time, causing the relay coil to fail to disconnect. This results in the NTC resistor R229 and R10 being in a short circuit state. Repeated switching will cause the positive voltage of pin 1 of BD1 to bypass the NTC and directly charge the large electrolytic capacitor CE202 through the coil of pins 3 and 4 of the relay. At this time, the surge current cannot be effectively limited, which causes the L202PFC inductor, Q204 MOSFET, and D214 freewheeling diode power loop circuit to suffer from high voltage glitches and peak current switching, which can easily damage Q204 MOSFET and D214 freewheeling diode.

[0038] In one embodiment, the control circuit of the protection unit 2 includes:

[0039] The system consists of an OT502-B optocoupler, a Q201 transistor, an U2 op-amp, resistors R247, R246, R245, and R189, diodes D207 and D208, capacitors C212 and C211. Pin 1 of the OT502-B optocoupler is connected to VCC-AUX via resistor R247. Pin 2 of the OT502-B optocoupler is connected to pin 2D of the Q201 transistor. Pin G1 of the Q201 transistor is connected in parallel to pin 4 of the U2 op-amp, the anode of diode D207, the cathode of diode D208, and resistor R246. Pin 2 of the U2 op-amp is grounded. Pin 1 of the U2 op-amp is connected in parallel to VCC-AUX and AC-OK. The +5V power supply, pin 3 of the U2 op-amp, resistor R245, capacitor C212, and the cathode of diode D207 are connected in parallel.

[0040] The principle and effect of the above technical solution are as follows: When the power supply is working normally, regardless of whether the L1 signal or the N1 signal is in the positive half-cycle, the VAC signal will obtain a high level. The VAC signal is divided by R189 through R179, R180, R181, R182, and R182 in series, and then filtered by C65 to obtain the AC-OK signal, which enters pin 1 of the U2 op-amp LM321. Pin 3 of the LM321 is connected to a +5V signal. Comparing these two signals, the voltage of LM321-1 is higher than that of LM321-3. Therefore, pin 4 of the op-amp outputs a high voltage to the G1 stage of Q201, making Q201 conduct. VCC-AUX passes through R247 to the optocoupler OT502-B and the 2D and S3 stages of Q201 to GND1 ground. At this time, OT502-B conducts and emits light internally, making OT502-A conduct.

[0041] Under the control of the protection circuit 2, the optocoupler OT502-A will be turned on. VCC1 will pass through pin 4-3 of OT502-A, be divided by R8 and R26, and filtered by C322. At this time, the base pin 1 of Q308 is at a high level, and the transistor Q308 is in the on state. The point where resistor R28 and resistor R27 are connected to G1 of Q307 is pulled low to the negative terminal, and Q307 is in the off state.

[0042] In one embodiment, the control circuit of the protection unit 1 includes:

[0043] Q7 transistor, U7 three-terminal adjustable voltage regulator module, R70 resistor, R66 resistor, R22 resistor, D2 diode; pin 2 of Q7 transistor is connected in parallel to VCC1 and R66; pin 1 of U7 three-terminal adjustable voltage regulator module is connected in parallel to VREF2.5 and the negative terminal of D2 diode; pin 3 of U7 three-terminal adjustable voltage regulator module is grounded; pin 3 of Q7 transistor is connected in parallel to VCC2 and R22 resistor; pin 1 of Q7 transistor is connected in parallel to R70 resistor and R66 resistor; pin 2 of U7 three-terminal adjustable voltage regulator module is connected to R66 resistor and VCC1.

[0044] The principle and effect of the above technical solution are as follows: (The core of the protection circuit 1 control circuit) is to delay and convert VCC1 to VCC2! The VPFC signal is divided by R13, R1, R16 and R69, filtered by C15, and enters the reference stage of pin 1 of U7 AZ431 device. When the VREF2.5 value reaches 2.495V, pins 2 and 3 of U7 are turned on, and R70 and R66 form a voltage divider to ground! This makes the potential of pin 1 of Q7 less than the potential of pin 2 VCC1, so the transistor Q7 turns on and becomes a VCC2 charge pump. R22 and D2 are for VCC2 voltage hysteresis compensation; VPFC needs to reach a certain threshold before it can convert VCC1 voltage to VCC2! In other words, after the PFC power switching circuit is working normally and OK, when VPFC reaches near the set value, VCC2 is turned on, relay K202 is turned on, and NTC thermistor R229 and resistor R10 are shorted, thereby reducing the conduction loss generated by the NTC thermistor when the circuit is working; the relay is only turned on after the power supply is normal and stable.

[0045] In one embodiment, the IC main control module includes:

[0046] The U1 control chip, capacitors C10, C24, C11, C7, C6, and C9, resistors R21, R30, R33, R68, R5, R9, R14, and R67; pin 1 of the U1 control chip is connected to resistors R30, R67, R68, R33, and capacitor C9; resistor R67 is connected in series with resistor R14, resistor R14 with resistor R9, and resistor R9 with one end of resistor R5. The other end of resistor R5 is connected to VPFC; pin 2 of control chip U1 is connected in parallel with capacitors C7 and C6; pin 3 of control chip U1 is the NC pin; pin 4 of control chip U1 is connected in parallel with resistor R30 and capacitor C11; pin 5 of control chip U1 is connected to ZCDA; pin 6 of control chip U1 is grounded; pin 7 of control chip U1 is connected to GDA; pin 8 of control chip U1 is connected to capacitors C10, C24 and VCC1 respectively; the PFC power loop circuit is controlled through control chip U1.

[0047] The principle and effect of the above technical solution are as follows: the PFC power loop circuit is controlled by the U1 control chip; the PFC discharge circuit is controlled to protect the MOSFET and the PFC power loop; when the power is off, regardless of whether the L1 signal or the N1 signal is at 0 potential, the VAC signal is at a low potential, and the LM321-1 voltage is at a low potential; at this moment, the electrolytic discharge of CE202 takes time, the electrolytic + stage of CE202 is still at a high level, and the +5V signal at pin 3 of LM321 is still at a high level. Comparing these two signals, the voltage of LM321-1 is lower than the voltage of LM321-3, so the op-amp pin 4 outputs a low voltage to the G1 stage of Q201, making Q201 turn off, OT502-B not conduct, and thus OT502-A not conduct;

[0048] When OT502-A is not conducting, pin 1 of the base of Q308 is at a low potential. VCC1 is divided by R28 and R27 and then filtered by C3. R27 and pin G1 of Q307 are at a high level, causing Q307 to conduct and perform power-off discharge for VPFC. The dual protection circuits (protection circuit 1 control circuit) and (protection circuit 2 control circuit) realize fast ignition and power-on of PFC and suppress surge overshoot, improving the stability of the power supply. The control is simple, reliable, and stable, reducing standby power consumption. The PFC power factor correction topology technology is improved, and a delay control circuit and PFC power-off discharge are added to improve the failure rate of this power supply and improve its power quality.

[0049] This utility model only improves the hardware structure of the system. As for the methods and software programs involved in the operation of the system, those skilled in the art can design them themselves based on the principles and functions proposed in this utility model and in combination with existing technology. The technical solution proposed in this utility model does not improve any methods or software programs.

[0050] Obviously, those skilled in the art can make various modifications and variations to this utility model without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this utility model and their equivalents, this utility model also intends to include these modifications and variations.

Claims

1. A dual protection circuit for PFC fast power-on / off to suppress surge overshoot, characterized in that, include: Protection unit 1 control circuit, protection unit 1, protection unit 2, protection unit 2 control circuit, auxiliary power supply circuit, IC main control module, APFC circuit, rectifier and filter circuit and load terminal; IC main control module; The IC main control module is connected to the signal input terminal and the APFC circuit; the APFC circuit is connected to protection unit 1, protection unit 2 and the IC main control module respectively; the rectifier and filter circuit is connected to the input port; protection unit 1 is connected to the protection unit 1 control circuit, rectifier and filter circuit and APFC circuit. Protection unit 2 connects to the protection unit 2 control circuit, APFC circuit and load terminal; APFC circuit is an active power factor correction circuit; forming a dual protection circuit for PFC fast ignition switching and suppressing surge overshoot.

2. The dual protection circuit for PFC fast power-on / off suppression of surge overshoot as described in claim 1, characterized in that, Protection unit 1 includes: R229NTC thermistor, R10NTC thermistor, K202 module, and D204 module; R229NTC thermistor is connected in series with R10NTC thermistor and then connected in parallel to pin 3 and pin 4 of K202 module; pin 1 and pin 2 of K202 module are connected in parallel to D204 module.

3. The dual protection circuit for PFC fast power-on / off suppression of surge overshoot as described in claim 1, characterized in that, Protection unit 2 includes: The components are: OT502-A optocoupler, Q307 transistor, Q308 transistor, resistors R8, R26, R27, R28, R12, R51, capacitor C3, and capacitor C322. The OT502-A optocoupler's pin 4 is connected in parallel to VCC-1 and resistor R28. The OT502-A optocoupler's pin 3 is connected to resistor R8. The Q307 transistor's pin 2D is connected in parallel to resistors R12 and R51. The Q307 transistor's pin G1 is connected in parallel to pin 3 of the Q308 transistor, capacitor C3, and resistor R27. The Q307 transistor's pin S3 is connected in parallel to pin 2 of the Q308 transistor. Resistor R8 is connected in series with resistor R26 and capacitor C322.

4. The dual protection circuit for PFC fast power-on / off suppression of surge overshoot as described in claim 1, characterized in that, The control circuit of protection unit 2 includes: The system consists of an OT502-B optocoupler, a Q201 transistor, an U2 op-amp, resistors R247, R246, R245, and R189, diodes D207 and D208, capacitors C212 and C211. Pin 1 of the OT502-B optocoupler is connected to VCC-AUX via resistor R247. Pin 2 of the OT502-B optocoupler is connected to pin 2D of the Q201 transistor. Pin G1 of the Q201 transistor is connected in parallel to pin 4 of the U2 op-amp, the anode of diode D207, the cathode of diode D208, and resistor R246. Pin 2 of the U2 op-amp is grounded. Pin 1 of the U2 op-amp is connected in parallel to VCC-AUX and AC-OK. The +5V power supply, pin 3 of the U2 op-amp, resistor R245, capacitor C212, and the cathode of diode D207 are connected in parallel.

5. The dual protection circuit for PFC fast power-on / off suppression of surge overshoot as described in claim 1, characterized in that, The control circuit of protection unit 1 includes: Q7 transistor, U7 three-terminal adjustable voltage regulator module, R70 resistor, R66 resistor, R22 resistor, D2 diode; pin 2 of Q7 transistor is connected in parallel to VCC1 and R66; pin 1 of U7 three-terminal adjustable voltage regulator module is connected in parallel to VREF2.5 and the negative terminal of D2 diode; pin 3 of U7 three-terminal adjustable voltage regulator module is grounded; pin 3 of Q7 transistor is connected in parallel to VCC2 and R22 resistor; pin 1 of Q7 transistor is connected in parallel to R70 resistor and R66 resistor; pin 2 of U7 three-terminal adjustable voltage regulator module is connected to R66 resistor and VCC1.

6. The dual protection circuit for PFC fast power-on / off surge suppression according to claim 1, characterized in that, The IC main control module includes: a U1 control chip, capacitors C10, C24, C11, C7, C6, and C9, resistors R21, R30, R33, R68, R5, R9, R14, and R67; pin 1 of the U1 control chip connects to resistors R30, R67, R68, R33, and capacitor C9; resistors R67 and R14, R14 and R9, and R9 and R5 are connected in series. After the terminals are connected in series, the other end is connected to VPFC through resistor R5; pin 2 of U1 control chip is connected in parallel with capacitors C7 and C6; pin 3 of U1 control chip is the NC pin; pin 4 of U1 control chip is connected in parallel with resistor R30 and capacitor C11; pin 5 of U1 control chip is connected to ZCDA; pin 6 of U1 control chip is grounded; pin 7 of U1 control chip is connected to GDA; pin 8 of U1 control chip is connected to capacitors C10, C24 and VCC1 respectively; the PFC power loop circuit is controlled through U1 control chip.

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