Shock-resistant SJ MOSFET devices

By thickening the gate oxide layer and adding interconnect holes to optimize the structure of the SJ MOSFET device, the problem of weak shock resistance caused by the thin gate oxide layer is solved, and the reliability and on-resistance performance of the device are improved.

CN224306190UActive Publication Date: 2026-05-29HEFEI SIPU SEMICON TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
HEFEI SIPU SEMICON TECH CO LTD
Filing Date
2025-07-29
Publication Date
2026-05-29

AI Technical Summary

Technical Problem

Existing SJ MOSFET devices have weak shock resistance due to their thin gate oxide layer, which reduces the reliability of the devices.

Method used

By increasing the thickness of the gate bottom oxide layer to 2 to 4.5 times and setting multiple connection holes between the gate trenches, the gate trench structure is optimized to reduce junction capacitance and on-resistance, thereby improving the device's shock resistance and reliability.

Benefits of technology

The thickened gate bottom oxide layer improves the device's shock resistance, reduces junction capacitance, and the via configuration reduces on-resistance and improves current distribution uniformity, thereby enhancing device reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses an anti-impact SJ MOSFET device, include: epitaxial layer, epitaxial layer longitudinal is equipped with at least two first conductive type column and at least one second conductive type column, and first conductive type column and second conductive type column interval arrangement, at least two grid grooves, grid groove is located respectively on epitaxial layer and is located on first conductive type column upper portion correspondingly, and the bottom of grid groove is equipped with grid bottom oxide layer, and the sidewall of grid groove is equipped with grid side oxide layer, and the thickness of grid bottom oxide layer is greater than the thickness of grid side oxide layer, the utility model discloses an anti-impact SJ MOSFET device can reduce junction capacitance, promotes the anti-impact ability of device, and then promotes the reliability of device.
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