A power supply protection circuit

Abstract

The utility model relates to a power protection circuit, including power input, power output, power protection chip, the switch circuit for enabling or shutting down the power protection chip and the control module for controlling the switch circuit enables the power protection chip when the voltage normal of power input, controls the switch circuit and shuts down the power protection chip when the voltage abnormal of power input, power input connects the power supply end of power protection chip, the output of power protection chip connects power output, the switch circuit connects the enable end of power protection chip, the control signal output of control module connects the switch circuit, voltage abnormality includes overvoltage, under voltage and negative voltage. The utility model reduces the circuit complexity, and the cost is low, avoids the protection failure problem because of the composite abnormality, and the reliability of system under complex working condition is comprehensively promoted.

Description

Technical Field

[0001] This utility model belongs to the field of power supply protection technology, and in particular relates to a power supply protection circuit. Background Technology

[0002] With the rapid development of electronic information technology, various electronic devices such as smartphones, industrial control equipment, and new energy vehicles have been deeply integrated into production and daily life. Their operational stability and reliability have a direct impact on user experience, production safety, and equipment lifespan. As the "energy heart" of electronic devices, the performance of the power supply system has become one of the core factors determining the overall performance of the equipment. However, in practical applications, abnormal fluctuations in the power input voltage remain a key challenge restricting the reliability of power supply systems.

[0003] In complex electrical environments, the causes of abnormal power input voltage are diverse and complex: instantaneous fluctuations in grid voltage (such as surges caused by lightning strikes or load switching), sudden changes in equipment load (such as voltage drops caused by motor startup), user operational errors (such as reversed power supply polarity), and electromagnetic interference (such as conducted noise generated by high-frequency equipment) can all cause the input voltage to exceed the safe operating range of electronic equipment, resulting in abnormal states such as overvoltage (above the upper limit of the rated voltage), undervoltage (below the lower limit of the rated voltage), or even negative voltage (negative voltage with reversed polarity). If such abnormal voltages are not effectively protected, they will directly lead to the breakdown and damage of downstream precision electronic components (such as chips and capacitors), frequent system shutdowns due to unstable power supply, and even safety accidents such as equipment overheating and short circuits, seriously affecting the normal use of equipment.

[0004] Currently, most existing solutions are designed for only a single type of abnormality. For example, overvoltage protection is usually achieved through Zener diodes or transient voltage suppressors (TVS). The principle is to quickly conduct when the voltage exceeds the threshold, discharging excess energy to ground to limit the voltage peak. However, this solution can only deal with positive overvoltage scenarios and has no protection against undervoltage or negative voltage. Undervoltage protection relies on a voltage monitoring chip to detect the input voltage in real time. When the voltage is lower than the threshold, a control signal is triggered to cut off the input. However, such circuits cannot identify overvoltage or reverse voltage. Negative voltage protection (reverse connection protection) generally requires the addition of a reverse blocking circuit composed of diodes or MOSFETs, and has no protection against overvoltage or undervoltage.

[0005] It is evident that the existing design has significant flaws: on the one hand, in order to achieve overvoltage, undervoltage, and negative voltage protection, discrete modules need to be stacked, which greatly increases the circuit complexity and costs; on the other hand, each module is designed for only a single abnormal scenario, and its protection capability is insufficient when a compound abnormality occurs in actual application (such as the simultaneous occurrence of overvoltage and negative voltage). Utility Model Content

[0006] Based on this, a power protection circuit is provided to address the aforementioned technical problems.

[0007] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:

[0008] A power protection circuit, characterized in that it includes a power input terminal, a power output terminal, a power protection chip, a switching circuit for enabling or disabling the power protection chip, and a control module for controlling the switching circuit to enable the power protection chip when the voltage at the power input terminal is normal, and controlling the switching circuit to disabling the power protection chip when the voltage at the power input terminal is abnormal. The power input terminal is connected to the power supply terminal of the power protection chip, the output terminal of the power protection chip is connected to the power output terminal, the switching circuit is connected to the enable terminal of the power protection chip, and the control signal output terminal of the control module is connected to the switching circuit. The abnormal voltage includes overvoltage, undervoltage, and negative voltage.

[0009] This utility model discloses a power protection circuit. The control module can uniformly control the enabling or disabling of the power protection chip through a switching circuit. When the power supply voltage is abnormal (overvoltage, undervoltage, negative voltage), the control module directly shuts down the power protection chip through the switching circuit to ensure that the output voltage is within the safe operating range. It integrates multi-scenario protection functions into a single protection chip and control module, eliminating the need for additional discrete modules, reducing circuit complexity, and lowering costs. Furthermore, regardless of whether a single or combined voltage abnormality occurs, the power protection chip can be quickly shut down through the switching circuit, cutting off the connection between the abnormal input and the downstream electronic components, avoiding protection failure caused by combined abnormalities, and comprehensively improving the reliability of the system under complex operating conditions. Attached Figure Description

[0010] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments:

[0011] Figure 1 A schematic diagram of a power protection circuit provided in an embodiment of this application;

[0012] Figure 2 A schematic diagram of the upper part of a power protection circuit provided in an embodiment of this application;

[0013] Figure 3 This is a schematic diagram of the lower half of a power protection circuit provided in an embodiment of this application. Detailed Implementation

[0014] like Figure 1 As shown, this application embodiment provides a power protection circuit, including a power input terminal 11, a power output terminal 12, a power protection chip 13, a switching circuit 14, and a control module 15.

[0015] The power input terminal 11 is used to connect to an external power source and to the power supply terminal of the power protection chip 13, such as... Figure 2 As shown, in this embodiment, the power input terminal 11 includes EXT_VIN and VIN.

[0016] Power output terminal 12 is used to output power to subsequent electronic devices, such as... Figure 2 As shown, in this embodiment, the power output terminal 12 is represented by VOUT. The VOUT terminal is grounded through a series resistor R1 and a light-emitting diode D1. The resistor R1 is used to limit the current of D1 to prevent excessive current from damaging D1. D1 is the status light of the VOUT terminal, which is used to indicate whether there is an output at the VOUT terminal. The light being on indicates that there is an output.

[0017] like Figure 2 As shown, in this embodiment, the power protection chip 13 is represented by U1. Its power supply terminal VIN is connected to the power input terminal. A fuse FU1 is connected between EXT_V IN and U1 to provide overcurrent protection. The enable terminal SHDN is connected to the power input terminal via resistor R5. The UV (Under Voltage) terminal and the OV (Over Voltage) terminal are connected to the power input terminal VIN and one end of resistor RL3 via resistors RL1 and RL2, respectively. The other end of resistor RL3 is grounded, the GND terminal is grounded, the GATE terminal is grounded via capacitor C1, and the output terminal VOUT is connected to the power output terminal VOUT.

[0018] U1 has a voltage anomaly (undervoltage, overvoltage, and negative voltage) detection function, which can monitor the input voltage in real time. Its fault terminal FAULT is connected to the control module 15. When an anomaly is detected, the fault terminal FAULT outputs a signal to the control module 15. The power supply terminal VIN, UV terminal, and OV terminal are connected to the power input terminal VIN, so that U1 can detect negative voltage, undervoltage, and overvoltage.

[0019] Among them, resistor R5 is used to provide current limiting protection for the SHDN pin.

[0020] Resistor RL1 is the threshold current-limiting resistor at the UV terminal used to set the undervoltage protection threshold current-limiting resistor, and resistor RL2 is the threshold current-limiting resistor at the OV terminal used to set the overvoltage protection threshold current-limiting resistor.

[0021] Resistor RL3 is a current-limiting resistor and serves as a reference resistor for RL1 and RL2.

[0022] Capacitor C1 is used for filtering and suppressing high-frequency oscillations.

[0023] The switching circuit 14 is used to enable or disable the power protection chip 13 automatically or manually, and it is connected to the enable terminal of the power protection chip 13.

[0024] Specifically, such as Figure 3 As shown, in this embodiment, the switching circuit 14 includes an NMOS transistor Q3, a manual switch SW1, an NMOS transistor Q4, and an NMOS transistor Q5.

[0025] The gate of NMOS transistor Q3 is connected to pin 2 of manual switch SW1 via resistor R8, the source is grounded, and the drain is connected to the enable terminal SHDN of U1 via pins 1 and 2 of connector J1. Pin 1 of manual switch SW1 is connected to the power input terminal VIN via resistor R6. Pin 2 of manual switch SW1 is also grounded via resistor R10, and pins 3-5 are grounded.

[0026] Resistor R8 is the gate series resistor of NMOS transistor Q3. Its core function is to dampen the LC oscillation of the gate circuit and limit the current to protect the drive circuit while controlling the switching speed of the MOS transistor.

[0027] Resistor R6 is a current-limiting resistor for the power input terminal VIN to prevent damage to the manual switch SW1.

[0028] Resistor R10 is a gate pull-down resistor, used to ensure that the current can be released normally to the ground after the NMOS transistor Q3 is turned off, so as to ensure that the NMOS transistor Q3 is reliably turned off and prevent accidental conduction caused by gate floating.

[0029] The gate of NMOS transistor Q4 is connected to the power input terminal VIN via resistors R9 and R7. The drain of NMOS transistor Q5 is connected between resistors R9 and R7. The source of NMOS transistor Q4 is grounded. The drain is connected to the enable terminal SHDN of U1 via pins 3 and 2 of connector J1. The gate of NMOS transistor Q5 is connected to the control signal output terminal of control module 15 via resistor R11. The source is grounded. Resistor R12 and capacitor C2 are also connected between the gate and the source.

[0030] Resistor R9 is the gate series resistor of NMOS transistor Q4. Its core function is to dampen the LC oscillation of the gate circuit and limit the current to protect the drive circuit while controlling the switching speed of the MOS transistor.

[0031] Resistor R7 is a current-limiting resistor input at the power input terminal VIN to prevent damage to the load device.

[0032] Resistor R11 is the gate series resistor of NMOS transistor Q5. Its core function is to dampen the LC oscillation of the gate circuit and limit the current to protect the drive circuit while controlling the switching speed of the MOS transistor.

[0033] R12 is the gate pull-down resistor for NMOS transistor Q5. It is used to ensure that the current of NMOS transistor Q5 can be released normally to the ground after it is turned off, so as to ensure that NMOS transistor Q5 is reliably turned off and prevent accidental conduction caused by gate floating.

[0034] Capacitor C2 is used for filtering and suppressing high-frequency oscillations.

[0035] The manual switch SW1 can be a DIP switch. When its pin 2 outputs a high level, the NMOS transistor Q3 is turned on, grounding the enable terminal SHDN of U1. At this time, U1 is in the off state. When its pin 2 outputs a low level, the NMOS transistor Q3 is turned off. At this time, the enable terminal SHDN of U1 is at a high level under the action of the power input terminal VIN. Therefore, U1 is in the enabled state and can output voltage normally.

[0036] The switching on and off of NMOS transistor Q5 is controlled by the control signal from control module 15. Since the gate of NMOS transistor Q4 is connected to the power input terminal VIN, when NMOS transistor Q5 is off, NMOS transistor Q4 is always on, grounding the enable terminal SHDN of U1, and U1 is in the off state. When NMOS transistor Q5 is on, the gate of NMOS transistor Q4 is grounded and disconnected. At this time, the enable terminal SHDN of U1 is at a high level under the influence of the power input terminal VIN, so U1 is in the enabled state and can output voltage normally.

[0037] As can be seen, the switching circuit 14 can be controlled automatically or manually, realizing a dual-control redundancy design. The control mode can be selected by jumping the cap.

[0038] Among them, the threshold voltages of NMOS transistors Q3, Q4, and Q5 are less than or equal to 1.5V, which can shorten the abnormal cut-off response time to the microsecond level.

[0039] The control module 15 is an external control system, such as an MCU, used to control the switching circuit 14 to enable the power protection chip 13 when the voltage at the power input terminal 11 is normal, and to control the switching circuit 14 to turn off the power protection chip 13 when the voltage at the power input terminal 11 is abnormal. Its control signal output terminal is connected to the switching circuit 14. Abnormal voltage includes overvoltage, undervoltage, and negative voltage.

[0040] like Figure 2 and Figure 3 As shown, when the voltage is abnormal, the control module 15 makes the signal output from its control signal output terminal unable to meet the conduction condition of the NMOS transistor Q5, and U1 will be turned off. Conversely, when the voltage is normal, the control module 15 makes the signal output from its control signal output terminal meet the conduction condition of the NMOS transistor Q5, and U1 will be enabled. Thus, by controlling the on and off of the switching circuit 14, the output voltage of U1 is always kept within a safe range.

[0041] The control module 15 determines whether the voltage is abnormal based on the output signal of the fault terminal FAULT of U1. Alternatively, the control module 15 can be a sensor capable of detecting whether the voltage at the power input terminal 11 is abnormal. The sensor is wired to the gate of the NMOS transistor Q5. Furthermore, a sensor independent of the control module 15 (MCU) can be configured, with the sensor connected to the control module 15 via wired / wireless connection.

[0042] The sensor can be a single sensor or a combination of multiple sensors to detect whether the voltage is abnormal. For example, a single voltage sensor can be used, connected to the power input terminal 11 and the power output terminal 12, to detect whether the voltage is abnormal by measuring the potential difference.

[0043] As can be seen from the above, the power protection circuit provided in this application embodiment allows the control module to uniformly control the enabling or disabling of the power protection chip through a switching circuit. When the power supply voltage is abnormal (overvoltage, undervoltage, negative voltage), the control module directly shuts down the power protection chip through the switching circuit, ensuring that the output voltage is within the safe operating range. This integrates multi-scenario protection functions into a single protection chip and control module, eliminating the need for additional discrete modules, reducing circuit complexity, and lowering costs. Furthermore, regardless of whether a single or compound voltage abnormality occurs, the power protection chip can be quickly shut down through the switching circuit, cutting off the connection between the abnormal input and the back-end electronic components, avoiding protection failure caused by compound abnormalities, and comprehensively improving the reliability of the system under complex operating conditions.

[0044] Meanwhile, the threshold voltage of the NMOS transistors used is less than or equal to 1.5V, which can shorten the abnormal cut-off response time to the microsecond level.

[0045] In addition, the dual control redundancy design, with both manual and automatic control modes, enhances the system's fault tolerance and allows for rapid intervention in emergencies or system failures.

[0046] However, those skilled in the art should recognize that the above embodiments are only used to illustrate the present utility model and are not intended to limit the present utility model. Any changes or modifications to the above embodiments within the scope of the essential spirit of the present utility model will fall within the scope of the claims of the present utility model.

Claims

1. A power supply protection circuit, characterized in that, The device includes a power input terminal, a power output terminal, a power protection chip, a switching circuit for enabling or disabling the power protection chip, and a control module for controlling the switching circuit to enable the power protection chip when the voltage at the power input terminal is normal and controlling the switching circuit to disabling the power protection chip when the voltage at the power input terminal is abnormal. The power input terminal is connected to the power supply terminal of the power protection chip, the output terminal of the power protection chip is connected to the power output terminal, the switching circuit is connected to the enable terminal of the power protection chip, and the control signal output terminal of the control module is connected to the switching circuit. The abnormal voltage includes overvoltage, undervoltage, and negative voltage.

2. The power protection circuit according to claim 1, characterized in that, The power input terminal is connected to the power supply terminal of the power protection chip via a fuse.

3. The power protection circuit according to claim 1, characterized in that, The switching circuit has the function of manually enabling or disabling the power protection chip.

4. A power protection circuit according to claim 3, characterized in that, The switching circuit includes NMOS transistors Q4 and Q5. The gate of NMOS transistor Q4 is connected to the power input terminal and the drain of NMOS transistor Q5. The source of NMOS transistor Q4 is grounded, and the drain is connected to the enable terminal of the power protection chip, which is also connected to the power input terminal. The gate of NMOS transistor Q5 is connected to the control signal output terminal of the control module, and the source is grounded.

5. A power protection circuit according to claim 4, characterized in that, The switching circuit also includes an NMOS transistor Q3 and a manual switch. The gate of the NMOS transistor Q3 is connected to the manual switch, the source is grounded, and the drain is connected to the enable terminal of the power protection chip.

6. A power protection circuit according to claim 5, characterized in that, The threshold voltages of the NMOS transistors Q3, Q4, and Q5 are less than or equal to 1.5V.

7. A power supply protection circuit according to any one of claims 1-6, characterized in that, The power protection chip has overvoltage, undervoltage and negative voltage detection functions, and its fault terminal is connected to the control module.

8. A power supply protection circuit according to any one of claims 4-6, characterized in that, The control module is a sensor that can detect whether the voltage at the power input terminal is abnormal, and the sensor is wired to the gate of the NMOS transistor Q5.

9. A power supply protection circuit according to any one of claims 1-6, characterized in that, It also includes a sensor that can detect whether the voltage at the power input terminal is abnormal, and the sensor is connected to the control module by wire or wireless means.

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