Low-loss high-side active diode

Abstract

The utility model discloses a kind of low-loss high-end active diode, including active diode and charge pump, the active diode and charge pump constitute circuit, the active diode is composed of comparator and main tube, the main tube is NMOS tube or PMOS tube, the charge pump is used to boost drive NMOS tube or PMOS tube.The utility model has prevent the function of backflow, can protect front-stage circuit;With lower loss, static current loss is small;Use active diode and charge pump, circuit is simple, cost is very low, and practicality is strong.

Description

Technical Field

[0001] This utility model relates to the field of diode technology, specifically to a low-loss high-end active diode. Background Technology

[0002] Diodes are increasingly used due to their unidirectional conduction characteristics and reverse current prevention capabilities. Schottky diodes, in particular, are gaining popularity among designers because they exhibit a smaller voltage drop when connected in series with a power supply. However, since the forward voltage drop of a Schottky diode is still greater than that of a MOSFET, MOSFETs with lower impedance characteristics are preferred for voltage-sensitive circuits to improve product reliability.

[0003] Currently, oring circuits are used in many applications to ensure that each individual power supply is independent and that there is no backflow. They are most commonly used in current sharing circuits to meet different power requirements. Therefore, a low-loss high-end ideal diode or an ultra-low-loss ideal diode is needed to further reduce voltage drop and have backflow prevention and front-end protection functions to minimize losses and extend battery operating time. To this end, we propose a low-loss high-end active diode to solve the above problems. Utility Model Content

[0004] The purpose of this invention is to provide a low-loss high-end active diode to solve the problems mentioned in the background art.

[0005] To achieve the above objectives, this utility model provides the following technical solution: a low-loss high-end active diode, comprising an active diode and a charge pump, wherein the active diode and the charge pump constitute a circuit, the active diode is composed of a comparator and a main transistor, the main transistor is an NMOS transistor or a PMOS transistor, and the charge pump is used to boost the NMOS transistor or PMOS transistor.

[0006] Preferably, the active diode controls the conduction and cutoff of the main NMOS or PMOS transistor of the active diode by comparing the magnitude of the input power supply VCC and the output power supply Vout through a comparator.

[0007] Preferably, when the active diode is an NMOS transistor: the two pins of resistor R1 are connected to the source of the NMOS transistor V1 and the non-inverting input of the comparator, respectively; the two pins of resistor R2 are connected to the drain of the NMOS transistor V1 and the inverting input of the comparator, respectively; the inverting input of the comparator is connected to the drain of the NMOS transistor V1 via resistor R2 and one pin of the load RL; the positive power supply pin of the comparator is connected to the charge pump output VCP and one pin of resistor R3; the output of the comparator is connected to the gate of the NMOS transistor V1 and the other pin of resistor R3. That is, the output of the comparator is an open-drain output and requires an external pull-up resistor R3.

[0008] Preferably, when the active diode is a PMOS transistor: the two pins of resistor R1 are connected to the drain power supply VCC of the PMOS transistor V1 and the inverting input of the comparator, respectively; the two pins of resistor R2 are connected to the source of the PMOS transistor V1 and the non-inverting input of the comparator, respectively; the negative power supply of the comparator is grounded; one pin of the load RL is connected to the source of the PMOS transistor V1; the positive power supply pin of the comparator is simultaneously connected to the charge pump output VCP and one pin of resistor R3; the output of the comparator is connected to the gate of the PMOS transistor V1 and the other pin of resistor R3. That is, the output of the comparator is an open-drain output and requires an external pull-up resistor R3.

[0009] Preferably, the comparator is a Schmitt trigger.

[0010] Compared with the prior art, the beneficial effects of this utility model are: compared with the milliampere level of current loss controlled by traditional power diodes or transistors, this utility model has low static current loss and no reverse current; the circuit has a reverse current prevention function, which can protect the front-end circuit; it has low loss and low static current loss; using active diodes and charge pumps, the circuit is simple, the cost is very low, and it is highly practical. Attached Figure Description

[0011] Figure 1 This is a block diagram of the principle of a low-loss high-side active diode with an NMOS transistor as the main component.

[0012] Figure 2 This is a block diagram of the principle of a low-loss high-end active diode with a PMOS transistor as the main component.

[0013] Figure 3 yes Figure 1 Forward conduction simulation;

[0014] Figure 4 yes Figure 1 Reverse cutoff simulation;

[0015] Figure 5 yes Figure 2 Forward conduction simulation;

[0016] Figure 6 yes Figure 2 Reverse cutoff simulation. Detailed Implementation

[0017] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model. Example 1

[0018] Reference Figure 1-6 This is the first embodiment of the present invention. This embodiment provides a low-loss high-end active diode, including an active diode and a charge pump. The active diode and the charge pump constitute a circuit. The active diode is composed of a comparator and a main transistor. The main transistor is an NMOS transistor or a PMOS transistor.

[0019] When the active diode is an NMOS transistor: the two pins of resistor R1 are connected to the source of the NMOS transistor V1 and the non-inverting input of the comparator, respectively; the two pins of resistor R2 are connected to the drain of the NMOS transistor V1 and the inverting input of the comparator, respectively; the inverting input of the comparator is connected to the drain of the NMOS transistor V1 through resistor R2 and one pin of the load RL; the positive power supply pin of the comparator is connected to the charge pump output VCP and one pin of resistor R3; the output of the comparator is connected to the gate of the NMOS transistor V1 and the other pin of resistor R3. That is, the output of the comparator is an open-drain output and requires an external pull-up resistor R3.

[0020] When the active diode is a PMOS transistor: the two pins of resistor R1 are connected to the drain power supply VCC of the PMOS transistor V1 and the inverting input of the comparator, respectively. The two pins of resistor R2 are connected to the source of the PMOS transistor V1 and the non-inverting input of the comparator, respectively. The negative power supply of the comparator is grounded. One pin of the load RL is connected to the source of the PMOS transistor V1. The positive power supply pin of the comparator is connected to both the charge pump output VCP and one pin of resistor R3. The output of the comparator is connected to the gate of the PMOS transistor V1 and the other pin of resistor R3. That is, the output of the comparator is an open-drain output and requires an external pull-up resistor R3.

[0021] Charge pumps are used to boost drive NMOS or PMOS transistors: Since the source of an NMOS transistor is connected to the positive terminal of the power supply, the control circuitry requires a ground-referenced boost charge pump to generate a gate voltage (turn-on threshold voltage) higher than the source voltage. The charge pump typically operates continuously to maintain the boost voltage required to drive the NMOS transistor.

[0022] A charge pump uses switching elements to control the voltage connected to a capacitor. It can be used in conjunction with a two-stage cycle to generate a higher pulse voltage output from a lower input voltage. In the first stage of the cycle, the capacitor is connected to the power supply and thus charged to the same voltage. During this first stage, the circuit configuration is adjusted so that the capacitor and the power supply voltage are connected in series. Ignoring leakage current effects and assuming no load, the output voltage is twice the input voltage (the original power supply voltage plus the voltage across the capacitor). The pulse characteristic of the higher output voltage can be filtered using an output filter capacitor.

[0023] The charge pump circuit incorporates an oscillator and requires a "fast" capacitor, increasing design complexity and silicon area, thus offsetting the silicon shrinkage advantage of NMOS transistors due to their lower on-resistance. When the load current is relatively small, the increase in silicon area due to the charge pump is greater than the area that can be reduced by the on-resistance. For NMOS transistor load switches, the cost and design complexity are higher than those of PMOS transistor load switches, making it not worthwhile. However, when the load current is very large, NMOS transistor load switches are a good solution.

[0024] The power supply voltage must satisfy: Charge pump output voltage VCP > VCC + V TN V TN This is the turn-on threshold voltage of the NMOS transistor; otherwise, the NMOS transistor cannot be turned on.

[0025] Specifically, the active diode compares the input power supply VCC with the output power supply Vout using a comparator, and then determines whether the NMOS main control of the active diode is on or off. This prevents the output power supply from flowing back into the input power supply, protecting the pre-amplifier circuit. Specifically, when the input voltage VCC is not less than the output voltage Vout, the comparator output level is VCP (>Vout+V). TN When the input voltage VCC is less than the output voltage Vout, the comparator output level is approximately 0V, and the NMOS transistor V1 is turned off, preventing the Vout current from flowing back into VCC and protecting the VCC power supply pre-amplifier circuit.

[0026] The comparator is a Schmitt trigger, exhibiting priority hysteresis loop propagation. The threshold voltage of this type of comparator changes rapidly with the output voltage, improving its noise immunity. Hysteresis comparators possess hysteresis characteristics, i.e., inertia, thus providing a certain degree of noise immunity; however, the stronger the noise immunity, the lower the sensitivity. A hysteresis comparator circuit has two threshold voltages: VT1, which causes a jump in the output voltage Vout as the input voltage VCC gradually increases; and VT2, which causes a jump in the output voltage Vout as the input voltage VCC gradually decreases. VT1 ≠ VT2, hence the hysteresis characteristic. Similar to a single-threshold comparator, when the input voltage changes in one direction, the output voltage Vout jumps only once.

[0027] NMOS transistor V1 can be used with NMOS transistors of different on-current values. For high-power power supply control, the on-resistance R between the drain and source of the NMOS transistor can be selected. DS(ON) A power transistor device with a voltage drop of several milliohms and a large current carrying capacity has a small forward voltage drop when carrying a large current, that is, it has a very low forward voltage and can be approximated as an ideal diode. Example 2

[0028] Reference Figure 1-6 This is the second embodiment of the present invention, which differs from the first embodiment in that the circuit of the first embodiment... Figure 1 Based on this, a PMOS transistor is used to replace the NMOS transistor V1. The connections of the non-inverting input and inverting input of the comparator are different, such as... Figure 2 As shown, the rest remain unchanged.

[0029] When the active diode is a PMOS transistor: the two pins of resistor R1 are connected to the drain power supply VCC of the PMOS transistor V1 and the inverting input of the comparator, respectively. The two pins of resistor R2 are connected to the source of the PMOS transistor V1 and the non-inverting input of the comparator, respectively. The negative power supply of the comparator is grounded. One pin of the load RL is connected to the source of the PMOS transistor V1. The positive power supply pin of the comparator is connected to both the charge pump output VCP and one pin of resistor R3. The output of the comparator is connected to the gate of the PMOS transistor V1 and the other pin of resistor R3. That is, the output of the comparator is an open-drain output and requires an external pull-up resistor R3.

[0030] The active diode compares the input power supply VCC with the output power supply Vout using a comparator to determine the conduction and cutoff of the PMOS transistor V1. This prevents backflow from the output power supply to the input power supply, protecting the pre-amplifier circuitry. Specifically: when the input voltage VCC is not less than the output voltage Vout, the comparator outputs a low level (approximately 0V), and the PMOS transistor V1 is turned on; conversely, when the input voltage VCC is less than the output voltage Vout, the comparator output level is approximately VCP (VCP > Vout + V). TP When the PMOS transistor V1 is turned off, it prevents the Vout current from flowing back into VCC, thus protecting the VCC power supply pre-amplifier circuit.

[0031] The power supply voltage satisfies: charge pump output voltage VCP > Vout + V TP Conversely, when Vout > VCP - V TP When the op-amp output is 0V, the PMOS master V1 is turned on, and Vout will charge VCC.

[0032] according to Figure 1 , Figure 2 The circuit schematic was simulated and tested using National Instruments' Multisim simulation software (version V14.0). The comparator selected was an LMC7211AIM5, a rail-to-rail operational amplifier, with a push-pull amplification output stage to achieve approximately full swing. The PMOS transistor was selected from ON Semiconductor, model NVTFS5124PLTAG, with a minimum turn-on threshold voltage of V0. TP(MIN) =-1.5V, maximum value V TP(MAX) =-2.5V, typical value V not given. TPThe conduction current can reach -6A, and the conduction impedance R DS(ON) =0.26Ω(V GS =-10V), R DS(ON) =0.38Ω (V GS =-4.5V). The NMOS transistor used is from NXP, model BSP030, with a minimum turn-on threshold voltage of V. TN(MIN) =1V, maximum value V TN(MAX) =2.8V, typical value V not given. TN The conduction current reaches 10A, and the conduction impedance R DS(ON) =30mΩ (V) GS =10V), R DS(ON) =50mΩ (V) GS =4.5V). Load resistance RL=10Ω, specific simulation test results are as follows;

[0033] Simulation of Implementation Method 1:

[0034] Simulation of a low-loss high-side active diode consisting of an NMOS transistor.

[0035] DC Power Supply Forward Conduction Simulation Test: For ease of simulation, the charge pump output voltage VCP is replaced by a DC power supply, such as VCP=20V, VCC (VCC1)=12V (switch J1 closed). During forward conduction, the NMOS transistor V1 output voltage Vout=12.0V (measured at 11.974V using a digital multimeter in voltage mode). The comparator output level is (VCP=20V). The forward voltage drop of the NMOS transistor V1 is 12V-11.974V=0.026V=26mV, which is much lower than the diode's forward voltage drop Vout. F =0.6V, the positive output current of the power supply is 11.974V / 10Ω = 1.1974A ≈ 1.2A, corresponding to the drain-source path on-resistance R. DS(ON) =26mV / 1.17A=22.22mΩ, which is not much different from the datasheet data; the current loss of the active diode (not considering the charge pump circuit) is about 10.1μA (probe PR10), and the loss of comparator U1 is P=20V×10.1μA=0.20mW, as detailed below. Figure 3 As shown.

[0036] DC power supply reverse cutoff simulation test: After switch J1 is closed, switch J2 is also closed, i.e., Vout(VCC2) = 13V > VCC(VCC1) = 12V. The comparator output level is 80.6mV (probe PR1). NMOS transistor V1 is cut off. The reverse current through NMOS transistor V1 is approximately 472pA (probe PR6), and the reverse current flowing into VCC1 is approximately 0μA (probe PR5), which can be ignored. It can be considered that no reverse current occurs. The current loss of the active diode (not considering the charge pump circuit) is approximately 10.1μA (probe PR10). The loss of comparator U1 is P = 20V × 10.1μA = 0.20mW. (Details are as follows...) Figure 4 As shown.

[0037] Simulation of Implementation Method Two:

[0038] Simulation of forward conduction of a low-loss high-side active diode composed of a PMOS transistor.

[0039] DC Power Supply Forward Conduction Simulation Test: For ease of simulation, the charge pump output voltage VCP is replaced with a DC power supply, such as VCP=20V, VCC (VCC1)=12V (switch J1 closed). During forward conduction, the PMOS transistor V1 output voltage Vout=11.7V (measured at 11.697V using a digital multimeter in voltage mode), the comparator output low level is 144mV (probe PR1), and the PMOS transistor V1 forward voltage drop is 12V-11.697V=0.303V, which is lower than the diode forward voltage drop V0. F =0.6V, the positive output current of the power supply is 11.697V / 10Ω=1.17A, corresponding to the drain-source path on-resistance R. DS(ON) =0.303V / 1.17A=25.6mΩ, which is not much different from the datasheet data; the current loss of the active diode (not considering the charge pump circuit) is about 209μA (probe PR13), and the loss of comparator U1 is P=20V×209μA=4.18mW, as detailed below. Figure 5 As shown.

[0040] Under the same conditions, the forward voltage drop of the PMOS transistor as the main control diode in the high-side active diode is 0.3V, which is suitable for applications with low operating current; while the forward voltage drop of the NMOS transistor as the main control diode is only 0.026V, which is suitable for applications with high operating current, thus proving that the NMOS transistor has extremely low on-resistance as the main control diode.

[0041] DC power supply reverse cutoff simulation test: After switch J1 is closed, switch J2 is also closed, that is, Vout(VCC2) = 13V > VCC(VCC1) = 12V, the comparator output level is (VCP = 20.0V), VCP - Vout > V TPWhen PMOS transistor V1 is cut off, the reverse current through V1 is approximately 17.2 nA (probe PR6), and the reverse current flowing into VCC1 is approximately 0 μA (the difference between probes PR11 and PR12), which can be ignored, and it can be considered that no reverse current occurs. The current loss of the active diode (ignoring the charge pump circuit) is approximately 10.2 μA (probe PR13), and the loss of comparator U1 is P = 20V × 10.2 μA = 0.204 mW, as detailed below. Figure 6 As shown.

[0042] With a digital multimeter connected in series with VCC1 in current mode, the current at different voltages on VCC2 is measured as shown below:

[0043] VCC2 = VCC1 + 2V = 14V, so the current flowing back to VCC1 is 33.9nA and the leakage current through PMOS transistor V1 is 33.9nA.

[0044] VCC2 = VCC1 + 5V = 17V, so the current flowing back to VCC1 is 83.8nA and the leakage current through PMOS transistor V1 is 83.9nA.

[0045] VCC2 = VCC1 + 10V = 22V, so there is a backflow current of 167nA to VCC1 and a leakage current of 167nA through PMOS transistor V1.

[0046] Under the same conditions, the main component of the high-side active diode, the PMOS transistor, can tolerate a smaller reverse voltage Vout(VCC2), satisfying VCC2+V TP A voltage less than VCP is sufficient and is suitable for applications with low reverse voltage; while an NMOS transistor is suitable for applications with high reverse voltage.

[0047] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A low-loss high-end active diode, comprising an active diode and a charge pump, characterized in that: The active diode and charge pump constitute a circuit. The active diode consists of a comparator and a main transistor. The main transistor is an NMOS or PMOS transistor. The charge pump is used to boost the NMOS or PMOS transistor.

2. The low-loss high-side active diode according to claim 1, characterized in that: The active diode controls the conduction and cutoff of the main NMOS or PMOS transistor by comparing the input power supply VCC with the output power supply Vout through a comparator.

3. The low-loss high-side active diode according to claim 1, characterized in that: When the active diode is an NMOS transistor: the two pins of resistor R1 are connected to the source of the NMOS transistor V1 and the non-inverting input of the comparator, respectively; the two pins of resistor R2 are connected to the drain of the NMOS transistor V1 and the inverting input of the comparator, respectively; the inverting input of the comparator is connected to the drain of the NMOS transistor V1 via resistor R2 and one pin of the load RL; the positive power supply pin of the comparator is connected to the charge pump output VCP and one pin of resistor R3; the output of the comparator is connected to the gate of the NMOS transistor V1 and the other pin of resistor R3. That is, the output of the comparator is an open-drain output and requires an external pull-up resistor R3.

4. The low-loss high-side active diode according to claim 1, characterized in that: When the active diode is a PMOS transistor: the two pins of resistor R1 are connected to the drain power supply VCC of the PMOS transistor V1 and the inverting input of the comparator, respectively; the two pins of resistor R2 are connected to the source of the PMOS transistor V1 and the non-inverting input of the comparator, respectively; the negative power supply of the comparator is grounded; one pin of the load RL is connected to the source of the PMOS transistor V1; the positive power supply pin of the comparator is connected to both the charge pump output VCP and one pin of resistor R3; the output of the comparator is connected to the gate of the PMOS transistor V1 and the other pin of resistor R3. That is, the output of the comparator is an open-drain output and requires an external pull-up resistor R3.

5. A low-loss high-side active diode according to claim 1, characterized in that: The comparator is a Schmitt trigger.

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