A novel BMS activation circuit

Abstract

The application provides a novel BMS activation circuit, wherein the activation circuit comprises a battery protection circuit and a voltage comparison circuit. The MOS tube Q1 added by the battery protection circuit enables the circuit to have an activation signal input to the analog front end only at the moment when the charger is connected, and the Q1 is disconnected after the capacitor C1 is fully charged. The triode Q2 added by the voltage comparison circuit realizes comparison between the charger voltage and the battery voltage, and ensures that the battery can be activated only when the charger voltage is higher than the battery voltage by a certain value. The circuit provided by the application has the charger discrimination function, can be powered off when the charger is connected, has no risk of battery consumption, can ensure that the battery can be activated when the battery is powered off, and has the characteristics of being powered off when the charger is connected and having no long-time uncontrollable charging current.

Description

Technical Field

[0001] This application belongs to the field of battery protection technology, and in particular relates to a novel BMS activation circuit. Background Technology

[0002] In lithium-ion battery-powered systems, activation using charger voltage is a common method. This is because when the battery shuts down due to low charge, the connected charger first activates the battery, and then the battery decides whether to open or close the charging channel based on whether charging conditions are met. This method is generally followed in lithium-ion battery BMS design.

[0003] The lithium battery MCU's operating power is supplied by an analog front-end, and activating the battery actually activates the analog front-end. This presents three problems: 1. This front-end cannot be turned off while plugged in with a charger, but if the battery fails to charge due to a malfunction or unsuitable charging conditions, it will continuously drain its own power, eventually leading to battery failure. 2. To prevent accidental activation by an incorrect charger, the activation circuit can compare the charger and battery cell voltages; only when the charger voltage is higher than the battery cell voltage can the activation signal pass through. 3. The incorrect charger detection circuit also results in a small current flowing from the charger to the battery cell. Although the current is small, given enough time, it can cause overcharging and overvoltage of the battery cell, and unexpected leakage current does not meet design requirements. Utility Model Content

[0004] To address the shortcomings of the existing technology, this application provides a novel BMS activation circuit that improves upon the existing BMS analog front-end activation circuit by adding a battery protection circuit and a voltage comparison circuit.

[0005] To achieve the above objectives, this application provides a novel BMS activation circuit, the circuit comprising:

[0006] The output terminal and the positive terminal of the charger are connected to the battery pack, wherein the output terminal and the positive terminal of the charger are the same port;

[0007] An activation circuit, one end of which is connected to the output terminal and the positive terminal of the charger, and the other end of which is connected to the activation pin of the analog-to-digital front-end (AFE).

[0008] The activation circuit includes a battery protection circuit and a voltage comparison circuit.

[0009] Preferably, the battery protection circuit includes:

[0010] MOSFET Q1, capacitor C1, resistor R1, resistor R2 and resistor R4;

[0011] The gate of the MOSFET Q1 is connected in series with resistors R2 and R4 and then grounded.

[0012] The source (S) terminal of the MOSFET Q1 is connected to the output terminal and the positive terminal of the charger;

[0013] The drain of the MOS transistor Q1 is connected to the voltage comparator circuit.

[0014] The battery protection circuit further includes:

[0015] The resistor R2 is connected in parallel with the capacitor C1.

[0016] Furthermore, the battery protection circuit also includes:

[0017] One end of the resistor R1 is connected to the source (S) terminal of the MOSFET Q1, and the other end is connected to the capacitor C1.

[0018] Preferably, the voltage comparison circuit includes:

[0019] Transistor Q2 and resistor R3;

[0020] The emitter (e) of transistor Q2 is connected to the drain (d) of MOSFET Q1;

[0021] The base of transistor Q2 is connected to resistor R3;

[0022] The collector (c) of transistor Q2 is connected to the activation pin of the analog-to-digital front-end (AFE).

[0023] The voltage comparison circuit further includes:

[0024] The other end of the resistor R3 is connected to the positive terminal of the battery for charging.

[0025] Furthermore, the voltage comparison circuit further includes:

[0026] When the voltage at the positive terminal of the charger is at least 0.7V higher than the voltage at the positive terminal of the battery, current flows from the emitter to the collector of the transistor Q2, entering the analog-to-digital front-end (AFE) to activate the battery.

[0027] Furthermore, the voltage comparison circuit further includes:

[0028] A resistor R5 and a diode Z1 are also connected between the collector of the transistor Q2 and the activation pin of the analog-to-digital front-end (AFE).

[0029] Preferably, the circuit further includes:

[0030] The Bn pin of the analog-to-digital front-end (AFE) is connected to the battery pack.

[0031] Preferably, the circuit further includes:

[0032] The analog-to-digital front-end (AFE) is also connected to the MCU.

[0033] This application proposes a novel BMS activation circuit. First, a capacitor charging delay is used to control the on / off state of the signal MOSFET, so that the activation signal and uncontrollable charging disappear after a certain period of time. After the charging signal passes through the aforementioned MOSFET, a PNP transistor is used. The Vbe conduction condition of the transistor is utilized to identify the charger, avoid activation by incorrect or faulty chargers, and ensure battery safety and normal charging process.

[0034] Compared with the prior art, the advantages of this application are as follows:

[0035] 1. It has a charger identification function.

[0036] 2. The device can be turned off even when the charger is connected, eliminating the risk of battery drain.

[0037] 3. No uncontrolled charging of the battery pack. Attached Figure Description

[0038] Figure 1 This is a schematic diagram of a novel BMS activation circuit in one embodiment of this application.

[0039] Figure 2 This is a battery protection circuit diagram in one embodiment of this application.

[0040] Figure 3 This is a voltage comparison circuit diagram in one embodiment of this application. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions will be clearly and completely described below in conjunction with the embodiments of this application. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0042] Example 1:

[0043] As attached Figure 1-3 As shown, in order to solve the above-mentioned technical problems, this application provides a novel BMS activation circuit. This application sets up a BMS scheme with the same charging and discharging port. In the figure, the upper right network P+ / C+ is the output and the positive terminal of the charger, and the lower left WKUP is the signal connected to the analog front-end activation pin.

[0044] Most BMS solutions on the market that use an analog front-end + MCU design directly connect P+ / C+ to the activation pin of the analog front-end. When the battery is powered off due to over-discharge, a voltage is input to the activation pin (WKUP) of the analog front-end when the charger is connected, thus activating the battery pack in the powered-off state. This application adds a transistor Q2, which compares the charger voltage and the battery voltage. The battery is only activated when the charger voltage is at least 0.7V higher than the battery voltage. This achieves charger identification, preventing the battery from being activated by a faulty or non-original charger.

[0045] Even with the addition of a transistor Q2, a small current (in the microampere range) still flows through the base resistor R3 of Q2 to charge the battery as long as the charger is connected. If a high-voltage charger is incorrectly connected, there is a risk of severe battery overvoltage over time. This application addresses this issue by adding a MOSFET Q1, ensuring that the circuit only receives an activation signal to the analog front-end momentarily upon charger connection, and Q1 disconnects once capacitor C1 is fully charged. This operation allows the battery to be powered off even when the charger is connected, and avoids continuous charging of the battery with a small current.

[0046] The novel BMS activation circuit described in this application specifically includes:

[0047] The output terminal and the positive terminal of the charger are connected to the battery pack, wherein the output terminal and the positive terminal of the charger are the same port;

[0048] An activation circuit, one end of which is connected to the output terminal and the positive terminal of the charger, and the other end of which is connected to the activation pin of the analog-to-digital front-end (AFE).

[0049] The activation circuit includes a battery protection circuit and a voltage comparison circuit.

[0050] Preferably, the battery protection circuit includes:

[0051] MOSFET Q1, capacitor C1, resistor R1, resistor R2 and resistor R4;

[0052] The gate of the MOSFET Q1 is connected in series with resistors R2 and R4 and then grounded.

[0053] The source (S) terminal of the MOSFET Q1 is connected to the output terminal and the positive terminal of the charger;

[0054] The drain of the MOS transistor Q1 is connected to the voltage comparator circuit.

[0055] The battery protection circuit further includes:

[0056] The resistor R2 is connected in parallel with the capacitor C1.

[0057] Furthermore, the battery protection circuit also includes:

[0058] One end of the resistor R1 is connected to the source (S) terminal of the MOSFET Q1, and the other end is connected to the capacitor C1.

[0059] like Figure 2 As shown, the working principle of MOSFET Q1 is as follows: When the charger is connected, the voltage at the gate (G) of Q1 is initially at a low level, Q1 turns on, and the activation signal can pass effectively. Simultaneously, P+ / C+ charges C1 through R1. As the voltage at C1 rises, the voltage at the gate (G) of Q1 also rises. When Vgs ≤ Vgsth (the turn-on threshold voltage of Q1), Q1 turns off. At this point, current cannot flow through Q1, meaning the activation signal disappears. This process achieves the following three functions:

[0060] 1. The charger can activate the battery when the device is off;

[0061] 2. After a period of time (the interval is equal to the capacitance of capacitor C1), the charging signal is turned off. No current flows through Q1, therefore no current flows through R3 to uncontrollably charge the battery;

[0062] 3. Disabling the activation signal keeps the activation pin of the analog front-end at a low level, allowing the analog front-end to shut down. This prevents the device from failing to shut down even if the battery is faulty due to the charger being connected, or from being over-discharged and dying.

[0063] like Figure 3 As shown, the voltage comparison circuit includes:

[0064] Transistor Q2 and resistor R3;

[0065] The emitter (e) of transistor Q2 is connected to the drain (d) of MOSFET Q1;

[0066] The base of transistor Q2 is connected to resistor R3;

[0067] The collector (c) of transistor Q2 is connected to the activation pin of the analog-to-digital front-end (AFE).

[0068] The voltage comparison circuit further includes:

[0069] The other end of the resistor R3 is connected to the positive terminal of the battery for charging.

[0070] Furthermore, the voltage comparison circuit further includes:

[0071] When the voltage at the positive terminal of the charger is at least 0.7V higher than the voltage at the positive terminal of the battery, current flows from the emitter to the collector of the transistor Q2, entering the analog-to-digital front-end (AFE) to activate the battery.

[0072] Furthermore, the voltage comparison circuit further includes:

[0073] A resistor R5 and a diode Z1 are also connected between the collector of the transistor Q2 and the activation pin of the analog-to-digital front-end (AFE).

[0074] As can be seen, the specific principle and significance of introducing transistor Q2 in this application are as follows:

[0075] MOSFET Q1 and its associated circuitry will operate even with an incorrect charger connected. To identify the charger, transistor Q2 is introduced. The emitter of transistor Q2 is connected to the output of MOSFET Q1, and its base, after current limiting via R3, is connected to the positive terminal of the battery. Current can only flow from the emitter to the collector of Q2 and into the analog front-end to activate the battery if the charger voltage is at least 0.7V higher than the battery's positive terminal. This requirement of the charger voltage being at least 0.7V higher than the battery's maximum voltage is a typical design parameter for chargers. If the battery voltage is low, the charger voltage will be significantly greater than the battery voltage by 0.7V; if the battery voltage is high, the charger voltage will also be greater than the battery voltage by 0.7V for successful activation.

[0076] Preferably, the circuit further includes:

[0077] The Bn pin of the analog-to-digital front-end (AFE) is connected to the battery pack.

[0078] Preferably, the circuit further includes:

[0079] The analog-to-digital front-end (AFE) is also connected to the MCU.

[0080] This application primarily improves upon existing BMS analog front-end activation circuits by adding a signal MOSFET, a PNP transistor, and a small number of resistors and capacitors. After the charger power is connected, the charging delay of capacitor C1 is first used to control the on / off state of the signal MOSFET Q1, ensuring that the activation signal and uncontrollable charging disappear after a certain period. After the charging signal passes through the aforementioned MOSFET Q1, a PNP transistor Q2 is used. Utilizing the Vbe conduction condition of transistor Q2, the charger is identified, preventing activation by incorrect or faulty chargers and ensuring battery safety and normal charging process.

[0081] By selecting an appropriate capacitor value for C1, this application ensures that the battery can be activated even when the device is powered off. It also features the ability to power off even when the charger is connected and avoids prolonged uncontrollable charging current.

[0082] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of this application. It should be understood that the above descriptions are merely specific embodiments of this application and are not intended to limit the scope of protection of this application. In particular, it should be noted that any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application for those skilled in the art.

Claims

1. A novel BMS activation circuit, characterized in that, The circuit includes: The output terminal and the positive terminal of the charger are connected to the battery pack, wherein the output terminal and the positive terminal of the charger are the same port; An activation circuit, one end of which is connected to the output terminal and the positive terminal of the charger, and the other end of which is connected to the activation pin of the analog-to-digital front-end (AFE). The activation circuit includes a battery protection circuit and a voltage comparison circuit; The battery protection circuit includes: MOSFET Q1, capacitor C1, resistor R1, resistor R2 and resistor R4; The gate of the MOSFET Q1 is connected in series with resistors R2 and R4 and then grounded. The source (S) terminal of the MOSFET Q1 is connected to the output terminal and the positive terminal of the charger; The drain of the MOS transistor Q1 is connected to the voltage comparator circuit; The resistor R2 is connected in parallel with the capacitor C1; One end of the resistor R1 is connected to the source (S) terminal of the MOSFET Q1, and the other end is connected to the capacitor C1. The voltage comparison circuit includes: Transistor Q2 and resistor R3; The emitter (e) of transistor Q2 is connected to the drain (d) of MOSFET Q1; The base of transistor Q2 is connected to resistor R3; The collector (c) of transistor Q2 is connected to the activation pin of the analog-to-digital front-end (AFE). The other end of the resistor R3 is connected to the positive terminal of the battery for charging; When the voltage at the positive terminal of the charger is at least 0.7V higher than the voltage at the positive terminal of the battery, current flows from the emitter to the collector of the transistor Q2, entering the analog-to-digital front-end (AFE) to activate the battery.

2. The novel BMS activation circuit according to claim 1, characterized in that, The voltage comparison circuit further includes: A resistor R5 and a diode Z1 are also connected between the collector of the transistor Q2 and the activation pin of the analog-to-digital front-end (AFE).

3. A novel BMS activation circuit according to any one of claims 1-2, characterized in that, The circuit also includes: The Bn pin of the analog-to-digital front-end (AFE) is connected to the battery pack.

4. A novel BMS activation circuit according to claim 3, characterized in that, The circuit also includes: The analog-to-digital front-end (AFE) is also connected to the MCU.

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