An OTP balancing protection circuit

Abstract

The application provides an OTP balance protection circuit, and relates to the field of protection circuits.The OTP balance protection circuit comprises a flyback topology main circuit, a VCC power supply circuit, an OTP protection pin control circuit and an OTP balance control circuit.The utility model discloses a single point detection is realized to many devices balance protection, reduces circuit complexity and cost;the OTP protection point is adaptively adjusted, and the reliability under different input voltages and load conditions is ensured;the insulation problem of cross connection is avoided, and the design is simplified;the OTP function is closed when the load is light, and the risk of false triggering is reduced;the circuit can reliably protect various power devices under different input voltages and different load currents.

Description

Technical Field

[0001] This application relates to the field of protection circuits, and more specifically, to an OTP balance protection circuit. Background Technology

[0002] In some low-voltage, high-current DC power supply applications, some loads undergo large-scale dynamic changes, but the load does not continuously operate at maximum power. To improve product cost-effectiveness and competitiveness, the rated power of the power supply will be lower than the maximum power during dynamic load changes. To improve the reliability of the power supply, an OTP (over-temperature) protection function needs to be added to prevent the power supply from continuously operating at maximum power under abnormal load conditions, which could damage the power supply. For low-voltage, high-current power supplies with a wide input voltage range of 100-240Vac, the components with the highest temperatures are usually: the input bridge rectifier (DB1), the MOSFET (Q1), and the output diode (D1). At a 100Vac input, the temperature of the bridge rectifier and MOSFET is very high, while the temperature of the output diode is moderate. When the output load continuously exceeds... When operating above the rated current, the temperatures of the bridge rectifier, MOSFET, and output diode all rise sharply, with the bridge rectifier and MOSFET experiencing a more significant temperature increase. This indicates that OTP is more suitable for detecting the bridge rectifier or MOSFET. At a 240Vac input, the temperatures of the bridge rectifier and MOSFET are lower, and the output diode temperature is moderate. However, if the output load continuously exceeds the rated current, due to the low voltage and high current, the diode temperature will rise sharply, while the temperature increase of the bridge rectifier and MOSFET will not be significant. In this case, if the OTP detects the bridge rectifier or MOSFET, the protection effect on the diode will be poor. If the diode is detected, at a 100Vac input, the protection effect on the bridge rectifier and MOSFET is not good, and since the output diode is on the secondary side, the OTP circuit needs to bridge the primary and secondary sides for a period of time, making it difficult to strengthen the insulation. Summary of the Invention

[0003] The purpose of this application is to provide an OTP balance protection circuit that can solve the above-mentioned technical problems.

[0004] This application provides an OTP balance protection circuit, including a flyback topology main circuit, a VCC power supply circuit, an OTP protection pin control circuit, and an OTP balance control circuit. The flyback topology main circuit is used to input a voltage of 100-240V. The VCC power supply circuit is used to power the OTP protection pin control circuit and the OTP balance control circuit after transforming the input voltage of the flyback topology main circuit. The OTP protection pin control circuit is used to monitor temperature or current to trigger the protection mechanism. The OTP balance control circuit is used to collect current, convert it into a duty cycle value, and dynamically adjust the OTP protection point to achieve balanced protection of the input bridge rectifier, MOSFET, and output diode under different input voltage and load conditions.

[0005] Preferably, the flyback topology main circuit includes a voltage regulator circuit, a rectifier bridge DB1, a processor U1, and a MOSFET Q1. The VCC power supply circuit includes a transformer T1. The OTP protection pin control circuit includes a reference voltage source for comparison with the current waveform on the MOSFET Q1 to determine whether OTP protection is triggered. The OTP balance control circuit includes a duty cycle signal processing unit. The duty cycle signal processing unit acquires the current signal of the MOSFET Q1 through a resistor R24, filters out high-frequency interference through an RC filter circuit, inputs it to the non-inverting input terminal of the processor U3, compares it with the reference voltage at the inverting input terminal, and outputs a CS_PWM signal reflecting the duty cycle.

[0006] Preferably, the CS_PWM signal is smoothed into a DC voltage signal by an RC filter circuit and then isolated by the processor U3, with an output impedance of less than 50Ω, so as to eliminate the interference of external circuits on the duty cycle signal.

[0007] Preferably, the DC voltage signal is weighted to pin 5 of processor U3 through resistor R37 and compared with pin 6 of processor U3 after voltage division by NTC temperature sensor. When the voltage of pin 6 exceeds that of pin 5, OTP protection is triggered.

[0008] Preferably, the OTP balance control circuit includes a load judgment module. The load judgment module uses Pin3 of the processor U3, diode and capacitor C9 to capture the peak voltage of the current signal of MOSFET Q1, and sets the load judgment benchmark through voltage divider resistor R29 and resistor R32. When the load is lower than 60% of the rated value, Pin1 outputs a low level to turn off the OTP function.

[0009] Preferably, the reference voltage of the load judgment module is dynamically coupled to the duty cycle signal (V1) through resistor R28 to compensate for the impact of load fluctuations on the judgment accuracy.

[0010] Preferably, the flyback topology main circuit uses the OB2362A control chip, which enters continuous conduction mode (CCM) when the output current reaches 2-4A, and the duty cycle varies from 30% to 50%.

[0011] Preferably, the VCC power supply circuit provides an independent power supply for the processor U1 and the OTP balance control circuit after rectification and filtering by the transformer auxiliary winding.

[0012] The beneficial effects of this utility model are:

[0013] This utility model provides an OTP balance protection circuit, including a flyback topology main circuit, a VCC power supply circuit, an OTP protection pin control circuit, and an OTP balance control circuit. This utility model achieves balanced protection for multiple devices through single-point detection, reducing circuit complexity and cost; it adaptively adjusts the OTP protection point to ensure reliability under different input voltages and load conditions; it avoids the problem of bridging primary and secondary insulation, simplifying the design; and it disables the OTP function under light loads, reducing the risk of false triggering. This circuit can reliably protect various power devices under different input voltages and different load currents. Attached Figure Description

[0014] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0015] Figure 1 This is the circuit schematic diagram of this utility model;

[0016] Figure 2 This is a framework diagram of the present utility model;

[0017] Figure 3 This is a waveform diagram of the network node of this utility model. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0019] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0020] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0021] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of this application is in use. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. In addition, the terms "first," "second," and "third," etc., are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0022] Furthermore, terms such as "horizontal," "vertical," and "sag" do not imply that components must be absolutely horizontal or suspended, but rather that they can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal relative to "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0023] In the description of this application, it should also be noted that, unless otherwise expressly specified and limited, the terms "set up," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0024] like Figure 1-2 As shown in the figure, this application embodiment provides an OTP balance protection circuit, including a flyback topology main circuit, a VCC power supply circuit, an OTP protection pin control circuit, and an OTP balance control circuit. The flyback topology main circuit is used to input a voltage of 100-240V; the VCC power supply circuit is used to power the OTP protection pin control circuit and the OTP balance control circuit after transforming the input voltage of the flyback topology main circuit; the OTP protection pin control circuit is used to monitor temperature or current to trigger the protection mechanism; the OTP balance control circuit is used to collect current, convert it into duty cycle value, and dynamically adjust the OTP protection point to achieve balanced protection of the input bridge rectifier, MOSFET, and output diode under different input voltage and load conditions.

[0025] In this embodiment, the flyback topology main circuit includes a voltage regulator circuit, a rectifier bridge DB1, a processor U1, and a MOSFET Q1. The VCC power supply circuit includes a transformer T1. The OTP protection pin control circuit includes a reference voltage source, which is used to compare with the current waveform on the MOSFET Q1 to determine whether to trigger OTP protection. The OTP balance control circuit includes a duty cycle signal processing unit. The duty cycle signal processing unit collects the current signal of the MOSFET Q1 through a resistor R24, filters out high-frequency interference through an RC filter circuit, inputs it to the non-inverting input terminal of the processor U3, compares it with the reference voltage at the inverting input terminal, and outputs a CS_PWM signal reflecting the duty cycle.

[0026] In this embodiment, the CS_PWM signal is smoothed into a DC voltage signal by an RC filter circuit and then isolated by the processor U3, with an output impedance of less than 50Ω, in order to eliminate the interference of external circuits on the duty cycle signal.

[0027] In this embodiment, the DC voltage signal is weighted to pin 5 of processor U3 through resistor R37 and compared with pin 6 of processor U3 after voltage division by NTC temperature sensor. When the voltage of pin 6 exceeds that of pin 5, OTP protection is triggered.

[0028] In this embodiment, the OTP balance control circuit includes a load judgment module. The load judgment module uses Pin3 of processor U3, diode and capacitor C9 to capture the peak voltage of the current signal of MOS transistor Q1, and sets the load judgment benchmark through voltage divider resistor R29 and resistor R32. When the load is lower than 60% of the rated value, Pin1 outputs a low level to turn off the OTP function.

[0029] In this embodiment, the reference voltage of the load judgment module is dynamically coupled to the duty cycle signal (V1) through resistor R28 to compensate for the impact of load fluctuations on the judgment accuracy.

[0030] In this embodiment, the flyback topology main circuit uses the OB2362A control chip, which enters continuous conduction mode (CCM) when the output current reaches 2-4A, and the duty cycle varies from 30% to 50%.

[0031] In this embodiment, the VCC power supply circuit provides an independent power supply for the processor U1 and the OTP balance control circuit after rectification and filtering by the transformer auxiliary winding.

[0032] When the input voltage is 100Vac, the PWM duty cycle of MOSFET Q1 is approximately 50%. When the input voltage is 240Vac, the PWM duty cycle of MOSFET Q1 is approximately 30%. The current in MOSFET Q1 flows through resistor R24 ​​and is converted into a voltage waveform. The voltage CS across resistor R24 ​​is then passed through resistor R33 and capacitor C11 to remove high-frequency spike interference before being connected to the non-inverting input pin 12 of processor U3. The reference voltage is obtained by voltage division through resistors R31 and R34 on pin 13 of processor U3. Adjusting the reference voltage (between 0.01-0.1V) can restore the duty cycle of MOSFET Q1 to the greatest extent. When the output is above half load, the power supply enters CCM mode. At this time, the duty cycle Don reflects the turn-on time of MOSFET Q1, and Doff reflects the turn-on time of secondary diode D1. The duty cycle of the output voltage waveform CS_PWM of processor U3 Pin14 restores Don and Doff. After being filtered by resistor R36 and capacitor C12, CS_PWM becomes a smooth DC voltage, and this voltage value reflects the Don value.

[0033] The voltage after CS_PWM RC filtering has a relatively high output impedance due to the large resistor R36, making it susceptible to interference from other external circuits and causing distortion of the Don value. To address this, the processor U3 uses Pin10, Pin9, and Pin8 followers to improve the output impedance and prevent the Don value from being affected by other circuits. The output voltage V1 from Pin8 is weighted to Pin5 through resistor R37, affecting the reference voltage of Pin5. Pin6 is the NTC temperature sensor connected in series with resistor R35, and then divided by resistor R42 to obtain the sampled voltage. When the temperature rises, the resistance of the NTC temperature sensor decreases, and the voltage at Pin6... When the input voltage rises and the voltage at Pin6 exceeds that at Pin5, the output voltage at Pin7 changes from high to low, which pulls down the voltage at the RT pin of processor U1, causing processor U1 to enter OTP protection mode. When the input voltage becomes high, the duty cycle of CS_PWM decreases, and the voltage at V1 drops. When the voltage at V1 drops, it is weighted to Pin5 through resistor R37, and the reference voltage at Pin5 drops. Therefore, the voltage at Pin6 is even lower, which can trigger OTP, thereby achieving the purpose of adjusting the OTP point drop. Therefore, even when the temperature of MOSFET Q1 is low and the temperature of output diode D1 is high under high voltage input, reliable protection can still be achieved.

[0034] The processor U3's Pin3 uses a diode and capacitor C9 to capture the peak voltage across resistor R24, unaffected by the duty cycle. Capacitor C9 retains the peak voltage value. Pin2 is a reference obtained by voltage division from resistors R29 and R32, used to determine the output load. V1 is weighted to Pin2 through capacitor R28 to compensate for the load judgment value, allowing for a more accurate determination of whether the output has reached more than 60% of the rated load. When the output load is below 60%, Pin1 outputs a low level, pulling Pin6 low and disabling the OTP function to avoid misjudgment of the OTP point caused by duty cycle changes during light-load DCM.

[0035] The OTP circuit detects the position of MOSFET Q1. Under low-voltage input, it can reliably protect the bridge rectifier, MOSFET Q1, and output diode. Under high-voltage input, it detects the duty cycle of MOSFET Q1 to confirm the input voltage and load status. After processing, the information is compensated to the OTP balance control circuit. Under high-voltage input and heavy-load conditions, the OTP protection point is adaptively lowered to protect the reliability of the output diode. This circuit can reliably protect various power devices under different input voltages and different load currents.

[0036] like Figure 3 As shown, Pin 12 of processor U3 is the non-inverting input terminal, which acquires the voltage waveform of resistor R24. This waveform reflects the current waveform of MOSFET Q1. Pin 13 is the inverting input terminal, which acquires the reference voltage. After comparison, CS_PWM is output from Pin 14. By properly adjusting the reference voltage of Pin 13, the duty cycle state of MOSFET Q1 can be restored to the greatest extent. The CS_PWM voltage is filtered by resistor R36 and capacitor C12 before being sent to the non-inverting input terminal of Pin 10. It forms a follower with Pin 9 and Pin 8 to improve the output impedance. When the OTP point is adjusted by weighting Pin 5, it will not be affected by the impedance voltage division, and precise adjustment can be achieved.

[0037] The above are merely preferred embodiments of this application and are not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. An OTP balance protection circuit, characterized by: It includes a flyback topology main circuit, a VCC power supply circuit, an OTP protection pin control circuit, and an OTP balance control circuit. The flyback topology main circuit is used to input a voltage of 100-240V. The VCC power supply circuit is used to transform the input voltage of the flyback topology main circuit and then supply power to the OTP protection pin control circuit and the OTP balance control circuit. The OTP protection pin control circuit is used to monitor temperature or current to trigger the protection mechanism; the OTP balance control circuit is used to collect current, convert it into duty cycle value, and dynamically adjust the OTP protection point to achieve balanced protection of the input bridge rectifier, MOSFET and output diode under different input voltage and load conditions.

2. The OTP balancing protection circuit of claim 1, wherein: The flyback topology main circuit includes a voltage regulator circuit, a rectifier bridge DB1, a processor U1, and a MOSFET Q1. The VCC power supply circuit includes a transformer T1. The OTP protection pin control circuit includes a reference voltage source, which is used to compare with the current waveform on the MOSFET Q1 to determine whether to trigger OTP protection. The OTP balance control circuit includes a duty cycle signal processing unit. The duty cycle signal processing unit collects the current signal of the MOSFET Q1 through a resistor R24, filters out high-frequency interference through an RC filter circuit, inputs it to the non-inverting input terminal of the processor U3, compares it with the reference voltage at the inverting input terminal, and outputs a CS_PWM signal reflecting the duty cycle.

3. The OTP balancing protection circuit of claim 2, wherein: The CS_PWM signal is smoothed into a DC voltage signal by an RC filter circuit and then isolated by processor U3, with an output impedance of less than 50Ω to eliminate interference from external circuits on the duty cycle signal.

4. The OTP balancing protection circuit of claim 3, wherein: The DC voltage signal is weighted to pin 5 of processor U3 through resistor R37 and compared with pin 6 of processor U3 after voltage division by NTC temperature sensor. When the voltage of pin 6 exceeds that of pin 5, OTP protection is triggered.

5. The OTP balancing protection circuit of claim 1, wherein: The OTP balance control circuit includes a load judgment module. The load judgment module uses Pin3 of processor U3, diode and capacitor C9 to capture the peak voltage of the current signal of MOSFET Q1, and sets the load judgment benchmark through voltage divider resistor R29 and resistor R32. When the load is lower than 60% of the rated value, Pin1 outputs a low level to turn off the OTP function.

6. An OTP balancing protection circuit according to claim 5, characterized in that: The reference voltage of the load judgment module is dynamically coupled to the duty cycle signal (V1) through resistor R28 to compensate for the impact of load fluctuations on the judgment accuracy.

7. The OTP balancing protection circuit of claim 1, wherein: The flyback topology main circuit uses the OB2362A control chip, which enters continuous conduction mode (CCM) when the output current reaches 2-4A, and the duty cycle varies from 30% to 50%.

8. The OTP balancing protection circuit of claim 1, wherein: The VCC power supply circuit provides an independent power supply for the processor U1 and the OTP balance control circuit after rectification and filtering by the transformer auxiliary winding.

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