Display panel and display device

Abstract

The application provides a display panel and a display device. The display panel comprises a data driving module, a driving wire, a sub-pixel unit, and an output compensation module. The data driving module is configured to output a data driving signal at a data output end. The driving wire is coupled with the data output end and configured to transmit the data driving signal. The sub-pixel unit is coupled with the driving wire. The output compensation module comprises an operational amplifier unit and a compensation unit. The operational amplifier unit comprises a positive input end, a negative input end, and a compensation output end. The positive input end is electrically connected with the data output end. The compensation output end is electrically connected with the driving wire. The compensation unit is electrically connected with the compensation output end and the negative input end. When the data output end outputs the data driving signal to the positive input end, the compensation unit charges and discharges according to the voltage of the compensation output end and the voltage of the negative input end to adjust and compensate the data driving signal. The display panel can effectively reduce the attenuation of the data driving signal on the driving wire to meet the demand of large-size display panels.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display panel and display device. Background Technology

[0002] With the rapid development of screen technology and the upgrading of the optoelectronic display industry, more and more products on the market now use Organic Light-Emitting Diode (OLED) displays, in addition to Liquid Crystal Displays (LCDs). Due to its light-emitting principle, OLED displays do not require backlighting, offer good flexibility and vibrant colors, and are known as "dream displays." They also feature low power consumption, fast response speed, wide viewing angle, high resolution, wide temperature range, and the ability to create flexible screens. As a result, more and more panel manufacturers worldwide are investing in OLED panel research and development, greatly promoting the industrialization of OLED panels and leading to larger panel sizes and longer in-plane traces.

[0003] However, due to the impedance of the drive traces, the drive signal is attenuated during transmission on the drive traces. This causes a deviation between the actual data drive signal received by the far-end sub-pixel unit and the voltage signal it requires, which can easily lead to display problems such as color shift. Utility Model Content

[0004] This application provides a display panel and display device, which aims to solve the problem in the prior art where the long driving traces cause deviations in the actual data driving signals received by the far-end sub-pixel units, resulting in color shift.

[0005] To address the aforementioned technical problems, the first technical solution provided in this application is: to provide a display panel. The display panel includes:

[0006] The data driver module is used to output data driver signals at the data output terminal;

[0007] The drive trace is coupled to the data output terminal and is used to transmit data drive signals;

[0008] Sub-pixel units are coupled to the driving traces;

[0009] The display panel also includes an output compensation module, which includes an operational amplifier unit and a compensation unit. The operational amplifier unit includes a positive input terminal, a negative input terminal and a compensation output terminal. The positive input terminal is electrically connected to the data output terminal, and the compensation output terminal is electrically connected to the drive trace. The two ends of the compensation unit are electrically connected to the compensation output terminal and the negative input terminal, respectively.

[0010] When the data output terminal outputs a data drive signal to the positive input terminal, the compensation unit charges and discharges according to the voltage of the compensation output terminal and the voltage of the negative input terminal to adjust and compensate the data drive signal.

[0011] The compensation unit includes a storage unit and a voltage divider adjustment unit; the two ends of the storage unit are electrically connected to the compensation output terminal and the negative input terminal, respectively; the voltage divider adjustment unit includes a first terminal, a voltage divider node and a ground terminal, the first terminal is electrically connected to the compensation output terminal, the voltage divider node is electrically connected to the negative input terminal, and the ground terminal is grounded;

[0012] When the data output terminal outputs a data drive signal to the positive input terminal, the storage unit is charged to increase the voltage at the compensation output terminal; the voltage divider adjustment unit adjusts the voltage increase of the voltage divider node so that the increased voltage at the compensation output terminal is reduced to the voltage value of the data drive signal.

[0013] The storage unit includes a first capacitor, the two ends of which are electrically connected to the compensation output terminal and the negative input terminal, respectively.

[0014] The voltage divider adjustment unit includes a first voltage divider resistor, a second voltage divider resistor, a second capacitor, and a third capacitor. The two ends of the first voltage divider resistor are electrically connected to the compensation output terminal and the voltage divider sub-node, respectively. The two ends of the second voltage divider resistor are electrically connected to the voltage divider sub-node and the voltage divider node, respectively. The two ends of the second capacitor are electrically connected to the voltage divider sub-node and the ground terminal, respectively. The two ends of the third capacitor are electrically connected to the voltage divider node and the ground terminal, respectively.

[0015] The storage unit includes a first capacitor, the two ends of which are electrically connected to the compensation output terminal and the negative input terminal, respectively.

[0016] The voltage divider regulation unit includes a first voltage divider resistor, a second voltage divider resistor, a third voltage divider resistor, and a regulating switch. The two ends of the first voltage divider resistor are electrically connected to the compensation output terminal and the voltage divider node, respectively. The second voltage divider resistor is connected in series between the voltage divider node and the ground terminal. The third voltage divider resistor is connected in series with the regulating switch, and the branch containing the third voltage divider resistor and the regulating switch is connected in parallel with the second voltage divider resistor.

[0017] By controlling the state of the regulating switch, the voltage of the voltage divider node is adjusted, thereby adjusting and compensating the data drive signal through the operational amplifier unit.

[0018] The output compensation module also includes a selection switch unit, which includes an input connection terminal, a first selection terminal and a second selection terminal. The input connection terminal is electrically connected to the data output terminal, the first selection terminal is electrically connected to the drive trace, and the second selection terminal is electrically connected to the positive input terminal.

[0019] When a sub-pixel unit closer to the data output terminal is turned on, the input connection terminal is turned on with the first gating terminal; when a sub-pixel unit farther from the data output terminal is turned on, the input connection terminal is turned on with the second gating terminal.

[0020] The selection switch unit includes a first switching transistor and a second switching transistor; the input terminals of both the first and second switching transistors are electrically connected to the data output terminal, the output terminal of the first switching transistor is electrically connected to the drive trace, and the output terminal of the second switching transistor is electrically connected to the positive input terminal; the control terminals of the first and second switching transistors are respectively connected to compensation control signals.

[0021] When a sub-pixel unit closer to the data output terminal is turned on, the compensation control signal controls the first switching transistor to turn on; when a sub-pixel unit farther from the data output terminal is turned on, the compensation control signal controls the second switching transistor to turn on.

[0022] Wherein, the first switching transistor is a P-type transistor and the second switching transistor is an N-type transistor; or, the first switching transistor is an N-type transistor and the second switching transistor is a P-type transistor.

[0023] The control terminal of the first switching transistor is electrically connected to the control terminal of the second switching transistor, and a compensation control signal is input.

[0024] The output compensation module also includes a compensation switch, the two ends of which are electrically connected to the data output terminal and the drive wiring, respectively, and are connected in parallel with the output compensation module.

[0025] When a sub-pixel unit near the data output terminal is turned on, the compensation switch is closed, allowing the data drive signal to be transmitted to the drive trace through the compensation switch; when a sub-pixel unit far from the data output terminal is turned on, the compensation switch is opened, allowing the data drive signal to be transmitted to the drive trace through the operational amplifier unit.

[0026] The output compensation module also includes a voltage regulation unit, which includes a voltage regulator resistor and a voltage regulator capacitor. The voltage regulator resistor is connected in series between the compensation output terminal and the drive trace. One end of the voltage regulator capacitor is electrically connected to the connection node between the voltage regulator resistor and the drive trace, and the other end of the voltage regulator capacitor is grounded.

[0027] To address the aforementioned technical problems, the second technical solution provided in this application is: to provide a display device. This display device includes a display panel as described in the above technical solutions.

[0028] The beneficial effects of this application are as follows: Unlike existing technologies, this application provides a display panel and display device. The display panel includes a data driving module, driving lines, and sub-pixel units. The data driving module outputs a data driving signal at its data output terminal, and the data driving signal is transmitted to the sub-pixel units through the driving lines to enable the sub-pixel units to display corresponding brightness. By further including an output compensation module in the display panel, the data driving signal output by the driving module at its data output terminal is adjusted and compensated. This reduces or eliminates the deviation between the adjusted and compensated data driving signal transmitted to the distant sub-pixel unit through the driving lines and the driving signal required by the distant sub-pixel unit. Specifically, the output compensation module includes an operational amplifier unit and a compensation unit. The positive input terminal of the operational amplifier unit is electrically connected to the data output terminal, and the compensation output terminal of the operational amplifier unit is electrically connected to the drive trace. The two ends of the compensation unit are electrically connected to the compensation output terminal and the negative input terminal, respectively. When the data drive signal is output from the data output terminal to the positive input terminal, the compensation unit can charge and discharge according to the voltage at the output compensation terminal and the voltage at the negative input terminal. This utilizes the characteristics of the operational amplifier to adjust and compensate the data drive signal output from the data output terminal. This overcomes the attenuation of the data drive signal during transmission on the drive trace caused by the impedance of the drive trace itself, and compensates for the deviation of the data drive signal actually received by the far-end pixel unit, thereby improving the color shift problem and enhancing the display effect. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0030] Figure 1 This is a schematic diagram of the structure of a display panel provided in one embodiment of this application;

[0031] Figure 2 This is a schematic diagram of the circuit principle of the output compensation module provided in the first embodiment of this application;

[0032] Figure 3 This is a schematic diagram of the waveform output of the data driving signal after compensation according to an embodiment of this application;

[0033] Figure 4 This is a schematic diagram of the circuit principle of the output compensation module provided in the second embodiment of this application;

[0034] Figure 5 This is a schematic diagram of the circuit principle of the output compensation module provided in the third embodiment of this application;

[0035] Figure 6 This is a schematic diagram of the circuit principle of the output compensation module provided in the fourth embodiment of this application;

[0036] Figure 7 This is a schematic diagram of the circuit principle of the output compensation module provided in the fifth embodiment of this application;

[0037] Figure 8 This is a schematic diagram of the structure of a display device provided in an embodiment of this application.

[0038] Figure label:

[0039] 100. Display panel; 101. Display area; 10. Data driving module; 20. Sub-pixel unit; 30. Output compensation module; 31. Operational amplifier unit; 32. Compensation unit; 321. Energy storage unit; 322. Voltage divider regulation unit; 33. Voltage regulator unit; 34. Selection switch unit; 40. Scan driving module; 50. Power management module;

[0040] X, Row direction; Y, Column direction; OUT1~OUTn, Data output terminals; S1~Sn, Drive traces; G1~Gm, Scan lines; P1, Positive input terminal; P2, Negative input terminal; P3, Compensation output terminal; Li, Input connection terminal; L1, First gating terminal; L2, Second gating terminal; C1, First capacitor; C2, Second capacitor; C3, Third capacitor; C4, Stabilizing capacitor; R1, First voltage divider resistor; R2, Second voltage divider resistor; R3, Third voltage divider resistor; GND, Ground; N1, Voltage divider node; N2, Voltage divider sub-node; SW1, Adjustment switch; SW2, Compensation switch; M1, First switching transistor; M2, Second switching transistor; CC, Compensation control signal. Detailed Implementation

[0041] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0042] In the following description, specific details such as particular system architectures, interfaces, and technologies are presented for illustrative purposes rather than for limiting purposes, in order to provide a thorough understanding of this application.

[0043] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0044] The terms "first," "second," and "third" in this application are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. All directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationships and movements between components in a specific orientation (as shown in the figures). If the specific orientation changes, the directional indications also change accordingly. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.

[0045] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0046] The present application will now be described in detail with reference to the accompanying drawings and embodiments.

[0047] Please see Figure 1 and Figure 2 , Figure 1 This is a schematic diagram of the structure of a display panel provided in one embodiment of this application. Figure 2 This is a schematic diagram of the circuit principle of the output compensation module provided in the first embodiment of this application. In this embodiment, a display panel 100 is provided, which includes a data driving module 10, driving lines S1 to Sn, and sub-pixel units 20. The data driving module 10 includes multiple data output terminals OUT1 to OUTn, which are used to output data driving signals at the data output terminals OUT1 to OUTn. The driving lines S1 to Sn are coupled to the data output terminals OUT1 to OUTn and are used to transmit the data driving signals. The sub-pixel units 20 are coupled to the driving lines S1 to Sn to receive the data driving lines S1 to Sn and display corresponding images.

[0048] Specifically, the display panel 100 includes a display area 101 and a non-display area 101. Multiple sub-pixel units 20 are disposed in the display area 101 and arranged in a matrix to form a pixel matrix. Each sub-pixel unit 20 includes at least three different colors, such as red, green, and blue sub-pixels. These three different colors are arranged according to a preset rule, for example, alternating sequentially in RGB order along the row direction X, and having the same color in each column direction Y. Alternatively, they can be arranged sequentially in RGB order or according to other pixel arrangement design rules. Typically, in the display area 101, three adjacent sub-pixel units 20 are three different colored sub-pixels to form one pixel unit. Here, R represents a red sub-pixel, G represents a green sub-pixel, and B represents a blue sub-pixel.

[0049] Specifically, each sub-pixel unit 20 includes a sub-pixel driving circuit and a light-emitting element. The input terminal of the sub-pixel driving unit is electrically connected to the corresponding driving lines S1 to Sn, and the output terminal is electrically connected to the light-emitting element, so as to drive the light-emitting element to emit light of corresponding brightness through the sub-pixel driving circuit. The light-emitting element includes current-driven light-emitting devices, such as organic light-emitting diodes (OLEDs), light-emitting diodes (LEDs), mini light-emitting diodes (Mini-LEDs), and micro light-emitting diodes (Micro-LEDs), for emitting light.

[0050] In this embodiment, driving lines S1 to Sn extend along the column direction Y of the pixel matrix and are disposed on one side of each column of sub-pixel units 20. Each column of sub-pixel units 20 is coupled to the same driving line S1 to Sn. The display panel 100 also includes scan lines G1 to Gm for transmitting scan signals. Specifically, scan lines G1 to Gm extend along the row direction X of the pixel matrix and are disposed on one side of each row of sub-pixel units 20. Each row of sub-pixel units 20 is coupled to the same scan line G1 to Gm to scan the sub-pixel units 20 row by row, thereby enabling multiple driving lines S1 to Sn to transmit data driving signals to the sub-pixel units 20 row by row.

[0051] As the development size of the display panel 100 increases, the length of the driving traces S1 to Sn also increases. The driving traces S1 to Sn are usually metal traces or metal oxide traces, such as copper traces, ITO traces, IZO traces, IGZO traces, etc. The driving traces S1 to Sn have their own impedance, and the longer the driving traces S1 to Sn are, the greater the impedance. Therefore, increasing the length of the drive traces S1 to Sn leads to a significant impedance voltage drop, especially for the sub-pixel units 20 located far from the data drive module 10, i.e., the far-end pixel units 20. The data drive signals output from the data output terminals OUT1 to OUTn need to travel a long path on the drive traces S1 to Sn to reach the far-end sub-pixel units 20, resulting in significant attenuation of the data drive signals. Consequently, there is a deviation between the data drive signals actually received by the far-end pixel units 20 and the data drive signals at the data output terminals OUT1 to OUTn. This can be understood as the voltage value of the data drive signal required by the far-end pixel units 20 being the voltage value of the data drive signals output from the data output terminals OUT1 to OUTn. However, due to the attenuation of the data drive signals during transmission on the drive traces S1 to Sn, the voltage value of the data drive signals actually received by the far-end pixel units 20 is less than the required voltage value.

[0052] like Figure 1 and Figure 2 As shown, to solve the above-mentioned technical problems, in this embodiment, the display panel 100 further includes an output compensation module 30, which includes an operational amplifier unit 31 and a compensation unit 32. The operational amplifier unit 31 includes a positive input terminal P1, a negative input terminal P2, and a compensation output terminal P3. The positive input terminal P1 is electrically connected to the data output terminals OUT1 to OUTn, and the compensation output terminal P3 is electrically connected to the drive lines S1 to Sn. The two ends of the compensation unit 32 are electrically connected to the compensation output terminal P3 and the negative input terminal P2, respectively. That is, the compensation unit 32 serves as a feedback structure for the negative input terminal P2 of the operational amplifier unit 31, so that the voltage signal of the compensation output terminal P3 is fed back to the negative input terminal P2 through the compensation unit 32, thereby adjusting the voltage signal of the compensation output terminal P3 through the operational amplifier unit 31.

[0053] Specifically, when the data output terminals OUT1 to OUTn output data drive signals to the positive input terminal P1 of the operational amplifier unit 31, the compensation unit 32 charges and discharges according to the voltage of the compensation output terminal P3 and the voltage of the negative input terminal P2 to adjust and compensate the data drive signals. This results in the data drive signals at the compensation output terminal P3 of the operational amplifier unit 31 having a voltage rise higher than that in the stable phase between the rise phase and the stable phase. This compensates for the attenuation of the data drive signals due to transmission on the drive lines S1 to Sn, thereby reducing or eliminating the deviation between the data drive signals received by the far-end pixel unit 20 and the output data drive signals, improving the voltage drop problem on the drive lines S1 to Sn, avoiding color shift problems in the display panel 100, and improving the display effect.

[0054] like Figure 2 As shown, in this embodiment, the compensation unit 32 includes a storage unit and a voltage divider adjustment unit 322; the two ends of the storage unit are electrically connected to the compensation output terminal P3 and the negative input terminal P2, respectively; the voltage divider adjustment unit 322 includes a first end, a voltage divider node N1 and a ground GND end, the first end is electrically connected to the compensation output terminal P3, the voltage divider node N1 is electrically connected to the negative input terminal P2, and the ground GND end is grounded to GND.

[0055] With the above settings, when the data drive signal is output from the data output terminals OUT1 to OUTn to the positive input terminal P1, the storage unit is charged so that the voltage of the compensation output terminal P3 increases; the voltage divider adjustment unit 322 adjusts the voltage increase of the voltage divider node N1 so that the voltage of the compensation output terminal P3 decreases to the voltage value of the data drive signal.

[0056] Specifically, when the data output terminals OUT1 to OUTn output data drive signals to the positive input terminal P1, the voltage of the positive input terminal P1 rises, and the compensation output terminal P3 rises accordingly. At this time, there is a voltage difference between the compensation output terminal P3 and the negative input terminal P2, causing the memory cell connected to the negative input terminal P2 to charge until the voltage of the negative input terminal P2 is equal to the voltage of the positive input terminal P1. When the voltage of the negative input terminal P2 is equal to the voltage of the positive input terminal P1, the voltage Vout of the compensation output terminal P3 is greater than the voltage Vn of the voltage divider node N1, which is equal to the voltage Vin of the positive input terminal P1. At this time, the voltage divider adjustment unit 322 adjusts the voltage of the voltage divider node N1 to rise, so that the voltage of the negative input terminal P2 is greater than the voltage of the positive input terminal P1. At this time, the voltage of the compensation output terminal P3 drops to the voltage value of the data drive signal, that is, the voltage of the compensation output terminal P3 falls back to a stable state. After the data compensation voltage output from the data output terminals OUT1 to OUTn is adjusted and compensated by the aforementioned compensation module, the output voltage has a rise phase before stabilizing. This rise voltage, after attenuation during transmission on the drive lines S1 to Sn, can reach the data drive signal required by the far-end pixel unit 20 and supply it to the far-end pixel unit 20. This reduces or eliminates the voltage drop of the data drive signal received by the far-end pixel unit 20, improves the voltage difference between the far-end data drive signal and the near-end data drive signal, and effectively enhances the display effect of the display panel 100.

[0057] In this embodiment, the storage unit includes a first capacitor C1, with its two ends electrically connected to the compensation output terminal P3 and the negative input terminal P2, respectively; the voltage divider adjustment unit 322 includes a first voltage divider resistor R1, a second voltage divider resistor R2, a second capacitor C2, and a third capacitor C3; the two ends of the first voltage divider resistor R1 are electrically connected to the compensation output terminal P3 and the voltage divider sub-node N2, the two ends of the second voltage divider resistor R2 are electrically connected to the voltage divider sub-node N2 and the voltage divider node N1, the two ends of the second capacitor C2 are electrically connected to the voltage divider sub-node N2 and the ground GND terminal, and the two ends of the third capacitor C3 are electrically connected to the voltage divider node N1 and the ground GND terminal.

[0058] Specifically, please combine Figure 2 and Figure 3 , Figure 3This is a schematic diagram of the waveform output after compensation of the data drive signal provided in an embodiment of this application. When the data drive signal is output from the data output terminals OUT1 to OUTn to the positive input terminal P1, the voltage of the positive input terminal P1 rises, and the voltage of the compensation output terminal P3 rises accordingly. At this time, there is a voltage difference between the compensation output terminal P3 and the negative input terminal P2, causing the first capacitor C1 to charge until the voltage of the negative input terminal P2 is equal to the voltage of the positive input terminal P1. At the instant when the voltage of the negative input terminal P2 equals the voltage of the positive input terminal P1, the voltage Vout of the compensation output terminal P3 > the voltage Vc2 of the voltage divider node N2 > the voltage Vc3 of the voltage divider node N1 = the voltage Vin of the positive input terminal P1. At this time, the second capacitor C2 continues to charge the third capacitor C3, making the voltage Vc3 at the voltage divider node N1 > the voltage Vin of the positive input terminal P1, that is, the voltage of the negative input terminal P2 is greater than the voltage of the positive input terminal P1, thereby causing the voltage of the compensation output terminal P3 to decrease. When the voltage at the negative input terminal P2 equals the voltage at the positive input terminal P1 again, the voltage Vout at the compensation output terminal P3 is less than the voltage Vc2 at the voltage divider node N2, which in turn is less than the voltage Vc3 at the voltage divider node N1. This causes the third capacitor C3 to charge the second capacitor C2 in reverse, making the voltage Vc3 at the voltage divider node N1 less than the voltage at the positive input terminal P1. In other words, the voltage at the negative input terminal P2 is less than the voltage at the positive input terminal P1, causing the voltage at the compensation output terminal P3 to rise again. After repeating this process several times, a stable state is gradually reached, meaning the voltage at the compensation input terminal gradually falls back to a stable state after being raised.

[0059] During the above process, the voltage of the compensation output terminal P3 rises and falls several times, causing a spike in the waveform of the output data driving signal after processing by the output compensation module 30. That is, the output data driving signal has a rise phase. After the voltage of this rise is attenuated during transmission on the drive lines S1 to Sn, it can reach the data driving signal required by the far-end pixel unit 20 and supply it to the far-end pixel unit 20. This reduces or eliminates the voltage drop of the data driving signal received by the far-end pixel unit 20, improves the voltage difference between the far-end data driving signal and the near-end data driving signal, and effectively improves the display effect of the display panel 100.

[0060] Please see Figure 4 , Figure 4This is a schematic diagram of the output compensation module provided in the second embodiment of this application. In this embodiment, the storage unit includes a first capacitor C1, the two ends of which are electrically connected to the compensation output terminal P3 and the negative input terminal P2, respectively; the voltage divider adjustment unit 322 includes a first voltage divider resistor R1, a second voltage divider resistor R2, a third voltage divider resistor R3 and an adjustment switch SW1, the two ends of the first voltage divider resistor R1 are electrically connected to the compensation output terminal P3 and the voltage divider node N1, the second voltage divider resistor R2 is connected in series between the voltage divider node N1 and the ground GND terminal, the third voltage divider resistor R3 is connected in series with the adjustment switch SW1, and the branch containing the third voltage divider resistor R3 and the adjustment switch SW1 is connected in parallel with the second voltage divider resistor R2; by controlling the state of the adjustment switch SW1, the voltage of the voltage divider node N1 is adjusted, so as to adjust and compensate the data drive signal through the operational amplifier unit 31.

[0061] Unlike the first embodiment, in this embodiment, in the voltage divider adjustment unit 322, the two ends of the second voltage divider resistor R2 are electrically connected between the voltage divider node N1 and the ground GND terminal, respectively. The third voltage divider resistor R3 and the adjustment switch SW1 are connected in series to form a branch and then connected in parallel with the second voltage divider resistor R2. Therefore, by adjusting the state of the switch SW1, the resistance between the voltage divider node N1 and the ground GND terminal can be adjusted, thereby adjusting the voltage of the voltage divider node N1, controlling the voltage change of the negative input terminal P2, and further adjusting the voltage of the compensation output terminal P3, so that the voltage of the compensation output terminal P3 can be output as shown in the figure. Figure 3 The waveform shown allows the voltage signal output by the data drive signals from the data output terminals OUT1 to OUTn after adjustment by the output compensation module 30 to reduce or eliminate the voltage drop of the data drive signal received by the far-end pixel unit 20, thereby improving the voltage difference between the far-end data drive signal and the near-end data drive signal and effectively enhancing the display effect of the display panel 100.

[0062] Specifically, the regulating switch SW1 can be a thin-film transistor or a metal-oxide-semiconductor field-effect transistor (MOS transistor), or other types of transistors. The specific setting can be determined according to the actual circuit design requirements, and there are no specific restrictions on it.

[0063] Please see Figure 5 , Figure 5 This is a schematic diagram of the circuit principle of the output compensation module provided in the third embodiment of this application. Figure 2Compared with the first embodiment, in this embodiment, the output compensation module 30 further includes a selection switch unit. The selection switch unit includes an input connection terminal Li, a first selection terminal L1, and a second selection terminal L2. The input connection terminal Li is electrically connected to the data output terminals OUT1 to OUTn, the first selection terminal L1 is electrically connected to the drive lines S1 to Sn, and the second selection terminal L2 is electrically connected to the positive input terminal P1.

[0064] Specifically, when the sub-pixel units 20 closest to the data output terminals OUT1 to OUTn are turned on, the input connection terminal Li is turned on with the first selection terminal L1; when the sub-pixel units 20 furthest from the data output terminals OUT1 to OUTn are turned on, the input connection terminal Li is turned on with the second selection terminal L2.

[0065] It is understandable that for a large-size display panel 100, the transmission path of the data driving signal from the data output terminals OUT1 to OUTn to the sub-pixel unit 20 is relatively long, especially for the far-end sub-pixel unit 20, which is highly susceptible to impedance voltage drop. Conversely, the near-end sub-pixel unit 20 receives a shorter transmission path for its data driving signal and is less affected by the impedance voltage drop of the driving traces S1 to Sn. Therefore, this application solves the aforementioned technical problem by setting up the selection switch unit and controlling the connection between the selected switch's on input terminal Li and the first selection terminal L1, or the connection between the sleeve input terminal Li and the second selection terminal L2. This allows the data driving signal to be directly transmitted to the near-end sub-pixel unit 20 through the driving traces S1 to Sn, while the data driving signal required at the far end is first adjusted and compensated by the output compensation module 30 before being transmitted to the far-end sub-pixel unit 20 through the driving traces S1 to Sn.

[0066] Please see Figure 6 , Figure 6 This is a schematic diagram of the output compensation module provided in the fourth embodiment of this application. In this embodiment, the selection switch unit includes a first switching transistor M1 and a second switching transistor M2; the input terminals of the first switching transistor M1 and the second switching transistor M2 are both electrically connected to the data output terminals OUT1 to OUTn, the output terminal of the first switching transistor M1 is electrically connected to the drive lines S1 to Sn, and the output terminal of the second switching transistor M2 is electrically connected to the positive input terminal P1; the control terminals of the first switching transistor M1 and the second switching transistor M2 are respectively connected to the compensation control signal CC.

[0067] Specifically, when the sub-pixel units 20 closest to the data output terminals OUT1 to OUTn are turned on, the compensation control signal CC controls the first switching transistor M1 to turn on; when the sub-pixel units 20 furthest from the data output terminals OUT1 to OUTn are turned on, the compensation control signal CC controls the second switching transistor M2 to turn on. It can be seen that in this embodiment, the first switching transistor M1 and the second switching transistor M2 are combined and connected to form a selection switching unit, thereby achieving the above-mentioned function.

[0068] Furthermore, the first switching transistor M1 is a P-type transistor and the second switching transistor M2 is an N-type transistor; or, the first switching transistor M1 is an N-type transistor and the second switching transistor M2 is a P-type transistor; the control terminal of the first switching transistor M1 is electrically connected to the control terminal of the second switching transistor M2 and is connected to the compensation control signal CC.

[0069] That is, the gates of the two switching transistors are connected to the same compensation control signal CC. Taking the first switching transistor M1 as a P-type transistor and the second switching transistor M2 as an N-type transistor as an example, when the data driving signal needs to be transmitted to the near-end sub-pixel unit 20, the compensation control signal CC is low, the first switching transistor M1 is turned on, and the second switching transistor M2 is turned off. The data driving signal is directly transmitted to the driving lines S1 to Sn through the first switching transistor M1 without adjustment or compensation, and is directly transmitted to the near-end sub-pixel unit 20. When the data driving signal needs to be transmitted to the far-end sub-pixel unit 20, the compensation control signal CC is high, the second switching transistor M2 is turned on, and the first switching transistor M1 is turned off. The data driving signal is transmitted to the positive input terminal P1 of the operational amplifier unit 31 through the second switching transistor M2, and after being adjusted and compensated by the output compensation module 30, it is output to the driving lines S1 to Sn, and then transmitted to the far-end sub-pixel unit 20 through the driving lines S1 to Sn.

[0070] Please see Figure 7 , Figure 7 This is a schematic diagram of the circuit principle of the output compensation module provided in the fifth embodiment of this application. Compared with the first embodiment, in this embodiment, the output compensation module 30 further includes a compensation switch SW2. The two ends of the compensation switch SW2 are electrically connected to the data output terminals OUT1~OUTn and the drive lines S1~Sn, respectively, and are connected in parallel with the output compensation module 30.

[0071] Specifically, when the sub-pixel units 20 close to the data output terminals OUT1 to OUTn are turned on, the compensation switch SW2 is closed so that the data driving signal is transmitted to the driving lines S1 to Sn through the compensation switch SW2; when the sub-pixel units 20 far from the data output terminals OUT1 to OUTn are turned on, the compensation switch SW2 is opened so that the data driving signal is transmitted to the driving lines S1 to Sn through the operational amplifier unit 31.

[0072] As is easily understood, in this embodiment, the two ends of the compensation switch SW2 are electrically connected to the data output terminals OUT1~OUTn and the drive lines S1~Sn, respectively. The compensation switch SW2 is connected in parallel with the operational amplifier unit 31. When the data drive signal needs to be transmitted to the near-end sub-pixel unit 20, the compensation switch SW2 is closed. At this time, the branch where the compensation switch SW2 is located is equivalent to a wire, short-circuiting the operational amplifier unit 31. The data drive signal is directly output to the drive lines S1~Sn through the compensation switch SW2 without adjustment or compensation, and is directly transmitted to the near-end sub-pixel unit 20. When the data drive signal needs to be transmitted to the far-end sub-pixel unit 20, the compensation switch SW2 is opened. The data drive signal is transmitted through the operational amplifier unit 31 and the compensation unit 32, and after adjustment and compensation, it is output to the drive lines S1~Sn, and then transmitted to the far-end sub-pixel unit 20 through the drive lines S1~Sn.

[0073] In the above embodiment, the output compensation module 30 further includes a voltage regulation unit 33, which includes a voltage regulator resistor and a voltage regulator capacitor C4. The voltage regulator resistor is connected in series between the compensation output terminal P3 and the drive lines S1 to Sn. One end of the voltage regulator capacitor C4 is electrically connected to the connection node between the voltage regulator resistor and the drive lines S1 to Sn, and the other end of the voltage regulator capacitor C4 is grounded to GND. This voltage regulation unit 33 regulates the data drive voltage at the compensation output terminal P3 to improve the stability of the data drive signal, thereby improving the display effect of the display panel 100.

[0074] Please see Figure 8 , Figure 8 This is a schematic diagram of the structure of a display device provided in one embodiment of this application. In this embodiment, a display device is provided that can be applied to display fields such as mobile phones, tablets, laptops, monitors, and automotive displays. The display device includes a display panel 100, a scanning driving module 40, and a power management module 50. The display panel 100 is the same as the display panel 100 described in the above embodiments, and its specific structure and function are the same or similar to those of the display panel 100 described in the above embodiments, and it can achieve the same technical effects. For details, please refer to the above description; further details are omitted here.

[0075] The scan driving module 40 is coupled to the control terminal of the sub-pixel driving circuit in the display panel 100, and is used to transmit scan driving signals to each sub-pixel driving circuit to scan the sub-pixel driving circuits sequentially row by row or column by column to display the image. The power management module 50 provides various required operating power signals to the scan driving module 40 and the display panel 100, such as the power signal VDD and common voltage signal VSS required by the display panel 100, and the power voltage signals VGH and VGL required by the scan driving module 40.

[0076] The display device provided in this embodiment, through the above-described configuration, can effectively reduce the voltage drop of the data driving signal on the driving traces S1 to Sn, thereby solving the problem in the prior art where the driving traces S1 to Sn are too long, causing the data driving signal actually received by the far-end sub-pixel unit 20 to deviate, resulting in color shift; further satisfying the large size requirement of the display panel 100.

[0077] The above are merely embodiments of this application and do not limit the scope of patent protection of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.

Claims

1. A display panel, comprising: The data driver module is used to output data driver signals at the data output terminal; A drive trace, coupled to the data output terminal, is used to transmit the data drive signal; Sub-pixel units are coupled to the driving traces; The display panel is characterized in that it further includes an output compensation module, which includes an operational amplifier unit and a compensation unit; the operational amplifier unit includes a positive input terminal, a negative input terminal and a compensation output terminal, the positive input terminal is electrically connected to the data output terminal, the compensation output terminal is electrically connected to the drive trace, and the two ends of the compensation unit are respectively electrically connected to the compensation output terminal and the negative input terminal; When the data output terminal outputs the data driving signal to the positive input terminal, the compensation unit charges and discharges according to the voltage of the compensation output terminal and the voltage of the negative input terminal to adjust and compensate the data driving signal.

2. The display panel according to claim 1, characterized in that, The compensation unit includes a storage unit and a voltage divider adjustment unit; the two ends of the storage unit are electrically connected to the compensation output terminal and the negative input terminal, respectively; the voltage divider adjustment unit includes a first terminal, a voltage divider node and a ground terminal, the first terminal is electrically connected to the compensation output terminal, the voltage divider node is electrically connected to the negative input terminal, and the ground terminal is grounded; When the data output terminal outputs the data driving signal to the positive input terminal, the storage unit is charged to increase the voltage of the compensation output terminal; the voltage divider adjustment unit adjusts the voltage increase of the voltage divider node so that the increased voltage of the compensation output terminal is reduced to the voltage value of the data driving signal.

3. The display panel according to claim 2, characterized in that, The storage unit includes a first capacitor, the two ends of which are electrically connected to the compensation output terminal and the negative input terminal, respectively. The voltage divider adjustment unit includes a first voltage divider resistor, a second voltage divider resistor, a second capacitor, and a third capacitor; the two ends of the first voltage divider resistor are electrically connected to the compensation output terminal and the voltage divider sub-node, respectively; the two ends of the second voltage divider resistor are electrically connected to the voltage divider sub-node and the voltage divider node, respectively; the two ends of the second capacitor are electrically connected to the voltage divider sub-node and the ground terminal, respectively; and the two ends of the third capacitor are electrically connected to the voltage divider node and the ground terminal, respectively.

4. The display panel according to claim 2, characterized in that, The storage unit includes a first capacitor, the two ends of which are electrically connected to the compensation output terminal and the negative input terminal, respectively. The voltage divider adjustment unit includes a first voltage divider resistor, a second voltage divider resistor, a third voltage divider resistor, and an adjustment switch. The two ends of the first voltage divider resistor are electrically connected to the compensation output terminal and the voltage divider node, respectively. The second voltage divider resistor is connected in series between the voltage divider node and the ground terminal. The third voltage divider resistor is connected in series with the adjustment switch, and the branch containing the third voltage divider resistor and the adjustment switch is connected in parallel with the second voltage divider resistor. By controlling the state of the regulating switch, the voltage of the voltage divider node is adjusted, thereby adjusting and compensating the data drive signal through the operational amplifier unit.

5. The display panel according to claim 1, characterized in that, The output compensation module further includes a selection switch unit, which includes an input connection terminal, a first selection terminal, and a second selection terminal. The input connection terminal is electrically connected to the data output terminal, the first selection terminal is electrically connected to the drive trace, and the second selection terminal is electrically connected to the positive input terminal. When the sub-pixel unit closest to the data output terminal is turned on, the input connection terminal is connected to the first gating terminal; when the sub-pixel unit furthest from the data output terminal is turned on, the input connection terminal is connected to the second gating terminal.

6. The display panel according to claim 5, characterized in that, The selection switch unit includes a first switching transistor and a second switching transistor; the input terminals of the first switching transistor and the second switching transistor are both electrically connected to the data output terminal, the output terminal of the first switching transistor is electrically connected to the drive trace, and the output terminal of the second switching transistor is electrically connected to the positive input terminal; the control terminals of the first switching transistor and the second switching transistor are respectively connected to compensation control signals. When the sub-pixel unit near the data output terminal is turned on, the compensation control signal controls the first switching transistor to turn on; When the sub-pixel unit located away from the data output terminal is turned on, the compensation control signal controls the second switching transistor to turn on.

7. The display panel according to claim 6, characterized in that, The first switching transistor is a P-type transistor, and the second switching transistor is an N-type transistor; or, the first switching transistor is an N-type transistor, and the second switching transistor is a P-type transistor. The control terminal of the first switching transistor is electrically connected to the control terminal of the second switching transistor, and the compensation control signal is received.

8. The display panel according to claim 1, characterized in that, The output compensation module further includes a compensation switch, the two ends of which are electrically connected to the data output terminal and the drive trace, respectively, and are connected in parallel with the output compensation module; When the sub-pixel unit near the data output terminal is turned on, the compensation switch is closed, so that the data driving signal is transmitted to the driving trace through the compensation switch; When the sub-pixel unit away from the data output terminal is turned on, the compensation switch is turned off, so that the data driving signal is transmitted to the driving trace through the operational amplifier unit.

9. The display panel according to claim 1, characterized in that, The output compensation module further includes a voltage regulation unit, which includes a voltage regulator resistor and a voltage regulator capacitor. The voltage regulator resistor is connected in series between the compensation output terminal and the drive trace. One end of the voltage regulator capacitor is electrically connected to the connection node between the voltage regulator resistor and the drive trace, and the other end of the voltage regulator capacitor is grounded.

10. A display device, characterized in that, Includes the display panel as described in any one of claims 1-9.

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