Resistor element and resistor motherboard
By setting preset tracking codes in different areas of the resistor element, the problem of tracing abnormal processes in surface mount resistor elements is solved, enabling rapid troubleshooting of abnormalities and improving production efficiency and cost-effectiveness.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- JIANGMEN JUNEWAY ELECTRONIC TECH CO LTD
- Filing Date
- 2025-07-08
- Publication Date
- 2026-06-19
AI Technical Summary
In existing technologies, it is difficult to quickly trace abnormal processes in surface mount resistors, resulting in low efficiency in identifying defective products during production.
Preset tracking codes are set on the substrate, resistive layer, terminal area and insulating layer of the resistor element to map process information, work order information and sorting information. The production information of abnormal resistor elements can be quickly traced by reading the tracking codes.
This technology enables rapid identification of the source of process abnormalities in abnormal resistive components, improving production efficiency and saving production costs.
Smart Images
Figure CN224384007U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of resistor technology, and in particular to a resistor element and a resistor motherboard. Background Technology
[0002] As electronic components become increasingly smaller, their manufacturing processes become more complex, leading to a rise in defective products. In terms of manufacturing, a common practice is to use a resistor motherboard with multiple surface-mount resistors arranged in a matrix, and then mass-produce them through several processes. During production, different defective products may arise at different stages. To improve the manufacturing yield of resistor components, it is usually necessary to disassemble and analyze these defective products, trace the source of the defect, and fundamentally resolve the cause of the defect.
[0003] However, in existing technologies, the working parameters of each workstation in each process are usually checked one by one when abnormal products are found. This method is difficult to quickly analyze the abnormal resistive elements produced. Utility Model Content
[0004] This application proposes a resistor element designed to address the technical problem of how to more quickly trace abnormal processes in surface-mount resistor elements.
[0005] To achieve the above objectives, embodiments of this application provide a resistive element, the resistive element comprising:
[0006] substrate;
[0007] A resistive layer, wherein a first side of the resistive layer covers a first side of the substrate;
[0008] The first terminal area, the second terminal area, and the insulating layer are all disposed on the second surface of the resistive layer. The first terminal area and the second terminal area are respectively disposed at both ends, and the insulating layer is disposed between the first terminal area and the second terminal area.
[0009] A preset tracking code is set in at least one of the substrate, the resistive layer, the first terminal area, and the second terminal area, and at least maps the process information, work order information, and sorting information of the component on the motherboard of the individual component.
[0010] In one embodiment, the preset tracking code includes:
[0011] A first tracking code is disposed on the substrate;
[0012] A second tracking code is disposed on the resistive layer;
[0013] A third tracking code is set on the first terminal area and / or the second terminal area;
[0014] A fourth tracking code is set on the insulating layer;
[0015] The first tracking code, the second tracking code, the third tracking code, and the fourth tracking code are bound together based on the same work order information.
[0016] In one embodiment, the first tracking code is disposed separately on the first surface of the substrate;
[0017] Alternatively, the first tracking code may be separately disposed on the second side of the substrate;
[0018] Alternatively, the first tracking code may be simultaneously disposed on the first and second surfaces of the substrate.
[0019] In one embodiment, the second tracking code is disposed separately on the first side of the resistive layer;
[0020] Alternatively, the second tracking code may be separately disposed on the second side of the resistive layer;
[0021] Alternatively, the second tracking code may be simultaneously applied to both the first and second surfaces of the resistive layer.
[0022] In one embodiment, the third tracking code is disposed separately on the outer surface of one of the first terminal area or the second terminal area;
[0023] Alternatively, the third tracking code may be simultaneously disposed on the outer surface of both the first terminal area and the outer surface of the second terminal area;
[0024] Alternatively, the third tracking code segments are disposed on the outer surface of the first terminal area and the outer surface of the second terminal area.
[0025] In one embodiment, the fourth tracking code is disposed on the outer surface of the insulating layer.
[0026] In one embodiment, the preset tracking code is formed by at least one of spraying, printing, nanoprinting, and laser printing.
[0027] In one embodiment, the preset tracking code is at least one of plaintext or ciphertext.
[0028] In one embodiment, the package type identifier of the resistive element is disposed on the second side of the substrate.
[0029] In addition, to achieve the above objectives, this application also proposes a resistor motherboard, which includes a plurality of resistor elements as described above.
[0030] This application provides a resistor element and a resistor motherboard. The resistor element includes: a substrate; a resistor layer, the first side of which covers the first side of the substrate; a first terminal area, a second terminal area, and an insulating layer, all disposed on the second side of the resistor layer, the first terminal area and the second terminal area being disposed at opposite ends, and the insulating layer being disposed between the first terminal area and the second terminal area; and a preset tracking code, which is disposed in at least one area of the substrate, the resistor layer, the first terminal area, and the second terminal area, and at least maps to the process information, work order information, and sorting information of the component on the motherboard for the individual component.
[0031] At least one area on the substrate, resistive layer, terminal area, and insulating layer of the surface-mount resistor element is provided with a preset tracking code that maps at least process information, work order information, and sorting information. This allows staff to quickly trace the source of the process abnormality in one or more defective resistor elements by reading the preset tracking code, facilitating rapid troubleshooting and elimination of process abnormalities and saving production costs. Attached Figure Description
[0032] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.
[0033] Figure 1 This is a schematic diagram of a structure of the resistor element according to the first embodiment of this application;
[0034] Figure 2 This is a schematic diagram of another structure of the resistor element in the first embodiment of this application;
[0035] Figure 3 This is a partial structural diagram of the substrate in the second embodiment of the resistor element of this application;
[0036] Figure 4 This is a partial structural diagram of the resistive layer in the second embodiment of the resistive element of this application;
[0037] Figure 5 This is a partial structural diagram of the terminal area of the resistor element in the second embodiment of this application;
[0038] Figure 6 This is a partial structural diagram of the insulating layer in the second embodiment of the resistor element of this application;
[0039] Figure 7 This is a partial structural schematic diagram of the second side of the substrate of the second embodiment of the resistor element of this application.
[0040] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation
[0041] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.
[0042] This application discloses a resistive element, with reference to... Figure 1 as well as Figure 2 The resistive element includes:
[0043] substrate 10;
[0044] A resistive layer 20, the first side of which covers the first side of the substrate 10;
[0045] The first terminal area S31, the second terminal area S32, and the insulating layer 40 are all disposed on the second surface of the resistive layer 20. The first terminal area S31 and the second terminal area S32 are respectively disposed at both ends, and the insulating layer 40 is disposed between the first terminal area S31 and the second terminal area S32.
[0046] A preset tracking code 50 is provided in at least one of the substrate 10, the resistive layer 20, the first terminal area S31, and the second terminal area S32, and at least maps the process information, work order information, and sorting information of the component on the motherboard of the individual component.
[0047] It should be noted that, as Figure 1 As shown, the resistive element is specifically a chip resistor. In this embodiment, the substrate 10 refers to a support structure with good insulation properties, good heat dissipation properties, and high rigidity, mainly used to provide sufficient mechanical support for the resistive layer 20, terminals 30, and insulating layer 40, and can be made of materials such as silicon, ceramics, and glass fiber; the resistive layer 20 refers to a conductor layer with a specific resistivity material, used to provide impedance, and can be made of materials such as carbon, metal, and metal oxides; the first terminal area S31 and the second terminal area S32 are respectively used to place the terminals 30 at both ends of the resistive element. The terminals 30 are the conductive interfaces of the resistive element, mainly used for soldering, and are usually made of a metal with good conductivity (such as copper) and a metal that is easy to solder and has good oxidation resistance (such as nickel); the insulating layer 40 refers to a protective layer with insulating properties, used to isolate the electrical connection between the inside of the resistive element and the outside world to prevent short circuits.
[0048] It is easy to understand that, in this embodiment, the manufacturing process for the resistive element with the above-described structure is typically a stacked design. The general process is as follows: first, a substrate 10 is prepared; then, the first side of the resistive layer 20 is placed over the first side of the substrate 10; subsequently, an insulating layer 40 is placed over the middle region of the second side of the resistive layer 20 to protect the internal structure. Finally, two terminals 30 are respectively provided at the first terminal area S31 and the second terminal area S32 at both ends of the insulating layer 40.
[0049] It should be noted that, in this embodiment, the preset tracking code refers to an encoding that can map relevant production information of a single component during the production process. It can be set on at least one area of the substrate 10, resistive layer 20, first terminal area S31, second terminal area S32, and insulating layer 40. The preset tracking code maps at least the process information, work order information, and sorting information of the single component on the motherboard. For production personnel, reading the preset tracking code can determine when the single component was manufactured, what process it underwent, what machine it was manufactured on, which batch of products it belongs to, and which work order it belongs to, etc. Furthermore, the preset tracking code may also include a code provided by the customer. This type of code is generally used to record customer-related information. Specifically, reading this type of code can distinguish different customers, and it can also confirm that the batch of products belongs to a specific customer's project requiring materials, etc.
[0050] It is easy to understand that, in this embodiment, the process information may include the production date of the component, the station number of any process in the production process, the equipment number of the equipment used for production in the station, and the specific time of production in each station, etc.; the work order information may include the number of the motherboard where the component is located, the batch work order number of the component and / or the corresponding motherboard, etc.; the sorting information may include the row and column numbers of the component on the motherboard, etc. If the components on the motherboard are sorted by partition due to the large number of components, the sorting information may also include the partition number of the component on the motherboard and the row and column numbers of the partition, etc.
[0051] Furthermore, in this embodiment, the preset tracking code 50 includes:
[0052] A first tracking code 51 is disposed on the substrate 10;
[0053] The second tracking code 52 is disposed on the resistive layer 20;
[0054] The third tracking code 53 is set on the first terminal area S31 and / or the second terminal area S32;
[0055] A fourth tracking code 54 is disposed on the insulating layer 40;
[0056] The first tracking code 51, the second tracking code 52, the third tracking code 53, and the fourth tracking code 54 are bound together based on the same work order information.
[0057] It should be noted that, please refer to Figure 2 In this embodiment, multiple preset tracking codes 50 can exist. These can be divided into a first tracking code 51, a second tracking code 52, a third tracking code 53, and a fourth tracking code 54 based on the different stages of the manufacturing process, each mapping to relevant production information for a different process. The first tracking code 51, the second tracking code 52, the third tracking code 53, and the fourth tracking code 54 can be individually or in combination mapped to the process information of individual components, work order information, and sorting information on the motherboard.
[0058] As a preferred embodiment, the first tracking code 51 is disposed on the substrate 10, and thus the first tracking code 51 contains production information related to the "substrate preparation" process; the second tracking code 52 is disposed on the resistive layer 20, and it contains production information related to the "covering resistive layer" process; the third tracking code 53 is disposed in the first terminal area S31 and the second terminal area S32, and it contains production information related to the "terminal fabrication" process; the fourth tracking code 54 is disposed on the insulating layer 40, and it contains production information related to the "coating protective layer" process.
[0059] It is worth noting that in this embodiment, each tracking code can be bound and associated based on the same work order information, so that the work order information of a component can be obtained by reading any one of the tracking codes, and all relevant production information contained in other tracking codes on the component can be obtained based on the work order information.
[0060] In practical implementation, during the production of resistor components, if workers or testing machines detect a batch of abnormal resistor components, these abnormal components can be first screened from the finished products. Then, the screened abnormal components are assessed for anomalies and categorized according to their specific causes, such as missing terminal 30 or damaged substrate 10. Subsequently, the abnormal resistor components can be disassembled based on their cause, and corresponding tracking codes can be collected. For example, for the cause of "substrate damage," the first tracking code 51 can be collected, or for the cause of "missing terminals," the third tracking code 53 can be collected. After batch-reading the tracking codes, the relevant production information of each abnormal resistor component in the corresponding process can be traced. This allows for the initial screening of the most frequently repeated items among relevant information such as "relative position on the motherboard," "production date," "production time," "production batch," and "equipment number." This facilitates the determination of which production factors are more correlated with the same batch of anomalies, thus enabling rapid identification of the true cause of the batch process anomalies.
[0061] It is worth noting that, in practice, some anomalies may not be caused by the corresponding process itself, but rather by anomalies in preceding or following processes. For example, incomplete cleaning of the substrate 10 may lead to excessive floating height of the resistor layer 20. Therefore, in some cases, it is necessary to trace all the relevant production information corresponding to the first tracking code 51, the second tracking code 52, the third tracking code 53, and the fourth tracking code 54 of the abnormal resistor element and to statistically analyze all the data in order to more accurately determine the true cause of the process anomaly in this batch of abnormal resistor elements.
[0062] Furthermore, in this embodiment, the preset tracking code 50 is formed by at least one of spraying, printing, nanoprinting and laser printing.
[0063] It should be noted that, in this embodiment, the preset tracking code 50 mentioned above can be formed at its corresponding position in a variety of ways, including at least four methods: spraying, printing, nanoprinting and laser printing.
[0064] It is worth noting that, in specific embodiments, some tracking codes may only be applicable to some of the methods mentioned above in certain situations. For example, the second tracking code 52 disposed on the resistive layer 20 may be affected by the fact that the resistive layer 20 can be formed from carbon material. If laser printing is used, it may cause local oxidation of the carbon material or change in its structure, which will change the cross-sectional area and length of the conductive path, thereby causing a change in the resistance value and affecting the function of the resistive element. On the other hand, some tracking codes are applicable to all the methods mentioned above, such as the fourth tracking code 54 disposed on the insulating layer 40. Since the insulating layer 40 has little impact on the function of the resistive element, the function of the resistive element will not be affected regardless of which method is used.
[0065] Furthermore, in this embodiment, the preset tracking code 50 adopts at least one of plaintext or cryptography.
[0066] It should be noted that, in this embodiment, the preset tracking code 50 mentioned above can have multiple encoding methods, which can be divided into at least two categories: plaintext and cryptography. Plaintext refers to encoding methods that are directly visible and can be read without special conditions or equipment, such as the numbers "0-9" or the English characters "az" and "AZ". Cryptography refers to encoding methods that require special conditions or equipment to read, such as encrypted QR codes or special symbols.
[0067] Furthermore, in this embodiment, the length of the plaintext is not less than 0.1 mm, and the width of the plaintext is not less than 0.08 mm.
[0068] It should be noted that since the plaintext code is set on a small surface-mount resistor structure, its size is typically on the order of millimeters. In this embodiment, the image complexity of the plaintext code is not high, and it can be recognized by humans or machines even at a relatively small size. Therefore, its size can be set relatively small. As a preferred approach, the length of the plaintext code is not less than 0.1 mm, and the width is not less than 0.08 mm.
[0069] Furthermore, the length of the cipher is not less than 1 mm, and the width of the cipher is not less than 0.5 mm.
[0070] It should be noted that in this embodiment, the image complexity of the cipher is relatively high, and it is difficult to identify if the size is too small. Therefore, its size needs to be set large. As a preferred approach, the length of the cipher is not less than 1 mm, and the width is not less than 0.5 mm.
[0071] It is worth noting that in this embodiment, for some surface mount resistors with smaller package sizes, such as "01005 package" (resistor size 0.4mm × 0.2mm) or "0201 package" (resistor size 0.6mm × 0.3mm), due to the small size of these types of resistor components, they are not suitable for using encrypted codes as tracking codes and can only use plaintext codes. However, when using plaintext codes as tracking codes, the amount of information is far less than that of encrypted codes, which reduces the number of resistor components in the resistor motherboard. Therefore, when encrypted codes can be used, it is preferable to use encrypted codes as tracking codes.
[0072] This application discloses a resistive element comprising: a substrate, a resistive layer, a first terminal area, a second terminal area, and an insulating layer. At least one region on the substrate, resistive layer, terminal area, and insulating layer of the surface-mount resistive element is provided with a preset tracking code corresponding to at least process information, work order information, and sorting information. This allows workers to quickly trace the source of process abnormalities in one or more defective resistive elements by reading the preset tracking code, facilitating rapid troubleshooting and elimination of process abnormalities and saving production costs.
[0073] Based on the first embodiment of this application, in the second embodiment of this application, the content that is the same as or similar to that in Embodiment 1 above can be referred to the above description, and will not be repeated hereafter. Based on this, please refer to... Figure 3 , Figure 4 , Figure 5 , Figure 6 as well as Figure 7 The first tracking code 51 is separately disposed on the first surface of the substrate 10;
[0074] Alternatively, the first tracking code 51 may be disposed separately on the second side of the substrate 10;
[0075] Alternatively, the first tracking code 51 may be simultaneously disposed on the first and second surfaces of the substrate 10.
[0076] It should be noted that, please refer to Figure 3 In this embodiment, there are three specific ways to set the first tracking code 51. For the first method, please refer to [link / reference]. Figure 3 In section 3.1, the first tracking code 51 can be set separately on the first surface of the substrate 10. If designed this way, the first tracking code 51 can only be read after the resistive layer 20 has been peeled off from the substrate 10. As a second method, please refer to [reference needed]. Figure 3In section 3.2, the first tracking code 51 can be separately located on the second side of the substrate 10. With this design, the first tracking code 51 can be read directly from the second side of the substrate 10 without disassembling the resistive element. However, the first tracking code 51 may be missing or unclear due to wear. For a third method, please refer to [reference needed]. Figure 3 In section 3.3, the first tracking code 51 can be simultaneously set on the first and second sides of the substrate 10. With this design, the first tracking code 51 can be read in a real and reliable manner when disassembled, and it can also be read more easily without disassembly.
[0077] Furthermore, in this embodiment, the second tracking code 52 is separately disposed on the first surface of the resistive layer 20;
[0078] Alternatively, the second tracking code 52 may be separately disposed on the second side of the resistive layer 20;
[0079] Alternatively, the second tracking code 52 may be simultaneously applied to both the first and second surfaces of the resistive layer 20.
[0080] It should be noted that, please refer to Figure 4 In this embodiment, the second tracking code 52 can be set in three ways. For the first method, please refer to [link / reference needed]. Figure 4 In section 4.1, the second tracking code 52 can be separately located on the second side of the resistor layer 20. With this design, the second tracking code 52 can only be read after the insulating layer 40 on the surface of the resistor layer 20 has been peeled off. However, the process of peeling off the insulating layer 40 may cause the second tracking code 52 to become missing or unclear due to wear. For a second method, please refer to [reference needed]. Figure 4 In section 4.2, the second tracking code 52 can be set separately on the first surface of the resistor layer 20. If designed this way, the second tracking code 52 can only be read after the resistor layer 20 has been completely peeled off from the substrate 10. However, the second tracking code 52 set at this location has high reliability. As a third method, please refer to [reference needed]. Figure 4 In section 4.3, the second tracking code 52 can be simultaneously set on both the first and second surfaces of the resistor layer 20. If designed in this way, the second tracking code 52 read will be more authentic and reliable.
[0081] Furthermore, in this embodiment, the third tracking code 53 is separately disposed on the outer surface of one of the first terminal area S31 or the second terminal area S32;
[0082] Alternatively, the third tracking code 53 may be simultaneously disposed on the outer surface of the first terminal area S31 and the outer surface of the second terminal area S32;
[0083] Alternatively, the third tracking code 53 may be segmented and disposed on the outer surface of the first terminal area S31 and the outer surface of the second terminal area S32.
[0084] It should be noted that, please refer to Figure 5 Both the first terminal area S31 and the second terminal area S32 are actually located on the second surface of the resistor layer 20. In this embodiment, the third tracking code 53 can be set in three ways. For the first method, please refer to [reference needed]. Figure 5 In section 5.1, the third tracking code 53 can be separately located on the outer surface of the first terminal area S31. If designed this way, the third tracking code 53 can be read simply by disassembling the terminal 30 located in the first terminal area S31. For the second method, please refer to [reference needed]. Figure 5 In section 5.2, similar to the first method, the third tracking code 53 can be separately set on the outer surface of the second terminal area S32. Since it is similar to the first method, it will not be described again here. For details regarding the third method, please refer to [link / reference]. Figure 5 In section 5.3, the third tracking code 53 can be set in segments, with one part set on the outer surface of the first terminal area S31 and the other part set on the outer surface of the second terminal area S32. Although this method requires the two terminals 30 of the first terminal area S31 and the second terminal area S32 to be set in order to read the third tracking code 53, it can trace more production-related information about the process in a smaller resistive element.
[0085] Furthermore, in this embodiment, the fourth tracking code 54 is disposed on the outer surface of the insulating layer 40.
[0086] For easy understanding, please refer to Figure 6 In this embodiment, the fourth tracking code 54 can be set on the outer surface of the insulating layer 40, and can be read directly without disassembling the individual components.
[0087] Furthermore, in this embodiment, the package type identifier 60 of the resistor element is disposed on the second side of the substrate 10.
[0088] It is easy to understand that package designation 60 refers to a numerical code used to identify the package designation of the resistor element. For example, "0201" indicates that the individual element uses a 0201 package designation. In this embodiment, as... Figure 7 As shown, since the overall structure of the component is a stacked design, the outer surface of its insulating layer 40 is small and it is difficult to simultaneously accommodate the package model identifier 60 and the fourth tracking code 54 of the resistor component. Therefore, the package model of the resistor component can be set on the second side of the substrate 10.
[0089] It should be noted that, in practice, the second side of the substrate 10 may also have a first tracking code 51. The package model of the resistor element and the first tracking code 51 need to be kept at a certain distance for easy identification.
[0090] In addition, to achieve the above objectives, this application also proposes a resistor motherboard, which includes a plurality of resistor elements as described above.
[0091] The resistor motherboard provided in this application adopts all the embodiments of the above-mentioned resistor element. Therefore, the beneficial effects of the resistor motherboard provided in this application are the same as the beneficial effects of the resistor element provided in the above embodiments. Furthermore, the other technical features in the resistor motherboard are the same as the features disclosed in the methods of the above embodiments, and will not be repeated here.
[0092] The above are merely preferred embodiments of this application and do not limit the scope of this patent application. Any equivalent structural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.
Claims
1. A resistive element, characterized by, The resistive element includes: substrate; A resistive layer, wherein a first side of the resistive layer covers a first side of the substrate; The first terminal area, the second terminal area, and the insulating layer are all disposed on the second surface of the resistive layer. The first terminal area and the second terminal area are respectively disposed at both ends, and the insulating layer is disposed between the first terminal area and the second terminal area. A preset tracking code is set in at least one of the substrate, the resistive layer, the first terminal area, and the second terminal area, and at least maps the process information, work order information, and sorting information of the component on the motherboard of the individual component.
2. The resistive element of claim 1, wherein, The preset tracking code includes: A first tracking code is disposed on the substrate; A second tracking code is set on the resistive layer; A third tracking code is set on the first terminal area and / or the second terminal area; A fourth tracking code is set on the insulating layer; The first tracking code, the second tracking code, the third tracking code, and the fourth tracking code are bound together based on the same work order information.
3. The resistive element of claim 2, wherein The first tracking code is separately disposed on the first surface of the substrate; Alternatively, the first tracking code may be separately disposed on the second side of the substrate; Alternatively, the first tracking code may be simultaneously disposed on the first and second surfaces of the substrate.
4. The resistive element as described in claim 2, characterized in that, The second tracking code is separately disposed on the first side of the resistive layer; Alternatively, the second tracking code may be separately disposed on the second side of the resistive layer; Alternatively, the second tracking code may be simultaneously applied to both the first and second surfaces of the resistive layer.
5. The resistive element as described in claim 2, characterized in that, The third tracking code is separately disposed on the outer surface of one of the first terminal area or the second terminal area; Alternatively, the third tracking code may be simultaneously disposed on the outer surface of both the first terminal area and the outer surface of the second terminal area; Alternatively, the third tracking code segments are disposed on the outer surface of the first terminal area and the outer surface of the second terminal area.
6. The resistive element as described in claim 2, characterized in that, The fourth tracking code is disposed on the outer surface of the insulating layer.
7. The resistive element as claimed in claim 1, characterized in that, The preset tracking code is formed using at least one of the following methods: spraying, printing, nanoprinting, and laser printing.
8. The resistive element as claimed in claim 1, characterized in that, The preset tracking code can be either plaintext or cryptography.
9. The resistive element as claimed in claim 1, characterized in that, The package type identifier of the resistor element is located on the second side of the substrate.
10. A resistor motherboard, characterized in that, The resistor motherboard includes a plurality of resistor elements as described in any one of claims 1-9.