A multi-channel digital isolation output circuit

Abstract

This utility model relates to a multi-channel digital isolated output circuit, comprising: an integrated isolated communication module, an adaptive drive module, a MOSFET power output module, and an independent isolated power supply module; the output terminal of the integrated isolated communication module is connected to the input terminal of the adaptive drive module, and the input terminal of the MOSFET power output module is connected to the output terminal of the adaptive drive module; at least one integrated isolated communication module is provided, and each integrated isolated communication module is provided with an integrated isolated communication chip; each integrated isolated communication module is connected to at least one adaptive drive module, and multiple adaptive drive modules are connected to the integrated isolated communication module in parallel; each adaptive drive module is connected to one MOSFET power output module; this utility model is a highly integrated, wide-voltage adaptive multi-channel isolated output circuit, which can solve the component redundancy problem of multi-channel isolation and improve response speed, anti-interference capability, and voltage compatibility.

Description

Technical Field

[0001] This utility model discloses a digital isolation output circuit, belonging to the field of industrial equipment technology, specifically relating to a multi-channel digital isolation output circuit. Background Technology

[0002] When industrial equipment (such as PLCs and motor drivers) needs to control multiple external loads (such as relays and solenoid valves), traditional solutions typically employ optocoupler isolation and transistor drive circuits. Each channel requires an independent optocoupler, drive transistor, freewheeling diode, and protection components. This design results in a large circuit size and complex wiring; the slow response speed of the optocouplers limits high-frequency control scenarios; moreover, this circuit has poor drive voltage compatibility, requiring redesign of the circuit for different load voltages (12V / 24V / 48V); and the lack of independent power supply isolation between multiple channels may lead to crosstalk risks. Utility Model Content

[0003] Purpose of the utility model: To provide a multi-channel digital isolation output circuit to solve the problems mentioned above.

[0004] Technical solution: A multi-channel digital isolated output circuit, comprising: an integrated isolated communication module, an adaptive drive module, a MOSFET power output module, and an independent isolated power supply module;

[0005] The output terminal of the integrated isolation communication module is connected to the input terminal of the adaptive drive module, the input terminal of the MOSFET power output module is connected to the output terminal of the adaptive drive module, and the independent isolation power supply module is connected to the integrated isolation communication module, the adaptive drive module, and the MOSFET power output module simultaneously.

[0006] The integrated isolation communication module has at least one integrated isolation communication chip, and each integrated isolation communication module has an integrated isolation communication chip. Each integrated isolation communication module is connected to at least one adaptive drive module, and multiple adaptive drive modules are connected to the integrated isolation communication module in parallel. Each adaptive drive module is connected to a MOSFET power output module.

[0007] In a further embodiment, the input terminal of the integrated isolation communication module is connected to an input interface P1, and the output terminal of the MOSFET power output module is connected to an output interface P2.

[0008] In a further embodiment, the integrated isolation communication module is provided in two parts, including: an integrated isolation communication chip U2 and an integrated isolation communication chip U3; the integrated isolation communication chip U2 and the integrated isolation communication chip U3 have the same structure.

[0009] Pin 1 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 is connected to one end of capacitor C9 and one end of capacitor C11, respectively, and is connected to the independent isolation power supply module for input +5VDG. Pin 16 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 is connected to one end of capacitor C10 and one end of capacitor C12, respectively, and is connected to the independent isolation power supply module for input +5VA. The other ends of capacitors C9 and C11 are grounded, and the other ends of capacitors C10 and C12 are signal grounded. Pins 2 and 8 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 are grounded, and pins 9 and 15 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 are signal grounded. Pins 3 to 6 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 are connected to the input interface P1, and pins 11 to 14 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 are connected to the adaptive drive module.

[0010] In a further embodiment, pin 1 of the input interface P1 is grounded, pin 2 is connected to the independent isolated power supply module to input +5VDG, and pins 3 to 10 are connected to pins 3 to 6 of the integrated isolated communication chip U2 and the integrated isolated communication chip U3; pins 1 to 8 of the output interface P2 are connected to the output terminal of the MOSFET power output module, and pins 9 and 10 are grounded.

[0011] In a further embodiment, the adaptive drive module and the MOSFET power output module constitute a drive output channel. The drive output channel has 8 identical drive output channels. The input terminals of the first to fourth drive output channels are connected to pins 11 to 14 of the integrated isolation communication chip U2, and the output terminals are connected to pins 1 to 4 of the output interface P2. The input terminals of the fifth to eighth drive output channels are connected to pins 11 to 14 of the integrated isolation communication chip U3, and the output terminals are connected to pins 5 to 5 of the output interface P2.

[0012] In a further embodiment, the independent isolated power supply module includes: an isolated power supply module and a boost circuit;

[0013] The isolated power supply module includes an isolated power supply chip U4, wherein pin 1 of the isolated power supply chip U4 is grounded, pin 2 outputs +5VDG, pin 3 is grounded, and pin 4 outputs +5VA.

[0014] The boost circuit includes: capacitor C1, capacitor C2, boost chip U1, inductor L1, Zener diode D1, resistor R2, capacitor C5, capacitor C8, resistor R1, resistor R3, capacitor C3, capacitor C4, capacitor C6, capacitor C7 and interface CN1.

[0015] Pin 6 of the boost chip U1 is connected to pins 3 and 7, and simultaneously connected to one end of capacitor C2, one end of capacitor C1, and one end of inductor L1. It is also connected to pin 2 of the isolation power supply chip U4 to input +5VDG. Pin 4 of the boost chip U1 is simultaneously connected to the other ends of capacitors C2 and C1, and its signal is grounded. Pin 5 of the boost chip U1 is simultaneously connected to the other end of inductor L1 and the positive terminal of Zener diode D1. Pin 2 of the boost chip U1 is simultaneously connected to one end of resistor R1 and one end of resistor R3. Pin 1 of the boost chip U1 is connected to one end of resistor R2. The other end is connected to one end of capacitor C8. Pin 8 of the boost chip U1 is connected to one end of capacitor C5. The other end of capacitor C5 and the other end of capacitor C8 are grounded. The negative terminal of Zener diode D1 is connected to the other end of resistor R1, one end of capacitor C3 and the other end of capacitor C4, and outputs +10VA. The other end of resistor R3 is connected to the other end of capacitor C3 and the other end of capacitor C4, and is grounded. Pin 1 of interface CN1 is connected to the input voltage VCC and is connected to one end of capacitor C6 and one end of capacitor C7. Pin 2 is connected to the other end of capacitor C6 and the other end of capacitor C7, and is grounded.

[0016] In a further embodiment, the adaptive driving module includes: a driving chip U8 and a resistor R7;

[0017] One end of resistor R7 is connected to pin 2 of the isolation power supply chip U4 to input +5VDG. Pin 12 of the driver chip U8 is connected to the other end of resistor R7, and pins 1 and 3 are connected to the integrated isolation communication chip. Pins 2, 4, 5, 6, and 13 of the driver chip U8 are grounded. Pins 8, 10, and 11 of the driver chip U8 input the +10VA output of the boost chip.

[0018] In a further embodiment, the MOSFET power output module includes: capacitor C14, resistor R13, Zener diode D3, resistor R5, MOSFET U6, MOSFET Q2, current-limiting resistor R9, and resistor R11;

[0019] One end of capacitor C14 is connected to pin 9 of driver chip U8. One end of resistor R13 is connected to pin 7 of driver chip U8. Pin 1 of MOSFET U6 is simultaneously connected to the other end of capacitor C14, the positive terminal of Zener diode D3, and one end of resistor R5. Pin 3 of MOSFET U6 is simultaneously connected to the negative terminal of Zener diode D3 and one end of resistor R5, with input voltage VCC. Pin 2 of MOSFET U6 is simultaneously connected to one end of current-limiting resistor R9 and pin 2 of MOSFET Q2. Pin 1 of MOSFET Q2 is connected to the other end of resistor R13, and pin 3 is grounded. One end of resistor R11 is connected to the other end of current-limiting resistor R9 and to output interface P2, and the other end of resistor R11 is grounded.

[0020] This invention adopts an integrated isolated communication + adaptive drive + MOSFET power output + independent isolated power supply structure, which has the following advantages:

[0021] 1. Integrated isolated communication, a single chip can handle 4-channel signal isolation (two chips can cover 8 channels), with the advantage of low delay (less than 100ns), which is faster than optocouplers.

[0022] 2. Adaptive drive circuit: When the drive chip receives the isolation signal, it will automatically adapt to the drive voltage of 12V-48V; its built-in dead-time control can prevent MOSFETs from turning on.

[0023] 3. MOSFET power output stage, supporting high-voltage MOSFETs (≤230V) to directly drive loads; strong output current capability, capable of continuously outputting 2A per channel (peak 5A); and has a wide operating temperature range (-55°C ~ 150°C).

[0024] 4. Independent isolated power supply: The isolated power supply module generates +5VDG to power each channel; the boost circuit boosts +5VA to +10VA to power the driver chip. Attached Figure Description

[0025] Figure 1 This is a schematic diagram of the present invention.

[0026] Figure 2 This is a circuit diagram of the integrated isolation communication module of this utility model.

[0027] Figure 3 This is a schematic diagram of the input interface of this utility model.

[0028] Figure 4 This is a schematic diagram of the output interface of this utility model.

[0029] Figure 5 This is the circuit diagram of the isolated power supply module of the independent isolated power supply module of this utility model.

[0030] Figure 6 This is a schematic diagram of the boost circuit of the independent isolated power supply module of this utility model.

[0031] Figure 7 This is a circuit diagram of the adaptive drive module and MOSFET power output module of this utility model.

[0032] Figure 8 This is a schematic diagram of the adaptive drive module and MOSFET power output module of this utility model.

[0033] Figure 9 This is a flowchart of the process of this utility model. Detailed Implementation

[0034] The technical solution of this utility model will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model.

[0035] In the description of this utility model, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0036] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances. Furthermore, the technical features involved in the different embodiments of this utility model described below can be combined with each other as long as they do not conflict with each other.

[0037] A multi-channel digital isolation output circuit, such as Figure 1As shown, it includes: an integrated isolated communication module, an adaptive drive module, a MOSFET power output module, and an independent isolated power supply module;

[0038] The output terminal of the integrated isolation communication module is connected to the input terminal of the adaptive drive module, the input terminal of the MOSFET power output module is connected to the output terminal of the adaptive drive module, and the independent isolation power supply module is connected to the integrated isolation communication module, the adaptive drive module, and the MOSFET power output module simultaneously.

[0039] The integrated isolation communication module has at least one integrated isolation communication chip, and each integrated isolation communication module has an integrated isolation communication chip. Each integrated isolation communication module is connected to at least one adaptive drive module, and multiple adaptive drive modules are connected to the integrated isolation communication module in parallel. Each adaptive drive module is connected to a MOSFET power output module.

[0040] Example 1:

[0041] like Figure 3 and Figure 4 As shown, the input terminal of the integrated isolation communication module is connected to the input interface P1, and the output terminal of the MOSFET power output module is connected to the output interface P2.

[0042] Example 2:

[0043] like Figure 5 As shown, the integrated isolation communication module includes two components: an integrated isolation communication chip U2 and an integrated isolation communication chip U3; the integrated isolation communication chip U2 and the integrated isolation communication chip U3 have the same structure.

[0044] Pin 1 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 is connected to one end of capacitor C9 and one end of capacitor C11, respectively, and is connected to the independent isolation power supply module for input +5VDG. Pin 16 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 is connected to one end of capacitor C10 and one end of capacitor C12, respectively, and is connected to the independent isolation power supply module for input +5VA. The other ends of capacitors C9 and C11 are grounded, and the other ends of capacitors C10 and C12 are signal grounded. Pins 2 and 8 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 are grounded, and pins 9 and 15 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 are signal grounded. Pins 3 to 6 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 are connected to the input interface P1, and pins 11 to 14 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 are connected to the adaptive drive module.

[0045] Example 3:

[0046] like Figures 2 to 4 As shown, pin 1 of the input interface P1 is grounded, pin 2 is connected to the independent isolated power supply module to input +5VDG, and pins 3 to 10 are connected to pins 3 to 6 of the integrated isolated communication chip U2 and the integrated isolated communication chip U3; pins 1 to 8 of the output interface P2 are connected to the output terminal of the MOSFET power output module, and pins 9 and 10 are grounded.

[0047] Example 4:

[0048] like Figure 8 As shown, the adaptive drive module and the MOSFET power output module form a drive output channel. The drive output channel has 8 identical structures. The input terminals of the first to fourth drive output channels are connected to pins 11 to 14 of the integrated isolation communication chip U2, and the output terminals are connected to pins 1 to 4 of the output interface P2. The input terminals of the fifth to eighth drive output channels are connected to pins 11 to 14 of the integrated isolation communication chip U3, and the output terminals are connected to pins 5 to 5 of the output interface P2.

[0049] Example 5:

[0050] like Figure 5 and Figure 6 As shown, the independent isolated power supply module includes: an isolated power supply module and a boost circuit;

[0051] The isolated power supply module includes an isolated power supply chip U4, wherein pin 1 of the isolated power supply chip U4 is grounded, pin 2 outputs +5VDG, pin 3 is grounded, and pin 4 outputs +5VA.

[0052] The boost circuit includes: capacitor C1, capacitor C2, boost chip U1, inductor L1, Zener diode D1, resistor R2, capacitor C5, capacitor C8, resistor R1, resistor R3, capacitor C3, capacitor C4, capacitor C6, capacitor C7 and interface CN1.

[0053] Pin 6 of the boost chip U1 is connected to pins 3 and 7, and simultaneously connected to one end of capacitor C2, one end of capacitor C1, and one end of inductor L1. It is also connected to pin 2 of the isolation power supply chip U4 to input +5VDG. Pin 4 of the boost chip U1 is simultaneously connected to the other ends of capacitors C2 and C1, and its signal is grounded. Pin 5 of the boost chip U1 is simultaneously connected to the other end of inductor L1 and the positive terminal of Zener diode D1. Pin 2 of the boost chip U1 is simultaneously connected to one end of resistor R1 and one end of resistor R3. Pin 1 of the boost chip U1 is connected to one end of resistor R2. The other end is connected to one end of capacitor C8. Pin 8 of the boost chip U1 is connected to one end of capacitor C5. The other end of capacitor C5 and the other end of capacitor C8 are grounded. The negative terminal of Zener diode D1 is connected to the other end of resistor R1, one end of capacitor C3 and the other end of capacitor C4, and outputs +10VA. The other end of resistor R3 is connected to the other end of capacitor C3 and the other end of capacitor C4, and is grounded. Pin 1 of interface CN1 is connected to the input voltage VCC and is connected to one end of capacitor C6 and one end of capacitor C7. Pin 2 is connected to the other end of capacitor C6 and the other end of capacitor C7, and is grounded.

[0054] Example 6:

[0055] like Figure 7 As shown, the adaptive drive module includes: a drive chip U8 and a resistor R7;

[0056] One end of resistor R7 is connected to pin 2 of the isolation power supply chip U4 to input +5VDG. Pin 12 of the driver chip U8 is connected to the other end of resistor R7, and pins 1 and 3 are connected to the integrated isolation communication chip. Pins 2, 4, 5, 6, and 13 of the driver chip U8 are grounded. Pins 8, 10, and 11 of the driver chip U8 input the +10VA output of the boost chip.

[0057] Example 7:

[0058] like Figure 7 As shown, the MOSFET power output module includes: capacitor C14, resistor R13, Zener diode D3, resistor R5, MOSFET U6, MOSFET Q2, current limiting resistor R9, and resistor R11.

[0059] One end of capacitor C14 is connected to pin 9 of driver chip U8. One end of resistor R13 is connected to pin 7 of driver chip U8. Pin 1 of MOSFET U6 is simultaneously connected to the other end of capacitor C14, the positive terminal of Zener diode D3, and one end of resistor R5. Pin 3 of MOSFET U6 is simultaneously connected to the negative terminal of Zener diode D3 and one end of resistor R5, with input voltage VCC. Pin 2 of MOSFET U6 is simultaneously connected to one end of current-limiting resistor R9 and pin 2 of MOSFET Q2. Pin 1 of MOSFET Q2 is connected to the other end of resistor R13, and pin 3 is grounded. One end of resistor R11 is connected to the other end of current-limiting resistor R9 and to output interface P2, and the other end of resistor R11 is grounded.

[0060] Working principle: such as Figure 9 As shown, the input interface P1 is first connected to the main controller. Simultaneously, the main controller inputs FPGA control signals to the two integrated isolation communication chips in the integrated isolation communication module through input interface P1. Each integrated isolation communication chip has four parallel signal isolation channels. Each channel consists of an adaptive drive module and a MOSFET power output module. Thus, the integrated isolation communication chip inputs isolation signals to the adaptive drive module. When the drive chip receives the isolation signal, it automatically adapts to a drive voltage of 12V-48V. Its built-in dead-time control prevents MOSFET cross-connection. Simultaneously, the MOSFET power output module outputs signals to the output interface P2 and transmits them to the external load. Therefore, this invention adopts a four-chip eight-channel architecture: two integrated isolation communication chips + eight drive chips, achieving high-density integration of eight channels. It also features wide voltage adaptation: the drive chip automatically adapts to a load voltage of 12V-48V without external jumpers. Furthermore, this invention has a nanosecond-level delay path: signal transmission delay <100ns, supporting high-frequency switching control (>1MHz).

[0061] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the protection scope of this invention.

Claims

1. A multi-channel digital isolated output circuit, characterized by, include: It integrates an isolated communication module, an adaptive drive module, a MOSFET power output module, and an independent isolated power supply module; The output terminal of the integrated isolation communication module is connected to the input terminal of the adaptive drive module, the input terminal of the MOSFET power output module is connected to the output terminal of the adaptive drive module, and the independent isolation power supply module is connected to the integrated isolation communication module, the adaptive drive module, and the MOSFET power output module simultaneously. The integrated isolation communication module has at least one integrated isolation communication chip, and each integrated isolation communication module has an integrated isolation communication chip. Each integrated isolation communication module is connected to at least one adaptive drive module, and multiple adaptive drive modules are connected to the integrated isolation communication module in parallel. Each adaptive drive module is connected to a MOSFET power output module.

2. The multi-channel digital isolated output circuit of claim 1, wherein, The input terminal of the integrated isolation communication module is connected to the input interface P1, and the output terminal of the MOSFET power output module is connected to the output interface P2.

3. The multi-channel digital isolated output circuit of claim 2, wherein, The integrated isolation communication module includes two components: an integrated isolation communication chip U2 and an integrated isolation communication chip U3; the integrated isolation communication chip U2 and the integrated isolation communication chip U3 have the same structure. Pin 1 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 is connected to one end of capacitor C9 and one end of capacitor C11, respectively, and is connected to the independent isolation power supply module for input +5VDG. Pin 16 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 is connected to one end of capacitor C10 and one end of capacitor C12, respectively, and is connected to the independent isolation power supply module for input +5VA. The other ends of capacitors C9 and C11 are grounded, and the other ends of capacitors C10 and C12 are signal grounded. Pins 2 and 8 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 are grounded, and pins 9 and 15 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 are signal grounded. Pins 3 to 6 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 are connected to the input interface P1, and pins 11 to 14 of the integrated isolation communication chip U2 and the integrated isolation communication chip U3 are connected to the adaptive drive module.

4. The multi-channel digital isolated output circuit of claim 3, wherein, Pin 1 of the input interface P1 is grounded, pin 2 is connected to the independent isolated power supply module to input +5VDG, and pins 3 to 10 are connected to pins 3 to 6 of the integrated isolated communication chip U2 and the integrated isolated communication chip U3. Pins 1 to 8 of the output interface P2 are connected to the output terminal of the MOSFET power output module, and pins 9 and 10 are grounded.

5. The multi-channel digital isolated output circuit of claim 4, wherein, The adaptive drive module and the MOSFET power output module constitute a drive output channel. The drive output channel has 8 identical drive output channels. The input terminals of the first to fourth drive output channels are connected to pins 11 to 14 of the integrated isolation communication chip U2, and the output terminals are connected to pins 1 to 4 of the output interface P2. The input terminals of the fifth to eighth drive output channels are connected to pins 11 to 14 of the integrated isolation communication chip U3, and the output terminals are connected to pins 5 to 5 of the output interface P2.

6. The multi-channel digital isolated output circuit of claim 5, wherein, The independent isolated power supply module includes: an isolated power supply module and a boost circuit; The isolated power supply module includes an isolated power supply chip U4, wherein pin 1 of the isolated power supply chip U4 is grounded, pin 2 outputs +5VDG, pin 3 is grounded, and pin 4 outputs +5VA. The boost circuit includes: capacitor C1, capacitor C2, boost chip U1, inductor L1, Zener diode D1, resistor R2, capacitor C5, capacitor C8, resistor R1, resistor R3, capacitor C3, capacitor C4, capacitor C6, capacitor C7 and interface CN1. Pin 6 of the boost chip U1 is connected to pins 3 and 7, and simultaneously connected to one end of capacitor C2, one end of capacitor C1, and one end of inductor L1. It is also connected to pin 2 of the isolation power supply chip U4 to input +5VDG. Pin 4 of the boost chip U1 is simultaneously connected to the other ends of capacitors C2 and C1, and its signal is grounded. Pin 5 of the boost chip U1 is simultaneously connected to the other end of inductor L1 and the positive terminal of Zener diode D1. Pin 2 of the boost chip U1 is simultaneously connected to one end of resistor R1 and one end of resistor R3. Pin 1 of the boost chip U1 is connected to one end of resistor R2. The other end is connected to one end of capacitor C8. Pin 8 of the boost chip U1 is connected to one end of capacitor C5. The other end of capacitor C5 and the other end of capacitor C8 are grounded. The negative terminal of Zener diode D1 is connected to the other end of resistor R1, one end of capacitor C3 and the other end of capacitor C4, and outputs +10VA. The other end of resistor R3 is connected to the other end of capacitor C3 and the other end of capacitor C4, and is grounded. Pin 1 of interface CN1 is connected to the input voltage VCC and is connected to one end of capacitor C6 and one end of capacitor C7. Pin 2 is connected to the other end of capacitor C6 and the other end of capacitor C7, and is grounded.

7. The multi-channel digital isolation output circuit according to claim 6, characterized in that, The adaptive drive module includes: a drive chip U8 and a resistor R7; One end of resistor R7 is connected to pin 2 of the isolation power supply chip U4 to input +5VDG. Pin 12 of the driver chip U8 is connected to the other end of resistor R7, and pins 1 and 3 are connected to the integrated isolation communication chip. Pins 2, 4, 5, 6, and 13 of the driver chip U8 are grounded. Pins 8, 10, and 11 of the driver chip U8 input the +10VA output of the boost chip.

8. The multi-channel digital isolation output circuit according to claim 7, characterized in that, The MOSFET power output module includes: capacitor C14, resistor R13, Zener diode D3, resistor R5, MOSFET U6, MOSFET Q2, current-limiting resistor R9, and resistor R11; One end of capacitor C14 is connected to pin 9 of driver chip U8. One end of resistor R13 is connected to pin 7 of driver chip U8. Pin 1 of MOSFET U6 is simultaneously connected to the other end of capacitor C14, the positive terminal of Zener diode D3, and one end of resistor R5. Pin 3 of MOSFET U6 is simultaneously connected to the negative terminal of Zener diode D3 and one end of resistor R5, with input voltage VCC. Pin 2 of MOSFET U6 is simultaneously connected to one end of current-limiting resistor R9 and pin 2 of MOSFET Q2. Pin 1 of MOSFET Q2 is connected to the other end of resistor R13, and pin 3 is grounded. One end of resistor R11 is connected to the other end of current-limiting resistor R9 and to output interface P2, and the other end of resistor R11 is grounded.

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