Low power integrated analog monitoring system

Abstract

The utility model relates to monitoring technical field, propose a kind of low-power integrated analog monitoring system, including remote terminal, controller and multiple acquisition modules, and acquisition module is connected with the controller between RS232 module communication, and RS232 module includes chip U1, triode Q1, MOS tube Q2, resistance R1, resistance R2, signal sending branch and signal receiving branch, the input end of signal sending branch is connected with the TX end of chip U1, and the output end is connected with the RX end of controller, the input end of signal receiving branch is connected with the TX end of controller, and the output end is connected with the RX end of chip U1, the base of triode Q1 is connected with controller by resistance R1, the emitter of triode Q1 is grounded, the collector of triode Q1 is connected with 3.3V power supply by resistance R2, the collector of triode Q1 is connected with the gate of MOS tube Q2, the drain of MOS tube Q2 is connected with 3.3V power supply, and the source of MOS tube Q2 is connected with the power supply end of signal sending branch. Through the above technical scheme, the problem of high power consumption in remote monitoring scene in the prior art is solved.

Description

Technical Field

[0001] This utility model relates to the field of monitoring technology, specifically to a low-power integrated analog monitoring system. Background Technology

[0002] In numerous scenarios requiring monitoring of equipment, environment, or goods, analog monitoring systems remain widely used due to their high stability and strong anti-interference capabilities. However, traditional monitoring systems often face challenges such as limited communication distance, excessive power consumption, or complex deployment. While the RS232 protocol has a mature application foundation, early designs were not optimized for low-power scenarios and require additional circuitry to achieve long-distance or remote transmission capabilities. With the increasing sensitivity of embedded systems to battery life, heat dissipation control, and cost, existing solutions struggle to meet the combined demands of modern monitoring systems for high integration, ultra-low power consumption, and reliable communication.

[0003] In industrial production environments, numerous monitoring devices operate continuously. High power consumption not only increases energy costs for enterprises but can also lead to severe overheating, affecting the lifespan and stability of the equipment. This paper presents a low-power integrated analog monitoring system to address the problems of high power consumption and poor versatility in existing analog monitoring systems. It achieves low-power, highly integrated status monitoring functions to meet the monitoring needs of different scenarios. Utility Model Content

[0004] This invention proposes a low-power integrated analog monitoring system, which solves the problem of high power consumption in remote monitoring scenarios in the prior art.

[0005] The technical solution of this utility model is as follows:

[0006] A low-power integrated analog monitoring system includes a remote terminal, a controller, and multiple acquisition modules. Each acquisition module is distributed at different acquisition points. The acquisition modules communicate with the controller via an RS232 module, and the controller communicates with the remote terminal via a GPRS module.

[0007] The RS232 module includes a chip U1, a transistor Q1, a MOSFET Q2, resistors R1 and R2, a signal transmitting branch, and a signal receiving branch. The input terminal of the signal transmitting branch is connected to the TX terminal of the chip U1, and the output terminal is connected to the RX terminal of the controller. The input terminal of the signal receiving branch is connected to the TX terminal of the controller, and the output terminal is connected to the RX terminal of the chip U1. The base of the transistor Q1 is connected to the controller through resistor R1, the emitter of the transistor Q1 is grounded, the collector of the transistor Q1 is connected to a 3.3V power supply through resistor R2, the collector of the transistor Q1 is connected to the gate of the MOSFET Q2, the drain of the MOSFET Q2 is connected to a 3.3V power supply, and the source of the MOSFET Q2 is connected to the power supply terminal of the signal transmitting branch.

[0008] Furthermore, the signal transmission branch includes operational amplifier U2, operational amplifier U3, transistor Q3, resistors R3, R4, R5, R6, R7, R8, and capacitor C1. The inverting input terminal of operational amplifier U2 is grounded through resistor R3, the non-inverting input terminal of operational amplifier U2 is connected to the TX terminal of chip U1, the power supply terminal of operational amplifier U2 is connected to the drain of MOSFET Q2, the non-inverting input terminal of operational amplifier U2 is also grounded through resistor R4, and the output terminal of operational amplifier U2 is connected to the inverting input terminal through resistor R5. The output terminal of U2 is connected in series with capacitor C1, resistor R7, and resistor R8 and then grounded. The base of transistor Q3 is connected to the series connection point of resistors R7 and R8. The emitter of transistor Q3 is grounded. The collector of transistor Q3 is connected to the drain of MOSFET Q2 through resistor R6. The collector of transistor Q3 is connected to the non-inverting input terminal of operational amplifier U3. The power supply terminal of operational amplifier U3 is connected to the drain of MOSFET Q2. The output terminal of operational amplifier U3 is connected to the inverting input terminal. The output terminal of operational amplifier U3 is connected to the controller.

[0009] Furthermore, the signal receiving branch includes transistors Q4, Q5, Q6, and Q7, and operational amplifier U4. The base of transistor Q4 is connected to the controller via resistor R9, the emitter of transistor Q4 is grounded, and the collector of transistor Q4 is connected to a 3.3V power supply via resistor R10. The collector of transistor Q4 is connected to the base of transistor Q5, the emitter of transistor Q5 is grounded, and the collector of transistor Q5 is connected to a 3.3V power supply via resistors R11 and R12. The power supply is connected to the inverting input of the operational amplifier U4, which is connected to the series connection of resistors R11 and R12. The output of the operational amplifier U4 is connected to the base of transistors Q6 and Q7. The collector of transistor Q6 is connected to a 24V power supply. The emitter of transistor Q6 is connected to the emitter of transistor Q7. The collector of transistor Q7 is connected to the base of transistor Q7. The emitter of transistor Q6 is connected to the non-inverting input of the operational amplifier U4. The emitter of transistor Q6 is connected to the RX terminal of chip U1.

[0010] Furthermore, the RS232 module also includes a transistor Q11, a MOSFET Q10, resistors R15 and R16. The base of transistor Q11 is connected to the controller through resistor R16, the emitter of transistor Q11 is grounded, the collector of transistor Q11 is connected to a 12V power supply through resistor R15, the collector of transistor Q11 is connected to the gate of MOSFET Q10, the drain of MOSFET Q10 is connected to a 12V power supply, and the source of MOSFET Q10 is connected to the power supply terminal of chip U1.

[0011] The working principle and beneficial effects of this utility model are as follows:

[0012] In this invention, a low-power integrated analog monitoring system achieves data acquisition and transmission through a three-level architecture. The acquisition modules are distributed across different monitoring points and establish local communication with the controller via an RS232 module. The controller then uses a GPRS module to remotely transmit data to the terminal. The RS232 module employs a dynamic power control mechanism. When there is no data transmission, the power supply to the signal transmission branch is cut off through transistor Q1 and MOSFET Q2, retaining only the basic standby circuit. When the controller detects a communication requirement, it triggers the transistor to conduct through a logic level, turning on the MOSFET. Simultaneously, the signal transmission / reception branch completes data interaction under the drive of the TX / RX signals, realizing an on-demand power supply mode that supplies power during communication and cuts off power when idle. Hardware-level power management significantly reduces system power consumption, reducing standby power consumption in idle states. This makes it suitable for distributed monitoring scenarios in industrial sites and extends the battery life of field-deployed equipment through its low-power characteristics, comprehensively improving the system's energy efficiency and practicality.

[0013] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments. Attached Figure Description

[0014] Figure 1 This is the circuit diagram of the RS232 module in this utility model. Detailed Implementation

[0015] The technical solutions of this utility model will be clearly and completely described below with reference to the embodiments of this utility model. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this utility model.

[0016] Example 1

[0017] This embodiment proposes a low-power integrated analog monitoring system, including a remote terminal, a controller, and multiple acquisition modules. Each acquisition module is distributed at different acquisition points. The acquisition modules communicate with the controller via an RS232 module, and the controller communicates with the remote terminal via a GPRS module.

[0018] like Figure 1 As shown, the RS232 module includes chip U1, transistor Q1, MOSFET Q2, resistors R1 and R2, a signal transmitting branch, and a signal receiving branch. The input terminal of the signal transmitting branch is connected to the TX terminal of chip U1, and the output terminal is connected to the RX terminal of the controller. The input terminal of the signal receiving branch is connected to the TX terminal of the controller, and the output terminal is connected to the RX terminal of chip U1. The base of transistor Q1 is connected to the controller through resistor R1, the emitter of transistor Q1 is grounded, the collector of transistor Q1 is connected to a 3.3V power supply through resistor R2, the collector of transistor Q1 is connected to the gate of MOSFET Q2, the drain of MOSFET Q2 is connected to a 3.3V power supply, and the source of MOSFET Q2 is connected to the power supply terminal of the signal transmitting branch.

[0019] In this embodiment, the low-power integrated analog monitoring system implements data acquisition and transmission through a three-level architecture. The acquisition modules are distributed at different monitoring points and establish local communication with the controller via an RS232 module. The controller then uses a GPRS module to remotely transmit the data to the terminal. The RS232 module adopts a dynamic power control mechanism. When there is no data transmission, the power supply to the signal transmission branch is cut off through transistor Q1 and MOSFET Q2, leaving only the basic standby circuit. When the controller detects a communication requirement, it triggers the transistor to conduct through a logic level, turning on the MOSFET to supply power. At the same time, the signal transmission / reception branch completes data interaction under the drive of the TX / RX signals, realizing an on-demand power supply mode that supplies power during communication and cuts off power when idle.

[0020] Hardware-level power management significantly reduces system power consumption, minimizing standby power consumption in idle states. Independent power supply control for the RS232 module avoids energy waste caused by continuous power supply in traditional designs. Furthermore, signal line isolation and power monitoring enhance communication stability. The modular architecture supports flexible expansion of the number of data acquisition nodes, and combined with GPRS remote transmission capabilities, it is suitable for distributed monitoring scenarios in industrial settings. Its low-power characteristics also extend the battery life of field-deployed equipment, comprehensively improving the system's energy efficiency and practicality.

[0021] Furthermore, such as Figure 1 As shown, the signal transmission branch includes operational amplifier U2, operational amplifier U3, transistor Q3, resistors R3, R4, R5, R6, R7, R8, and capacitor C1. The inverting input of operational amplifier U2 is grounded through resistor R3, and the non-inverting input of operational amplifier U2 is connected to the TX terminal of chip U1. The power supply terminal of operational amplifier U2 is connected to the drain of MOSFET Q2. The non-inverting input of operational amplifier U2 is also grounded through resistor R4, and the output of operational amplifier U2 is connected to the inverting input through resistor R5. The output of operational amplifier U2 is connected to ground via a series connection of capacitor C1, resistor R7, and resistor R8. The base of transistor Q3 is connected to the series connection of resistors R7 and R8. The emitter of transistor Q3 is grounded. The collector of transistor Q3 is connected to the drain of MOSFET Q2 via resistor R6. The collector of transistor Q3 is connected to the non-inverting input of operational amplifier U3. The power supply of operational amplifier U3 is connected to the drain of MOSFET Q2. The output of operational amplifier U3 is connected to the inverting input. The output of operational amplifier U3 is connected to the controller.

[0022] In this embodiment, signal amplification and level conversion are achieved through two stages of operational amplifiers and transistors. The TTL level signal sent from the TX terminal of chip U1 is grounded via resistor R4 to form a voltage divider reference, and is simultaneously input to the non-inverting input of operational amplifier U2. U2 is configured as a non-inverting proportional amplifier (with feedback resistor R5 for gain control), and its output is coupled to the base of transistor Q3 via capacitor C1. The voltage divider network of R7 and R8 converts the operational amplifier output signal into a bias voltage to drive the transistor. Transistor Q3 operates in switching mode, and its collector output is current-limited by resistor R6 to form an RS232 standard level. Then, operational amplifier U3 forms a voltage follower (with the inverting input and output shorted to achieve unity gain buffering) to isolate the load influence, and finally outputs to the RX terminal of the controller. The drain power supply control of MOSFET Q2 ensures that this branch is only activated during communication, further reducing power consumption.

[0023] By combining operational amplifiers and transistors, a 3.3V TTL signal can be converted to the RS232 standard level, compatible with traditional serial port devices. The power supply control of MOSFET Q2, combined with the transistor's switching mode, avoids the continuous power supply required by traditional RS232 transceivers, reducing static power consumption to the microamplitude level. The negative feedback network (R5) of operational amplifier U2 suppresses noise interference, capacitor C1 isolates DC components, and the buffering effect of operational amplifier U3 eliminates load effects, ensuring signal transmission integrity. The discrete component design facilitates adjustment of gain (R5) or output level (R6, R7, R8), adapting to different interface requirements while reducing dependence on a single chip.

[0024] Furthermore, such as Figure 1 As shown, the signal receiving branch includes transistors Q4, Q5, Q6, and Q7, and operational amplifier U4. The base of transistor Q4 is connected to the controller via resistor R9, the emitter of transistor Q4 is grounded, and the collector of transistor Q4 is connected to a 3.3V power supply via resistor R10. The collector of transistor Q4 is connected to the base of transistor Q5, the emitter of transistor Q5 is grounded, and the collector of transistor Q5 is connected via resistors R11 and R12. With a 3.3V power supply, the inverting input of op-amp U4 is connected to the series connection of resistors R11 and R12. The output of op-amp U4 is connected to the bases of transistors Q6 and Q7. The collector of transistor Q6 is connected to a 24V power supply. The emitter of transistor Q6 is connected to the emitter of transistor Q7. The collector of transistor Q7 is connected to the base. The emitter of transistor Q6 is connected to the non-inverting input of op-amp U4. The emitter of transistor Q6 is connected to the RX terminal of chip U1.

[0025] In this embodiment, level conversion and signal driving are achieved through a combination of multi-stage transistors and operational amplifiers. The enable signal sent by the controller drives transistor Q4 to conduct via resistor R9, and its collector outputs a high level to the base of transistor Q5, turning on Q5 and pulling down the collector voltage of Q5. Resistors R11 and R12 form a voltage divider network, dividing the 3.3V power supply and using it as the inverting input reference for operational amplifier U4. Operational amplifier U4 is configured as a differential amplifier (the non-inverting input is connected to the emitter of transistor Q6 to receive RS232 level signals). By comparing the voltage difference between the non-inverting input (RS232 input) and the inverting input (voltage divider reference), it outputs a drive signal to the bases of transistors Q6 and Q7. Q6 and Q7 form a push-pull output structure (Q6 is a PNP transistor, Q7 is an NPN transistor), and their emitters jointly output the converted TTL level to the RX terminal of chip U1. At the same time, the emitter of Q6 feeds back to the non-inverting input of operational amplifier U4 to form a closed-loop regulation. The 24V power supply powers Q6, ensuring that the output signal has high drive capability and is suitable for long-distance transmission or high capacitive load scenarios.

[0026] The RS232 level is converted to the TTL level through a push - pull structure (Q6 + Q7), while providing a low output impedance (typically <50Ω), supporting direct driving of the RX terminal of chip U1 to avoid signal attenuation. The 24V power supply enables the output stage to have a high - current driving ability (typically 10 - 20mA), and it can be compatible with highly capacitive loads (such as long cables or multiple devices in parallel). The differential - input design of operational amplifier U4 suppresses common - mode noise, and combines with a feedback regulation mechanism to dynamically compensate for signal distortion, ensuring stable output of the TTL level even when the amplitude of the RS232 signal fluctuates. The switching function of triode Q5 isolates the controller from the subsequent circuit, avoiding digital signal interference with the analog receiving path. Triodes Q4 and Q5 are only turned on during communication, and the static power consumption is extremely low (in the nanoscale). The discrete - component design facilitates heat - dissipation layout, avoiding performance degradation of the integrated chip due to high temperature. The voltage - dividing resistors R11 and R12 can adjust the inverting - input reference voltage to adapt to different RS232 level standards. The push - pull output structure is easy to be extended to a differential output to meet the future protocol upgrade requirements (such as RS422 / RS485).

[0027] Furthermore, as Figure 1 shown, the RS232 module further includes triode Q11, MOS transistor Q10, resistor R15 and resistor R16. The base of triode Q11 is connected to the controller through resistor R16, the emitter of triode Q11 is grounded, the collector of triode Q11 is connected to the 12V power supply through resistor R15, the collector of triode Q11 is connected to the gate of MOS transistor Q10, the drain of MOS transistor Q10 is connected to the 12V power supply, and the source of MOS transistor Q10 is connected to the power - supply terminal of chip U1.

[0028] In this embodiment, an independent power - supply control path for chip U1 is formed by triode Q11 and MOS transistor Q10. The controller sends a logic level to the base of triode Q11 through resistor R16. When it is necessary to activate the RS232 module, the controller outputs a high level to turn on Q11, and the collector voltage is pulled down to near - ground level through resistor R15, driving the gate voltage of NMOS transistor Q10 below the threshold (Vgs < Vth) to turn on Q10, and the 12V power supply supplies power to chip U1 through the drain - source path of Q10. When the communication ends, the controller outputs a low level to turn off Q11, the gate voltage of Q10 is pulled up to 12V through resistor R15, Q10 is turned off, and the power supply to chip U1 is cut off, realizing power - consumption control at the chip level.

[0029] The above are only the preferred embodiments of the present utility model and are not intended to limit the present utility model. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. A low-power integrated analog monitoring system, characterized in that, The system includes a remote terminal, a controller, and multiple data acquisition modules. Each data acquisition module is distributed across different data acquisition points. The data acquisition modules communicate with the controller via an RS232 module, and the controller communicates with the remote terminal via a GPRS module. The RS232 module includes a chip U1, a transistor Q1, a MOSFET Q2, resistors R1 and R2, a signal transmitting branch, and a signal receiving branch. The input terminal of the signal transmitting branch is connected to the TX terminal of the chip U1, and the output terminal is connected to the RX terminal of the controller. The input terminal of the signal receiving branch is connected to the TX terminal of the controller, and the output terminal is connected to the RX terminal of the chip U1. The base of the transistor Q1 is connected to the controller through resistor R1, the emitter of the transistor Q1 is grounded, the collector of the transistor Q1 is connected to a 3.3V power supply through resistor R2, the collector of the transistor Q1 is connected to the gate of the MOSFET Q2, the drain of the MOSFET Q2 is connected to a 3.3V power supply, and the source of the MOSFET Q2 is connected to the power supply terminal of the signal transmitting branch.

2. The low power integrated analog monitoring system according to claim 1, wherein, The signal transmission branch includes operational amplifier U2, operational amplifier U3, transistor Q3, resistors R3, R4, R5, R6, R7, R8, and capacitor C1. The inverting input terminal of operational amplifier U2 is grounded through resistor R3, the non-inverting input terminal of operational amplifier U2 is connected to the TX terminal of chip U1, the power supply terminal of operational amplifier U2 is connected to the drain of MOSFET Q2, the non-inverting input terminal of operational amplifier U2 is also grounded through resistor R4, and the output terminal of operational amplifier U2 is connected to the inverting input terminal through resistor R5. The output terminal of the transistor is connected in series with capacitor C1, resistor R7, and resistor R8 and then grounded. The base of transistor Q3 is connected to the series connection point of resistors R7 and R8. The emitter of transistor Q3 is grounded. The collector of transistor Q3 is connected to the drain of MOSFET Q2 through resistor R6. The collector of transistor Q3 is connected to the non-inverting input of operational amplifier U3. The power supply terminal of operational amplifier U3 is connected to the drain of MOSFET Q2. The output terminal of operational amplifier U3 is connected to the inverting input terminal. The output terminal of operational amplifier U3 is connected to the controller.

3. The low power integrated analog monitoring system of claim 1, wherein, The signal receiving branch includes transistors Q4, Q5, Q6, and Q7, and operational amplifier U4. The base of transistor Q4 is connected to the controller via resistor R9, the emitter of transistor Q4 is grounded, and the collector of transistor Q4 is connected to a 3.3V power supply via resistor R10. The collector of transistor Q4 is connected to the base of transistor Q5, the emitter of transistor Q5 is grounded, and the collector of transistor Q5 is connected to a 3.3V power supply via resistors R11 and R12. The inverting input of the operational amplifier U4 is connected to the series connection of resistors R11 and R12. The output of the operational amplifier U4 is connected to the base of transistors Q6 and Q7. The collector of transistor Q6 is connected to a 24V power supply. The emitter of transistor Q6 is connected to the emitter of transistor Q7. The collector of transistor Q7 is connected to the base. The emitter of transistor Q6 is connected to the non-inverting input of the operational amplifier U4. The emitter of transistor Q6 is connected to the RX terminal of chip U1.

4. The low power integrated analog monitoring system of claim 1, wherein, The RS232 module also includes a transistor Q11, a MOSFET Q10, resistors R15 and R16. The base of transistor Q11 is connected to the controller through resistor R16, the emitter of transistor Q11 is grounded, the collector of transistor Q11 is connected to a 12V power supply through resistor R15, the collector of transistor Q11 is connected to the gate of MOSFET Q10, the drain of MOSFET Q10 is connected to a 12V power supply, and the source of MOSFET Q10 is connected to the power supply terminal of chip U1.

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