An integrated structure and filter

Abstract

The utility model discloses an integrated structure and filter. Among them, the integrated structure includes: resonator and electric capacity, resonator includes the substrate and transducer stack structure of laminated setting, and electric capacity includes the first electric capacity layer, dielectric layer and second electric capacity layer of setting in transducer stack structure far from substrate one side in proper order, and the isolation layer is arranged between the first electric capacity layer and transducer stack structure, and along the integrated structure thickness direction, the projection of electric capacity covers transducer stack structure. The utility model discloses a technical scheme, sets up resonator and electric capacity in integrated structure, sets up the isolation layer between the first electric capacity layer and transducer stack structure, and the projection of first electric capacity layer covers transducer stack structure, realizes the direct integration of electric capacity on the chip, and the area is smaller compared with the additional electric capacity, and the whole layer covers resonator, does not need to introduce, lead out path extra, avoids the corresponding electrical parasitic, thereby improves the performance of resonator, filter.

Description

Technical Field

[0001] This utility model relates to the field of filter technology, and in particular to an integrated structure and filter. Background Technology

[0002] Currently, with the rapid development of wireless communication technology, there are more and more devices transmitting and receiving information at higher frequency bands, placing increasingly stringent requirements on radio frequency front-end circuits. Therefore, the market demand for high-performance filters is growing. Bulk acoustic wave filters, with their high quality factor, good out-of-band rejection, and high rectangular coefficient, are gradually becoming the mainstream in the market.

[0003] Bulk acoustic wave (BAW) filters are constructed by cascading multiple resonators in a specific circuit configuration. High-performance filters require high-performance resonators, which possess a high quality factor. A high quality factor allows the filter to have lower insertion loss and a steeper roll-off characteristic, resulting in superior filtering performance. Therefore, fabricating resonators with high stability and superior performance is crucial.

[0004] Due to the limitations of the electromechanical coupling coefficient of the resonator material, the bandwidth of bulk acoustic wave (BAW) filters is relatively small. In practical applications, passive components such as capacitors or inductors are usually added as matching circuits or to increase the filter's bandwidth and adjust its filtering characteristics. Surface-mount capacitors are widely used in various electronic products such as mobile phones, computers, tablets, televisions, digital cameras, audio equipment, and automotive electronics. However, when used in filters, they need to be connected to the resonator filter circuit, requiring additional wiring. Furthermore, their size is larger than that of the resonator, which degrades the filter's performance and prevents the area from being reduced, greatly limiting the performance of thin-film BAW filters. Utility Model Content

[0005] This invention provides an integrated structure and filter to solve the problem of filter performance degradation caused by the integration of capacitors and resonators in the prior art.

[0006] According to one aspect of the present invention, an integrated structure is provided, comprising: a resonator and a capacitor;

[0007] The resonator comprises a stacked substrate and a transducer stack structure;

[0008] The capacitor includes a first capacitor layer, a dielectric layer, and a second capacitor layer sequentially disposed on the side of the transducer stack structure away from the substrate.

[0009] An isolation layer is provided between the first capacitor layer and the transducer stack structure; along the thickness direction of the integrated structure, the projection of the capacitor covers the transducer stack structure.

[0010] Optionally, the transducer stack structure includes a bottom electrode layer, a piezoelectric layer, and a top electrode layer sequentially disposed on one side of the substrate;

[0011] An insulating layer covers the piezoelectric layer and the top electrode layer.

[0012] Optionally, the top electrode layer includes at least two sub-top electrodes; the sub-top electrodes are not connected to each other.

[0013] There are at least two dielectric regions with different dimensions in the thickness direction of the integrated structure; wherein, the dielectric region is the overlapping region on the dielectric layer with the sub-top electrode.

[0014] Optionally, at least two sub-top electrodes have different dimensions in the thickness direction of the integrated structure, and all sub-top electrodes and their corresponding dielectric regions have the same total thickness.

[0015] Optionally, the bottom electrode layer includes at least two sub-bottom electrodes; the sub-bottom electrodes are not connected to each other.

[0016] There are at least two sub-bottom electrodes with different dimensions in the thickness direction of the integrated structure, and all sub-bottom electrodes and their corresponding dielectric regions have the same total thickness.

[0017] Optionally, the substrate includes a cavity;

[0018] Along the thickness direction of the integrated structure, the cavity and the transducer stack structure overlap at least partially.

[0019] Optionally, a Bragg reflector layer may also be included;

[0020] A Bragg reflector layer is disposed between the substrate and the transducer stack structure;

[0021] Along the thickness direction of the integrated structure, the Bragg reflector layer and the transducer stack structure overlap at least partially.

[0022] Optionally, the thickness of both the first capacitor layer and the second capacitor layer is less than the thickness of the dielectric layer.

[0023] Optionally, the thickness h1 of the first capacitor layer satisfies 10nm≤h1≤100nm; the thickness h2 of the second capacitor layer satisfies 10nm≤h2≤100nm; and the thickness h3 of the dielectric layer satisfies 500nm≤h2≤3000nm.

[0024] According to another aspect of the present invention, a filter is provided, including an integrated structure.

[0025] The technical solution of this utility model sets up a resonator and a capacitor in the integrated structure. An isolation layer is set between the first capacitor layer and the transducer stack structure. The projection of the first capacitor layer covers the transducer stack structure, realizing the direct integration of capacitors on the chip. Compared with external capacitors, the area is smaller. The entire layer covers the resonator, eliminating the need for additional introduction or lead-out paths and avoiding corresponding electrical parasitics, thereby improving the performance of the resonator and filter.

[0026] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this utility model, nor is it intended to limit the scope of this utility model. Other features of this utility model will become readily apparent from the following description. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a schematic diagram of the first integrated structure provided according to an embodiment of the present utility model;

[0029] Figure 2 This is a schematic diagram of the second integrated structure provided according to an embodiment of the present utility model;

[0030] Figure 3 This is a schematic diagram of the third integrated structure provided according to an embodiment of the present utility model;

[0031] Figure 4 This is a schematic diagram of the fourth integrated structure provided according to an embodiment of the present utility model;

[0032] Figure 5 This is a schematic diagram of the fifth integrated structure provided according to an embodiment of the present utility model. Detailed Implementation

[0033] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0034] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the utility model described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0035] Figure 1 This is a schematic diagram of the first integrated structure provided according to an embodiment of the present utility model. For example... Figure 1 As shown, the integrated structure includes:

[0036] Resonator 1 and capacitor 2;

[0037] The resonator 1 includes a substrate 11 and a transducer stack structure 12 stacked together;

[0038] Capacitor 2 includes a first capacitor layer 21, a dielectric layer 22, and a second capacitor layer 23 sequentially disposed on the side of the transducer stack structure 12 away from the substrate 11.

[0039] An isolation layer 3 is provided between the first capacitor layer 21 and the transducer stack structure 12; along the thickness y direction of the integrated structure, the projection of the capacitor 2 covers the transducer stack structure 12.

[0040] Due to the limitation of the electromechanical coupling coefficient of the resonator 1 material, the bandwidth of the bulk acoustic wave filter is relatively small. In practical applications, passive components such as capacitors 2 or inductors are usually added as matching circuits or to increase the bandwidth of the filter and adjust the filtering characteristics. Therefore, the integrated structure in this embodiment of the utility model includes resonator 1 and capacitor 2. The resonator 1 includes a substrate 11 and a transducer stack structure 12 stacked in layers. The substrate 11 can be made of silicon, sapphire, silicon carbide, or other materials. The transducer stack structure 12 is disposed on one side of the substrate 11. The overlapping area of ​​the bottom electrode layer 121, piezoelectric layer 122, and top electrode layer 123 in the transducer stack structure 12 is the working area, which converts electrical energy into sound waves and generates oscillation. The inverse piezoelectric effect of the working area converts electrical energy into sound waves to form resonance.

[0041] The capacitor 2 is disposed on the side of the transducer stack structure 12 away from the substrate 11. The capacitor 2 includes a first capacitor layer 21, a dielectric layer 22, and a second capacitor layer 23. The first capacitor layer 21 and the second capacitor layer 23 are made of the same material, including but not limited to metals such as Ti and Au and their alloys. The dielectric layer 22 is made of dielectric materials including but not limited to Al2O3 and AlN. An isolation layer 3 is disposed between the first capacitor layer 21 and the transducer stack structure 12. The isolation layer 3 is made of materials including but not limited to SiON and can be used to isolate the electrodes between the first capacitor layer 21 and the transducer stack structure 12 to prevent short circuits.

[0042] Understandably, in existing technologies, an integrated capacitor 2 is typically added at the lead of the top electrode layer 123. However, due to limitations in photolithography precision, this may lead to short circuits in the capacitor 2 structure. Therefore, in this embodiment of the invention, the first capacitor layer 21 covers the entire transducer stack structure 12 on the side away from the substrate 11, directly integrating the capacitor 2 on-chip. This results in a smaller area compared to adding an external capacitor 2, and the entire layer covers the resonator 1 without requiring additional lead-in or lead-out paths, thus avoiding corresponding electrical parasitics and improving the performance of the resonator 1 and the filter. Furthermore, the structure of this invention, which stacks the capacitor 2 structure on the resonator 1, is simple to manufacture and highly reliable.

[0043] For example, the preparation process is as follows:

[0044] First, a transducer stack structure 12 is fabricated on one side of the substrate 11. After the bottom electrode layer 121, piezoelectric layer 122, and top electrode layer 123 are fabricated and patterned, an isolation layer 3 is deposited before the capacitor 2 is fabricated. This isolation layer 3 is used for interlayer insulation in the integrated circuit. The material of the isolation layer 3 is SiON, replacing traditional silicon dioxide to reduce dielectric loss. A first capacitor layer 21, a dielectric layer 22, and a second capacitor layer 23 are sequentially fabricated on the isolation layer 3. The thickness of the first capacitor layer 21, the dielectric layer 22, and the second capacitor layer 23 determines the value of the stacked structure capacitor 2, which can be adjusted according to different design requirements.

[0045] The technical solution of this utility model embodiment sets a resonator 1 and a capacitor 2 in the integrated structure. An isolation layer 3 is set between the first capacitor layer 21 and the transducer stack structure 12. The projection of the first capacitor layer 21 covers the transducer stack structure 12, realizing the direct integration of the capacitor 2 on the chip. Compared with the external capacitor 2, the area is smaller. The entire layer covers the resonator 1 without the need for additional introduction or exit paths, avoiding the corresponding electrical parasitics, thereby improving the performance of the resonator 1 and the filter.

[0046] Optional, continue to refer to Figure 1 As shown, the transducer stack structure 12 includes a bottom electrode layer 121, a piezoelectric layer 122 and a top electrode layer 123 sequentially disposed on one side of the substrate 11.

[0047] The isolation layer 3 covers the piezoelectric layer 122 and the top electrode layer 123.

[0048] In this process, a bottom electrode layer 121, a piezoelectric layer 122, and a top electrode layer 123 are sequentially grown and patterned on one side of the substrate 11. In some embodiments, to improve the quality of thin film production, a seed layer is provided between the bottom electrode layer 121 and the substrate 11, and the thickness of the seed layer is generally between 10-100 nm.

[0049] An isolation layer 3 is provided to cover the space between the piezoelectric layer 122 and the top electrode layer 123, so that the isolation layer 3 completely isolates the resonator 1 and the capacitor 2, which is used for interlayer insulation in integrated circuits and reduces dielectric loss.

[0050] It is understandable that since the piezoelectric layer 122 will be exposed after the top electrode layer 123 is patterned, an isolation layer 3 is set to cover the piezoelectric layer 122 and the top electrode layer 123 in its entirety, so as to completely isolate the transducer stack structure 12 from the capacitor 2 and ensure the interlayer insulation effect.

[0051] In some embodiments, the thicknesses of the first capacitor layer 21 and the second capacitor layer 23 are both less than the thickness of the dielectric layer 22. In the capacitor 2 structure, the first capacitor layer 21 and the second capacitor layer 23 serve as upper and lower electrodes to provide a conductive path, while the dielectric layer 22 serves as an insulating layer to store charge. Therefore, the thicknesses of the first capacitor layer 21 and the second capacitor layer 23 are both less than the thickness of the dielectric layer 22, preferably much less. In some embodiments, the thickness h1 of the first capacitor layer 21 satisfies 10nm ≤ h1 ≤ 100nm; the thickness h2 of the second capacitor layer 23 satisfies 10nm ≤ h2 ≤ 100nm; and the thickness h3 of the dielectric layer 22 satisfies 500nm ≤ h2 ≤ 3000nm. Since the thicknesses of the first capacitor layer 21, the dielectric layer 22, and the second capacitor layer 23 determine the value of the stacked structure capacitor 2, the thicknesses of the first capacitor layer 21, the dielectric layer 22, and the second capacitor layer 23 can be adjusted according to different design requirements.

[0052] The technical solution of this utility model embodiment completely isolates the transducer stack structure 12 from the capacitor 2 by setting an isolation layer 3 to cover the piezoelectric layer 122 and the top electrode layer 123, thus ensuring interlayer insulation effect.

[0053] Optional, Figure 2 This is a schematic diagram of the second integrated structure provided according to an embodiment of the present utility model, as shown below. Figure 2 As shown, the top electrode layer 123 includes at least two sub-top electrodes 1230; the sub-top electrodes 1230 are not connected to each other;

[0054] There are at least two dielectric regions 220 with different dimensions in the y-direction of the integrated structure thickness; wherein, the dielectric region 220 is the overlapping region of the dielectric layer 22 and the sub-top electrode 1230.

[0055] The resonator 1 may include multiple sub-resonators 10. The top electrode layer 123 includes at least two sub-top electrodes 1230. The area where each sub-top electrode 1230 overlaps with the piezoelectric layer 122 and the bottom electrode layer 121 can be called the working region. The sub-top electrodes 1230 are not connected to each other, so the working regions are independent of each other, thus corresponding to multiple independent sub-resonators 10. The capacitor 2 covers at least two sub-top electrodes 1230, so that the capacitor 2 is integrated on each of the multiple sub-resonators 10.

[0056] The dielectric region 220 is the overlapping region of the dielectric layer 22 and the sub-top electrode 1230. The existence of at least two dielectric regions 220 with different dimensions in the thickness y direction of the integrated structure indicates that by setting dielectric layers 22 with uneven thickness, the capacitance value of the capacitor 2 corresponding to each sub-resonator 10 can be different, thereby adjusting the performance of the filter according to the requirements.

[0057] For example, Figure 2 The filter includes two sub-resonators 10, which share a substrate 11, a bottom electrode layer 121, and a piezoelectric layer 122. Two sub-top electrodes 1230 are included to divide the resonator 1 into two working regions. The thickness of the dielectric region 220 corresponding to each sub-top electrode 1230 is set to be inconsistent, thereby changing the capacitance value corresponding to each working region and achieving different filtering requirements of the filter.

[0058] The technical solution of this utility model embodiment is to set the top electrode layer 123 to include at least two sub-top electrodes 1230, and at least two dielectric regions 220 to have different dimensions in the thickness y direction of the integrated structure, thereby realizing the multi-band integration of multiple sub-resonators 10.

[0059] Optional, Figure 3 This is a schematic diagram of the third integrated structure provided according to an embodiment of the present utility model, as shown below. Figure 3 As shown, at least two sub-top electrodes 1230 have different dimensions in the thickness y direction of the integrated structure, and the total thickness of all sub-top electrodes 1230 and their corresponding dielectric regions 220 is the same.

[0060] In some cases, when there are at least two sub-top electrodes 1230 with different dimensions in the y-direction of the integrated structure thickness, the corresponding sub-top electrode 1230 can be thinned as needed to change the frequency band of the sub-resonator 10. At the same time, if the total thickness of all sub-top electrodes 1230 and their corresponding dielectric regions 220 is the same, the dielectric region 220 corresponding to the thinned sub-top electrode 1230 can be thickened to compensate for the noise loss caused by the reduced thickness of the sub-top electrode 1230 in the sub-resonator 10 and improve the filter performance.

[0061] The technical solution of this utility model embodiment sets the sub-top electrode 1230 to have different dimensions in the thickness y direction of the integrated structure, while ensuring that the total thickness of all sub-top electrodes 1230 and their corresponding dielectric regions 220 is the same. This allows the dielectric regions 220 corresponding to the sub-top electrodes 1230 that are thinned during the fabrication process to be thickened, ensuring a consistent total thickness. This enables the filter to operate in multiple frequency bands while compensating for the noise loss caused by the reduced thickness of the sub-top electrodes 1230 in the sub-resonator 10, thereby improving the filter performance.

[0062] Optional, Figure 4 This is a schematic diagram of the fourth integrated structure provided according to an embodiment of the present utility model, as shown below. Figure 4 As shown, the bottom electrode layer 121 includes at least two sub-bottom electrodes 1210; the sub-bottom electrodes 1210 are not connected to each other;

[0063] There are at least two sub-bottom electrodes 1210 with different dimensions in the y-direction of the integrated structure thickness, and all sub-bottom electrodes 1210 and their corresponding dielectric regions 220 have the same total thickness.

[0064] The bottom electrode layer 121 can also include multiple sub-bottom electrodes 1210. The sub-bottom electrodes 1210, piezoelectric layer 122, and sub-top electrode 1230 overlap to form the working area. The sub-bottom electrodes 1210 can also have different dimensions in the y-direction of the integrated structure thickness. When at least two sub-bottom electrodes 1210 have different dimensions in the y-direction of the integrated structure thickness, the corresponding sub-bottom electrodes 1210 can be thinned as needed to change the frequency band of the sub-resonator 10. Simultaneously, if the total thickness of all sub-bottom electrodes 1210 and their corresponding dielectric regions 220 is the same, the dielectric region 220 corresponding to the thinned sub-bottom electrodes 1210 is thickened to compensate for the noise loss caused by the reduced thickness of the sub-bottom electrodes 1210 in the sub-resonator 10, thereby improving the filter performance.

[0065] The technical solution of this utility model embodiment sets the dimensions of the sub-bottom electrodes 1210 to be different in the thickness y direction of the integrated structure, while ensuring that the total thickness of all sub-bottom electrodes 1210 and their corresponding dielectric regions 220 is the same. This allows the dielectric regions 220 corresponding to the sub-bottom electrodes 1210 that are thinned during the fabrication process to be thickened, ensuring a consistent total thickness. This enables the filter to operate in multiple frequency bands while compensating for the noise loss caused by the reduced thickness of the sub-bottom electrodes 1210 in the sub-resonator 10, thereby improving the filter performance.

[0066] Optional, such as Figure 1 and Figure 2 As shown, the substrate 11 includes a cavity 111;

[0067] Along the thickness y direction of the integrated structure, the cavity 111 and the transducer stack structure 12 overlap at least partially.

[0068] To improve the performance of the resonator 1, a cavity 111 is formed in the substrate 11. Before fabricating the transducer stack structure 12, the cavity 111 can be fabricated in the substrate 11 and filled with a sacrificial layer. After the capacitor 2 is fabricated, the sacrificial layer can be etched through a release hole to obtain the integrated structure with the cavity 111.

[0069] In some embodiments, the integrated structure may include at least two cavities 111. Each cavity 111 forms an independent working region with the transducer stack structure 12, thereby obtaining a filter integrating multiple sub-resonators 10 and capacitors 2. To ensure the reliability of the filter, it is generally not considered to set large cavities 111, as this can easily cause the top layer of the filter to collapse.

[0070] It is understandable that by setting a cavity 111 in the substrate 11 and integrating a capacitor 2 structure, the performance of the resonator 1 and the filter can be improved without the need for additional introduction or extraction paths, thus avoiding corresponding electrical parasitics, increasing the filter bandwidth, and adjusting the in-band loss.

[0071] The technical solution of this utility model embodiment involves an integrated capacitor formed by a stacked metal-dielectric-metal thin-film structure above a cavity-type thin-film bulk acoustic filter. This capacitor structure is isolated from the underlying acoustic resonant structure by an insulating layer. The use of SiON insulating material instead of the common SiO2 material reduces dielectric loss. Furthermore, the capacitor structure is easy to fabricate, avoiding the need for additional wiring that increases parasitic capacitance. This capacitor structure can also increase the filter bandwidth and adjust in-band loss.

[0072] Optional, Figure 5 This is a schematic diagram of the fifth integrated structure provided according to an embodiment of the present utility model, as shown below. Figure 5 As shown, it also includes a Bragg reflector layer 112;

[0073] A Bragg reflector layer 112 is disposed between the substrate 11 and the transducer stack structure 12;

[0074] Along the thickness y-direction of the integrated structure, the Bragg reflector layer 112 and the transducer stack structure 12 overlap at least partially.

[0075] The Bragg reflector layer 112 may include alternating low-impedance layers and high-impedance layers. The Bragg reflector layer 112 is disposed between the substrate 11 and the transducer stack structure 12. The Bragg reflector layer 112 and the transducer stack structure 12 overlap at least partially. The capacitor 2 covers the resonator 1 so that the capacitor 2 integrated on the resonator 1 can adjust the insertion loss and passband bandwidth of the device.

[0076] In some embodiments, substrate leakage of the device can be reduced by adjusting the structural thickness and material of the high and low impedance layers in the Bragg reflector layer 112.

[0077] For details, please refer to Figure 5 As shown, the fabrication of the Bragg reflector layer 112 involves four steps in the preparation of the low-resistivity layer 1121, typically using silicon dioxide. This results in the low-resistivity layer 1121 encapsulating three high-resistivity layers 1122. In the first fabrication of the low-resistivity layer 1121, its thickness is equal to the sum of the first low-resistivity layer 1121 and the first high-resistivity layer 1122. Subsequently, etching is performed to create the cavity 111 in the shape of the first high-resistivity layer 1122. Further, the first high-resistivity layer 1122 is produced, followed by a grinding process to smooth out the protruding material of the first high-resistivity layer 1122.

[0078] In some embodiments, a passivation layer is also provided on the side of the second capacitor layer 23 away from the dielectric layer 22. The passivation layer covers the integrated structure and serves as a sealing and protection layer.

[0079] The technical solution of this utility model embodiment achieves on-chip direct integration of capacitors by placing the Bragg reflector layer between the substrate and the transducer stack structure and integrating the capacitor on the resonator. Compared with external capacitors, the area is smaller, the entire layer covers the resonator, and there is no need for additional introduction or exit paths, thus avoiding corresponding electrical parasitics. This improves the performance of the resonator and filter. At the same time, adjusting the Bragg reflector layer structure can reduce device substrate leakage and insertion loss.

[0080] Based on the same inventive concept, this utility model embodiment provides a filter, including an integrated structure.

[0081] The technical solution of this utility model embodiment sets an integrated structure in the filter, so that the capacitor is directly integrated in the filter. Compared with the external capacitor, the area is smaller, and there is no need to introduce an additional lead path to avoid the corresponding electrical parasitics, thereby improving the performance of the resonator and the filter.

[0082] The specific embodiments described above do not constitute a limitation on the scope of protection of this utility model. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.

Claims

1. An integrated structure, characterized in that, include: Resonators and capacitors; The resonator includes a stacked substrate and a transducer stack structure; The capacitor includes a first capacitor layer, a dielectric layer, and a second capacitor layer sequentially disposed on the side of the transducer stack structure away from the substrate. An isolation layer is provided between the first capacitor layer and the transducer stack structure; Along the thickness direction of the integrated structure, the projection of the capacitor covers the transducer stack structure.

2. The integrated structure according to claim 1, characterized in that, The transducer stack structure includes a bottom electrode layer, a piezoelectric layer, and a top electrode layer sequentially disposed on one side of the substrate; The insulating layer covers the piezoelectric layer and the top electrode layer.

3. The integrated structure according to claim 2, characterized in that, The top electrode layer includes at least two sub-top electrodes; the sub-top electrodes are not connected to each other. There are at least two dielectric regions with different dimensions in the thickness direction of the integrated structure; wherein the dielectric region is the overlapping region on the dielectric layer with the sub-top electrode.

4. The integrated structure according to claim 3, characterized in that, At least two of the sub-top electrodes have different dimensions in the thickness direction of the integrated structure, and all of the sub-top electrodes and their corresponding dielectric regions have the same total thickness.

5. The integrated structure according to claim 3, characterized in that, The bottom electrode layer includes at least two sub-bottom electrodes; the sub-bottom electrodes are not connected to each other; At least two of the sub-base electrodes have different dimensions in the thickness direction of the integrated structure, and all the sub-base electrodes and their corresponding dielectric regions have the same total thickness.

6. The integrated structure according to claim 1, characterized in that, The substrate includes a cavity; Along the thickness direction of the integrated structure, the cavity and the transducer stack structure overlap at least partially.

7. The integrated structure according to claim 1, characterized in that, It also includes the Bragg reflector layer; The Bragg reflector layer is disposed between the substrate and the transducer stack structure; Along the thickness direction of the integrated structure, the Bragg reflector layer and the transducer stack structure overlap at least partially.

8. The integrated structure according to claim 1, characterized in that, The thickness of both the first capacitor layer and the second capacitor layer is less than the thickness of the dielectric layer.

9. The integrated structure according to claim 8, characterized in that, The thickness h1 of the first capacitor layer satisfies 10nm≤h1≤100nm; the thickness h2 of the second capacitor layer satisfies 10nm≤h2≤100nm; and the thickness h3 of the dielectric layer satisfies 500nm≤h2≤3000nm.

10. A filter, characterized in that, Includes the integrated structure described in any one of claims 1-9.

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