A trench schottky semiconductor device

Abstract

The utility model relates to a semiconductor technical field discloses a kind of trench schottky semiconductor devices, including substrate layer, semiconductor material and silicon dioxide plastic package, the top of semiconductor material is equipped with trench, the top of silicon dioxide plastic package is connected with upper surface electrode metal, and upper surface electrode metal one side extends into the trench, and is connected with conductive metal, the inner wall both sides of the trench are connected with insulating layer, and the bottom of substrate layer is connected with lower surface electrode metal.The utility model can better disperse the electric field intensity of trench bottom by arc-shaped trench, reduce local electric field concentration phenomenon, can evenly disperse electric field, avoid excessive concentration of electric field at trench corner, to reduce breakdown risk, help to improve heat dissipation performance, reduce the temperature of device when working, prolong service life, improve overall performance, by the setting of hollow, cooperate the heat dissipation groove of inside and outside two sides, can further improve heat dissipation effect.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor technology, specifically to a trench Schottky semiconductor device. Background Technology

[0002] Trench Schottky semiconductor devices are semiconductor devices that achieve higher performance by improving the structure of traditional Schottky diodes. Based on trench technology, Schottky barrier diodes optimize the electric field distribution by etching trenches on a silicon substrate and filling them with conductive material, which significantly improves the reverse blocking capability and forward conduction performance of the device. They are mainly used in power conversion, automotive electronics, industrial equipment and other fields.

[0003] Traditional trench designs are typically straight or rectangular. During use, the electric field becomes excessively concentrated at the corners of the trench, increasing the risk of breakdown. Moreover, under high temperature or high reverse voltage conditions, trench Schottky diodes have a large leakage current because their Schottky barrier has limited ability to block charge carriers, which can easily lead to additional current loss and affect the reliability and energy efficiency of the device.

[0004] The information disclosed in this background section is only intended to enhance the understanding of the background technology of this application, and therefore may include prior art that is not known to those skilled in the art. Utility Model Content

[0005] The purpose of this invention is to provide a trench Schottky semiconductor device to solve the problems mentioned in the background art.

[0006] To achieve the above objectives, this utility model provides the following technical solution: It includes a substrate layer, a semiconductor material, and a silicon dioxide encapsulator. A trench is formed at the top of the semiconductor material. An upper surface electrode metal is connected to the top of the silicon dioxide encapsulator. One side of the upper surface electrode metal extends into the trench and is connected to a conductive metal. Insulating layers are connected to both sides of the inner wall of the trench. A lower surface electrode metal is connected to the bottom of the substrate layer. Two shielding layers are provided within the silicon dioxide encapsulator, distributed on both the inner and outer sides of the semiconductor material.

[0007] Preferably, the upper surface electrode metal and the conductive metal are connected by a Schottky barrier junction.

[0008] Preferably, the conductive metal includes an arc-shaped layer, and a contact end is connected to the bottom end of the arc-shaped layer, with one side of the contact end abutting against the groove.

[0009] Preferably, both the inner and outer surfaces of the silicon dioxide encapsulation ring have multiple heat dissipation grooves.

[0010] Preferably, both the semiconductor material and the conductive metal are arc-shaped, and the bottom surface of the inner wall of the semiconductor material is arc-shaped.

[0011] Preferably, a pad layer is connected to the bottom end of the substrate layer, and the pad layer is located inside the lower surface electrode metal.

[0012] Preferably, the upper surface electrode metal, the lower surface electrode metal, and the silicon dioxide encapsulation are all arranged in a ring.

[0013] In summary, this application includes the following beneficial technical effects:

[0014] The arc-shaped grooves can better disperse the electric field intensity at the bottom of the groove, reduce the phenomenon of local electric field concentration, and evenly distribute the electric field, avoiding excessive concentration of the electric field at the corners of the groove, thereby reducing the risk of breakdown, helping to improve heat dissipation performance, reduce the temperature of the device during operation, extend its service life, and improve overall performance. The hollow design, combined with the heat dissipation grooves on the inner and outer sides, can further improve the heat dissipation effect. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the overall structure of a trench Schottky semiconductor device according to the present invention;

[0016] Figure 2 This is a side sectional view of a trench Schottky semiconductor device according to the present invention;

[0017] Figure 3 This is an exploded view of a trench Schottky semiconductor device according to the present invention.

[0018] In the figure: 1. Substrate layer; 2. Semiconductor material; 21. Trench; 3. Conductive metal; 31. Arc layer; 32. Contact end; 4. Insulating layer; 5. Upper surface electrode metal; 6. Schottky barrier junction; 7. Silicon dioxide encapsulation; 711. Heat sink; 8. Shielding layer; 9. Lower surface electrode metal; 10. Foot pad layer. Detailed Implementation

[0019] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0020] Please see Figure 1-3This utility model provides a technical solution comprising a substrate layer 1, a semiconductor material 2, and a silicon dioxide encapsulation body 7. The substrate layer 1 serves as an N-type base layer, the semiconductor material 2 is located on the top surface of the substrate layer 1, and a trench 21 is formed on the top of the semiconductor material 2 by etching. An upper surface electrode metal 5 is connected to the top of the silicon dioxide encapsulation body 7, and one side of the upper surface electrode metal 5 extends into the trench 21 and is connected to a conductive metal 3. Insulating layers 4, made of silicon nitride, are connected to both sides of the inner wall of the trench 21. A lower surface electrode metal 9 is connected to the bottom of the substrate layer 1, and pins are connected to one side of both the upper surface electrode metal 5 and the lower surface electrode metal 9. In use, the lower surface electrode metal 9 is connected to the negative power supply, and the upper surface electrode metal 5 is connected to the positive power supply. As this is a conventional setup, it is not described in detail in the specification. The lower surface electrode metal 9 is a cathode metal. Two shielding layers 8 are provided inside the silicon dioxide encapsulation body 7. The two shielding layers 8 are annular and are distributed on the inner and outer sides of the semiconductor material 2.

[0021] Reference Figure 2 As shown, the conductive metal 3 includes an arc-shaped layer 31, with a contact end 32 connected to the bottom end of the arc-shaped layer 31. One side of the contact end 32 abuts against the trench 21. After energization, the contact end 32 contacts the semiconductor material 2 through its connection with the trench 21, and the charge moves from the semiconductor material 2 to the arc-shaped layer 31, thereby forming a Schottky barrier junction 6 on one side of the top of the trench 21. Both the semiconductor material 2 and the conductive metal 3 are arc-shaped, and the bottom surface of the inner wall of the semiconductor material 2 is arc-shaped to facilitate a close fit with the contact point 32.

[0022] Reference Figure 1 and Figure 2 As shown in the figure, the inner and outer surfaces of the silicon dioxide molding compound 7 have multiple heat dissipation grooves 711. As can be seen from the attached figure, the heat dissipation grooves 711 inside the compound 7 and the heat dissipation grooves 711 on the outer surface have different opening directions. A pad layer 10 is connected to the bottom end of the substrate layer 1. The pad layer 10 is located inside the lower surface electrode metal 9. During installation, the pad layer 10 can create a gap between the device and the mounting base for ventilation and heat dissipation, further enhancing the function of the heat dissipation grooves 711.

[0023] The upper surface electrode metal 5, the lower surface electrode metal 9, and the silicon dioxide encapsulation body 7 are all arranged in a ring shape. This forms a hollow whole, which effectively improves heat dissipation.

[0024] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0025] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A trench Schottky semiconductor device, comprising a substrate (1), a semiconductor material (2), and a silicon dioxide encapsulator (7), characterized in that: The top of the semiconductor material (2) has a trench (21), the top of the silicon dioxide encapsulation body (7) is connected to an upper surface electrode metal (5), one side of the upper surface electrode metal (5) extends into the trench (21) and is connected to a conductive metal (3), the inner walls of the trench (21) are connected to an insulating layer (4), the bottom of the substrate layer (1) is connected to a lower surface electrode metal (9), the silicon dioxide encapsulation body (7) has two shielding layers (8), the shielding layers (8) are distributed on the inner and outer sides of the semiconductor material (2); The conductive metal (3) includes an arc-shaped layer (31), and a contact end (32) is connected to the bottom end of the arc-shaped layer (31). One side of the contact end (32) abuts against the groove (21). Both the semiconductor material (2) and the conductive metal (3) are arc-shaped, and the bottom surface of the inner wall of the semiconductor material (2) is arc-shaped.

2. The trench Schottky semiconductor device according to claim 1, characterized in that: The upper surface electrode metal (5) and the conductive metal (3) are connected by a Schottky barrier junction (6).

3. A trench Schottky semiconductor device according to claim 1, characterized in that: The inner and outer surfaces of the silicon dioxide encapsulation (7) are each provided with multiple heat dissipation grooves (711).

4. A trench Schottky semiconductor device according to claim 1, characterized in that: The bottom end of the substrate layer (1) is connected to a pad layer (10), which is located inside the lower surface electrode metal (9).

5. A trench Schottky semiconductor device according to claim 1, characterized in that: The upper surface electrode metal (5), the lower surface electrode metal (9), and the silicon dioxide encapsulation body (7) are all arranged in a ring.

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