Multi-video source host output system

Abstract

This invention proposes a multi-video source host output system, comprising: a system processor; several video source hosts; several memories corresponding to the video source hosts, the memories being connected to the system processor and one video source host; and a video source output circuit connected to the output terminal of the system processor. This invention changes the circuit configuration from being host-configured to being system processor-configured, and enables information synchronization between the video source hosts and the video output interface through the memories, thereby improving the reliability of the video output system.

Description

Technical Field

[0001] This utility model belongs to the field of video output technology, and in particular relates to a multi-video source host output system. Background Technology

[0002] In recent years, server applications have permeated all aspects of people's lives. Faced with increasingly complex computing tasks, more and more computers need to work together to complete them. For example, in central computer rooms or data centers, hundreds or even thousands of servers are often deployed. Generally, each server host requires a set of peripheral devices (keyboard, monitor, mouse) to be operated by an administrator. This not only involves huge investment and space consumption, but also makes it very inconvenient for administrators to move between various server hosts. A video output system with multiple video source host access is a key system designed to solve this problem. By inputting the video signal from each server host into this system, users can monitor these server hosts on a single monitor. When it is necessary to switch signal lines, a request is simply sent to the system processor to switch to monitoring another server host.

[0003] Because the video output interface is shared by multiple video source hosts, and each host has different requirements for video output, this leads to output interface configuration conflicts. Video output systems with multiple video source hosts use a memory-based approach. First, the output requirement information of each host is transferred to the memory. Then, the system processor configures the information corresponding to the currently selected host onto the output interface. For example... Figure 2 As shown, in the current multi-video source host output system architecture, the selected host typically configures internal system components such as multi-video switching circuits and video output interfaces. This architecture has several problems: 1. Internal circuits such as multi-video switching circuits and video output interfaces may be accessed simultaneously by different hosts (video source hosts), leading to configuration conflicts, errors, or tampering. 2. The need for host configuration of multi-video switching circuits and video output interfaces significantly increases the complexity of host software drivers. 3. The need for host configuration of multi-video switching circuits and video output interfaces increases the number of internal access paths, resulting in increased chip area. Summary of the Invention

[0004] The purpose of this invention is to provide a multi-video source host output system that transforms circuit configuration from being done by the host to being done by the system processor. The technical solution adopted is as follows: A multi-video source host output system, comprising: System processor; N video source hosts; N≥2; N memory units are configured corresponding to a video source host, and the memory units are connected to the system processor and a video source host; The video source output circuit is connected to the output terminal of the system processor.

[0005] Preferably, the memory is connected to the video source host via an input interface.

[0006] Preferably, the input interface includes any one of a USB interface, a PCIe interface, and a Type-C interface.

[0007] Preferably, the memory is electrically connected to the video source host and the system processor.

[0008] Preferably, the memory is a dual-port RAM or a stack pointer register.

[0009] Preferably, the system processor is any ARM series CPU or RISC-V CPU.

[0010] Preferably, the video source output circuit includes: The input terminals of the video output interface module and the multi-video switching circuit are both connected to the output terminal of the system processor. The other input terminal of the multi-video switching circuit is connected to the corresponding video source host; The output terminal of the multi-video switching circuit is connected to another input terminal of the video output interface module.

[0011] Preferably, the video output interface module includes at least one of an HDMI interface, a DP interface, a VGA interface, and a Type-C interface.

[0012] In summary, this utility model discloses a video output system with multiple video source host access, including at least two sets of input interfaces, a multi-video switching circuit, a system processor, a memory, and at least one set of video output interfaces.

[0013] Each set of input interfaces (video source input interfaces) is used for the input of a video source host.

[0014] The multi-video switching circuit connects multiple video sources to a single video output interface.

[0015] The memory serves as a storage medium for information synchronization between the video source host and the video output system (video output interface).

[0016] The video output interface is used to connect to a monitor.

[0017] The system processor processes information in the memory and controls the multi-video switching circuit and video output interfaces. Specifically, the system processor selects a set of video input interfaces and establishes connections with the video output interfaces; the system processor configures the video output interfaces based on resolution information, control information, and status information stored in the memory.

[0018] Furthermore, interrupts generated by the system processor in memory are cleared by the external video source host, while interrupts generated by the external video source host are cleared by the system processor.

[0019] The system processor cannot transfer new display EDID information to memory until the interrupt generated by the system processor in memory is cleared by the external video source host.

[0020] Before the interrupt generated by the external video source host in the memory is cleared by the system processor, the external video source host shall not transmit new resolution information, control information and status information to the memory.

[0021] This invention enables information synchronization between the video source host and the video output system through a memory, thereby improving the reliability of the video output system.

[0022] Compared with the prior art, the advantages of this utility model are: 1. The existing internal circuits, such as multi-video switching circuits and video output interfaces, are configured by the system processor instead of the host, fundamentally solving the risk of possible configuration conflicts or tampering.

[0023] 2. The configuration of existing internal circuits such as multi-video switching circuits and video output interfaces is changed from being configured by the host to being configured by the system processor, which reduces the complexity of the host software driver.

[0024] 3. The existing internal circuits, such as the multi-video switching circuit and video output interface, are configured by the system processor instead of the host, reducing the access paths within the system and reducing the chip area. Attached Figure Description

[0025] Figure 1 A structural diagram of a multi-video source host output system; Figure 2 This is a structural diagram of a multi-video source host output system configured with a selected host in the prior art to handle multi-video switching circuits, video output interface modules, etc. Detailed Implementation

[0026] The multi-video source host output system of this utility model will now be described in more detail with reference to the accompanying drawings, which illustrate preferred embodiments of this utility model. It should be understood that those skilled in the art can modify the utility model described herein while still achieving its advantageous effects. Therefore, the following description should be understood as being of general knowledge to those skilled in the art and is not intended to limit the utility model.

[0027] A multi-video source host output system, comprising: System processor; Several video source hosts are used to provide video signals to the multi-video switching circuit in the video source output circuit and write configuration data into the corresponding memory.

[0028] Several memory units are configured corresponding to video source hosts, and each memory unit is connected to both the video source host and the system processor. The phrase "memory units configured corresponding to video source hosts" means that one memory unit is configured for each video source host.

[0029] The video source output circuit is connected to the output terminal of the system processor.

[0030] In this embodiment, the memory is electrically connected to the video source host and the system processor.

[0031] The memory is either a dual-port RAM or a stack pointer register.

[0032] The system processor is an ARM series CPU or a RISC-V CPU.

[0033] like Figure 1 As shown, the video source output circuit includes: The input terminals of the video output interface module and the multi-video switching circuit are all connected to the output terminals of the system processor; The other input terminal of the multi-video switching circuit is connected to the corresponding video source host; The output of the multi-video switching circuit is connected to another input of the video output interface module.

[0034] Specifically, the video output interface module supports at least one of the following protocols: DP, HDMI, VGA, or Type-C.

[0035] like Figure 1 As shown, a memory corresponding to the number of video source hosts is added to the video output system.

[0036] When the host needs to modify the relevant circuit configuration in the system, it converts the corresponding operation into a descriptor, writes it into memory, and notifies the system processor.

[0037] Specifically, the video output system requires an external monitor. Each monitor has its own EDID information. The video output system needs to write the EDID information into the memory and then send an interrupt through the memory to inform the video source host. This way, the video source host can know the attributes of the connected monitor (such as which resolutions it supports).

[0038] Therefore, the video source host and the corresponding memory communicate bidirectionally.

[0039] The system processor then reads the descriptor from the memory and performs the corresponding circuit configuration.

[0040] like Figure 1 As shown, all host video sources can work simultaneously, but which video source host is ultimately selected for output is determined by the system processor.

[0041] The host video source is only responsible for continuously inputting video data to the video source output system. Input interface types include USB, PCIe, and Type-C interfaces, etc. However, since each video source host has different output requirements (mainly resolution), a memory is needed as a medium. The video source host first writes control information into the corresponding memory, and then initiates an interrupt through the memory to notify the system processor. Thus, when the system processor selects a video source host, it will first read the necessary information from the memory and then configure the output interface.

[0042] How does this output system work? The system processor reads the EDID information of the external display through the video output interface and transmits it to the memory. Then, the memory generates an interrupt signal to the external video source host, which reads the display EDID information from the memory through the video input interface.

[0043] The external video source host transmits resolution information, control information, and status information to the memory through the video input interface, and then the memory generates an interrupt signal to the system processor.

[0044] The system processor configures the video output interface based on the resolution information, control information, and status information stored in memory.

[0045] In summary, this embodiment, by adding memory to the video output system, transforms the configuration of existing internal system circuits such as multi-video switching circuits and video output interfaces from being configured by the host to being configured by the system processor. This fundamentally solves the risk of potential configuration conflicts or tampering, reduces the complexity of host software drivers and internal system access paths, and lowers system complexity.

[0046] The above are merely preferred embodiments of this utility model and do not constitute any limitation on this utility model. Any equivalent substitutions or modifications made by those skilled in the art to the technical solutions and contents disclosed in this utility model without departing from the scope of the technical solutions of this utility model shall still fall within the protection scope of this utility model.

Claims

1. A multi-video source host output system, characterized in that, include: System processor; N video source hosts; N≥2； N memory units are configured corresponding to a video source host. Each memory unit is connected to the system processor and a video source host. There are bidirectional communication connections between the video source host and the corresponding memory unit, and between the memory unit and the system processor. The video source output circuit is connected to the output terminal of the system processor.

2. The multi-video source host output system of claim 1, wherein, The memory is connected to the video source host via an input interface.

3. The multi-video source host output system of claim 2, wherein, The input interface includes any one of a USB interface, a PCIe interface, and a Type-C interface.

4. The multi-video source host output system of claim 1, wherein, The memory is electrically connected to the video source host and the system processor.

5. The multi-video source host output system of claim 1, wherein, The memory is a dual-port RAM or a stack pointer register.

6. The multi-video source host output system of claim 1, wherein, The system processor can be any ARM series CPU or RISC-V CPU.

7. The multi-video source host output system according to claim 1, characterized in that, The video source output circuit includes: The input terminals of the video output interface module and the multi-video switching circuit are both connected to the output terminal of the system processor. The other input terminal of the multi-video switching circuit is connected to the corresponding video source host; The output terminal of the multi-video switching circuit is connected to another input terminal of the video output interface module.

8. The multi-video source host output system of claim 7, wherein, The video output interface module includes at least one of the following: HDMI interface, DP interface, VGA interface, and Type-C interface.

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