Multi-mos current sharing output linear constant current source circuit

Abstract

The utility model discloses a plurality of MOS current sharing output linear constant current source circuit, include: hardware PI operation circuit is used for providing MOS grid stable control signal, current collection differential amplifier circuit forms closed loop control loop with hardware PI operation circuit, and differential amplification effectively inhibits the influence of common mode interference to closed loop control, totem pole drive circuit is used for enhancing the drive ability of hardware PI circuit output control signal, possesses the characteristics of quick opening and closing, hardware overcurrent protection circuit is used for current overcurrent protection fast response interrupt output current. Linear constant current source is composed of four ways, and the common constitution four way MOS current sharing output linear constant current circuit. The utility model discloses a plurality of MOS current sharing output linear constant current source current, significantly improve current output capacity and current response speed, especially applicable to the application scene that needs to edit the rising edge in the need of fast power -on or pulse current output, and the output current anti -interference ability and the stability of strong characteristics are strong.

Description

Technical Field

[0001] This utility model belongs to the field of constant current drive technology, specifically involving a multi-MOS current sharing output linear constant current source circuit. Background Technology

[0002] In existing technologies, linear constant current source circuits typically struggle to simultaneously handle high-frequency pulse current output and high-current output capabilities. Linear constant current modules clearly specify their fastest response time, maximum power loss, and maximum operating current in their datasheets. Traditional linear constant current source circuits employ a general-purpose operational amplifier paired with a single MOSFET or multiple MOSFETs connected in parallel.

[0003] When used individually, the input-output voltage difference cannot be too large, and the heat dissipation requirements are high. When multiple are connected in parallel, the current cannot be effectively shared, causing heat to accumulate on a single MOSFET, which reduces the reliability of the constant current source. Traditional constant current source circuits have slow response speeds and generally do not have the ability to output pulse current at frequencies of 2kHz and above, making it difficult to meet the application scenarios with strict requirements on pulse current frequency and rise time, thus limiting their applicability. Summary of the Invention

[0004] Based on the problems existing in the background technology, this utility model proposes a linear constant current source with fast response time, large current capability, and programmable current rise edge multi-MOS current sharing output, so as to improve the stability and reliability of constant current output.

[0005] To achieve the above objectives, the technical solution adopted by this utility model is as follows: A multi-MOS current sharing output linear constant current source circuit is characterized in that: the circuit includes four linear constant current circuits with the same structure, and each linear constant current circuit includes a hardware PI calculation circuit, a current acquisition differential amplifier circuit, a totem pole circuit and a hardware overcurrent protection circuit. The hardware PI operation circuit uses a high-bandwidth, high-SR operational amplifier, and the output is a first-stage RC filter circuit to filter out high-frequency interference in the control information. It is connected to the current acquisition current to form a closed-loop control loop, which is used to control the conduction level of the MOS in the closed-loop current loop to achieve constant current output. The current acquisition differential amplifier circuit uses the differential amplification principle to effectively amplify the analog signal across the sampling resistor by an appropriate factor before outputting it to the hardware PI operation circuit for closed-loop control of the output current. The totem-pole circuit is connected to the output of the hardware PI calculation circuit to improve the driving capability and response speed of the control signal, and control the MOS to respond quickly. The hardware overcurrent protection circuit compares the output current of the drive circuit with the protection threshold voltage in real time. It immediately shuts down the MOS at the moment of overcurrent and uses the setting feature of the D flip-flop to avoid the output current from repeatedly restarting after the protection is turned off.

[0006] Furthermore, the hardware PI operation circuit includes a PI operation unit and a filtering unit. The high-bandwidth, high-SR operational amplifier in the hardware PI operation circuit is model SGM8302YS8G / TR. The RC filtering circuit includes a resistor and a capacitor. One end of the resistor is connected to the output terminal of the operational amplifier, and the other end is connected to the capacitor and the totem pole circuit respectively. The other end of the capacitor is grounded.

[0007] Furthermore, the current acquisition differential amplifier circuit includes a first-stage differential amplifier circuit. The first-stage differential amplifier chip is model SGM8302YS8G / TR. The sampling resistor is a 25PPM type resistor. The positive current terminal of the sampling resistor is connected to the non-inverting terminal resistor of the differential amplifier circuit, and the other end of the sampling resistor is grounded and simultaneously connected to the inverting terminal resistor of the differential amplifier circuit.

[0008] Furthermore, the totem pole circuit includes a first-stage non-inverting amplifier circuit and a totem pole driver circuit. The first-stage non-inverting amplifier chip is model SGM8302YS8G / TR, the NPN transistor is model S8050, the PNP transistor is model S8550, the Schottky diode is model LL4148, and the freewheeling diode is model SS54.

[0009] Furthermore, the hardware overcurrent protection circuit includes a first-stage comparator circuit and a first-stage flip-flop setter circuit. The first-stage comparator chip is model SGM8302YS8G / TR, the D flip-flop is model CD4013, the inverter is model SN74HC14DTR, the field-effect transistor is model NCE6005AS, and the voltage divider resistors include a third resistor and a fourth resistor. One end of the third resistor is connected to the power supply, and the other end is connected to the fourth resistor and the inverting input terminal of the comparator chip. The other end of the fourth resistor is grounded.

[0010] Furthermore, each linear constant current circuit also includes an energy storage capacitor, with one end connected to the power supply and the other end grounded, used to provide a stable voltage for the totem pole circuit.

[0011] The above technical solution can achieve the following beneficial effects: This invention significantly improves the output load capacity of the linear constant current source by adopting multi-MOS current sharing output, making it particularly suitable for high-power applications with general heat dissipation conditions. At the same time, it improves the response speed of current output and can reliably output high-frequency pulsed current.

[0012] Employing a four-channel MOSFET current-sharing output, each channel can output a maximum current of 100A, for a total output current of up to 400A, significantly enhancing high-current output capability and making it suitable for high-power load scenarios. The totem-pole circuit uses a push-pull drive structure, with MOSFET turn-on and turn-off times both less than 1μs, enabling pulse current output at frequencies of 2kHz and above. The pulse rise edge can be edited by adjusting the resistor and capacitor parameters in the PI calculation circuit. Current acquisition uses a differential amplifier circuit to effectively suppress common-mode interference. The hardware PI calculation circuit incorporates RC filtering to reduce the impact of high-frequency noise on the control signal, ensuring output current stability. The hardware overcurrent protection circuit has a response time of less than 1μs, quickly cutting off overcurrent. The set characteristic of the D flip-flop avoids repeated circuit restarts, preventing MOSFET damage due to frequent switching and improving system reliability. Attached Figure Description

[0013] Figure 1 This is the overall diagram of a multi-MOS current-sharing output linear constant current source circuit.

[0014] Figure 2 This is the circuit diagram of the first linear constant current source circuit.

[0015] Figure 3 This is the circuit diagram of the second linear constant current source circuit.

[0016] Figure 4 This is the circuit diagram of the third linear constant current source circuit.

[0017] Figure 5 This is the circuit diagram of the fourth linear constant current source circuit. Detailed Implementation

[0018] The present invention will be further described below with reference to the accompanying drawings: like Figure 1-5 As shown, Figure 1 As shown, a multi-MOS current sharing output linear constant current source circuit includes four linear constant current circuits with the same structure. Each linear constant current circuit includes a hardware PI calculation circuit, a current acquisition differential amplifier circuit, a totem pole circuit, and a hardware overcurrent protection circuit. The hardware PI operation circuit uses a high-bandwidth, high-SR operational amplifier, and the output is a first-stage RC filter circuit to filter out high-frequency interference in the control information. It is connected to the current acquisition current to form a closed-loop control loop, which is used to control the conduction level of the MOS in the closed-loop current loop to achieve constant current output. The current acquisition differential amplifier circuit uses the differential amplification principle to effectively amplify the analog signal across the sampling resistor by an appropriate factor before outputting it to the hardware PI operation circuit for closed-loop control of the output current. The totem-pole circuit is connected to the output of the hardware PI calculation circuit to improve the driving capability and response speed of the control signal, and control the MOS to respond quickly. The hardware overcurrent protection circuit compares the output current of the drive circuit with the protection threshold voltage in real time. It immediately shuts down the MOS at the moment of overcurrent and uses the setting feature of the D flip-flop to avoid the output current from repeatedly restarting after the protection is turned off.

[0019] The hardware PI calculation circuit includes a PI calculation unit and a filtering unit; the current acquisition differential amplifier circuit includes a current sampling resistor and a first-stage differential amplifier circuit; the totem pole circuit includes a first-stage non-inverting amplifier circuit and a totem pole driving circuit; the hardware overcurrent protection circuit includes a first-stage comparator circuit and a first-stage trigger setter circuit.

[0020] The linear constant current source circuit based on multi-MOS current sharing provided in this embodiment of the invention can output high-frequency pulse current or continuous high current.

[0021] Figure 1 As shown, a four-line linear constant current source circuit is illustrated. Among them, Figure 2-5 The diagrams show the specific circuits for the first, second, third, and fourth linear constant current circuits. Each circuit includes a hardware PI calculation circuit unit, a current acquisition differential amplifier unit, a totem pole circuit unit, and a hardware overcurrent protection circuit unit. The four linear constant current source circuits are identical, differing only in their labeling. Taking the first linear constant current source circuit as an example: The hardware PI operation circuit uses a high-bandwidth, high-SR op-amp, and its output is connected to a first-stage RC filter circuit. The inverting input of the hardware PI operation circuit is connected to the output of the current acquisition differential amplifier circuit, and the non-inverting input is connected to the reference voltage DA1, forming a closed-loop control loop to control the conduction level of the MOSFET to achieve constant current output. The high-bandwidth, high-SR op-amp in the hardware PI operation circuit is model SGM8302YS8G / TR. The RC filter circuit includes a resistor R32 and a capacitor C31. One end of the resistor R32 is connected to the output of the op-amp (U25A), and the other end is connected to the Tengpole circuit.

[0022] The current acquisition differential amplifier circuit uses the differential amplification principle to effectively amplify the analog signal across the sampling resistor by an appropriate factor before outputting it to the hardware PI calculation circuit. The closed-loop control output current is achieved by the sampling resistor JR4 connected in series in the load current loop, with its two ends connected to the non-inverting input and inverting input of the differential amplifier circuit (U11B), respectively. The output of the differential amplifier circuit (U11B) is connected to the inverting input of the hardware PI calculation circuit and is also connected to the non-inverting input (U9A) of the comparator in the hardware overcurrent protection circuit.

[0023] The totem-pole circuit is connected to the output of the hardware PI calculation circuit to improve the driving capability and response speed of the control signal, and to control the MOS to respond quickly. The input of the non-inverting amplifier chip is connected to the output of the hardware PI calculation circuit (the connection node between R32 and C31). The output is connected to the base of NPN transistor Q8 and the base of PNP transistor Q10 respectively. The collector of Q8 is connected to a 12V power supply, and the emitter is connected to the gate of MOS transistor Q9 through adjusting the gate resistor R24. The collector of Q10 is grounded, and the emitter is connected to the gate of Q9 through R24. The Schottky diodes D8 and D11 are used to suppress the peak voltage of the gate of MOS transistor Q9 when it is turned on and off. The freewheeling diode D7 is connected in parallel between the drain of Q9 and the positive power supply. The source of Q9 is connected to ground in series with the sampling resistor JR4, and the drain is connected to the load as the current output terminal.

[0024] The hardware overcurrent protection circuit compares the output current of the drive circuit with the protection threshold voltage in real time. It immediately shuts down the MOSFET upon overcurrent. Utilizing the setting characteristic of the D flip-flop, it avoids repeated restarts of the output current after protection shutdown. The non-inverting input of the comparator circuit (U9A) is connected to the output of the current acquisition differential amplifier circuit. The inverting input is connected to a 12V power supply through voltage divider resistors R50 and R52 (one end of R50 is connected to the 12V power supply, the other end is connected to R52 and the inverting input of the comparator chip, and the other end of R52 is grounded) to obtain the reference voltage for overcurrent protection. The output of the comparator chip is connected to the trigger terminal of the D flip-flop. The output of the inverter is connected to the gate of the field-effect transistor M3B. Further, the conduction of M6A pulls the input of the non-inverting amplifier chip low, further pulling down the output of the totem-pole circuit, driving the MOSFET Q9 to turn off.

[0025] The specific working principle is as follows: On the right side, the input section: JR4 is a sampling resistor. When the load current flows through the sampling resistor, a voltage proportional to the current is generated. The sampling resistor is a 25PPM type, realizing the "current to voltage" conversion. The sampling resistor signal is connected to the differential amplifier circuit (U11B) to differentially amplify the sampled voltage. Resistors R44 and R45 determine the voltage amplification factor and can be adjusted according to actual needs.

[0026] The differential amplifier circuit (U11B) outputs in two paths. One path outputs to the inverting input of a hardware PI calculation circuit composed of U25 and external resistors R33, R26, R23, and capacitor C30. The non-inverting input of the PI calculation circuit is the reference voltage, i.e., the target current voltage, which enables proportional-integral adjustment of the deviation between the "target current" and the "actual current." The values ​​of R23 and C30 determine the PI calculation speed. The output of the hardware calculation circuit outputs to a totem-pole driver circuit with non-inverting amplification, mainly composed of U9B, Q8, and Q10. When the output is high, Q8 is on and Q10 is off. The power supply provides a pull-up current to the gate (Q9) of the power MOSFET through Q8, causing the MOSFET to turn on quickly. When the output is low, Q10 is on and Q8 is off. The gate current of the MOSFET is quickly discharged through Q10, causing the MOSFET to turn off quickly. The totem pole circuit is connected in series with Q9 with a resistor R24 ​​to adjust the gate resistance and prevent oscillation; the Schottky diodes D8 and D11 are used to prevent peak voltage from damaging the MOSFET during inductive load or switching process, and the MOSFET drain D7 provides a freewheeling path for the inductive load. The other output of the differential amplifier current goes to a hardware protection circuit consisting of U9A, U14A, U10D, M6A, and external RC circuitry. If the load current is too large and the sampling voltage exceeds the threshold (determined by the voltage divider between R50 and R52), U9A outputs a high level. The D flip-flop U14A detects the rising edge and triggers a high-level output, setting it to the M3B MOSFET in the input stage of inverter U10D. This inverter U10D then pulls MOSFET M6A down to ground. In other words, the output of the totem-pole circuit's preamplifier is pulled low, Q10 conducts, and Q9 is quickly turned off, thus shutting down the current output.

[0027] This invention significantly improves the current output capability and current response speed by using a linear constant current source with multiple MOS current sharing output. It is especially suitable for application scenarios that require rapid power-up or pulse current output and require editing of the rising edge. At the same time, it has the characteristics of strong anti-interference capability and strong stability of output current.

[0028] The above descriptions are all preferred embodiments of this utility model. For those skilled in the art, any modifications to this utility model in various equivalent forms without departing from the principle of this utility model shall fall within the protection scope of the appended claims.

Claims

1. A multi-MOS current sharing output linear constant current source circuit, characterized by: The circuit includes four identical linear constant current circuits. Each linear constant current circuit includes a hardware PI calculation circuit, a current acquisition differential amplifier circuit, a totem pole circuit, and a hardware overcurrent protection circuit. Hardware PI calculation circuit is used to provide control signals for MOS gate stability; The current acquisition differential amplifier circuit, together with the hardware PI calculation circuit, forms a closed-loop control loop. The differential amplifier effectively suppresses the influence of common-mode interference on the closed-loop control. The totem pole driver circuit is used to enhance the driving capability of the output control signal of the hardware PI circuit, enabling rapid on and off. Hardware overcurrent protection circuit, used for fast-response interrupt current output for overcurrent protection.

2. The multi-MOS current sharing output linear constant current source circuit of claim 1, wherein: The hardware PI operation circuit includes a PI operation unit and a filtering unit. The high-bandwidth, high-SR op-amp in the hardware PI operation circuit is model SGM8302YS8G / TR. The RC filtering circuit includes a resistor and a capacitor. One end of the resistor is connected to the output terminal of the op-amp, and the other end is connected to the capacitor and the totem pole circuit respectively. The other end of the capacitor is grounded.

3. The multi-MOS current sharing output linear constant current source circuit of claim 1, wherein: The current acquisition differential amplifier circuit includes a first-stage differential amplifier circuit. The first-stage differential amplifier chip is model SGM8302YS8G / TR. The sampling resistor is a 25PPM type resistor. The positive current terminal of the sampling resistor is connected to the non-inverting terminal resistor of the differential amplifier circuit, and the other end of the sampling resistor is grounded and simultaneously connected to the inverting terminal resistor of the differential amplifier circuit.

4. The multi-MOS current sharing output linear constant current source circuit of claim 1, wherein: The totem pole circuit includes a first-stage non-inverting amplifier circuit and a totem pole driver circuit. The first-stage non-inverting amplifier chip is model SGM8302YS8G / TR, the NPN transistor is model S8050, the PNP transistor is model S8550, the Schottky diode is model LL4148, and the freewheeling diode is model SS54.

5. The multi-MOS current sharing output linear constant current source circuit of claim 1, wherein: The hardware overcurrent protection circuit includes a first-stage comparator circuit and a first-stage flip-flop setter circuit. The first-stage comparator chip is model SGM8302YS8G / TR, the D flip-flop is model CD4013, the inverter is model SN74HC14DTR, the field-effect transistor is model NCE6005AS, and the voltage divider resistors include a third resistor and a fourth resistor. One end of the third resistor is connected to the power supply, and the other end is connected to the fourth resistor and the inverting input terminal of the comparator chip. The other end of the fourth resistor is grounded.

6. The multi-MOS current-sharing output linear constant current source circuit according to any one of claims 1-5, wherein: Each linear constant current circuit also includes an energy storage capacitor, with one end connected to the power supply and the other end grounded, used to provide a stable voltage for the totem pole circuit.

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