A circuit for realizing current sharing by master-slave parallel connection

Abstract

The utility model discloses a circuit that realizes current sharing through master-slave parallel connection, and the master and multiple slaves are connected in parallel, and are connected to the current sharing control bus through isolation chip, TTL and differential mutual conversion unit, information gate switch in turn respectively, and constitute parallel current sharing circuit, including the current reference circuit of host computer issue and the processing circuit after slave computer receives the current reference signal from host computer. After multiple instrument power supplies are connected in parallel, the user sets master-slave parallel connection mode in front panel of power supply, and selects a master, and others are slaves, when multiple power supplies work in parallel, the master sends current reference signal to current sharing control bus through current reference generation circuit, and the slave outputs corresponding current value according to the current reference signal sent by the master. One of multiple instruments can be selected as master module, and it is high in flexibility and good in stability, has the characteristics of simple wiring and control, low control signal transmission loss, control signal is not easy to be disturbed, all power module output control is balanced and the like.

Description

Technical Field

[0001] This utility model relates to a high-power power supply product, and more particularly to a circuit that achieves current sharing through master-slave parallel connection. Background Technology

[0002] With the development and application of modern power electronics technology and high-power switching power supplies, high-power power supply products are increasingly widely used in aerospace and defense, industrial applications, automotive electronics, robotics, CNC machining, photovoltaics, and other industries. However, as power levels increase, the size of components such as electrolytic capacitors, inductors, and transformers required in the circuit inevitably increases, leading to larger power supply products. Over the past decades, increasing power density has become an undeniable trend in the power supply industry, and this trend is expected to continue. However, achieving increasingly higher power conversion within a limited space cannot be achieved solely through improvements in circuit design; it also requires advancements in the technology and processes of related components such as capacitors, inductors, and transformers. Therefore, when it is impossible to increase the power of a single power supply unit, using multiple units connected in parallel to increase the total output power becomes a feasible solution.

[0003] Currently, common parallel current sharing schemes in the power supply industry include output impedance method, average current method, peak current method, master-slave control method, etc. Among them, the parallel scheme mainly used in power supply and test power supply products is the master-slave parallel scheme. The master sends control commands and a given current reference value, and the slave receives the corresponding command and reference value and outputs independently. The traditional master-slave control method connects the current reference signal of the master directly to the current control loop of the first-level slave through a serial communication bus. The first-level slave, acting as the master of the second-level slave, continues to send the reference signal to the third level in the same way. Because the reference signals of the previous and subsequent levels are not isolated, the reference signals of all power supplies "share a common ground". When one power supply is disturbed, it will affect the entire parallel system, resulting in poor stability and anti-interference capability.

[0004] Existing technology uses parallel power supplies to achieve current sharing:

[0005] The master and slave devices communicate via serial port to transmit reference and output signals, thus achieving parallel operation. The block diagram of this scheme is shown below. Figure 1 As shown.

[0006] In this scheme, each power module sends voltage, current reference, On / Off signals, etc. to the next stage via serial communication; the master can control the working mode of the slave, and can also read the working status and other measurement data of the slave.

[0007] The disadvantages of existing technologies for current sharing through parallel power supply connections are:

[0008] (1) No signal isolation measures were implemented for communication between the power modules. When the communication signal of one power module is interfered with, the entire parallel system will be affected, resulting in poor anti-interference capability.

[0009] (2) There is no current sharing control bus selection measure between the power modules. When multiple power supplies working in parallel mode need to work in other ways (single machine, multi-channel, network), the parallel signal line must be removed before they can enter other corresponding working modes, which is inflexible.

[0010] In view of the above, this utility model is hereby proposed. Utility Model Content

[0011] The purpose of this invention is to provide a circuit that achieves current sharing through master-slave parallel connection, so as to solve the above-mentioned technical problems existing in the prior art.

[0012] The objective of this utility model is achieved through the following technical solution:

[0013] The present invention relates to a circuit for achieving current sharing through a master-slave parallel connection. The master unit and multiple slave units are connected in parallel and are respectively connected to the current sharing control bus through an isolation chip, a TTL-to-differential conversion unit, and an information selection switch, thus forming a parallel current sharing circuit.

[0014] It includes a current reference circuit that sends a signal from the host and a processing circuit that receives the current reference signal from the host from the slave device.

[0015] Compared with the prior art, the circuit provided by this utility model, which achieves current sharing through master-slave parallel connection, allows for the arbitrary selection of one of multiple units as the master module, offering high flexibility, good stability, and features such as simple wiring and control, low control signal transmission loss, control signals that are not easily interfered with, and balanced output control of all power modules. Attached Figure Description

[0016] Figure 1 This is a block diagram illustrating the principle of current sharing in existing technologies using parallel power supply connections.

[0017] Figure 2 This is a schematic diagram of the current reference sent by the host in an embodiment of this utility model.

[0018] Figure 3 This is a general principle block diagram of an embodiment of the present utility model.

[0019] Figure 4 This is a schematic diagram of the processing circuit after the slave device receives the current reference signal from the master device in an embodiment of this utility model. Detailed Implementation

[0020] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments, which do not constitute a limitation on the present utility model. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present utility model.

[0021] First, the following explanations are provided for the terms that may be used in this article:

[0022] The terms "comprising," "including," "containing," "having," or other similar semantic descriptions should be interpreted as non-exclusive inclusion. For example, including a technical feature element (such as raw material, component, ingredient, carrier, dosage form, material, size, part, component, mechanism, device, step, process, method, reaction conditions, processing conditions, parameter, algorithm, signal, data, product or article of manufacture, etc.) should be interpreted as including not only the expressly listed technical feature element, but also other technical feature elements that are not expressly listed and are well-known in the art.

[0023] The term "composed of" excludes any technical features not expressly listed. When used in a claim, it closes the claim to exclude all technical features other than those expressly listed, except for associated conventional impurities. If the term appears only in a clause of a claim, it limits the claim to the elements expressly listed in that clause; elements recited in other clauses are not excluded from the overall claim.

[0024] The contents not described in detail in the embodiments of this utility model are existing technologies known to those skilled in the art. Where specific conditions are not specified in the embodiments of this utility model, they shall be performed according to conventional conditions in the art or conditions recommended by the manufacturer. Reagents or instruments used in the embodiments of this utility model whose manufacturers are not specified are all conventional products that can be purchased commercially.

[0025] The present invention relates to a circuit for achieving current sharing through a master-slave parallel connection. The master unit and multiple slave units are connected in parallel and are respectively connected to the current sharing control bus through an isolation chip, a TTL-to-differential conversion unit, and an information selection switch, thus forming a parallel current sharing circuit.

[0026] It includes a current reference circuit that sends a signal from the host and a processing circuit that receives the current reference signal from the host from the slave device.

[0027] The host-based current reference circuit includes:

[0028] The reference voltage VREF is connected to the inverting input of op-amp U1 through resistor R1, and to the non-inverting input of op-amp U1 through resistors R2 and R3; capacitor C1 is connected between the inverting input and output of op-amp U1.

[0029] The drain of MOSFET Q1 is connected between resistors R2 and R3, the gate is connected to the output pin of op-amp U1 through resistor R4, and the source is connected to the collector of transistor Q2 through resistor R7.

[0030] The base of transistor Q2 is connected to the PWM signal pin of the MCU through resistor R8, the emitter of transistor Q2 is grounded, and resistor R9 is connected between the base and emitter of transistor Q2.

[0031] The above connections form a triangular wave generating circuit.

[0032] The processing circuit for the slave device after receiving the current reference signal from the master device includes:

[0033] The current reference signal from the host enters the S pin of analog switch A1 after passing through the filter circuit composed of resistor R10 and capacitor C3. The GND pin of analog switch A1 is connected to GND, the VCC pin is connected to VCC, the B1 pin is connected to GND (low level), and the B2 pin is connected to VREF2 (high level). The A pin is connected to the non-inverting input of op-amp U3 through a second-order filter circuit composed of resistor R13, capacitor C4, resistor R14, and capacitor C5. Resistor R11 and potentiometer RM1 are connected in series and then connected across the inverting input and output of op-amp U3. One end of resistor R12 is connected to the inverting input of op-amp U3, and the other end is grounded. This forms an adjustable non-inverting amplifier circuit.

[0034] The output pin of op-amp 3 U3 is connected to the input of the slave current loop.

[0035] The above-mentioned circuit achieves current sharing through master-slave parallel connection, including:

[0036] First, after multiple instrument power supplies are connected in parallel, the user sets the master and slave parallel mode on the front panel of the power supply and selects one master and the others as slaves;

[0037] Subsequently, when multiple power supplies are connected in parallel, the master unit sends a current reference signal to the current sharing control bus through the current reference generation circuit, and the slave unit outputs the corresponding current value according to the current reference signal sent by the master unit. During this process, the master unit operates in CV mode, and the other slave units operate in CC mode.

[0038] First, the host MCU generates a PWM signal, which is then used to generate a triangular wave through a triangular wave generator circuit. The triangular wave is compared with the current signal sampled by the host and chopped to generate a reference PWM signal, which is then sent to the current sharing control bus.

[0039] Then, after receiving the reference signal from the master, the slave device connected to the current sharing control bus introduces its pulse width as an input signal into the non-inverting proportional amplifier circuit through an analog switch, and then sends the output signal of the non-inverting proportional amplifier circuit to the current control loop of the slave device.

[0040] In summary, the circuit for current sharing achieved through master-slave parallel connection in this embodiment of the utility model describes a master-slave parallel connection method. The reference signal is sent to the TTL-to-differential chip in the form of a PWM signal through an isolation chip, and then sent to the receiving circuit of the next-level slave device in the form of a differential signal, which maximizes the accuracy, stability and anti-interference of the reference signal. When multiple power supplies are used in parallel, a master module is manually set, and all other modules output power with reference to the reference issued by the master module. In this parallel connection method, the master module will work in constant voltage source (CV) mode, and the other modules will work in constant current source (CC) mode. One of the multiple power supplies can be arbitrarily selected as the master module, which is highly flexible, stable and has the characteristics of simple wiring and control, low control signal transmission loss, control signal is not easily interfered with, and balanced output control of all power supply modules.

[0041] To more clearly demonstrate the technical solution and effects provided by this utility model, the following detailed description of the embodiments of this utility model is provided with reference to specific examples.

[0042] The technical problem to be solved by this utility model:

[0043] (1) Solve the problem of poor communication stability of power modules when power supplies are used in parallel.

[0044] (2) By adding a signal gating module, the power supply module connected to the current sharing bus can flexibly change its working mode without disconnecting the communication line.

[0045] Example 1:

[0046] like Figures 2 to 4 As shown:

[0047] First, after multiple instrument power supplies are connected in parallel, the user sets the master / slave parallel mode on the front panel of the power supply and selects one master (the others are slaves). When multiple power supplies work in parallel, the master first sends a current reference signal to the current sharing control bus through the current reference generation circuit. The slaves output the corresponding current value according to the current reference signal sent by the master (the master works in CV mode, and the other slaves work in CC mode). First, the master MCU generates a PWM signal, and then generates a triangular wave through the triangular wave generation circuit. The triangular wave is compared with the current signal sampled by the master and chopped to generate a reference PWM signal, which is sent to the current sharing control bus. After receiving the reference signal from the master, the slave connected to the current sharing control bus introduces its pulse width as an input signal into the non-inverting proportional amplifier circuit through an analog switch, and then sends the output signal of the non-inverting proportional amplifier circuit to the current control loop of the slave.

[0048] In this scheme, the circuit achieves parallel current sharing through a master-slave parallel connection.

[0049] Figure 2 The host computer sends the current reference; in Figure 2 In this diagram, VREF is a reference voltage, connected to the inverting input of op-amp U1 via resistor R1, and connected to the non-inverting input via resistors R2 and R3. Capacitor C1 is connected between the inverting input and output of op-amp U1. The drain of MOSFET Q1 is connected between resistors R2 and R3, the gate is connected to the output pin of op-amp U1 via resistor R4, and the source is connected to the collector of transistor Q2 via resistor R7. The base of transistor Q2 is connected to the PWM signal pin of the MCU via resistor R8, the emitter of transistor Q2 is grounded, and resistor R9 is connected between the base and emitter of transistor Q2. Through the above connections, a triangular wave generator circuit is obtained. At this point, by adjusting the pulse width and frequency of the PWM signal emitted by the MCU, a triangular wave can be obtained at the source of MOSFET Q1 and introduced into the inverting input of op-amp U2. The inverting input of op-amp U2 is connected to the host current sampling signal through resistor R6. By comparing the triangular wave and the current sampling signal level, chopping is performed, and a reference PWM signal can be obtained at the output of op-amp U2. Depending on different current sampling values, PWM signals with different pulse widths can be obtained at the output of op-amp U2. Then, through a filter circuit composed of resistor R5 and capacitor C2, this PWM signal is sent to the current sharing control target line.

[0050] Figure 3 This is a block diagram illustrating the overall principle of this solution. Figure 3 The main unit current reference is connected to the current sharing control bus.

[0051] Figure 4 This is the processing circuit for the slave device receiving the current reference signal from the master device. Figure 4 The slave device introduces the reference signal into the current control loop. The current reference signal from the master device passes through a filter circuit composed of resistor R10 and capacitor C3 before entering the S pin of analog switch A1. The GND pin of analog switch A1 is connected to GND, the VCC pin is connected to VCC, the B1 pin is connected to GND (low level), and the B2 pin is connected to VREF2 (high level). The A pin is connected to the non-inverting input of op-amp U3 through a second-order filter circuit composed of resistor R13, capacitor C4, resistor R14, and capacitor C5. Resistor R11 and potentiometer RM1 are connected in series and then connected across the inverting input and output of op-amp U3. One end of resistor R12 is connected to the inverting input of op-amp U3, and the other end is grounded, thus forming a proportionally adjustable non-inverting amplifier circuit. The output pin of op-amp U3 is connected to the slave device current loop input, achieving the effect of the master device controlling the slave device output current value.

[0052] The beneficial effects of the technical solution of this utility model

[0053] (1) The host reference signal is given to the current sharing control bus in the form of an isolated differential signal, which greatly improves the stability and anti-interference of the entire parallel system;

[0054] (2) The point-to-point communication method is adopted, which ensures the synchronization of signals compared with the traditional point-to-multipoint communication method;

[0055] (3) Each power module adopts a signal gating method, which can switch the working mode at any time, improving the flexibility of use;

[0056] This circuit enables multiple power supplies to be connected in parallel via point-to-point communication and employs multiple safeguards such as signal isolation, signal conversion, and signal gating to improve the stability and flexibility of parallel operation. Its key technical points are:

[0057] The reference signal is obtained by triangular wave chopping, and then connected in parallel or in a network by means of signal isolation, signal conversion and signal gating.

[0058] The above description is merely a preferred embodiment of this utility model, but the scope of protection of this utility model is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this utility model should be included within the scope of protection of this utility model. Therefore, the scope of protection of this utility model should be determined by the scope of the claims. The information disclosed in the background section is intended only to enhance the understanding of the overall background technology of this utility model and should not be construed as an admission or implication in any way that such information constitutes prior art known to those skilled in the art.

Claims

1. A circuit for achieving current sharing through master-slave parallel connection, characterized in that, The master unit and multiple slave units are connected in parallel, and are connected to the current sharing control bus in sequence through an isolation chip, a TTL to differential conversion unit, and an information gating switch, forming a parallel current sharing circuit; It includes a current reference circuit that sends a signal from the host and a processing circuit that receives the current reference signal from the host from the slave device.

2. The circuit for achieving current sharing through master-slave parallel connection according to claim 1, characterized in that, The host-based current reference circuit includes: The reference voltage VREF is connected to the inverting input of op-amp one (U1) through resistor one (R1), and to the non-inverting input of op-amp one (U1) through resistor two (R2) and resistor three (R3); capacitor one (C1) is connected between the inverting input and output of op-amp one (U1). The drain of the MOSFET (Q1) is connected between resistors 2 (R2) and 3 (R3), the gate is connected to the output pin of operational amplifier 1 (U1) through resistor 4 (R4), and the source is connected to the collector of transistor (Q2) through resistor 7 (R7). The base of transistor (Q2) is connected to the PWM signal pin of the host (MCU) through resistor eight (R8), the emitter of transistor (Q2) is grounded, and resistor nine (R9) is connected between the base and emitter of transistor (Q2); The above connections form a triangular wave generating circuit.

3. The circuit for achieving current sharing through master-slave parallel connection according to claim 2, characterized in that, The processing circuit for the slave device after receiving the current reference signal from the master device includes: The current reference signal from the host enters the S pin of the analog switch (A1) after passing through the filter circuit composed of resistor 10 (R10) and capacitor 3 (C3). The GND pin of the analog switch (A1) is connected to GND, the VCC pin is connected to VCC, the B1 pin is connected to GND low level, the B2 pin is connected to VREF2 high level, and the A pin is connected to the non-inverting input of operational amplifier 3 (U3) through the second-order filter circuit composed of resistor 13 (R13), capacitor 4 (C4), resistor 14 (R14), and capacitor 5 (C5). Resistor 11 (R11) and potentiometer (RM1) are connected in series and then connected across the inverting input and output of operational amplifier 3 (U3). One end of resistor 12 (R12) is connected to the inverting input of operational amplifier 3 (U3), and the other end is grounded, thus forming a non-inverting proportional amplifier circuit with adjustable ratio. The output pin of op-amp 3 (U3) is connected to the input of the slave current loop.

Images