Display device and method for manufacturing a display device

Abstract

Display device (1) with a layer stack (2) comprising a semiconductor layer sequence (20) with a first semiconductor layer, a second semiconductor layer and an active area (200) arranged between the first semiconductor layer and the second semiconductor layer for generating radiation and a circuit layer (25), wherein - the semiconductor layer sequence forms a plurality of pixels (3) and in the circuit layer a switch (4) is formed for each pixel, which is electrically connected to the respective pixel; - the active area is divided into individual segments (30), each forming a pixel; and - the segments are electrically contacted along a circumference of the segments by means of a connection layer (232), wherein the connection layer (232) is guided over a side surface (301) of the segments (30) for the electrical contacting of the second semiconductor layer.

Description

[0001] The present application relates to a display device and a method for manufacturing a display device.

[0002] Light-emitting diodes (LEDs) can be used to manufacture display devices, with each individually controllable LED forming a pixel. When using a so-called passive matrix, the pixels are connected via row and column lines. However, with this approach, multiple LEDs cannot be operated simultaneously, meaning the brightness of the entire display device can only be as high as the brightness of a single pixel.

[0003] Alternatively, a so-called active-matrix circuit can be used, in which several pixels can be operated in parallel, i.e., simultaneously. To manufacture such display devices, the driver elements for control and the radiation-emitting LED structures are produced on separate substrates and bonded together using a precisely calibrated bonding process. However, this bonding process is complex and, with increasing miniaturization of the pixels, places ever greater demands on the alignment accuracy of the bonding process.

[0004] Publication US 5 789 766 A concerns an LED array with stacked driver circuits.

[0005] The printed document DE 10 2008 011 848 A1 describes an optoelectronic semiconductor body.

[0006] The publication DE 10 2008 062 933 A1 describes an optoelectronic projection device.

[0007] One task is to specify a display device that is characterized by high luminosity and is also easy to manufacture.

[0008] Furthermore, a method should be specified by which a display device can be manufactured simply and lawfully.

[0009] This problem is solved by a display device or a method according to the independent claims. Further embodiments and advantages are the subject of the dependent claims.

[0010] According to at least one embodiment of the display device, the display device has a layer stack. A layer stack is understood to be an arrangement of layers arranged one above the other, in particular deposited layers. The individual layers can be structured or unstructured in the lateral direction.

[0011] In case of doubt, a lateral direction is understood to be a direction that runs parallel to a principal extension plane of the layer stack.

[0012] In particular, the structuring of one of the layers of the layer stack can occur between the deposition of a first layer and the deposition of a second layer of the layer stack. Different deposition processes can also be used for the deposition of the individual layers.

[0013] In contrast, two prefabricated elements that are subsequently attached to each other, for example by means of a connecting layer, do not form a layer stack within the meaning of the present application.

[0014] According to at least one embodiment of the display device, the display device, in particular the layer stack, comprises a semiconductor layer sequence with an active region designed to generate radiation. The active region can be designed to generate radiation in the visible, ultraviolet, or infrared spectral range. Preferably, the semiconductor layer sequence, in particular the active region, comprises a III-V compound semiconductor material. III-V compound semiconductor materials are suitable for generating radiation in the ultraviolet (Al x In y Ga 1-x-y N) over the visible (Al x In y Ga 1-x-y N, especially for blue to green radiation, or Al x In y Ga 1-x-y P, especially for yellow to red radiation) up to the infrared (Al x In y Ga 1-x-yAs) The spectral range is particularly suitable. Here, 0 ≤ x ≤ 1, 0 ≤ y ≤ 1 and x + y ≤ 1 apply, especially with x ≠ 1, y ≠ 1, x ≠ 0 and / or y ≠ 0. Furthermore, high internal quantum efficiencies can be achieved in radiation generation using III-V compound semiconductor materials, especially those from the aforementioned material systems.

[0015] The sequence of semiconductor layers forms a plurality of pixels in the display device. The pixels are arranged side by side in a lateral direction, for example in a matrix.

[0016] In a vertical direction, i.e. perpendicular to the main extension plane of the semiconductor layers of the semiconductor layer sequence, the semiconductor layer sequence extends in particular between a radiation emission surface and a back side opposite the radiation emission surface.

[0017] The semiconductor layer sequence comprises a first semiconductor layer and a second semiconductor layer, with the active region located between the first and second semiconductor layers. The first and second semiconductor layers are advantageously different in their conductivity type. For example, the first semiconductor layer can be p-type and the second semiconductor layer n-type, or vice versa.

[0018] The active region is, for example, configured as a pn junction or as a quantum structure. Within the scope of this application, the term "quantum structure" encompasses, in particular, any structure in which charge carriers can undergo quantization of their energy states through confinement. Specifically, the term "quantum structure" does not specify the dimensionality of the quantization. It therefore includes, among other things, quantum wells, quantum wires, and quantum dots, and any combination thereof.

[0019] According to at least one embodiment of the display device, the display device, in particular the layer stack, has a circuit layer. A switch is formed in the circuit layer for each pixel. The switch is electrically connected to the respective pixel. For example, the switches are each electrically connected to the first semiconductor layer or to the second semiconductor layer of the associated pixels. For example, the first semiconductor layer is arranged between the active area and the circuit layer. The circuit layer is advantageously arranged on the side of the semiconductor layer sequence facing away from the radiation emission surface. An insulating layer is arranged, in particular at least partially, between the circuit layer and the semiconductor layer sequence. The insulating layer can, in particular, adjoin the semiconductor layer sequence and the circuit layer.For example, recesses are formed in the insulation layer through which the pixels are electrically connected to the switch.

[0020] In at least one embodiment of the display device, the display device comprises a layer stack consisting of a semiconductor layer sequence with an active region for generating radiation and a circuit layer. The semiconductor layer sequence forms a plurality of pixels, and in the circuit layer, a switch is formed for each pixel, which is electrically connected to the respective pixel.

[0021] The active area for generating radiation and the circuit layer containing the switches for controlling the pixels are integrated into a single layer stack. This eliminates the need for a bonding process in the manufacturing of the display device, which involves joining the prefabricated active areas and, in particular, the separately manufactured switches. This simplifies the miniaturization of the display device and also increases manufacturing reliability.

[0022] In particular, the pixels can have an edge length between 2 µm and 300 µm (inclusive), preferably between 2 µm and 50 µm (inclusive), and most preferably between 2 µm and 10 µm (inclusive). The smaller the pixels, the higher the resolution of the display device can be for the same lateral dimensions. Alternatively, the same resolution of the display device can be achieved with a smaller lateral dimension. This allows more display devices to be manufactured simultaneously, for example, from a single wafer assembly.

[0023] Furthermore, the respective switches can be located behind the pixels, i.e., on the side of the semiconductor layer sequence facing away from the radiation emission surface. In particular, the entire driver circuit can be located behind the pixels. Compared to arranging parts of the driver circuit between adjacent pixels, this avoids the risk of shadowing by the driver circuit.

[0024] According to at least one embodiment of the display device, the display device is free of a metallurgical bond between the semiconductor layer sequence and the circuit layer. In a metallurgical bond, the components, particularly those prefabricated, are held together by atomic or molecular forces. A metallurgical bond can be formed, for example, by means of a bonding layer, such as a solder layer or an adhesive layer. Typically, the separation of a metallurgical bond is accompanied by the destruction of the bonding layer and / or at least one of the components. In contrast, individual layers deposited on top of each other are not considered elements connected by a metallurgical bond.

[0025] According to at least one embodiment of the display device, the circuit layer comprises a polycrystalline semiconductor material. For example, the circuit layer may contain or consist of polycrystalline silicon. The circuit layer may further comprise one or more doped regions.

[0026] Compared to amorphous semiconductor materials, polycrystalline or monocrystalline semiconductor materials can exhibit significantly increased charge carrier mobility. For example, recrystallization of amorphous silicon can achieve charge carrier mobility that is half the value of monocrystalline material or more. Monocrystalline silicon typically exhibits a charge carrier mobility of 400 to 500 cm⁻¹. 2 / Vs. By using polycrystalline semiconductor material instead of amorphous semiconductor material, it is therefore possible to create simplified switches in the circuit layer that are also capable of switching the currents required for radiation generation in the pixels of the display device.

[0027] Alternatively, the circuit layer can be an amorphous semiconductor material with a high charge carrier mobility, that is, with a charge carrier mobility of at least 100 cm⁻¹. 2 / Vs for at least one charge carrier type. For example, indium gallium zinc oxide (IGZO) can be deposited by MOCVD or sputtering. This material is characterized by high electron mobility and low leakage currents.

[0028] According to at least one embodiment of the display device, the semiconductor layer sequence and the circuit layer each have a periodically repeating structure with a unit cell in the lateral direction, wherein the lateral extent of the unit cell of the circuit layer is less than or equal to the extent of the unit cell of the semiconductor layer sequence. Thus, the center-to-center distance between two adjacent pixels is not determined by the lateral extent of the drive circuit for the respective pixels, but solely by the lateral extent of the pixels themselves and, if applicable, their distance from one another.

[0029] According to at least one embodiment of the display device, the pixels, viewed from above, completely cover the associated switches. The switches therefore do not protrude laterally beyond the pixels. This simplifies and minimizes the distance between adjacent pixels.

[0030] According to at least one embodiment of the display device, the layer stack includes a reflective layer. The reflective layer is arranged, in particular, between the semiconductor layer sequence and the circuit layer. The reflective layer is specifically designed to reflect the radiation generated in the active region during operation of the display device. Radiation emitted towards the circuit layer can be reflected by the reflective layer and subsequently exit through the radiation transmission surface. Preferably, the reflective layer has a reflectivity of at least 60%, more preferably at least 70%, for a peak wavelength of the radiation generated in the active region. In particular, the reflective layer is designed as a metallic reflective layer. The reflective layer also preferably serves for the injection of charge carriers into the semiconductor layer sequence. The reflective layer can be single-layered or multi-layered.The mirror layer can be directly adjacent to the semiconductor layer sequence. Alternatively, a layer containing a TCO material can be placed between the semiconductor layer sequence and the mirror layer. TCO (transparent conductive oxide) materials are transparent conductive oxides. For example, the TCO material can contain or consist of zinc oxide or indium tin oxide (ITO). To increase electrical conductivity, the TCO material can also be doped.

[0031] According to at least one embodiment of the display device, the semiconductor layer sequence is attached to a substrate. Preferably, the circuit layer is arranged between the semiconductor layer sequence and the substrate. The substrate is thus located on the side of the circuit layer facing away from the semiconductor layer sequence. The substrate itself can be free of electronic elements for the control circuit. However, wiring elements, such as conductor tracks or electrically conductive through-holes, can be arranged or formed in or on the substrate. For example, the substrate can be designed as an electrically insulating substrate.

[0032] According to at least one embodiment of the display device, the display device, in particular the layer stack, has a first connection layer that is electrically connected to the first semiconductor layer. The first connection layer is, in particular, arranged outside the sequence of semiconductor layers and serves to electrically contact the first semiconductor layer.

[0033] According to at least one embodiment of the display device, the display device, in particular the layer stack, has a second connection layer that is electrically connected to the second semiconductor layer. The second connection layer is, in particular, arranged outside the sequence of semiconductor layers and serves for the electrical contact of the first semiconductor layer.

[0034] The first connection layer and / or the second connection layer can be located, at least in some areas, between the semiconductor layer sequence and the circuit layer.

[0035] According to at least one alternative embodiment of the display device, which is not claimed here, the active area extends continuously over at least two adjacent pixels, and in particular over all pixels. Therefore, structuring the semiconductor layer sequence to cut through the active areas for the formation of the pixels is not necessary.

[0036] According to at least one embodiment of the display device, the active area is divided into individual segments, each of which forms a pixel. The active area is thus bisected, for example, by trenches formed between adjacent active areas. These trenches simplify the spatially limited energizing of the active areas in a lateral direction. The trenches can extend completely or only partially through the semiconductor layer sequence in the vertical direction.

[0037] According to at least one embodiment of the display device, the segments are electrically contacted along a circumference, in particular along the entire circumference. For example, the second semiconductor layer of the segments is electrically contacted along the circumference. A connection layer for the electrical contacting of the second semiconductor layer, such as the second connection layer, is extended over a side face of the segment. The second connection layer extends laterally, in particular partially, between the active areas of two adjacent segments. In particular, the connection layer at least partially covers the active area in the lateral direction.

[0038] According to at least one embodiment of the display device, the sequence of semiconductor layers has at least one recess that extends from the circuit layer through the active region. For example, the at least one recess can extend through the first semiconductor layer and the active region and terminate in the second semiconductor layer.

[0039] The at least one recess allows charge carriers of both conduction types, i.e., electrons and holes, to be injected from the back of the semiconductor layer sequence into the active region from different sides and recombine there, emitting radiation. Therefore, contact layers arranged on the radiation-emitting surface for electrical contacting the semiconductor layer sequence are not required.

[0040] According to at least one embodiment of the display device, each pixel has at least one recess extending from the circuit layer through the active area. For example, each pixel has exactly one recess that, when viewed from above, overlaps the pixel's center of gravity. Particularly with comparatively large pixels, each pixel can also have more than one recess.

[0041] According to at least one embodiment of the display device, the pixels on one side of the active area are connected to a common contact, such as a ground contact. Advantageously, the other side of the active area is connected to the switch. In particular, the pixels on one side of the active area are connected to a common terminal layer. In other words, all first semiconductor layers of the pixels or all second semiconductor layers of the pixels are electrically connected to a common contact, in particular a common terminal layer. For example, either the first terminal layer or the second terminal layer is the common terminal layer.

[0042] According to at least one embodiment of the display device, the common connection layer extends over the entire surface of the radiation emission surface of the semiconductor layer sequence and, in particular, borders the radiation emission surface. For example, the second connection layer is the common connection layer. In this case, the second connection layer is advantageously transparent to the radiation generated in the active region. For example, the second connection layer contains a TCO material.

[0043] According to at least one embodiment of the display device, the first semiconductor layer covers at least part of a side surface of the second semiconductor layer. The total area available for radiation generation is therefore increased.

[0044] To create such pixels, the semiconductor layer sequence can be grown epitaxially in a structured manner. Subsequent segmentation of the semiconductor layer sequence, for example by means of an etching process, is therefore not necessary for the formation of segments within the semiconductor layer sequence.

[0045] The structured deposition of the first semiconductor layer onto the second semiconductor layer can be carried out in such a way that the first semiconductor layer also covers at least some of the side surfaces of the second semiconductor layer. Alternatively, the first semiconductor layer can also be deposited onto the second semiconductor layer in such a way that the first semiconductor layer is grown only on the second semiconductor layer and not on its side surfaces.

[0046] According to at least one embodiment of the display device, the display device is designed as a surface-mounted device (SMD). For example, the carrier has contacts for external electrical contacting on the side facing away from the semiconductor layer sequence.

[0047] According to at least one embodiment of the display device, a radiation conversion element is arranged at least partially downstream of the pixels in the direction of emission. The radiation conversion element can be arranged directly on the corresponding pixel or spaced apart from it. The radiation conversion element is specifically designed to convert primary radiation generated in the active area of ​​the display device, either completely or at least partially, into secondary radiation. In particular, the display device can be designed to emit radiation in the red, green, and blue spectral ranges.

[0048] According to at least one embodiment, a projection device comprises at least one display device with at least one of the features described above and an optical element located downstream of the display device in the direction of emission. The optical element may, for example, comprise one or more lenses. The projection device may also comprise more than one display device, for example, three display devices whose emitted radiation lies in different spectral ranges. In this case, the emitted radiation can be superimposed to form a single image by means of the optical element.

[0049] In a method for manufacturing a display device with a plurality of pixels, at least one embodiment comprises a layer stack with a sequence of semiconductor layers, which has an active region for generating radiation and forms the pixels, and with a circuit layer in which a switch is formed for each pixel. The circuit layer and the semiconductor layer sequence are deposited on top of each other.

[0050] The connection of the pixels in the semiconductor layer sequence to their respective associated switches for controlling the pixel is achieved primarily through deposition and structuring processes. However, creating a precisely aligned bond between a substrate on which switches are formed and another substrate on which the pixels are formed is not necessary.

[0051] According to at least one embodiment of the method, an amorphous semiconductor layer is deposited to form the circuit layer and is preferably subsequently recrystallized, at least in certain areas. Recrystallization can be carried out, for example, using a laser beam that is scanned across the surface of the amorphous layer. Recrystallization can be performed across the entire surface or only in certain areas. Recrystallization can also be carried out in a multi-stage process.

[0052] The deposition of the amorphous semiconductor material is carried out, for example, via a CVD (Chemical Vapor Deposition) process, such as a PECVD process.

[0053] According to at least one embodiment of the method, the circuit layer is deposited onto the semiconductor layer sequence. During the deposition of the circuit layer, the semiconductor layer sequence can be unstructured in the lateral direction or already structured into pixels. Furthermore, the semiconductor layer sequence can have at least one recess extending from the side on which the circuit layer is deposited through the active area. Additional layers can also already be deposited onto the semiconductor layer sequence, for example, a mirror layer and / or one or more insulating layers and / or one or more connection layers.

[0054] According to at least one embodiment of the method, the semiconductor layer sequence is deposited in a structured manner such that the pixels are formed during deposition. A subsequent structuring process for forming individual segments is therefore unnecessary. In particular, the structured deposition can be carried out such that the first semiconductor layer covers at least part of a side surface of the second semiconductor layer. The deposition of the second semiconductor layer is achieved, in particular, through openings in a masking layer. For example, an oxide layer or a nitride layer is suitable for the masking layer.

[0055] Starting from the openings, growth occurs in such a way that the active area has a larger cross-section than the corresponding opening in the masking layer.

[0056] The deposition of the subsequent first semiconductor layer can be carried out in such a way that the completed first semiconductor layer is formed in a continuous form.

[0057] Alternatively, the semiconductor layer sequence can be deposited across the entire area. With full-area deposition, the active area can extend seamlessly across adjacent pixels. If spatial separation of the pixels is desired, this can be achieved subsequently using a structuring process, such as wet or dry chemical etching.

[0058] The described method allows for the simultaneous production of multiple display devices. For example, the display devices can be formed in a wafer composite, which in particular comprises the semiconductor layer sequence and the circuit layer, and is subsequently separated into individual display devices. Advantageously, the separation takes place after the pixels have already been electrically connected to a switch in the circuit layer.

[0059] The described method is particularly suitable for manufacturing a display device as described above. Features mentioned in connection with the display device can therefore also be used for the method, and vice versa.

[0060] They show: The Fig. 1A to 1C a first embodiment of a display device in schematic sectional view ( Fig. 1A), in a schematic circuit diagram ( Fig. 1B) and in a schematic sectional view of a section of the circuit layer ( Fig. 1C); the Fig. 1D and Fig. 1E each an embodiment of a projection device with a display device in schematic sectional view; the Fig. 2 and Fig. 3 a second or third embodiment of a display device in schematic sectional view; the Fig. 4A and Fig. 4B a fourth embodiment of a display device based on a schematic sectional view ( Fig. 4A) and a schematic circuit diagram ( Fig. 4B); the Fig. 5A and Fig. 5B a fifth embodiment of a display device based on a schematic sectional view ( Fig. 5A) and a schematic circuit diagram ( Fig. 5B); the Fig. 6A to 6C a sixth embodiment of a display device based on a schematic sectional view in Fig. 6A and based on two design variants, each of which is a section shown in the Fig. 6B and Fig. 6C is shown; Fig. 7 a seventh embodiment of a display device in schematic sectional view; and the Fig. Figures 8A to 8E show an embodiment of a method for manufacturing a display device based on intermediate steps shown in schematic sectional view.

[0061] Identical, similar, or similarly effective elements in the figures are provided with the same reference symbols.

[0062] The figures are schematic representations and therefore not necessarily to scale. Rather, comparatively small elements and especially layer thicknesses may be exaggerated for clarity.

[0063] The display device 1 according to the Fig. The first embodiment, as described in 1A to 1C, has a layer stack 2.

[0064] The layer stack 2 comprises a semiconductor layer sequence 20. The semiconductor layer sequence includes an active region 200, which is arranged between a p-type first semiconductor layer 201 and an n-type second semiconductor layer 202. The semiconductor layers can also be inverted with respect to their polarity. The semiconductor layer sequence 20, in particular the active region 200, is based on a III-V semiconductor material and is intended for generating radiation in the ultraviolet, visible, or infrared spectral range.

[0065] In a vertical direction, the semiconductor layer sequence extends between a radiation emission surface 271 and a back side 272 opposite the radiation emission surface.

[0066] In the lateral direction, i.e., in a direction extending along a principal plane of the semiconductor layers of the semiconductor layer sequence 20, the active region 200 is subdivided into a plurality of segments 30, each forming a pixel. The display device has a plurality of pixels arranged in a matrix in a plurality of columns and a plurality of rows. A groove 22 is formed between adjacent segments 30, extending completely through the semiconductor layer sequence 20 in the vertical direction. The side faces 301 of the segments are each provided with a second insulating layer 242. This second insulating layer serves as a passivation layer and protects, in particular, the active region 200 exposed at the side faces.

[0067] Layer stack 2 further comprises a circuit layer 25. A control circuit 40 is formed by means of circuit layer 25. The control circuit 40 has a switch 4 for each pixel. During operation of the display device, the pixels 3 can each be controlled via the switches, so that all pixels of the display device 1 can be controlled independently of one another and operated simultaneously.

[0068] The circuit layer 25 preferably contains a polycrystalline semiconductor material, for example polycrystalline silicon. The switches can be designed in particular as thin-film transistors, for example as MOSFETs.

[0069] Layer stack 2 further comprises a first connection layer 231. The first connection layer is intended for electrical contacting the first semiconductor layer 201. In the case of the Fig. In the embodiment shown in Figure 1A, the first connection layer 231 extends continuously over all pixels 3 of the display device and forms a common contact for the pixels 3.

[0070] The first connection layer 231 is further configured as a mirror layer 26. During operation of the display device in the active area 200, radiation generated and emitted towards the circuit layer 25 can be reflected by the mirror layer and deflected towards the radiation emission surface. This prevents the risk of radiation absorption in the circuit layer.

[0071] The layer stack 2 further comprises a second connection layer 232. The second connection layer 232 is intended for the electrical contacting of the second semiconductor layers 202 of the pixels 3.

[0072] At the in Fig. In the embodiment shown in Figure 1A, the switches 4 are each electrically connected to the second semiconductor layer 202 of the associated pixel 3 via the second connection layer 232. In the semiconductor layer sequence 20, a recess 21 is formed in each pixel 3, extending from the back side 272 through the first semiconductor layer 201 and the active area 200 into the second semiconductor layer 202. The second connection layer 232 is connected to the second semiconductor layer 202 in the recesses 21. To prevent an electrical short circuit, a first insulating layer 241 is formed between the second connection layer 232 and the active area 200, as well as between the second connection layer and the first semiconductor layer 201. The first insulating layer 241 is also arranged between the first connection layer 231 and the second connection layer 232.

[0073] The lateral structure of the semiconductor layer sequence 20 and the circuit layer 25 each has a unit cell 209 and 259, respectively. The structure of the unit cells repeats periodically in the lateral direction. The lateral extent of the unit cell 209 is illustrated by lines 210. The lateral extent of the unit cell 259 of the circuit layer 25 is equal to that of the unit cell 209 of the semiconductor layer sequence 20. Therefore, the distance between adjacent pixels 3 is determined solely by the lateral extent of the pixels 3 and not by the space required for the control circuitry per pixel 3.

[0074] In particular, each pixel 3, when viewed from above on the display device, completely covers the respective assigned switch 4.

[0075] By integrating the semiconductor layer sequence 20 and the circuit layer 25 into the common layer stack 2, a display device is easily realized in which even very small pixels can be reliably and simultaneously electrically controlled. An adjusted bonding step between a pixel-structured semiconductor layer sequence and a substrate in which a control circuit is integrated can be omitted during manufacturing.

[0076] The lateral extent of the pixels can be varied within wide limits. In particular, the lateral extent of the pixels is between 2 µm and 300 µm (inclusive), preferably between 2 µm and 50 µm (inclusive), and most preferably between 2 µm and 10 µm (inclusive).

[0077] The radiation emission surface 271 remains free of electrical contacts. The risk of shading by radiation-impermeable layers, such as metallic contact layers, is thus avoided.

[0078] In the illustrated embodiment, the layer stack 2 is bonded to a substrate 5 by means of a bonding layer 6, for example, an adhesive layer. The substrate is preferably electrically insulating. For example, the substrate can contain or consist of a ceramic, such as an aluminum-containing ceramic like aluminum nitride or Al₂O₃, or boron nitride. A semiconductor material, for example silicon or germanium, can also be used for the substrate.

[0079] The carrier 5 has openings 50. On a rear side facing away from the layer stack 2, the carrier 5 has a first contact 71, a second contact 72, and further contacts 73 for the external electrical contacting of the display device. The second contact 72 can, for example, be configured as a ground contact.

[0080] The first connection layer 231 is electrically connected to the second contact 72 via a supply line 75.

[0081] The operating voltage for the pixels can be supplied via the first contact.

[0082] The display device is free of a growth substrate for the epitaxial deposition of the semiconductor layer sequence 20. The growth substrate can therefore be selected independently of its optical properties. Particularly in the case of a radiolucent growth substrate, the substrate can also remain at least partially, for example in a thinned form, in the finished display device.

[0083] The display device 1 is designed for surface mounting. Electrical contact with the display device is made exclusively via its rear side. Therefore, front-side contacts are unnecessary.

[0084] In Fig. Figure 1B shows a circuit diagram illustrating the interconnection of the individual pixels 3. A horizontal line 28 illustrates the separation between the semiconductor layer sequence 2 with the connection layers and the circuit layer 25 with the driver circuit 40. In contrast to the one in Fig. The design variant shown in 1A is present in the Fig. In the embodiment shown in Figure 1B, the first semiconductor layer 201 of the respective pixels 3 is electrically connected to the respective associated switches 4 via the first connection layer 231. The second semiconductor layer 202 of the pixels is electrically connected to the common second contact 72 via the second connection layer 232. The electrically conductive connection with the common contact can be configured similarly to the one shown in Figure 1B. Fig. 1A via a continuous design of the second connection layer 232 or, as in Fig. 1B indicates that this will be done using the control circuit 40.

[0085] Control signals can be supplied via the additional contacts 73, which control the respective switches 4 of the pixels 3. In particular, the contacts 73 can serve as an input for optical image data, which is supplied to the switches 4, for example, via a shift register (not shown) contained in the circuit layer 25. The number of contacts 73 can be much smaller than the number of pixels, especially smaller than the sum of the number of rows and the number of columns of the matrix display device.

[0086] A section of circuit layer 25 is shown in Fig. 1C is shown schematically. In circuit layer 25, recesses 250 are provided, which extend completely through the circuit layer 25 in a vertical direction. The recesses 250 are provided for establishing an electrically conductive connection with the pixels, in Fig. 1C is shown as an example of how to create an electrically conductive connection with the second connection layer 232. A third insulating layer 243 is formed between the semiconductor layer sequence 20 and the circuit layer 25, in particular between the second connection layer 232 and the circuit layer 25.

[0087] A fourth insulating layer 244 is formed on the side of the circuit layer 25 facing away from the semiconductor layer sequence 20. A gate electrode 41 of the switch 4 is formed on the side of the fourth insulating layer 244 facing away from the circuit layer 25. The switch also has further electrodes 42. One of the further electrodes 42, for example a source electrode or a drain electrode, of the switch 4 is electrically connected to the second terminal layer 232 via a lead-in layer 43. The lead-in layer extends vertically through the circuit layer 25 and the third insulating layer 243. The further electrodes 42 each border a doped region 252 of the circuit layer 25. Looking at the indicator device from above, the gate electrode is arranged between the doped regions 252.

[0088] Naturally, the control circuit 40 can include further components, such as capacitors, for example for the implementation of a sample-and-hold circuit, driver ICs, circuit elements and / or shift registers. In particular, some of these elements can be assigned not to a single pixel alone, but to several or all pixels.

[0089] For the insulating layers, in particular the first insulating layer 241, the second insulating layer 242, the third insulating layer 243, and the fourth insulating layer 244, suitable materials include, for example, an oxide such as silicon oxide, a nitride such as silicon nitride, or an oxynitride such as silicon oxynitride. The numbering of the individual insulating layers serves only for simplified description and does not imply any restriction regarding the order of production or the number of insulating layers present. Suitable methods for forming the insulating layers include, for example, a CVD (chemical vapor deposition) process, such as evaporation, an ALD (atomic layer deposition) process, or a PVD (physical vapor deposition) process, such as sputtering.

[0090] The first connection layer 231 and the second connection layer 232 can contain a metal and / or a TCO material. The first connection layer 231 is preferably configured as a reflective layer 26 for the radiation generated in the active region 200. For example, the reflective layer contains silver, aluminum, rhodium, palladium, nickel, or chromium. These materials are characterized by high reflectivity in the visible and ultraviolet spectral ranges. For the infrared spectral range, a reflective layer containing or consisting of gold is suitable, for example.

[0091] Optionally, as in Fig. As shown in Figure 1A, radiation conversion elements 8a, 8b, and 8c are arranged downstream of each pixel 3 in the direction of emission. For example, the semiconductor layer sequence 20, particularly the active region 200, can emit primary radiation in the ultraviolet spectral range during operation, which is converted, in particular completely, into secondary radiation in the blue, red, and green spectral ranges by means of the radiation conversion elements 8a, 8b, and 8c. Alternatively, the primary radiation can be in the blue spectral range. In this case, the radiation conversion element 8a can be omitted. Of course, such radiation conversion elements can also be used in the embodiments described below. However, for the sake of simplicity, these are not shown in the subsequent figures.

[0092] In the Fig. 1D and Fig. Figure 1E shows an embodiment of a projection device 10. Details of the display device 1, which is related to the Fig. Figures 1A to 1C, as well as the following figures, are not shown for the sake of simplicity. The projection device 10 comprises an optical element 9 in the beam path of the display device 10.

[0093] At the in Fig. In the embodiment shown in Figure 1D, the pixels of the display device each have radiation conversion elements 8a, 8b, 8c which, as described above, convert the radiation generated during operation. The number of pixels of the display device is three times greater than the number of optically representable pixels, so that a full-color image is produced during operation of the projection device.

[0094] Unlike the one in Fig. In the embodiment shown in Figure 1D, the projection device 10 comprises three display devices 1, each designed to generate radiation in a specific wavelength range. The number of pixels in each display device is equal to the number of optically representable pixels. A common radiation conversion element 8a, 8b, 8c is arranged in the beam path of each display device. The radiation emitted by the display devices 1 is superimposed to form a common full-color image by means of a superposition arrangement 91. The superposition arrangement can, for example, be formed by means of crossed dichroic-coated prisms.

[0095] The in Fig. The second embodiment shown in section 2 essentially corresponds to the one described in connection with Fig. The first embodiment described in Figure 1 differs in that the display device 1 is designed as a component that is not externally electrically contactable from the back, but from the front. The first contact 71, the second contact 72, and the further contacts 73 (not explicitly shown) are therefore arranged on the same side of the circuit layer 25 as the semiconductor layer sequence 20. Such a design of the display device is also suitable for the embodiments described below.

[0096] The in Fig. The third embodiment shown in section 3 differs from the one described in connection with the Fig. The first embodiment described in Figures 1A to 1C is particularly advantageous in that no grooves are formed between adjacent pixels 3. The semiconductor layer sequence 20 thus extends continuously across the pixels. A structuring step for forming individual segments of the active region 200 can be omitted. Such a continuous semiconductor layer is particularly suitable when the transverse conductivity of the first or second semiconductor layer connected to the switch 4 is so low that the lateral extent of the region in which radiation is emitted during charge carrier injection is essentially determined by the extent of the associated connection layer.In a semiconductor layer sequence based on AlInGaN, the p-type semiconductor material typically has a lower transverse conductivity than the n-type semiconductor material, so that the continuous semiconductor layer connected to the switch 4 is expediently designed to be p-type.

[0097] The electrical contacting of the individual pixels is carried out as in connection with Fig. As described in Figure 1B, the first semiconductor layer 201 is electrically connected to the associated switches 4 via the first connection layer 231. The second connection layer 232 forms a common contact for all pixels 3 of the display device 1.

[0098] The in the Fig. 4A and Fig. The fourth embodiment shown in 4B essentially corresponds to the one described in connection with Fig. The third embodiment described in Section 3 differs in that the semiconductor layer sequence 20 is free of the recesses 21 that extend through the active region 200. The semiconductor layer sequence 20 is therefore completely unstructured in the lateral direction. For electrical contact with the second semiconductor layer 202, the second contact layer 232 extends over the radiation emission surface 271 and is guided laterally to the semiconductor layer sequence 20 by a side surface 205 that bounds the semiconductor layer sequence in the lateral direction. To prevent an electrical short circuit, the side surface 205 is covered with a first insulating layer 241 at least at the level of the active region 200 and at the level of the first semiconductor layer 201. The first insulating layer 241 is arranged between the side surface 205 and the second contact layer 232.In this embodiment, the second connection layer 232 preferably contains a TCO material, such as ITO or ZnO.

[0099] The in Fig. The circuit diagram shown in 4B corresponds, apart from the contacting of the second semiconductor layer 202 with the common contact 72, to that shown in the Fig. Circuit diagram shown in 1B.

[0100] The in the Fig. 5A and Fig. The fifth embodiment shown in 5B essentially corresponds to that described in connection with the Fig. The first embodiment described in 1A to 1C. In particular, the switches 4 are each as described in connection with Fig. 1B is described as being electrically connected via the first connection layer 231 to the first semiconductor layer 201 of the pixels 3.

[0101] In contrast to the first embodiment, the electrical contact of the second semiconductor layer 202 is made via the grooves 22 formed between the pixels 3. The grooves extend through the first semiconductor layer 201 and the active area 200 and terminate in the second semiconductor layer. The second contact layer 232 is electrically connected to the second semiconductor layer 202 in the grooves. The contact of the second semiconductor layer thus occurs along the circumference of each pixel. The second contact layer partially covers the side surface 301 of the segments 30. Viewed from above, the second contact layer takes the form of a grid, preferably metallic. Therefore, a recess through the active area 200, in addition to the grooves, is unnecessary.The area of ​​the mirror layer 26 is thus increased compared to a design with a recess in the semiconductor layer sequence.

[0102] To prevent an electrical short circuit, a first insulating layer 241 is formed between the second connection layer 232 and the active area 200.

[0103] The second interface layer 232 can be either transparent or opaque. In an opaque design, for example using a metal layer, the optical crosstalk between adjacent pixels can be suppressed or at least reduced by means of the second interface layer 232.

[0104] The in Fig. The circuit diagram shown in 5B corresponds, apart from the edge-side contacting of the second semiconductor layer 202, to that shown in the Fig. Circuit diagram shown in 1B.

[0105] The in Fig. The sixth embodiment shown in Figures 6A to 6C, with three design variants, essentially corresponds to the one described in connection with the Fig. 5A and Fig. The fifth embodiment described in 5B. In contrast, the grooves 22 extend completely vertically through the semiconductor layer sequence 20. This further reduces optical crosstalk between adjacent pixels.

[0106] At the in Fig. In the embodiment shown in Figure 6A, the second semiconductor layer 202 has a projection 203. The projection partially covers the second connection layer 232. This facilitates reliable electrical contact between the second connection layer and the second semiconductor layer. The first insulating layer 241 extends towards the radiation emission surface 271 up to the projection 203.

[0107] At the in Fig. In the embodiment shown in 6C, the second connection layer 232 additionally features a further sublayer 233. This further sublayer can be described as in connection with Fig. 4A describes that the entire surface of the radiation emission surface 271 is formed and, in the area of ​​the trenches, borders the sublayer of the second connection layer arranged in the trenches. This further simplifies the laterally uniform current distribution to the pixels.

[0108] At the in Fig. In the embodiment shown in Figure 6B, the further sublayer 233 extends over the entire side surface 301 of the segment 30. Furthermore, the first insulation layer 241 completely covers the side surface of the segment.

[0109] At the in Fig. In the seventh embodiment shown in 7, the electrical contacting of the individual pixels 3 corresponds to that described in connection with the Fig. 4A and Fig. The fourth embodiment described in 4B. Fig. In the embodiment shown in Figure 7, the deposition of the semiconductor layer sequence 20 differs from the preceding embodiments in that the lateral structuring of the semiconductor layer sequence is already created during epitaxial deposition. For this purpose, a masking layer 2011 is applied during epitaxial deposition. The second semiconductor layer grows through the openings 2012 of the masking layer. The position of the subsequent pixels is thus already determined by the masking layer. In particular, each pixel is assigned exactly one opening. In cross-section, the active region 200 has a U-shaped structure, which is bounded vertically by the masking layer 2011. Subsequent structuring to cut through the active region 200, for example by means of a wet chemical or dry chemical process, is therefore unnecessary.This helps to avoid defects that can occur during such a structuring process and reduce the radiant power of individual pixels.

[0110] In the illustrated embodiment, the active region 200 and the first semiconductor layer 201 are deposited on the second semiconductor layer 202 such that the first semiconductor layer 201 extends laterally beyond the second semiconductor layer 202. Specifically, the side surfaces 2020 of the second semiconductor layer 202 are covered by the active region 200 and the first semiconductor layer 201. This deposition method increases the usable area of ​​the active region 200 for radiation generation.

[0111] The masking layer 2011 borders both the first semiconductor layer 201 and the second semiconductor layer 202 in certain areas. The first semiconductor layer 201 extends continuously across adjacent pixels 3. During manufacturing, the growth of the first semiconductor layer 201 occurs in such a way that the initially laterally separated sub-regions of this layer grow together.

[0112] The opening 2012 of the masking layer 2011 and the respective first connection layer 231 of the pixel 3 overlap in view of the display device 1.

[0113] Furthermore, in the illustrated embodiment, the radiation transmission surface has a structure 12 to increase the output coupling efficiency. The structure can, for example, be a roughening. Such a structure can also be applied in the embodiments described above.

[0114] An exemplary embodiment of a method for manufacturing a display device is described in the Fig. 8A to 8E are shown using schematically depicted intermediate steps in a sectional view. The manufacture of the display device is demonstrated as an example of a display device that, as in connection with the Fig. The process described in sections 1A to 1C is carried out as follows.

[0115] The figures each show only a section of a display device. During manufacturing, a large number of identical display devices can be produced side by side in a single wafer assembly. After completion of the manufacturing process, the wafer assembly can be separated into multiple display devices.

[0116] As in Fig. As shown in Figure 8A, a semiconductor layer sequence 20 with an active region 200, a first semiconductor layer 201 and a second semiconductor layer 202 is epitaxially deposited, for example by means of MOVPE or MBE, on a growth substrate 29. After epitaxial deposition, a plurality of recesses 21 are formed, the recesses extending through the first semiconductor layer 201 and the active region 200 into the second semiconductor layer 202.

[0117] A first connection layer 231 is deposited on the side of the semiconductor layer sequence 20 facing away from the growth substrate 29. Alternatively, the recesses 21 can also be formed after the first connection layer 231 has been deposited.

[0118] On the side of the semiconductor layer sequence 20 facing away from the growth substrate 29, a first insulating layer 241 is structured in such a way that the second semiconductor layer 202 is at least partially exposed in the area of ​​the recesses 21.

[0119] Subsequently, a second connection layer 232 is deposited on the first insulating layer 241 and laterally structured. The second connection layer borders the second semiconductor layer 202 in the area of ​​the recesses 21.

[0120] A third insulating layer 243 is deposited onto the connection layers 231, 232. Subsequently, an amorphous semiconductor layer 251 is deposited, for example by means of a PECVD process. The layer stack 2 thus formed is in Fig. 8B shown.

[0121] To increase charge carrier mobility, the amorphous semiconductor layer 251 is recrystallized, at least in certain areas. This can be done, for example, by scanning the surface with a laser beam.

[0122] Using the circuit layer 25 thus formed, as described in Fig. Figure 8C shows a control circuit 40 formed with a plurality of switches 4. For the sake of simplicity, the additional insulation and metallization layers provided for the formation of the control circuit, for example for the formation of the gate electrodes and the other electrodes of the switches 4 (see Figure 8C), are not shown. Fig. 1C), in Fig. 8C is not explicitly shown. The formation of circuit layer 25 with the control circuit 40 includes, in particular, - the exposure of the first connection layer 231 and the second connection layer 232; - the deposition of electrodes 42 for the switches, such as source electrodes and drain electrodes, and the connection of the electrodes with the associated terminal layers; and - the deposition of an oxide layer (fourth insulating layer 244 in Fig. 1C), on which the gate electrode 41 is subsequently applied.

[0123] Furthermore, the formation of the circuit layer can also include the formation of doped regions 252, for example by ion implantation.

[0124] After the control circuit 40 has been formed, the layer stack 2 is attached to a carrier 5 by means of a connecting layer 6 ( Fig.8D). Each pixel of the display device is thus already assigned a switch before it is attached to the carrier 5. For electrical contacting of the display device from the side of the carrier 5 facing away from the layer stack 2, a first contact 71, a second contact 72, and further contacts 73 are formed on the back of the carrier 5. These are electrically connected to the circuit layer 25 via openings 50. The openings 50 can be formed before or after the carrier 5 is attached to the layer stack 2.

[0125] After the layer stack 2 is attached to the support 5, the growth substrate 29 is removed. This can be done, for example, mechanically, such as by grinding, lapping, or polishing, and / or chemically, such as by wet or dry chemical etching or by a laser lift-off (LLO) process. To divide the active area 200 into individual segments 30, grooves 22 are formed, for example, by wet or dry chemical etching. In contrast to the described embodiment, the grooves 22 can also be formed before the layer stack 2 is attached to the support 5, in particular before the third insulating layer 243 and the amorphous semiconductor layer 251 are formed.

[0126] To manufacture a display device in which the active area 200 is not subdivided into segments 30, the formation of the trenches 22 can be completely dispensed with.

[0127] After the trenches have been formed, the side surfaces of the segments 301, in particular the exposed parts of the active area 200, are provided with a second insulating layer 242.

[0128] In contrast to the described embodiment, the growth substrate 29 can also remain completely or partially, for example in a diluted form, in the display device.

[0129] The described manufacturing process enables the production of display devices in which the radiation-generating semiconductor layers, in particular the active region 200, and the layers intended for electrical control, in particular the circuit layer 25, are integrated into a common layer stack. Therefore, a complex bonding process, in which prefabricated pixels and a prefabricated control circuit must be positioned relative to each other with high precision (i.e., with an adjustment accuracy of less than or equal to the center-to-center distance of adjacent pixels), is not required. In comparison, the adjustment requirements for attaching the layer stack 2 to the carrier 5 are relatively minor and largely independent of the size of the individual pixels.

Claims

[1] Display device (1) with a layer stack (2) comprising a semiconductor layer sequence (20) with a first semiconductor layer, a second semiconductor layer and an active area (200) arranged between the first semiconductor layer and the second semiconductor layer for generating radiation and a circuit layer (25), wherein - the semiconductor layer sequence forms a plurality of pixels (3) and in the circuit layer a switch (4) is formed for each pixel, which is electrically connected to the respective pixel; - the active area is divided into individual segments (30), each forming a pixel; and - the segments are electrically contacted along a circumference of the segments by means of a connection layer (232), wherein the connection layer (232) is guided over a side surface (301) of the segments (30) for the electrical contacting of the second semiconductor layer. [2] Display device according to claim 1, wherein the display device is free from a material bond between the semiconductor layer sequence and the circuit layer. [3] Display device according to claim 1 or 2, wherein the circuit layer is a polycrystalline semiconductor material or an amorphous semiconductor material with a charge carrier mobility of at least 100 cm⁻¹ 2 / Vs for at least one type of charge carrier. [4] Display device according to one of the preceding claims, wherein the semiconductor layer sequence and the circuit layer each have a periodically recurring structure with a unit cell along a lateral direction, wherein in the lateral direction an extent of the unit cell of the circuit layer (259) is equal to an extent of the unit cell of the circuit layer (209). [5] Display device according to one of the preceding claims, wherein the pixels in a top view of the display device completely cover the associated switches. [6] Display device according to one of the preceding claims, wherein the layer stack has a mirror layer (26) arranged between the semiconductor layer sequence and the circuit layer. [7] Display device according to one of the preceding claims, wherein the semiconductor layer sequence is attached to a carrier (5) and the circuit layer is arranged between the semiconductor layer sequence and the carrier. [8] Display device according to one of the preceding claims, wherein the semiconductor layer sequence has at least one recess (21) extending from the circuit layer through the active area (200), wherein each pixel has at least one recess (21) extending from the circuit layer through the active area (200). [9] Display device according to one of the preceding claims, wherein the pixels on one side of the active area are connected to a common connection layer (231, 232). [10] Display device according to claim 9, wherein the common connection layer extends over the entire surface of a radiation emission surface (271) of the semiconductor layer sequence. [11] Display device according to one of the preceding claims, wherein the active area is formed between a first semiconductor layer (201) and a second semiconductor layer (202) and the first semiconductor layer covers at least part of a side surface (2020) of the second semiconductor layer. [12] Display device according to one of the preceding claims, wherein a radiation conversion element (8a, 8b, 8c) is arranged at least partially downstream of the pixels in the direction of emission. [13] Projection device comprising a display device according to one of the preceding claims and comprising an optical element arranged downstream of the display device in the direction of emission. [14] Method for manufacturing a display device (1) with a plurality of pixels (3) in which a layer stack (2) is formed with a sequence of semiconductor layers (20) comprising a first semiconductor layer, a second semiconductor layer and an active area (200) arranged between the first semiconductor layer and the second semiconductor layer for generating radiation and forming the pixels (3), and with a circuit layer (25) in which a switch (4) is formed for each pixel, wherein - the circuit layer and the semiconductor layer sequence are deposited on top of each other; - the active area is divided into individual segments (30), each forming a pixel; and - the segments are electrically contacted along a circumference of the segments by means of a connection layer (232), wherein the connection layer (232) is guided over a side surface (301) of the segments (30) for the electrical contacting of the second semiconductor layer. [15] Method according to claim 14, wherein an amorphous semiconductor layer (251) is deposited and subsequently recrystallized to form the circuit layer. [16] Method according to any one of claims 14 to 15, wherein a display device according to any one of claims 1 to 12 is manufactured.

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