Improved electromagnetic compatibility (EMC) output drivers and related methods

Abstract

Integrated circuit comprising the following: an output driver circuit (134) for generating an output signal, wherein the output driver circuit (134) comprises several driver devices (42, 44, 46, 48, 50, 52) which are connected in parallel, each of the several driver devices (42, 44, 46, 48, 50, 52) having a gate terminal, a drain terminal and a source terminal, wherein the drain terminals of the several driver devices (42, 44, 46, 48, 50, 52) are coupled to a first node (62) and the source terminals of the several driver devices (42, 44, 46, 48, 50, 52) are coupled to a second node (64); and A controller (60, 132) for providing individual control signals for gate terminals of the multiple driver devices (42, 44, 46, 48, 50, 52) to control a state of the output signal, wherein the controller (60, 132) has a state change input (136) to receive an instruction to change the state of the output signal, and one or more selection inputs (140) which respond to a code word indicating a manner in which the multiple driver devices (42, 44, 46, 48, 50, 52) are to change the pass state when the state of the output signal is changed. wherein the controller (60, 132) is configured to change the pass state of the multiple driver devices (42, 44, 46, 48, 50, 52) successively according to a first clock frequency in response to a first predetermined code word present at the one or more selection inputs (140) and wherein the controller (60, 132) is configured to change the pass state of the multiple driver devices (42, 44, 46, 48, 50, 52) successively according to a second clock frequency in response to a second predetermined code word present at the one or more selection inputs (140), wherein the second predetermined code word is different from the first predetermined code word, and the second clock frequency is different from the first clock frequency.

Description

AREA

[0001] The subject matter disclosed herein relates generally to integrated circuits, and more particularly to techniques and circuits for improving the electromagnetic compatibility (EMC) of driver circuits within integrated circuits. BACKGROUND

[0002] DE 692 31 612 T2 discloses a device comprising an integrated circuit chip having output pads connected to a network whose electrical characteristics may vary, the device comprising means responsive to control signals for adjusting output drive currents applied to a pad, the device comprising PVT monitoring means responsive to manufacturing process, voltage, and temperature parameters for providing an electrical signal describing the manufacturing process, voltage, and temperature parameter variations on the chip, the device being characterized by the following features: logic means having processing means for determining network configuration information enabling network capacity characteristics to be determined, the network configuration information describingwhich components are connected to the pad, and wherein the network capacitance characteristics include a load capacitance at the output pad, wherein the processing means is responsive to an output signal from the PVT monitoring means and to a detected network capacitance characteristic to provide control output signals indicative of a required output drive current for the output pad, so that the switching characteristics at the pads are fixed; and wherein the means responsive to control signals comprises driver means having programmable circuitry responsive to the control output signals to modify the programmable circuitry to provide the required output drive current.

[0003] Experimentation has shown that a weakly driven output driver circuit is susceptible to pulsed radar and other electromagnetic interference (EMI) noise sources. Noise from EMI sources can cause a weakly driven output driver to change state, resulting in spurious output pulses or no output at all. On the other hand, over-driving an output driver can cause a current burst to occur during switching, which can create a radiated emission problem. In this scenario, the strongly driven output driver can actually act as a source of EMI for other nearby electronic devices or itself.

[0004] One technique that has been used to reduce the likelihood that an output driver will radiate in an undesirable manner is to adjust the fall time of the output signal generated by the driver. However, the fall time is typically reduced by lowering the driver's operating level, which increases the circuit's susceptibility to EMI. Techniques and circuits are needed that allow an output driver to have a reduced likelihood of generating undesirable emissions while maintaining increased immunity to EMI and other sources of interference. SUMMARY

[0005] It is an object of the present invention to solve the problems set out above.

[0006] This object is achieved by the integrated circuits having the features of claims 1 and 11 and by the method of claim 20. Further advantageous developments and embodiments of the invention are the subject of the respective subsequent claims.

[0007] In embodiments described herein, an output driver or output driver circuit is provided that has increased robustness to disturbances with a reduced likelihood of generating unwanted emissions. The output driver circuit may, for example, comprise an array of individually controlled output devices connected in a parallel arrangement to provide an output signal. In one embodiment, output devices may be controlled in such a way as to provide increased control over the fall time and / or rise time of the output signals. For example, in one possible approach, the output devices may be switched one after the other to form a programmably shaped output waveform according to the requirements of a particular application.In other embodiments, groups of devices may be switched together in a controlled manner to provide a desired output waveform.

[0008] The speed at which the driver devices are activated can enable a modified fall time of the output voltage across the output driver array, which in some embodiments can be selected to reduce or prevent radiated emissions as needed for a particular application. Individual device control provides added flexibility such that an array of output drivers has multiple output fall / rise time configurations that are fully user-selectable. In some implementations, the array of output drivers may also be capable of achieving a number of different waveforms during falling and rising edges. In an exemplary embodiment, each individually controlled driver device has the capability to achieve a maximum possible drive strength.

[0009] In accordance with one aspect of the concepts, systems, circuits, and techniques described herein, an integrated circuit comprises: a) an output driver circuit to generate an output signal for the integrated circuit, the output driver circuit comprising a plurality of driver devices connected in parallel, each of the plurality of driver devices having a gate terminal, a drain terminal, and a source terminal, the drain terminals of the plurality of driver devices being coupled to a first node, and the source terminals of the plurality of driver devices being coupled to a second node; and b) a controller.a controller for providing individual control signals to gate terminals of the plurality of driver devices to control a state of the output signal, the controller having a state change input for receiving an instruction to change the state of the output signal and one or more select inputs indicating, in response to a code word, a manner in which the plurality of driver devices are to change their conduction state when the state of the output signal is changed.

[0010] In accordance with another aspect of the concepts, systems, circuits, and techniques described herein, an integrated circuit comprises: a) an output driver circuit to generate an output signal for the integrated circuit, the output driver circuit comprising a plurality of driver devices connected in parallel, each of the plurality of driver devices having a gate terminal, a drain terminal, and a source terminal, the drain terminals of the plurality of driver devices being coupled to a first node, and the source terminals of the plurality of driver devices being coupled to a second node; and b) a controller.a controller for providing individual control signals to gate terminals of the plurality of driver devices to control a state of the output signal, the controller configured to change conduction states of the plurality of driver devices in a sequential manner when a change in the state of the output signal is desired.

[0011] In accordance with another aspect of the concepts, systems, circuits, and techniques described herein, an integrated circuit comprises: a) an output driver circuit to generate an output signal for the integrated circuit, the output driver circuit comprising a plurality of driver devices connected in parallel, each of the plurality of driver devices having a gate terminal, a drain terminal, and a source terminal, the drain terminals of the plurality of driver devices being coupled to a first node, and the source terminals of the plurality of driver devices being coupled to a second node, the plurality of driver devices comprising at least one smaller driver device and at least one larger driver device; and b) a controller.a controller for providing individual control signals to gate terminals of each of the plurality of driver devices to control a state of the output signal, the controller configured to first change the conduction state of the at least one smaller driver device and then change the conduction state of the at least one larger driver device to change the state of the output signal.

[0012] In accordance with yet another aspect of the concepts, systems, circuits, and techniques described herein, a method of operating an output driver circuit within an integrated circuit having a plurality of output driver devices connected in parallel for use in generating an output signal comprises: (a) determining that a change in a state of the output signal is needed; (b) obtaining selection information indicating a manner in which the plurality of output driver devices are to change the conduction state to achieve the change in the state of the output signal; (c) receiving a clock signal; and generating individual control signals for the plurality of output driver devices based, at least in part, on the clock signal and the selection information.

[0013] In accordance with yet another aspect of the concepts, systems, circuits, and techniques described herein, a method of operating an output driver circuit having at least one smaller output driver device and at least one larger output driver device connected in parallel for use in generating an output signal comprises: (a) determining that a change in a state of the output signal is needed; (b) turning on the at least one smaller output driver device to change the state of the output signal to a new output state in response to the determining; and (c) turning on the at least one larger output driver device after turning on the at least one smaller output driver device. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The foregoing features can be more fully understood from the following description of the drawings in which: Fig. 1 is a schematic diagram showing a conventional output driver circuit; Fig. 2A is a schematic diagram illustrating an exemplary output driver system in accordance with one embodiment; Fig. 2B is a schematic diagram illustrating an exemplary output driver system having a push-pull configuration in accordance with one embodiment; Fig. 3A and Fig. 3B are waveform diagrams illustrating falling edges of output signals of output driver circuits in accordance with embodiments; Fig.4 is a waveform diagram illustrating a rising edge of an output signal of an output driver circuit in accordance with one embodiment; Fig. 5 is a waveform diagram illustrating a falling edge of an output signal of an output driver circuit enabling simultaneous switching of groups of devices in accordance with one embodiment; Fig. 6 is a schematic diagram illustrating an exemplary output driver circuit utilizing output devices of different sizes in accordance with one embodiment; Fig. 7 is a block diagram illustrating an exemplary output driver system that may be used within an integrated circuit in accordance with one embodiment; Fig.8 is a flowchart illustrating an exemplary method of operating an integrated circuit having an output driver circuit with multiple parallel output driver devices in accordance with one embodiment; and Fig. 9 is a flowchart illustrating an exemplary method of operating an integrated circuit having an output driver circuit employing the parking brake approach in accordance with one embodiment. DETAILED DESCRIPTION

[0015] Fig.1 is a schematic diagram illustrating a conventional output driver circuit 10 that may be used to provide an output signal for an integrated circuit (IC). As illustrated, the output driver circuit 10 may include an output driver device 12 and a gate control circuit 14. The output driver device 12 may include a transistor, such as an insulated gate-field effect transistor (IGFET) 16, having a gate terminal 18, a drain terminal 20, and a source terminal 22. As shown, the drain terminal 20 of the output driver device 12 may be connected to a contact pad 24 (or other type of conductor, pin, or contact) of the integrated circuit.When the integrated circuit is placed in a system, contact pad 24 may be coupled to an external load device (e.g., a pull-up load) to provide a signal to the load device. Source terminal 22 of output driver device 12 may be connected to an external ground 30 through another contact of the integrated circuit. During normal operation of the integrated circuit, gate control circuit 14 drives gate terminal 18 of output driver device 12 to produce either a logic zero or a logic one signal value at output terminal 24.

[0016] With reference to Fig. 1, the output driver device 12 may have a parasitic gate-to-drain capacitance (C gd ) 26 and a parasitic gate-to-source capacitance (C gs) 28. As will be appreciated, these parasitic capacitances 26, 28 may each provide a certain degree of coupling between the gate terminal 18 and the drain and source terminals 20, 22. In cases where the output driver device 12 is weakly driven by the gate control circuit 14, electromagnetic interference (EMI) received at the integrated circuit (e.g., from a pulsed radar system or other EMI source) may couple across one or both of the parasitic capacitances 26, 28 and change the output state of the device 12. This may cause errors in the data provided to the load device. On the other hand, if the output driver device 12 is driven too strongly, current surges I dsgenerated during switching activity, which can be a source of EMI for circuits both inside and outside the integrated circuit. Techniques and circuits are provided herein that are capable of addressing both of the above problems in an output driver circuit.

[0017] As used herein, a transistor can be considered "strongly driven" if a drive source has a low impedance with a high current capability, resulting in faster device turn-on. Conversely, a transistor can be considered "weakly driven" if a drive source has a higher impedance with a low current capability, resulting in slower device turn-on.

[0018] Fig.2A is a schematic diagram illustrating an exemplary output driver system 40 in accordance with one embodiment. The output driver system 40 may be used, for example, to provide an output signal for an integrated circuit. In some embodiments, the output signal may be a digital signal, although analog output drivers may also be implemented. As illustrated, the output driver system 40 may include a number of output driver devices 42, 44, 46, 48, 50, 52 connected in a parallel arrangement. The output driver system 40 may also include an output driver controller 60 for generating control signals for the output driver devices 42, 44, 46, 48, 50, 52 during driver operation. Each driver device 42, 44, 46, 48, 50, 52 may be independently controlled by the output driver controller 60.As shown, the controller 60 may have another circuit 76 coupled to an input thereof for providing data or other signals to the controller 60 for output by the output driver system 40. In some implementations, another circuit 76 may provide an instruction to the controller 60 that the output state of the output signal needs to be changed. Another circuit 76 may comprise any of a wide variety of different circuit types.

[0019] As will be described in more detail, the architecture of the output driver system 40 is significantly less susceptible to problems related to EMI and other disturbances in the environment surrounding the integrated circuit. Additionally, the output driver system 40 is much less likely to be a source of EMI during driver switching activity. In some implementations, the output driver system 40 may be capable of controllably adjusting the fall times and / or rise times of output signals. In this manner, greater control over fall times and EMI generation within the driver can be achieved.

[0020] In the illustrated embodiment, output driver devices 42, 44, 46, 48, 50, 52 are n-channel IGFETs, each having a gate terminal, a drain terminal, and a source terminal. Other types of transistors may be used in other implementations (including, for example, other types of FETs, bipolar junction transistors, etc.). As shown in Fig.As shown in Figure 2A, the output driver controller 60 may be separately coupled to the gate terminals of each of the output driver devices 42, 44, 46, 48, 50, 52 to provide an individual control signal for each device. Although illustrated with six output driver devices, it should be appreciated that any number of devices (i.e., two or more) may be used in a particular implementation. The total number of devices may be selected so that the correct saturation requirements for the output driver are achieved when the devices are in the "ON" state.

[0021] As in Fig.2A, the drain terminals of the output driver devices 42, 44, 46, 48, 50, 52 are each coupled to a first node 62, and the source terminals of the output driver devices 42, 44, 46, 48, 50, 52 are each coupled to a second node 64. In some implementations, the first node 62 may be coupled to, for example, a pad 66, and the second node may be coupled to a pad 72. The pads 66, 72 may represent, for example, contacts on a semiconductor die or contacts, conductors, or terminals on a corresponding integrated circuit package.Any type of integrated circuit package may be used, including, for example, dual in-line packages (DIP), pin grid arrays (PGA), leadless chip carrier (LCC) packages, surface mount packages, quad flat pack (QFP) packages, thin small outline packages (TSOP), land grid arrays (LGA), ball grid arrays (BGA), flip chip packages, multi-chip packages, system-in-package (SIP) packages, multi-chip modules (MCM), and / or others. When the output driver system 40 is placed in a system, the pad 66 may be connected to an external load device (for example, pull-up load resistor 74 in . Fig. 2A) to provide an output signal to the load device. Similarly, pad 72 can be coupled to an external ground 70 when the output driver system 40 is placed in a system.

[0022] In some embodiments, a sensing resistor 68 or other sensor may be connected between node 64 and contact pad 72 for use in sensing an over-current condition (e.g., a short-circuit current level (I SC ) etc.) may be placed in the output driver system 40. When an over-current condition is detected, all devices within the driver system 40 may be controlled to simultaneously shut down or turn off (i.e., change to a non-conductive state, etc.).

[0023] In at least one embodiment, the output driver devices 42, 44, 46, 48, 50, 52 may be turned on (or off) in a sequential manner by an output driver controller 60 to produce a wave-like type of response in an output signal.

[0024] Additionally, in some embodiments, the speed at which the output driver devices 42, 44, 46, 48, 50, 52 are turned on (or off) may be controllable. In this way, the fall time (and / or rise time) of the output signal may be controlled.

[0025] Because multiple output devices are used in output driver system 40, smaller devices can be used. As is well known, smaller output devices typically have lower parasitic capacitances. As described above, when an output device is under-driven, EMI and other noise can couple through parasitic capacitances and possibly change the state of an output signal. Thus, the smaller coupling capacitances associated with the output devices in system 40 can reduce the likelihood that noise will change the output state of the driver. Additionally, because multiple driver devices are used and different devices are switched at different times, the individual devices can be driven harder.driven than a single device can be driven without generating unwanted EMI emissions. Furthermore, when the devices are switched on one after the other in a sequential manner (or in groups, as described below), at any time during the switching process, some of the devices may be stably on, some of the devices may be stably off, and only one (or some) of the devices may be susceptible to coupling due to a spurious signal (i.e., the device(s) currently transitioning between states).

[0026] In the exemplary output driver system 40 of Fig.2A, a group of parallel-connected n-channel driver devices is used. In an alternative arrangement, a push-pull output driver configuration may be used, comprising a group of parallel-connected p-channel devices and a group of parallel-connected n-channel devices. Fig.2B is a schematic diagram illustrating an exemplary output driver system 80 employing a push-pull configuration in accordance with one embodiment. As illustrated, the output driver system 80 includes an output driver circuit 82 driven by a controller 84, which may be a digital controller or an analog controller. The output driver circuit 82 includes a group of p-channel output driver devices 86 connected in parallel and a group of n-channel output driver devices 88 connected in parallel. The group of p-channel output driver devices 86 is connected to a first supply potential V DD and the group of n-channel output driver devices 88 is connected to a second supply potential V SSconnected. First and second resistors 90, 92 are coupled between the p-channel devices 86 and the n-channel devices 88. An output pad 98 may be coupled to a node between the two resistors 90, 92. The output pad 98 may represent, for example, a contact on a semiconductor die or a contact, conductor, or terminal on a corresponding integrated circuit package. When the output driver system 80 is implemented in a system, the output pad 98 may be connected to an external load device.

[0027] The controller 84 is operable to provide control signals to the group of p-channel output driver devices 86 and the group of n-channel output driver devices 88 to generate an output signal for the integrated circuit. In at least one implementation, the controller 84 may provide independent control for each device in the two groups 86, 88. That is, the controller 84 may have first outputs 94 coupled to the individual gates of the p-channel devices and second outputs 96 coupled to the individual gates of the n-channel devices. The control of the individual devices may be similar to that described above. That is, the devices may all be connected together, one at a time and / or in predetermined groups, to obtain a variety of different fall-time and / or rise-time characteristics.

[0028] The Fig. 3A and Fig. 3B are waveform diagrams illustrating exemplary falling edges 100, 102 of output signals from output driver circuits in accordance with various implementations. As in Fig. 3A, when each output driver device (NM1, NM2, NM3, ..., NM x ) an output driver circuit is turned on, the output voltage of the output driver will gradually decrease until all the devices are in saturation. If a slower device is used for a device switching interval, the fall time of the output signal may appear to be more of a step function, as in Fig.3B. To achieve the fastest fall time, all of the output driver devices can be turned on at the same time. In some implementations, the speed at which the devices are activated can be controlled to reduce or prevent EMI radiated emissions. In this way, an end user may be able to select a fastest fall time that does not produce harmful EMI for a particular circuit application. As shown in Fig. As shown in Figure 4, in some implementations, a rising edge 104 of an output signal may also be digitally controllable. This may depend, for example, on whether or not there is a capacitor (or capacitors) across the output, and, if there is, on the value of the capacitor(s). In other implementations, only the fall time is shaped.

[0029] In some embodiments, groups of output driver devices may be controlled simultaneously, thus providing further flexibility in controlling the fall time (or rise time) of an output signal. Fig. 5 is a waveform diagram illustrating a falling edge 110 of an output signal of an output driver circuit that allows simultaneous switching of groups of devices in one implementation. As illustrated, for a first segment 112 of the falling edge 110, the output devices NM1 and NM2 are simultaneously activated; for a second segment 114, the output devices NM3 and NM4 are simultaneously activated; and for a third segment 116, the output device NM xactivated. As will be appreciated, the output driver devices within an output driver circuit may be divided into groups in any of a variety of different ways in various implementations. In this manner, a single output driver circuit may be capable of providing an end user with a variety of different output fall times and / or rise times.

[0030] Because the drains and sources of the individual output devices are connected together, the overall form factor of the output driver circuit behaves essentially the same as conventional single-device output drivers with regard to electrostatic discharge (ESD) and short-circuit detection. Additionally, the additional peripheral area associated with having multiple parallel output devices can lead to improvements in reverse ESD due to reduced resistance associated with increased well contact area.

[0031] In some implementations, all of the output driver devices in the output driver circuit (e.g., output driver circuits 42, 44, 46, 48, 50, 52 in Fig.2A) be substantially the same or similar in size. However, in other implementations, devices of different sizes may be used. For example, in some implementations, two (or more) different sized output transistors are used, in which one or more smaller output driver devices are used in combination with a larger device. When multiple smaller devices are used, the smaller output devices may all be substantially the same size, or smaller devices of different sizes may be used. As used herein, the "size" of a driver device refers to its physical dimensions (e.g., length and width), which will typically dictate the current handling capacity and "on" resistance of the device.

[0032] Fig.6 is a schematic diagram illustrating an exemplary output driver circuit 120 employing different sized output transistors in accordance with one embodiment. As illustrated, the output driver circuit 120 includes a smaller output driver device 122 coupled in parallel with a larger device 124. During operation, when a change in the output state is desired, a controller (not shown) may first drive the smaller device 122 in a weak manner to increase the fall time of the output signal to prevent the generation of EMI. After the smaller device 122 reaches saturation, the larger device 124 may be driven strongly "on" to quickly "lock" into the output state of the driver circuit, making it less susceptible to noise.Because the smaller device 122 is already saturated, the rapid activation of the parking brake device 124 will typically generate less or no EMI. This approach is referred to herein as the parking brake approach.

[0033] In other parking brake embodiments, one or more additional smaller devices 126 may be used with the larger device 124. If multiple smaller devices are used, the smaller devices may all be turned on at the same time using a reduced drive level (i.e., lightly driven) until V SAT is reached, as described above for the embodiment using a single smaller device. Alternatively, the smaller devices can be switched on one at a time (or in groups) until V SATis reached. At this point, the larger device 124 can be turned on to lock the output driver circuit to the desired state. Using this approach, the multiple smaller devices can each be driven more strongly than in the embodiment using a single smaller device. This is because the increased fall time for preventing EMI emissions can be achieved by appropriate timing of the activation of the smaller devices. In at least one implementation, multiple larger devices can be used. Although effective, the parking brake approach may involve higher area costs than other multi-device driver implementations described herein due to the need to maintain correct V SAT -to maintain ratings or classifications.

[0034] Fig.7 is a block diagram illustrating an exemplary output driver system 130 that may be used within an integrated circuit in accordance with one embodiment. As illustrated, the output driver system 130 includes an output driver controller 132 and an output driver circuit 134. The output driver circuit 134 includes a plurality of output driver devices connected in parallel. The output driver controller 132 is a control device capable of controlling the operation of the output driver circuit 134 to achieve an output signal waveform having desired characteristics. As illustrated, the output driver controller 132 may include a plurality of output ports 142 for providing individual control signals to the output driver devices of the output driver circuit 134.The output driver controller 132 may also have multiple input ports for use in configuring the controller 132 to achieve a desired driver output response.

[0035] In the embodiment shown in Fig.As illustrated in Figure 7, an output driver controller 132 includes a "state change" input port 136, a clock input port 138, and one or more select input ports 140. The state change input port 136 may be used to indicate to the output driver controller 132 when the output state of the driver circuit is to change state. The clock input port 138 may be used to provide a clock signal to the output driver controller 132 for use as a timing reference for switching the various output devices. Although not shown, a clock source may be coupled to the clock input 138 of the output driver controller 132 to generate the clock signal. The select input(s) 140 may be used to adjust the fall time and / or rise time characteristics of the output signal of the driver circuit 134.

[0036] As will be described in more detail, different techniques may be used to adjust the rise time and / or fall time characteristics of the output driver system 130 in different implementations. For example, in one possible approach, a number of different device grouping schemes may be defined for the system 130, each of which may achieve a different fall time and / or rise time. The different device groupings may also provide different desired waveforms during the rise and fall times in some implementations. In another approach, adjustments may be made to a clock signal used to provide timing for switching operations in the system 130 to achieve a desired fall time or rise time. Combinations of these two approaches may also be implemented.

[0037] In at least one implementation, a number of code words may be defined for the output driver system 130, each corresponding to a different output driver switching scheme to be used to switch the output devices in the driver circuit 134 when switching in the output state is desired. Different switching schemes may result in different output signal fall times (and / or rise times). A selected code word may be provided to the output driver controller 132 at, for example, select input(s) 140. Each code word may include one or more bits. Table 1 below illustrates an exemplary coding scheme that may be used for an output driver circuit having nine output driver devices in accordance with one implementation.As shown in the table, each code word has four binary bits (labeled Select 0, Select 1, Select 2 and Select 3).

[0038] When all of the select bits are logic 0, all nine of the output driver devices in output driver circuit 134 can be switched simultaneously. This setting results in the sharpest possible slew rate in the output signal. When the select 0 bit is a logic 1 and the other bits are logic 0, the output driver devices can be switched on (or off) one at a time in a sequential manner at the input clock rate (i.e., one device per clock interval). This mode of operation will result in the slowest output slew rate. When the select 1 bit is logic 1 and the other select bits are logic 0, the output devices in four device groups can be activated in a sequential manner at the input clock rate (i.e., one device group per clock interval).As shown in the table, a first device group may include devices 1 and 2; a second device group may include devices 3 and 4; a third device group may include devices 5 and 6; and a fourth device group may include devices 7, 8, and 9. When the Select 2 bit is logic 1 and the other bits are logic 0, the output devices can be activated in three device groups: a first group including devices 1, 2, and 3; a second device group including devices 4, 5, and 6; and a third device group including devices 7, 8, and 9. Since there are fewer device groups, the fall time of the output signal will be shorter than the previous scheme. Table 1 Selection 0 Selection 1 Selection 2 Selection 3 Grouping scheme 0 0 0 0 Switch all devices at the same time 1 0 0 0 Switch individual devices sequentially 0 1 0 0 Device groups Devices 1, 2 Devices 3, 4 Devices 5, 6 Devices 7, 8, 9 0 0 1 0 Device groups Devices 1, 2, 3 Devices 4, 5, 6 Devices 7, 8, 9 0 0 0 1 Device groups Devices 1, 2, 3, 4 Device 5 Devices 6, 7, 8, 9

[0039] If the Select 3 bit is logic 1 and the other Select bits are logic 0, the output devices will be activated again in three device groups: a first group comprising devices 1, 2, 3, and 4; a second device group comprising device 5; and a third device group comprising devices 6, 7, 8, and 9. Since the number of device groups is the same as in the previous example, the resulting fall time will be the same or similar, but the shape of the waveform during the fall time may be different. In general, the number of devices in each group can affect the rate of change of the output signal during a corresponding segment of the fall time.Thus, assuming devices of the same size, a group containing four devices can result in a higher slew rate than a group containing a single device. Thus, by defining different device groups, different slew rates can be achieved during different segments of a falling or rising edge of an output signal. In this way, an end user may be able to select a waveform and fall time (and / or rise time) that works best for a given application. As will be appreciated, the coding and device group scheme of Table 1 is only one example of a possible scheme that may be used in a particular implementation. Many alternative schemes may be used in other implementations.

[0040] In some embodiments, rise time and / or fall time may be adjusted by varying a frequency of a clock signal used to generate the output signal, rather than by turning the devices on and off according to predetermined groups. For example, in one approach, a number of code words may be defined for an input on select line(s) 140 of output driver controller 132, corresponding to different factors that may be used to divide down an input clock signal. When output driver controller 132 receives a command to change an output state, it may activate the output devices of driver circuit 134 in a sequence at or below the divided down clock rate. One of the code words may indicate that all of the output devices are to be turned on (or off) simultaneously.Another codeword may indicate that the unmodified input clock signal on clock line 138 is to be used to switch the output devices. The other codewords may each correspond to a different clock division factor. For example, one codeword may indicate that a factor of 2 is to be used. In this case, a clock signal having half the frequency of the input clock signal will be used to switch the output devices. The highest factor will produce the slowest fall time (or rise time) in the output signal. The number of bits used for the codewords may depend, for example, on the number of different fall and / or ramp times to be provided in a particular system.

[0041] In some implementations, a combination of the two techniques described above may be used to adjust the rise and / or fall time of the output signal of the output driver system 130. For example, in one possible approach, code words may be defined that set or select a clock frequency for use in switching and that also specify various groups of devices that may be connected together. As will be appreciated, any number of different combinations of clock frequencies and device groupings may be used. In this manner, an integrated circuit design may be provided that can be configured to achieve a wide range of different output fall times and / or rise times.In some implementations, programmable fuses (or other types of non-volatile memory) may be provided to set a desired "select" code word for a device. In this way, a manufacturer or end user can program an output driver circuit to achieve a rise-time and / or fall-time characteristic for a specific application.

[0042] As described above, the output driver circuits and systems described herein can be used to provide an output signal for an integrated circuit. As will be appreciated, these output driver circuits and systems can be used with a wide variety of different integrated circuit types, which can perform many different applications. In some implementations, the output drivers can be implemented within integrated circuits that include sensor circuitry for sensing physical properties in an ambient environment, such as position sensors, current sensors, speed sensors, proximity sensors, rotation sensors, and angle sensors.Such sensor circuits may take the form of a magnetic field sensor employing one or more magnetic field sensing elements, including, but not limited to, a Hall-effect element, a magnetoresistive element, or a magnetoresistive transistor. In at least one embodiment, an integrated circuit is provided that includes a magnetic field sensor employing both a Hall-effect element and a magnetoresistive element. Many other applications also exist. In some embodiments, the techniques described herein may be used to provide an output signal for a linear integrated circuit.

[0043] Fig.Figure 8 is a flowchart illustrating an exemplary method 150 for operating an integrated circuit having an output driver circuit with multiple parallel output driver devices in accordance with one embodiment. The method 150 may be used, for example, with the output driver circuits illustrated in Figures Fig. 2A, Fig. 2B and Fig.7. It may first be determined that the output state of an output driver circuit needs to be changed (block 152). Selection information may then be obtained indicating a manner in which the output driver devices of the output driver circuit are to change conduction states during a falling edge (or a rising edge) of an output signal (block 154). A clock signal may also be obtained for use in providing the timing for switching the output devices (block 156). Control signals are then generated for the output driver devices based at least in part on the clock signal and the selection information (block 158).

[0044] The reason the driver's output state needs to be changed can typically depend on the type of integrated circuit used. For example, for an integrated circuit including a gear tooth sensor, a change in the output state may be needed to coincide with the sensor detecting certain gear features. For an integrated circuit including a proximity sensor, a change in the output state may coincide with the detection of a predetermined proximity between the sensor and a ferromagnetic particle. Many other triggers can be used in other implementations.

[0045] The selection information may, for example, be retrieved from a non-volatile memory (programmed fuses) of the integrated circuit. Alternatively, the selection information may be received from another controller or a user. The selection information may, for example, include information identifying groups of output devices that are to be switched together in a sequential manner during a falling and / or rising edge of an output. Alternatively or additionally, the selection information may include information about a frequency at which the switching is to occur (for example, a value for use in dividing a frequency of the clock signal for use in generating the control signal).In at least one embodiment, a number of code words are defined to identify different ways to switch the output driver circuits. The selection information may then include one of the code words.

[0046] Fig. 9 is a flowchart illustrating another exemplary method 160 for operating an integrated circuit having an output driver circuit with multiple parallel output driver devices in accordance with one embodiment. For example, the method 160 may be used with an output driver circuit using a parking brake arrangement comprising one or more smaller output driver circuits and a larger output driver circuit (e.g., driver circuit 120 of Fig.6) may be used. It may first be determined that the output state of the output driver circuit needs to be changed (block 162). The smaller devices of the driver circuit may then be activated (block 164). After the smaller devices have been activated, the larger output device is turned on to lock the output state of the output driver circuit so that it is less likely to undesirably change state in response to an EMI event or other disturbance event (block 164). In some implementations, multiple larger devices may be used. In some embodiments, when the smaller devices are activated, they may be driven in saturation (but this is not necessary).

[0047] As used herein, the term "magnetic field sensing element" is used to describe a variety of electronic elements capable of sensing a magnetic field. The magnetic field sensing element may be, but is not limited to, a Hall-effect element, a magnetoresistive element, or a magnetoresistive transistor. As is known, there are different types of Hall-effect elements, such as a planar Hall-effect element, a vertical Hall-effect element, and a circular vertical Hall (CVH) element.As is also known, there are different types of magnetoresistive elements, for example, a semiconductor magnetoresistive element such as indium antimonide (IsSb), a giant magnetoresistive element (GMR), an anisotropic magnetoresistive element (AMR), a tunneling magnetoresistive element (TMR), and a magnetic tower junction (MTJ). The magnetic field sensing element may be a single element or, alternatively, it may comprise two or more magnetic field sensing elements arranged in various configurations, such as a half-bridge or a full (Wheatstone) bridge.Depending on the device type and other application requirements, the magnetic field sensing element may be a device made of a type IV semiconductor material such as silicon (Si) or germanium (Ge) or a type III-V semiconductor material such as gallium arsenide (GaAs) or an indium compound, for example indium antimonide (IsSb).

[0048] As is known, some of the magnetic field sensing elements described above tend to have an axis of maximum sensitivity parallel to a substrate supporting the magnetic field sensing element, and others of the magnetic field sensing elements described above tend to have an axis of maximum sensitivity perpendicular to a substrate supporting the magnetic field sensing element. In particular, planar Hall elements tend to have sensitivity axes perpendicular to a substrate, while metal-based or metallic magnetoresistive elements (e.g., GMR, TMR, AMR) and vertical Hall elements tend to have sensitivity axes parallel to a substrate.

[0049] As used herein, the term "magnetic field sensor" is used to describe a circuit that utilizes a magnetic field sensing element, generally in combination with other circuits. Magnetic field sensors are used in a variety of applications, including, but not limited to, an angle sensor that senses an angle or direction of a magnetic field, a current sensor that senses a magnetic field created by a current flowing through a current-carrying conductor, a magnetic switch that senses the presence of a ferromagnetic object, a rotation sensor that senses passage of ferromagnetic particles, such as the magnetic domains of a ring magnet, and a magnetic field sensor that senses a magnetic field density of a magnetic field.

Claims

[1] Integrated circuit comprising: an output driver circuit (134) for generating an output signal, wherein the output driver circuit (134) comprises a plurality of driver devices (42, 44, 46, 48, 50, 52) connected in parallel, each of the plurality of driver devices (42, 44, 46, 48, 50, 52) having a gate terminal, a drain terminal, and a source terminal, wherein the drain terminals of the plurality of driver devices (42, 44, 46, 48, 50, 52) are coupled to a first node (62) and the source terminals of the plurality of driver devices (42, 44, 46, 48, 50, 52) are coupled to a second node (64); and a controller (60, 132) for providing individual control signals for gate terminals of the plurality of driver devices (42, 44, 46, 48, 50, 52) to control a state of the output signal, the controller (60, 132) having a state change input (136) to receive an instruction to change the state of the output signal and one or more selection inputs (140) responsive to a code word indicating a manner in which the plurality of driver devices (42, 44, 46, 48, 50, 52) are to change the conduction state when the state of the output signal is changed, wherein the controller (60, 132) is configured to change the conduction state of the plurality of driver devices (42, 44, 46, 48, 50, 52) sequentially according to a first clock frequency in response to a first predetermined code word present at the one or more selection inputs (140), and wherein the controller (60, 132) is configured to change the conduction state of the plurality of driver devices (42, 44, 46, 48, 50, 52) sequentially according to a second clock frequency in response to a second predetermined code word present at the one or more selection inputs (140), the second predetermined code word being different from the first predetermined code word, and the second clock frequency being different from the first clock frequency. [2] Integrated circuit according to claim 1, wherein: the controller (60, 132) is configured to change the conduction states of the plurality of driver devices (42, 44, 46, 48, 50, 52) sequentially according to first predetermined device groups in response to the first predetermined code word present at the one or more selection inputs (140). [3] Integrated circuit according to claim 2, wherein: the controller (60, 132) is configured to change the conduction states of the plurality of driver devices (42, 44, 46, 48, 50, 52) sequentially according to second predetermined device groups in response to the second predetermined code word present at the one or more selection inputs (140), wherein the second predetermined device groups are different from the first predetermined device groups. [4] Integrated circuit according to claim 3, wherein: the controller (60, 132) has a clock input (138) to receive a clock signal to provide a timing reference for changing the conduction states of the plurality of driver devices (42, 44, 46, 48, 50, 52). [5] Integrated circuit according to claim 4, wherein: the first clock frequency is the frequency of the input clock signal divided by a first factor and the second clock frequency is the frequency of the input clock signal divided by a second factor that is different from the first factor. [6] Integrated circuit according to claim 1, wherein: the controller (60, 132) is configured to change the conduction state of the plurality of driver devices (42, 44, 46, 48, 50, 52) sequentially according to the same predetermined device groups in response to either the first predetermined code word or the second predetermined code word present at the one or more selection inputs (140). [7] The integrated circuit of claim 1, further comprising: a non-volatile memory associated with the one or more selection inputs (140) of the controller (60, 132) for use in storing a programmed code word. [8] Integrated circuit according to claim 1, wherein: the plurality of driver devices (42, 44, 46, 48, 50, 52) connected in parallel comprise a plurality of n-channel insulated gate field effect transistors (IGFETs). [9] Integrated circuit according to claim 8, wherein: the output driver circuit (134) further comprises a plurality of p-channel IGFETs connected in parallel, the plurality of n-channel IGFETs and the plurality of p-channel IGFETs being connected to each other in a push-pull configuration, the controller (60, 132) being configured to provide individual control signals for each of the plurality of p-channel IGFETs and each of the plurality of n-channel IGFETs to control the state of the output signal. [10] The integrated circuit of claim 1, further comprising: a package for an integrated circuit which carries the integrated circuit. [11] Integrated circuit comprising: an output driver circuit (134) for generating an output signal, wherein the output driver circuit (134) comprises a plurality of driver devices (42, 44, 46, 48, 50, 52) connected in parallel, wherein each of the plurality of driver devices (42, 44, 46, 48, 50, 52) has a gate terminal, a drain terminal, and a source terminal, wherein the drain terminals of the plurality of driver devices (42, 44, 46, 48, 50, 52) are coupled to a first node (62), and the source terminals of the plurality of driver devices (42, 44, 46, 48, 50, 52) are coupled to a second node (64); and a controller (60, 132) for providing individual control signals for gate terminals of the plurality of driver devices (42, 44, 46, 48, 50, 52) to control a state of the output signal, wherein the controller (60, 132) is configured to change conduction states of the plurality of driver devices (42, 44, 46, 48, 50, 52) in a sequential manner when a change in the state of the output signal is desired, the controller (60, 132) is configured to change the conduction states of the plurality of driver devices (42, 44, 46, 48, 50, 52) in a sequential manner in accordance with a clock signal having a frequency adjusted according to a code word stored in a non-volatile memory of the integrated circuit. [12] Integrated circuit according to claim 11, wherein: the controller (60, 132) is configured to change the conduction states of the plurality of driver devices (42, 44, 46, 48, 50, 52) in a sequential manner according to predetermined groups when a change in the state of the output signal is desired. [13] Integrated circuit according to claim 11, wherein: the controller (60, 132) is configured to change the conduction states of the plurality of driver devices (42, 44, 46, 48, 50, 52) in a sequential manner in accordance with a clock signal having a first clock frequency if the code word stored in a non-volatile memory of the integrated circuit is a first predetermined code word, and wherein the controller (60, 132) is configured to control the conduction states of the plurality of driver devices (42, 44, 46, 48, 50, 52) in a sequential manner in accordance with a clock signal having a second clock frequency if the code word stored in a non-volatile memory of the integrated circuit is a second predetermined code word, the second predetermined code word being different from the first predetermined code word, and the second clock frequency being different from the first clock frequency. [14] Integrated circuit according to claim 13, wherein: the controller (60, 132) includes a clock input for receiving an input clock signal, the controller (60, 132) is configured to generate a clock signal that generates a first clock frequency by dividing the input clock signal using a first factor if the code word stored in the non-volatile memory is the first predetermined code word, and the controller (60, 132) is configured to generate a clock signal that produces a second clock frequency by dividing the input clock signal using a second factor if the code word stored in the non-volatile memory is the second predetermined code word. [15] The integrated circuit of claim 11, further comprising: an overcurrent sensor coupled between the second node (64) and a ground terminal of the integrated circuit for use in detecting an overcurrent condition in the output driver circuit (134), wherein the controller (60, 132) is configured to change all driver devices (42, 44, 46, 48, 50, 52) in the output driver circuit (134) to a non-conductive state when an overcurrent condition is detected. [16] Integrated circuit according to claim 1 or 11, further comprising: a sensor circuit coupled to the controller (60, 132) for sensing a physical quantity in a surrounding environment. [17] The integrated circuit of claim 16, wherein the sensor circuit comprises a magnetic field sensor. [18] Integrated circuit according to claim 17, wherein: wherein the magnetic field sensor comprises at least one of a Hall effect element or a magnetoresistive element. [19] Integrated circuit according to claim 17, wherein: the magnetic field sensor has both a Hall effect element and a magnetoresistive element. [20] A method of operating an output driver circuit (134) within an integrated circuit, the output driver circuit (134) having a plurality of output driver devices (42, 44, 46, 48, 50, 52) connected in parallel for use in generating an output signal, the method comprising: determining that a change in a state of the output signal is required; obtaining selection information indicating a manner in which the plurality of output driver devices (42, 44, 46, 48, 50, 52) are to change the conduction state to achieve the change in the state of the output signal; receiving a clock signal; and generating individual control signals for the plurality of output driver devices (42, 44, 46, 48, 50, 52) based, at least in part, on the clock signal and the selection information, wherein generating individual control signals for the plurality of output driver devices (42, 44, 46, 48, 50, 52) includes: generating control signals that change the conduction states of the plurality of output driver devices (42, 44, 46, 48, 50, 52) in accordance with a first clock frequency if the selected information includes a first code word, the first clock frequency being related to a frequency of the clock signal; and Generating control signals that change the conduction states of the plurality of output driver devices (42, 44, 46, 48, 50, 52) in accordance with a second clock frequency if the selected information includes a second code word, the second clock frequency being different from the first clock frequency and related to a frequency of the clock signal. [21] The method of claim 20, wherein: obtaining selection information comprises receiving the selection information at one or more selection inputs (140). [22] The method of claim 20, wherein: obtaining selection information comprises reading the selection information from a non-volatile memory. [23] The method of claim 20, wherein: generating individual control signals for the plurality of output driver devices (42, 44, 46, 48, 50, 52) comprises generating control signals that change the conduction states of the plurality of driver devices (42, 44, 46, 48, 50, 52) sequentially according to first predefined groups when the selection information comprises a third code word. [24] The method of claim 23, wherein: generating individual control signals for the plurality of output driver devices (42, 44, 46, 48, 50, 52) comprises generating control signals that change the conduction states of the plurality of driver devices (42, 44, 46, 48, 50, 52) sequentially according to second predefined groups when the selection information comprises a fourth code word, the second predefined groups being different from the first predefined groups. [25] The method of claim 20, wherein: the first clock frequency is equal to a frequency of the clock signal and the second clock frequency is equal to the frequency of the clock signal divided by a factor associated with the second code word. [26] The method of claim 25, wherein: generating individual control signals for the plurality of output driver devices (42, 44, 46, 48, 50, 52) comprises generating control signals that change the conduction states of the plurality of driver devices (42, 44, 46, 48, 50, 52) sequentially according to the first predefined groups if the selection information comprises either a first code word or a second code word. [27] The method of claim 20, wherein: the integrated circuit comprises a sensor circuit for sensing a physical quantity of a surrounding environment; and determining that a change in a state of the output signal is needed comprises receiving a state change instruction from the sensor circuit. [28] The method of claim 27, wherein: the sensor circuit has a magnetic field sensor. [29] The method of claim 28, wherein: the magnetic field sensor comprises at least one of a Hall effect element or a magnetoresistive element. [30] The method of claim 28, wherein: the magnetic field sensor has both a Hall effect element and a magnetoresistive element.

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