Multiphase controller with self-test

Abstract

Multiphase controller which features: a plurality of output phases (102), each configured to supply a phase current (IPX) through a separate induction coil (LX) to a load (104) connected to the output phases (102) via the induction coils (LX) and an output capacitor (Cout); and a controller (200) designed to regulate a voltage (Vsense) supplied to the load (104) by adjusting the phase currents (IPX) supplied to the load (104) through the output phases (102), and to monitor the phase currents (IPX) supplied to the load (104) through the output phases (102), wherein the controller (200) is further configured to check the output phases by forcing a first of the output phases (102) to draw current, forcing a second of the output phases (102) to supply current, and determining whether the monitored phase current (IPX) for the first output phase (102) is drawn in a predetermined manner and whether the monitored phase current (IPX) for the second output phase (102) is supplied in a predetermined manner, wherein a malfunction of one of the phases indicates a missing or failed power stage component.

Description

[0001] The present invention relates to multiphase controllers, in particular self-testing multiphase controllers.

[0002] Switching power supplies and voltage regulators are popular for use in high-power applications due to their high efficiency and small footprint / volume. Widely accepted switching voltage regulators include buck, boost, high-boost, forward converters, flyback, half-bridge, full-bridge, and SEPIC topologies. Multiphase buck converters are particularly well-suited for providing high current at low voltage, which is required in high-power integrated circuits such as microprocessors, graphics processing units (GPUs), and network processors. Buck converters are typically implemented with active components such as pulse-width modulation (PWM) controller ICs, drivers, and MOSFETs (metal-oxide-semiconductor field-effect transistors), as well as passive components such as inductors, transformers or coupled inductors, capacitors, and resistors.Parallel converters are also used in applications where high current requirements can be met by connecting multiple output converters in parallel and applying current sharing between them to satisfy the total output current requirement. The terms "multiphase controller" and "parallel converter," as well as "output phase" and "output converter," are used synonymously in this context.

[0003] The large number of components in multiphase regulators and the typically high output current and power of such systems make it desirable to detect any component or connection failure to ensure the full functionality of these systems and to guarantee that the voltage regulator operates correctly across its entire operating range. Voltage, current, power, and temperature monitoring are commonly implemented to ensure proper operation under varying, unpredictable, and unexpected operating conditions. These systems typically monitor the voltage and current of the input and output terminals of the entire system or of individual output phases.

[0004] There are many failure states in multiphase controllers where the controller still provides control behavior under certain conditions, but fails when operating conditions change. For example, a voltage regulator with missing output phase components or connections may still properly regulate the output voltage under no-load or low-load conditions, but may fail when the load current increases. The system may be able to regulate within the expected voltage, current, and temperature operating range under no-load or low-load conditions, but fail to regulate when the load current increases. Furthermore, the voltage regulator may operate in a suboptimal state, such as at low efficiency, which often leads to thermal problems at high load currents.Most conventional systems provide basic fault protection based on voltage, current, power, and temperature monitoring, but do not offer sophisticated fault protection to safeguard against more subtle and difficult-to-detect fault conditions where the controller may function correctly under some conditions but not under others.

[0005] From US patent 2010 / 0315051 A1, a multiphase DC / DC converter is known, comprising a balancing unit designed to detect when a state of the DC / DC converter is out of balance. A current in a first channel is matched to the current in a second channel based on feedback from the balancing unit.

[0006] The object of the present invention is to provide an improved multiphase controller, an improved method for operating a multiphase controller, and a device for controlling a multiphase controller.

[0007] According to one embodiment of a multiphase controller, the multiphase controller comprises a plurality of output phases, each configured to supply a phase current through a separate inductor of a load connected to the output phases via the inductors and an output capacitor. The multiphase controller further comprises a controller configured to regulate a voltage supplied to the load by adjusting the phase currents (IPX) supplied to the load (104) through the output phases (102) and to monitor the phase currents supplied to the load through the output phases.The controller is further trained to check the output phases by forcing a first output phase to draw current, forcing a second output phase to supply current, and determining whether the monitored phase current for the first output phase is drawn in a predetermined manner and whether the monitored phase current for the second output phase is supplied in a predetermined manner, with improper operation of any phase indicating a missing or failed power stage component.

[0008] According to one embodiment of a method for operating a multiphase controller, the method comprises: regulating a voltage supplied to the load by adjusting the phase currents (IPX) supplied to the load (104) through the output phases (102); and monitoring the phase currents supplied to the load through the output phases. The method further comprises checking the output phases, wherein checking the output phases includes forcing a first output phase to draw current, forcing a second output phase to supply current, and determining whether the monitored phase current for the first output phase is drawn in a predetermined manner and whether the monitored phase current for the second output phase is supplied in a predetermined manner, wherein the improper operation of any of the phases indicates a missing or failed power stage component.

[0009] The expert will recognize additional features and advantages after studying the following detailed description and examining the accompanying figures.

[0010] The parts shown in the figures are not necessarily to scale with each other. Identical reference numerals denote corresponding identical parts. The features of the various illustrated embodiments can be combined, provided they are not mutually exclusive. Exemplary embodiments are shown in the figures and explained in the following description. Fig. Figure 1 shows a block diagram of an embodiment of a multiphase controller which includes a controller with a self-test unit. Fig. Figure 2 shows a block diagram of the controller contained in the multiphase controller. Fig. Figure 3 shows a flowchart of an embodiment of a self-test procedure performed by the self-test unit contained in the multiphase controller. Fig. Figure 4 shows a block diagram of an embodiment of the self-test unit contained in the controller of the multiphase controller. Fig. Figure 5 shows a block diagram of the self-test unit contained in the controller of the multiphase controller, according to a further embodiment. Fig. Figure 6 shows a block diagram of the self-test unit contained in the controller of the multiphase controller, according to yet another embodiment. Fig. Figure 7 shows a block diagram of the self-test unit contained in the controller of the multiphase controller, according to yet another embodiment. Fig. Figure 8 shows a block diagram of the self-test unit contained in the controller of the multiphase controller, according to a further embodiment.

[0011] The embodiments described here offer sophisticated monitoring and detection methods for identifying conditions in which a multiphase controller is not functioning correctly, thus preventing significant failure during operation. The multiphase controller performs self-testing by employing sophisticated procedures for examining available information within the controller to detect abnormal operating conditions, or by using specific operating modes to test the system so that abnormal operating conditions can be detected. In either case, the controller can detect many fault conditions in which the multiphase controller still provides control behavior under certain conditions, but fails when the operating conditions change.

[0012] Fig. Figure 1 shows an embodiment of a multiphase controller comprising a power stage 100, which has a plurality of output phases 102 and a controller 200 for controlling the operation of the power stage 100. Each output phase 102 is configured to supply a phase current (IPX) through a separate inductor (LX) to a load 104, which is connected to the output phases 102 via the inductors and an output capacitor (Cout). Each output phase 102 has a high-side transistor (HSX) and a low-side transistor (LSX) for coupling to the load 104 through the corresponding inductor. The high-side transistor of each output phase 102 connects the load 104 switchably to an input voltage (Vin) of the multiphase controller, and the corresponding low-side transistor connects the load 104 switchably to ground at specific periods. Three output phases are arranged in Fig. 1 is shown (N=3), however, power level 100 can include any number greater than 1 of output phases 102 (i.e., N≥2).

[0013] The controller 200 regulates the voltage (Vsense) supplied to the load 104 by the power stage 100 by adjusting the phase currents supplied to the load 104 by the output phases 102. The controller includes a multiphase pulse-width modulator (PWM) 202 for switching the output phases 202 of the power stage 100, so that the power stage 100 supplies positive current to the load 104 through one or more of the high-side transistors during some periods and draws negative current from the load 104 through one or more of the low-side transistors during other periods. This means that the multiphase controller can operate in continuous conduction mode (CCM) with current sinking capability. For example, only the first output phase (N=1) 102 can be active at certain times, e.g., during light load conditions.One or more additional output phases (N=2 or greater) 102 can be activated to support higher power demands from the load 104. For this purpose, the multi-phase PWM provides control signals (PWM1, PWM2, ..., PWMN) to a corresponding driver 106, which is connected to each output phase 102 of the power stage 100.

[0014] The drivers 106 provide gate driver signals (GHX, GLX) to the gates of the high-side and low-side transistors of the corresponding output phases 102 in response to the PWM control signals supplied by the multiphase PWM 202. The activation state of the output phases 102 and the duty cycle of the high-side and low-side transistors are determined, at least in part, by the output voltage (Vsense) applied to the load 104, enabling the controller to respond as quickly and reliably as possible to changing load conditions. The controller 200 can also put the multiphase controller into DCM (discontinuous conduction mode).

[0015] In addition to regulating the voltage supplied to the load 104, the controller 200 also monitors the phase currents supplied to the load 104 by the output phases 102 and determines whether the monitored phase currents indicate that one or more of the individual output phases 102, one or more of the individual inductors, or the output capacitor are faulty, even if the total current supplied to the load 104 is within specified limits. For this purpose, a self-test unit 204 contained in or associated with the controller 200 uses information available in the controller 200 to detect abnormal conditions or uses specific operating modes to test the controller so that abnormal operating conditions can be detected.If, for example, the multiphase controller has missing output phase components or connections, it may still be able to regulate the output voltage correctly under no-load or low-load conditions, but may fail when the load current increases. That is, the multiphase controller may be able to regulate within the expected voltage, current, and temperature operating range under no-load or low-load conditions, but fail to regulate when the load current increases. Furthermore, the multiphase controller may operate in a suboptimal state, such as at low efficiency, which could lead to thermal problems at high load currents. The self-test unit 204 of the controller 200 can detect faulty components under any of these conditions and protect the converter from damage, for example, by disabling one or more problematic output phases 102 or by switching off the controller.Various embodiments of the self-test unit 204 will be described later, after a more detailed embodiment of the controller 200 has first been described.

[0016] The controller further includes a voltage position unit 206 for controlling the change from one SVID to another by sweeping through the target voltage, where SVID is the voltage identification information provided to the multiphase controller to implement voltage changes in the power supply. The controller also includes a voltage sense unit 208 for determining the error between the output voltage (Vsense) and the target voltage (Vtgt), provided by the voltage position unit 206, and for converting the error voltage into a digital representation provided to the multiphase PWM 202. The controller 200 also includes a current sense and balance unit 210 for measuring the individual phase currents (IP1, IP2, ...The current measurement and balancing unit 210 measures the current (IPN) of the output phases 102 and converts the measured current information into phase current information. It also converts the phase current information into settings for the duty cycle of each individual output phase 102 to adjust the phase currents so that they remain balanced.

[0017] Fig. Figure 2 shows a more detailed embodiment of the controller 200. Fig. In Figure 2, the power stage 102, the output capacitor, and the load 104 are represented by a single block 212 for the sake of simplicity. According to this embodiment, the voltage positioning unit 206 includes an adaptive voltage positioning circuit 214 (AVP) for converting the phase current information (Iphase) from the current sensing and balancing unit 210 into an offset from the setpoint in order to adjust the controller target voltage based on the load current. The voltage positioning unit 206 also includes a dynamic voltage transition unit 216 (DVID) for converting the desired SVID into a digital target voltage (VtgtD), a comparator 218 for comparing the offset with the digital target voltage, and a reference DAC 220.A digital-to-analog converter (DAC) is used to set the target voltage for the controller as an analog reference voltage (VtgtA). A second comparator 222 compares the analog reference voltage with the measured output voltage (Vsense). The second comparator 222 is part of the voltage measurement unit 208.

[0018] The voltage measurement unit 208 also includes an anti-aliasing filter 224 for filtering the measured output voltage before comparison with the analog reference voltage (VtgtA) and a voltage measurement ADC 226 (analog-to-digital converter) for converting the analog error voltage (errA), i.e., the difference between VtgtA and Vsense, into a digital representation (errD). A PID filter 228 (proportional-integral-derivative filter) implements a compensator transfer function with the digital error voltage as an input and a duty cycle as an output. A multi-phase PWM amplifier unit 230 of the multi-phase PWM 202 sets the gain for the different output phases 102 based on the output of the PID filter 228 and current balancing information (Ibal) from the current measurement and balancing unit 210.A digital PWM 232 of the multi-phase PWM 202 converts the digital duty cycle information into a pulse width modulated waveform, which couples with the driver 106 to control the switching states of the output phases 102 of the power stage 100.

[0019] The current measurement and balancing unit 210 comprises current measurement circuits 234 for monitoring the individual phase currents (IP1, IP2, ..., IPN) of the N output phases where N ≥ 2, and a current measurement ADC 236 for converting the monitored phase currents into corresponding digital phase current information, which is processed by channel current circuits 238 for each output phase 102. The output of the channel current circuits 238 is provided to the AVP circuit 214, a current balancing circuit 240, and a current limiting circuit 242. The current balancing circuit 240 converts the phase current information from the channel current circuits 238 into corresponding duty cycle settings for each individual output phase 102 in order to adjust the phase currents so that they remain balanced.The current limiting circuit 242 monitors the phase currents and can force the multiphase PWM 202 to modify the PWM pulses to ensure that the phase current does not exceed a positive or negative limit. An overcurrent protection circuit 244 (OCP) can be provided to shut down the multiphase controller if controlled operation cannot be maintained without exceeding another positive or negative limit. An overvoltage protection circuit 246 (OVP) can be provided to monitor the output voltage to ensure that the output voltage remains within a reasonable operating range. The OVP circuit 246 can also shut down the multiphase controller if controlled operation cannot be maintained without exceeding a limit.The controller 200 can also include an active transient response (ATR) or a fast-ATR circuit 248 to provide a fast response to fast load transients, and can include another ADC 250 to provide a digital representation of the measured input voltage (Vin_sense) to the PID filter 228 and the multiphase PWM amplifier unit 230. The in . Fig. The two controller components shown are known components of a multiphase controller, and therefore an explanation of their operating principle is omitted in this context.

[0020] The self-test unit 204 of the controller 200 uses information provided by at least some of the controller components to detect abnormal operating conditions, or uses specific operating modes of the controller 200 to check the multiphase controller so that abnormal operating conditions can be detected. The self-test unit 204 detects faulty components coupled to the controller 200 that could impair the reliable operation of the multiphase controller.

[0021] Fig. Figure 3 shows an embodiment of a method for detecting faults in the components external to the controller 200, as implemented by the self-test unit 204. The method comprises controlling a voltage supplied to the load 104 by adjusting the phase currents supplied to the load 104 through the output phases (step 300); monitoring the phase currents supplied to the load 104 through the output phases 102 (step 310); and determining whether the monitored phase currents indicate one or more individual output phases 102, one or more individual induction coils (LX), or the output capacitor (Cout) as faulty, even if the total current supplied to the load 104 is within specified limits (step 320).

[0022] Fig. Figure 4 shows an embodiment of the self-test unit 204. According to this embodiment, the self-test unit 204 includes a current balance failure monitor 400. The current balance failure monitor 400 analyzes the input and output of the current balance unit 240, as represented by the two dashed lines leading to the current balance failure monitor 400. The current balance unit 240 sets the PWM duty cycle of each individual output phase 102 to adjust the corresponding phase current relative to the other output phases 102. This is typically done with a filter that performs the transfer function. dUx=(Ix−Itargx)*(Ki_ibal / s+Kp_ibal) possesses, where dUx is the setting of the duty cycle in the X-th output phase 102, Ix is the measured current in the X-th output phase 102, Itargx is the target current for the X-th output phase 102 and Ki_ibal is the integral and proportional gain accordingly.

[0023] The current balancing unit 240 adjusts the individual phase currents to correspond to a specific assignment between active output phases 102, as determined by the controller 200 for the total load current. Current balancing failure can occur if the multiphase controller cannot adjust the phase currents to match the assignment, indicating that the controller is unable to adequately control one or more output phases 102. Such a condition can be caused by a faulty driver 106, a faulty output phase transistor, a faulty inductor, or a faulty current sensing network 234.

[0024] The current balancing failure monitor 400 monitors whether all output phases 102 are actively controlled with identical responses to the multiphase PWM 202. For example, the current balancing failure monitor 400 can monitor the ability of each output phase 102 to drive Ix to Itargx (i.e., drive the error to zero) and can monitor whether each output phase 102 is approaching an acceptable output dUx (i.e., no sustained clipping). The current balancing failure monitor 400 detects a current balancing failure condition when one or more of the individual phase currents do not match the corresponding mapping for that active output phase 102, or when the settings allowed by the current balancing circuit 240 are at their upper or lower limits (i.e., clipping occurs). Current balancing failure can be detected more quickly if the mappings are changed in a predetermined manner, e.g., in a test mode of the multiphase controller.The current balancing failure monitor 400 can provide this predetermined (known) mapping. For example, an offset can be dynamically added to determine whether the current balancing circuit 240 is capable of responding to the changing offset by rebalancing the phase currents in a predetermined (expected) manner. The current balancing failure monitor 400 of the self-test unit 204 detects an abnormal condition if the phase currents are not rebalanced in the predetermined manner.

[0025] Fig. Figure 5 shows another embodiment of the self-test unit 204. According to this embodiment, the self-test unit 204 includes a ripple current failure monitor 410. The ripple current failure monitor 410 analyzes the input of the current balancing unit 240, as represented by the single dashed line leading to the ripple current failure monitor 410. During normal operation of the multiphase switching regulator, the phase currents should either increase or decrease depending on the state of the circuit breaker. A properly functioning output phase 102 will always have some ripple current. The ripple current pattern is well-known and easily identifiable in the current measurement waveform because of the regulator's synchronous switching nature. The ripple current pattern can change from DCM to CCM, so the ripple current failure monitor 410 should be aware of the operating mode.If no expected waveform pattern and amplitude wave can be detected, this may indicate a faulty driver 106, a faulty output stage transistor, a faulty inductor, or a faulty current sensing network. The waveform failure monitor 410 monitors the output of the channel current circuits 238 and checks for faulty waveform patterns whenever an output phase 102 is actively controlled or in a specific test mode. The waveform failure monitor 410 detects whether one or more of the phase currents do not exhibit a waveform pattern that corresponds to the expected waveform pattern.

[0026] Fig. Figure 6 shows another embodiment of the self-test unit 204. According to this embodiment, the self-test unit 204 includes a ramp current failure monitor 420. The ramp current failure monitor 420 analyzes the outputs of the dynamic voltage transition (DVID) circuit 216 and the channel current circuits 238, as represented by the two dashed lines leading to the ramp current failure monitor 420. The start-up of the multiphase controller can be configured to determine the typical start ramp current profile. For example, an upper and lower limit for the start rate and total output capacitance is expected. There is also a voltage range in which the load 104 is not expected to turn on. For example, there is a minimum voltage for operating integrated circuits.The Current Drive-Through Failure Monitor 420 checks the start-up ramp to determine if the current profile is within an expected range when starting from a known operating state, such as when the output capacitor is fully discharged. Changes in the current profile can indicate problems such as a faulty driver 106, a faulty output phase transistor, a faulty inductor, a faulty current-sensing network, or a leaking output capacitor. The Current Drive-Through Failure Monitor 420 can also force a power-up or power-down in test mode to check the ramp current. This allows for the measurement of both positive and negative currents, as well as the ability of the multiphase controller to supply or draw current.

[0027] In one embodiment, the controller 200 ramps up the voltage supplied to the load 104 to charge the output capacitor. Ramping up the voltage causes active output phases 102 to supply current to the load 104. The change in voltage can be determined so that an expected ramp current pattern of the ramp-up current can be determined based on the corresponding output dV / dt and the capacitance. The current pass-through failure monitor 420 detects whether one or more of the currents supplied by the output phases 102 do not exhibit a ramp current pattern that corresponds to an expected ramp current pattern. This test can be performed in a startup mode of the multiphase controller.

[0028] In another embodiment, the controller 200 reduces the voltage supplied to the load 104 to discharge the output capacitor. This voltage reduction causes active output phases 102 to draw current from the load 104. Again, the voltage change can be controlled to determine an expected ramp current pattern for the reduction current based on the corresponding output dV / dt and the capacitance. The current pass-through failure monitor 420 detects whether one or more of the currents drawn by the output phases 102 do not exhibit a ramp current pattern that corresponds to an expected ramp current pattern.

[0029] Fig. Figure 7 shows another embodiment of the self-test unit 204. According to this embodiment, the self-test unit 204 includes a phase sequence failure monitor 430. The phase sequence failure monitor 430 analyzes the phase currents (IP1, IP2, ..., IPN) and the output of the dynamic voltage transition circuit (DVID), as represented by the four dashed lines leading to the phase sequence failure monitor 430. The multiphase controller can be operated in a single-phase mode in which only one output phase 102 is active and controls the output. The phase sequence failure monitor 430 tests whether each output phase 102 is operating correctly by sequencing one or more output phases 102 at a time to ensure that each output phase 102 is functioning correctly. The phase sequence failure monitor 430 determines whether the corresponding monitored phase currents respond in a predetermined manner.

[0030] According to one embodiment, the phase sequence failure monitor 430 monitors the phase currents and the output voltage (Vsense) during the sequencing of the output phases 102. For example, the phase sequence failure monitor 430 can verify that each output phase 102 is functioning correctly by operating the multi-phase controller with only one output phase 102 active at a time and checking the corresponding regulated output voltage. This sequence can be designed such that each output phase 102 is the only active phase at some point, and the phase sequence failure monitor 430 checks whether the resulting output voltage is still regulated for each active output phase 102. For example, the control pattern for a 3-phase converter could be: all output phases, output phase 1; output phases 1+2; output phase 2; output phases 2+3; output phase 3; and all output phases.If any of the output phases 102 malfunction, checking the output voltage alone may be sufficient to detect a failure. However, monitoring phase current and output voltage throughout the entire sequence provides more robust failure monitoring.

[0031] The controller can also check the output phases 102 by having one output phase 102 supply current while another output phase 102 draws current, to ensure that all output phases 102 have proper supply and draw capabilities and that the current sensing network 234 is functioning correctly. The phase sequence failure monitor 430 determines whether the monitored phase current for the first output phase 102 is being drawn in a predetermined (expected) manner and whether the monitored phase current for the second output phase 102 is being supplied in a predetermined manner. Phase sequencing failures can occur if any output phase 102 is unable to operate correctly due to a missing or failed power stage component. The phase sequence failure monitor 430 can be used during active control of individual phases.single phase active regulation) or search for phase sequence failures in a specific test mode with regulation of individual phases.

[0032] Fig.Figure 8 shows another embodiment of a self-test unit 204. According to this embodiment, the self-test unit 204 comprises a duty cycle, PID, and current balance failure monitor 440. The duty cycle, PID, and current balance failure monitor 440 analyzes the phase currents (IP1, IP2, ..., IPN) and the outputs of the dynamic voltage transition circuit (DVID), the voltage measurement ADC 226, the PID filter 228, the current balance circuit 240, and the channel current circuits 238, as illustrated by the eight dashed lines leading to the duty cycle, PID, and current balance failure monitor 440. The multiphase controller operates with an expected duty cycle for a given output voltage and input voltage. Likewise, a loop filter such as the PID filter 228 and a current balancing loop filter contained in the current measurement and adjustment unit 210 have an expected output during normal operation.The duty cycle and loop filter output ranges can change drastically during transients, making a simple check of upper and lower limits inadequate. The Duty Cycle, PID, and Current Balance Failure Monitor 440 can detect conditions such as missing transistors leading to low efficiency, the need for higher duty cycles to maintain control, and potential clipping of the other loop filter outputs. The Duty Cycle, PID, and Current Balance Failure Monitor 440 correlates the duty cycle and loop filter outputs of the Controller 200 with the aforementioned phase currents (IP1, IP2, ..., IPN), the voltage supplied to the load, and the controller's input voltage.Defective output phases 102, defective induction coils, and other components located outside the controller can be detected if the correlation of the duty cycle, PID, and current balance failure monitor 440 does not match the expected correlation. Monitoring can be performed at any time during active control or in a specific test mode.

[0033] The self-test techniques described here enable the controller to detect conditions under which the output can be regulated due to the parallel structure of the multiphase controller, but where a defect is present in the power train. This defect includes, but is not limited to: failed or missing drivers 106 that do not switch; failed or missing high-side transistors; failed or missing low-side transistors; failed, missing, or significantly out-of-specification inductors; extremely leaky output capacitors; a failed or missing current-sensing RC network 234; and / or open or short-circuited traces (e.g., PWM, Vsense, IP1, ..., IPN). The self-test techniques described here utilize advantageous features of the controller 200, such as current sensing, current balancing, specific operating modes (e.g., startup), etc.to monitor or verify functions designed to test for such defects. The Controller 200 can disable any problematic output phase 102 or turn off the entire controller.

[0034] It is understood that features of the various embodiments described here can be combined with one another, unless otherwise stated.

Claims

[1] Multiphase controller which features: a plurality of output phases (102), each configured to supply a phase current (IPX) through a separate induction coil (LX) to a load (104) connected to the output phases (102) via the induction coils (LX) and an output capacitor (Cout); and a controller (200) designed to regulate a voltage (Vsense) supplied to the load (104) by adjusting the phase currents (IPX) supplied to the load (104) through the output phases (102), and to monitor the phase currents (IPX) supplied to the load (104) through the output phases (102), wherein the controller (200) is further configured to check the output phases by forcing a first of the output phases (102) to draw current, forcing a second of the output phases (102) to supply current, and determining whether the monitored phase current (IPX) for the first output phase (102) is drawn in a predetermined manner and whether the monitored phase current (IPX) for the second output phase (102) is supplied in a predetermined manner, wherein a malfunction of one of the phases indicates a missing or failed power stage component. [2] Multiphase controller according to claim 1, wherein the controller (200) is further configured to determine an allocation of the total load current between one or more active output phases (102), to adjust the phase currents (IPX) of each active output phase (102) such that they match the allocation and to detect whether one or more phase currents (IPX) supplied by one or more active output phases (102) do not match the allocation for that active output phase (102). [3] Multiphase controller according to claim 2, wherein the controller (200) is further configured to test whether one or more active output phases (102) respond to a known change in the assignment in a predetermined manner in a test mode of the multiphase controller and to detect whether the phase currents (IPX) supplied by one or more active output phases (102) respond in the test mode to the known change in the assignment by rebalancing the phase currents (IPX) in the predetermined manner. [4] Multiphase controller according to one of the preceding claims, wherein the controller (200) is further configured to synchronously switch the output phases (102), which leads to waves in the phase currents (IPX), and to detect whether one or more phase currents (IPX) do not exhibit a wave current pattern that corresponds to an expected wave current pattern. [5] Multiphase controller according to any of the preceding claims, wherein the controller (200) is further configured to ramp up the voltage (Vsense) supplied to the load (104) in order to charge the output capacitor (Cout), wherein the ramping up of the voltage (Vsense) causes active output phases (102) to supply current to the load (104) and to detect whether one or more currents (IPX) supplied by the active output phases (102) do not exhibit a ramp-up pattern that corresponds to an expected ramp-up pattern. [6] Multiphase controller according to claim 5, wherein the controller (200) is configured to increase the voltage (Vsense) supplied to the load (104) in a turn-on mode of the multiphase controller. [7] Multiphase controller according to any of the preceding claims, wherein the controller (200) is further configured to reduce the voltage (Vsense) supplied to the load (104) in order to discharge the output capacitor (Cout), wherein reducing the voltage (Vsense) causes active output phases (102) to draw current from the load (104) and to detect whether one or more currents (IPX) drawn from the active output phases (102) do not exhibit a shutdown pattern that corresponds to an expected shutdown pattern. [8] Multiphase controller according to one of the preceding claims, wherein the controller (200) is further configured to test the output phases (102) in a predetermined sequence and to determine whether the corresponding monitored phase currents (IPX) respond in a predetermined manner. [9] Multiphase controller according to claim 8, wherein the controller (200) is configured to determine whether the monitored phase currents (IPX) respond in a predetermined manner over the predetermined sequence by monitoring the phase current (IPX) supplied by each active phase (102) in the test and the voltage (Vsense) supplied to the load (104) over the predetermined sequence. [10] Multiphase controller according to one of the preceding claims, wherein the controller (200) is further configured to correlate a duty cycle and loop filter outputs of the controller (200) with the monitored phase currents (IPX), the voltage supplied to the load (104) (Vsense) and an input voltage (Vin) of the multiphase controller and to determine whether the correlation corresponds to an expected correlation. [11] Multiphase controller according to any of the preceding claims, wherein the controller (200) is further configured to deactivate any output phase (102) that has been identified as faulty, or to deactivate any output phase (102) connected to an induction coil (LX) that has been identified as faulty. [12] Method for operating a multiphase controller with a plurality of output phases (102), wherein each phase supplies a phase current (IPX) through a separate induction coil (LX) to a load (104) connected to the plurality of output phases (102) via the induction coils (LX) and an output capacitor (Cout), the method comprises: Regulating a voltage supplied to the load (104) by adjusting the phase currents (IPX) supplied to the load (104) through the output phases (102); Monitoring the phase currents (IPX) supplied to the load (104) through the output phases (102); the procedure continues to exhibit Checking the output phases (102), wherein checking the output phases (102) includes: Forcing one of the output phases (102) to draw current; Forcing a second of the output phases (102) to supply current; and Determine whether the monitored phase current (IPX) for the first output phase (102) is drawn in a predetermined manner and whether the monitored phase current (IPX) for the second output phase (102) is supplied in a predetermined manner, wherein a malfunction of one of the phases indicates a missing or failed power stage component. [13] The method of claim 12, further comprising: Determining an allocation of the total load current between one or more active output phases (102); Adjusting the phase currents (IPX) of each active output phase (102) such that they match the assignment; Detect whether one or more phase currents (IPX) supplied by one or more active output phases (102) do not match the assignment for that active output phase (102). [14] The method of claim 13, further comprising: Testing whether one or more active output phases (102) respond to a known change in the assignment in a predetermined manner in a test mode of the multiphase controller; Detect whether the phase currents (IPX) supplied by one or more active output phases (102) respond in the test mode to the known change in the assignment by recalibrating the phase currents (IPX) in the predetermined manner. [15] The method according to claims 12-14, further comprising: Synchronous switching of the output phases (102), which leads to waves in the phase currents (IPX); and Detect whether one or more phase currents (IPX) do not exhibit a wave current pattern that corresponds to an expected wave current pattern. [16] The method according to claims 12-15, further comprising: Ramping up the voltage supplied to the load (104) to charge the output capacitor (Cout), wherein the ramping up of the voltage (Vsense) causes active output phases (102) to supply current to the load (104); and Detect whether one or more currents (IPX) supplied by the active output phases (102) do not exhibit a startup pattern that corresponds to an expected startup pattern. [17] Method according to claim 16, wherein the voltage (Vsense) supplied to the load (104) is ramped up in a turn-on mode of the multiphase controller. [18] The method according to claims 12-17, further comprising: Reducing the voltage (Vsense) supplied to the load (104) to discharge the output capacitor (Cout), wherein the reduction of the voltage (Vsense) causes active output phases (102) to draw current from the load (104); and Detect whether one or more currents (IPX) taken from the active output phases (102) do not exhibit a shutdown pattern that corresponds to an expected shutdown pattern. [19] The method according to claims 12-18, further comprising: Testing the output phases (102) in a predetermined sequence; and Determine whether the corresponding monitored phase currents (IPX) respond in a predetermined manner. [20] The method of claim 19, further comprising: Determine whether the monitored phase currents (IPX) respond in a predetermined manner over the predetermined sequence by monitoring the phase current (IPX) supplied by each active phase (102) in the test and the voltage (Vsense) supplied to the load (104) over the predetermined sequence. [21] The method according to claims 12-20, further comprising: Correlating a duty cycle and loop filter outputs of the controller (200) with the monitored phase currents (IPX), the voltage supplied to the load (104) (Vsense), and an input voltage (Vin) of the multiphase controller; and Determine whether the correlation matches an expected correlation. [22] The method according to claims 12-21, further comprising: Disable any output phase (102) that has been determined to be faulty or that is connected to an induction coil (LX) that has been determined to be faulty. [23] A device configured to control a multiphase controller having a plurality of output phases (102), each configured to supply a phase current (IPX) through a separate induction coil (LX) to a load (104) connected to the output phases (102) via the induction coils (LX) and an output capacitor (Cout), the device having: Means for regulating a voltage (Vsense) supplied to the load (104) by adjusting the phase currents (IPX) supplied to the load (104) through the output phases (102); Means for monitoring the phase currents (IPX) supplied to the load (104) through the output phases (102); and Means for checking the initial stages (102), wherein the means for checking the initial stages (102) comprise: Means for forcing a first of the output phases (102) to draw current, for forcing a second of the output phases (102) to supply current; and Means for determining whether the monitored phase current (IPX) for the first output phase (102) is drawn in a predetermined manner and whether the monitored phase current (IPX) for the second output phase (102) is supplied in a predetermined manner, wherein a malfunction of one of the phases indicates a missing or failed power stage component.

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