ION IMPLANTATION DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES

Abstract

Implantation device, comprising: a scan assembly (950) configured to perform a relative movement between an ion beam (910) and a semiconductor substrate (700) along a first linear scan direction (951) and along a second scan direction (952) that is orthogonal to the first scan direction (951); a tilting assembly (960) configured to change an inclination angle θ between a beam axis (912) of the ion beam (910) and a normal (704) to a principal surface (701) of the semiconductor substrate (700) from a first inclination angle θ1 to a second inclination angle θ2, wherein an angular range Δθ between the first inclination angle θ1 and the second inclination angle θ2 is at least 5°; and a control unit (990) configured to control the tilt assembly (960) to continuously change the tilt angle θ during the relative movement between the ion beam (910) and the semiconductor substrate (700), wherein a change in the tilt angle θ is synchronized with a scan along the first scan direction (951) and / or with a scan along the second scan direction (952).

Description

BACKGROUND

[0001] Several parameters of semiconductor devices can be linked to properties of vertical dopant profiles. For example, vertical power semiconductor devices that control load current flow between a first load electrode on the front side and a second load electrode on the back side of a semiconductor chip contain doped regions such as a drift zone, compensation structures, buffer layers, and field-stop layers with specific vertical dopant profiles. Parameters of the vertical dopant profiles of the relevant layers, such as uniformity, smoothness, and waviness, can have a significant influence on device parameters. Compared to the introduction of dopants by epitaxy or deposition, ion implantation allows for precise monitoring of both the total dose and the dose rate.Ion implantation typically results in a Gaussian distribution of dopants around a peak at the end of the range, the distance of which to a substrate surface is a function of the acceleration energy of the implanted ions. In semiconductor crystals with high diffusion coefficients for the dopant ions, heat treatment diffuses the implanted dopants and broadens the vertical implantation profiles. In semiconductor crystals with low diffusion coefficients for the dopant ions, or if the maximum allowable heat balance for diffusion is limited, an ion implantation process can be adapted by several means of broadening the vertical dopant profile.

[0002] German patent application DE 10 2015 101 736 A1 describes an ion beam implantation device comprising an ion beam aiming unit, a substrate carrier, and a controller. The controller regulates the relative movement between an ion beam guided by the ion beam aiming unit and the substrate carrier such that the ion beam trace on the substrate forms circles or a spiral. German patent application DE 694 08 017 T2 relates to an ion beam implantation device that generates a broad, band-like ion beam. The ion beam is controlled such that it exhibits the highest possible uniformity in precisely one plane. In a band-beam implantation system described in German patent application US 2005 / 0173656 A1, a substrate is aligned at a preset angle to the beam direction.

[0003] Document US 6,229,148 B1 describes the fabrication of an electrode for a stacked capacitor used in a 1T1C storage cell. A polysilicon layer is deposited on the inner surface of a groove. The polysilicon layer is doped by ion beam implantation. Implantation is performed for 280 ms at an implantation angle of -10°, for 140 ms at an implantation angle of 0°, and for another 140 ms at an implantation angle of +10°. The transitions between the different implantation angles occur during implantation at an angular velocity of approximately 70° to 75° per second.

[0004] German patent application DE 11 2015 006 631 T5 describes the formation of an n+-doped buffer layer and a p+-doped collector layer of an IGBT on the back side of a substrate. The formation of the n+-doped buffer layer comprises three implantation steps for protons at the same acceleration energy and at different implantation angles. To ensure uniformity of the number of introduced defects within the substrate surface, the ion beam or a plate holding the substrate is moved along two orthogonal directions during each implantation step. The implantation steps implant the protons at different distances from the back side.

[0005] There is a need for a doping method and a device that provide more flexibility with low process costs in terms of the shape of the vertical dopant profiles. SUMMARY

[0006] The present disclosure relates to an implantation device comprising a scan assembly, a tilt assembly, and a control unit. The scan assembly causes relative motion between an ion beam and a semiconductor substrate along a first horizontal direction and along a second horizontal direction orthogonal to the first horizontal direction. The tilt assembly is configured to change a tilt angle θ between a beam axis of the ion beam and a normal to a principal surface of the semiconductor substrate from a first angle θ1 to a second angle θ2, wherein the angular range Δθ between the first tilt angle θ1 and the second tilt angle θ2 is at least 5°. The control unit is configured to control the tilt assembly to continuously change the tilt angle θ during the relative motion between an ion beam and a semiconductor substrate.

[0007] The present disclosure further relates to an ion implantation method. An ion beam is directed at a principal surface of a semiconductor substrate, wherein a relative motion between the semiconductor substrate and the ion beam results in the ion beam sweeping or scanning the principal surface. During the relative motion, an inclination angle θ between a beam axis of the ion beam and a normal to the principal surface changes continuously from a first inclination angle θ1 to a second inclination angle θ2, wherein an angular span Δθ between the first inclination angle θ1 and the second inclination angle θ2 is at least 5°.

[0008] The present disclosure further relates to another implantation device comprising a scan assembly, a tilt assembly, and a control unit. The scan assembly effects relative motion between an ion beam and a semiconductor substrate along a first scan direction and along a second scan direction orthogonal to the first scan direction. The tilt assembly changes an inclination angle θ between a beam axis of the ion beam and a normal to a principal surface of the semiconductor substrate from a first tilt angle θ1 to a second tilt angle θ2, wherein an angular range Δθ between the first tilt angle θ1 and the second tilt angle θ2 is at least 5°. The control unit controls the tilt assembly and the scan assembly during a single ion implantation process to perform successive sweeping movements along the second scan direction at different tilt angles.

[0009] The problem underlying the application is solved by the subject matter of the independent claims. Further embodiments are described in the dependent claims. The person skilled in the art will recognize additional features and advantages upon reading the following detailed description and examining the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The accompanying drawings are included to provide a further understanding of the present embodiments and are incorporated into and form part of this description. The drawings illustrate the present embodiments and, together with the description, serve to explain the principles of the embodiments. Fig. Figure 1 is a schematic block diagram of an implantation device with a tilting assembly that changes a tilt angle between a main surface of a semiconductor substrate and an ion beam scanned over the main surface, according to one embodiment with respect to a continuous sweeping motion of the tilt angle during a scan. Fig. Figure 2 is a schematic block diagram of a scan assembly according to an embodiment relating to electrostatic beam deflection in two orthogonal directions. Fig. Figure 3 is a schematic block diagram of a scan assembly according to an embodiment that combines beam deflection with a mechanical scan. Fig. Figure 4 is a simplified flowchart of an implantation procedure according to an embodiment based on an implantation device as described in Fig. 1 is illustrated. Fig. 5A is a diagram that plots the projected range of protons in a silicon crystal as a function of an inclination angle to discuss effects of the embodiment. Fig. Figure 5B is a diagram that plots the projected range of phosphorus ions in a silicon crystal as a function of an inclination angle to discuss effects of the embodiment. Fig. 5C is a diagram that plots the projected range of boron ions in a silicon crystal as a function of an inclination angle to discuss effects of the embodiment. Fig. 5D is a diagram that plots the projected range of nitrogen ions in a silicon carbide crystal as a function of an inclination angle to discuss effects of the design. Fig. Figure 6A is a schematic block diagram of an implantation device with a tilting assembly that stepwise changes an inclination angle between a main surface of a semiconductor substrate and an ion beam scanned over the main surface between successive scans along a first scan direction. Fig. Figure 6B is a schematic time diagram for an inclination angle and a deflection along a first scan direction for the ion beam of the implantation device of Fig. 1. Fig. Figure 7 is a simplified flowchart of an implantation procedure related to an implantation device as shown in Fig. 6A illustrates. Fig. Figure 8A is a schematic vertical cross-sectional view of an area of ​​a semiconductor substrate to illustrate a method for manufacturing semiconductor devices, illustrating a change in an implantation angle during scanning according to an embodiment relating to the formation of drift layers after forming a first epitaxial layer. Fig. Figure 8B is a schematic vertical cross-sectional view of the semiconductor substrate area of Fig. 8A during ion implantation under a changing implantation angle. Fig. 8C is a schematic diagram showing a vertical dopant profile along a line CC in Fig. 8B illustrated after ion implantation. Fig. Figure 9A is a schematic vertical cross-sectional view of an area of ​​a semiconductor substrate to illustrate a method for manufacturing semiconductor devices which includes changing an implantation angle during scanning according to an embodiment relating to the formation of thick drift layers, after a first ion implantation and after the formation of a second epitaxial layer. Fig. Figure 9B is a schematic vertical cross-sectional view of the semiconductor substrate area of Fig. 9A during a second ion implantation under a changing implantation angle. Fig. 9C is a schematic diagram showing a vertical dopant profile along a line CC in Fig. 9B illustrated after the second ion implantation. Fig. Figure 10A is a schematic vertical cross-sectional view of an area of ​​a semiconductor substrate to illustrate a method for fabricating semiconductor devices based on drift layers formed at a short distance from a main surface after forming an absorber layer. Fig. Figure 10B is a schematic vertical cross-sectional view of the semiconductor substrate area of Fig. 10A during ion implantation through the absorber layer. Fig. 10C is a schematic diagram showing a vertical dopant profile along a line CC in Fig. 10B illustrated after ion implantation. Fig. Figure 11A is a schematic vertical cross-sectional view of an area of ​​a semiconductor substrate to illustrate a method for fabricating semiconductor devices which includes changing an implantation angle during scanning according to an embodiment relating to the combined formation of a lightly doped drift layer adjacent to a more heavily doped field-stop or charge-compensation layer after forming a first epitaxial layer. Fig. Figure 11B is a schematic vertical cross-sectional view of the semiconductor substrate area of Fig. 11A during ion implantation under a changing implantation angle and a changing implantation dose. Fig. 11C is a schematic diagram showing a vertical dopant profile along a line CC in Fig. Figure 11B illustrates after ion implantation. Fig. Figure 12A is a schematic cross-sectional view of a semiconductor device containing a drift zone with doping defined by ion implantation under a changing implantation angle, according to an example relating to semiconductor diodes. Fig. Figure 12B is a schematic cross-sectional view of a semiconductor device containing a drift zone with doping defined by ion implantation under a changing implantation angle, according to an example related to semiconductor switches. Fig. 12C is a schematic diagram showing a section of a vertical doping profile of the semiconductor devices of the Fig. 12A or Fig. Figure 12B illustrates along lines CC and refers to a field stop zone formed by proton implantation under a continuously changing implantation angle. Fig. Figure 13 is a schematic vertical cross-sectional view of an area of ​​a semiconductor substrate to illustrate a method for fabricating semiconductor devices, relating to the formation of a deep emitter layer during ion implantation under a changing implantation angle. Fig. Figure 14A is a schematic vertical cross-sectional view of a semiconductor device consisting of the semiconductor substrate of Fig. 13 will be received. Fig. 14B is a schematic diagram showing a vertical dopant profile along a line BB in Fig. 14A illustrates. Fig. Figure 15A is a schematic vertical cross-sectional view of an area of ​​a semiconductor substrate to illustrate a method for manufacturing semiconductor devices according to an embodiment, based on superjunction devices, during ion implantation of acceptors under a changing implantation angle. Fig. Figure 15B is a schematic vertical cross-sectional view of the semiconductor substrate area of Fig. 15A during ion implantation of donors under a changing implantation angle. Fig. Figure 15C is a schematic vertical cross-sectional view of the semiconductor substrate area of Fig. 15B after forming trenches extending into the semiconductor substrate area of Fig. Extend to 15B. Fig. Figure 15D is a schematic vertical cross-sectional view of the semiconductor substrate area of Fig. 15C after filling the trenches with semiconductor material. Fig. Figure 15E is a schematic vertical cross-sectional view of the semiconductor substrate area of Fig. 15D after heat treatment. Fig. Figure 16A is a schematic vertical cross-sectional view of an area of ​​a semiconductor device with a superjunction structure defined by ion implantation at a changing angle. Fig. 16B is a schematic horizontal dopant profile along a line BB of Fig. 16A. Fig. 16C is a region of the schematic vertical dopant profile along a line CC of Fig. 16A. Fig. 16D is a region of a schematic vertical dopant profile along a line DD of Fig. 16A. Fig. Figure 17A is a schematic vertical cross-sectional view of an area of ​​a semiconductor substrate to illustrate a method for fabricating semiconductor devices comprising the formation of a germanium layer on a silicon base during the implantation of germanium under a changing implantation angle. Fig. 17B is a schematic diagram showing a vertical profile of germanium concentration along a line BB of Fig. 17A illustrates. Fig. Figure 18A is a schematic vertical cross-sectional view of an area of ​​a semiconductor substrate to illustrate a method for fabricating semiconductor devices comprising the formation of a germanium layer on a silicon base during implantation of germanium under a changing implantation angle. Fig. 18B is a schematic diagram showing a vertical profile of germanium concentration along a line BB of Fig. 18A illustrates. Fig. Figure 19 is a schematic vertical cross-sectional view of an area of ​​a semiconductor device with a stress relaxation layer defined by ion implantation under a changing implantation angle. Fig. Figure 20A is a schematic top view of an area of ​​a semiconductor substrate to illustrate a method for fabricating semiconductor devices with a buried oxide layer after forming an implantation mask. Fig. Figure 20B is a schematic vertical cross-sectional view of the semiconductor substrate area of Fig. 20A during an implantation of oxygen ions. Fig. 20C is a schematic vertical cross-sectional view of the semiconductor substrate area of Fig. 20B after removal of the oxygen implantation mask. Fig. Figure 20D is a schematic vertical cross-sectional view of the semiconductor substrate area of Fig. 20°C after formation of an epitaxial layer. Fig. 20E is a schematic top view of an area of ​​a semiconductor substrate using a grid-like mask aperture. DETAILED DESCRIPTION

[0011] The following detailed description refers to the accompanying drawings, which form part of this document and show specific embodiments for illustrative purposes. The drawings are not to scale and are for illustrative purposes only. Corresponding elements are marked with the same reference numerals in the various drawings unless otherwise stated.

[0012] The terms "have," "contain," "comprise," "exhibit," and similar terms are open-ended, indicating the presence of the identified structures, elements, or features, but not excluding the presence of additional elements or features. Indefinite and definite articles should encompass both the plural and singular unless the context clearly indicates otherwise.

[0013] The term "electrically connected" describes a permanent, low-resistance connection between electrically connected elements, for example, a direct contact between the elements in question, or a low-resistance connection via a metal and / or a highly doped semiconductor material. The term "electrically coupled" implies that one or more intermediate elements designed for signal transmission may be present between the electrically coupled elements, for example, elements that can be controlled to temporarily provide a low-resistance connection in a first state and a high-resistance electrical decoupling in a second state.

[0014] The figures illustrate relative doping concentrations by indicating "-" or "+" next to the doping type "n" or "p". For example, "n" means -“a doping concentration that is lower than the doping concentration of an “n” doping area, while an “n + A doping region with a relative concentration of n-type doping has a higher doping concentration than an n-type doping region. Doping regions with the same relative concentration doping doping do not necessarily have the same absolute concentration. For example, two different n-type doping regions can have the same or different absolute concentrations of doping.

[0015] Fig. Figure 1 shows an ion implantation device 900 containing an ion source 905 that generates and emits ions, for example, protons or ions with an atomic number greater than 4, such as ions of nitrogen, aluminum, boron, phosphorus, arsenic, sulfur, selenium, germanium, or oxygen. An accelerator unit 920 can accelerate a selected type of ion and filter out others. A collimator unit 930 can align the directions of motion of the ions in a direction parallel to a beam axis 912 and can direct a collimated ion beam 910 onto a semiconductor substrate 700, which can be temporarily fixed to a substrate holder 980, e.g., by electrostatic suction. In a plane orthogonal to the beam axis 912, the ion distribution in the collimated ion beam 910 can be point-symmetric about a beam center.

[0016] The cross-sectional area of ​​the ion beam 910 can range from a few hundred square micrometers to a few square centimeters. A scan assembly 950 scans the ion beam 910 along a beam track 911 across a main surface 701 of the semiconductor substrate 700 to distribute the ions evenly over the semiconductor substrate 700. The beam track 911 can contain straight sections, form circles, or form a spiral.

[0017] The scan assembly 950 can control the scan by electrostatic fields, for example by a deflection unit 955, by a mechanical movement of the substrate holder 980, for example by a table assembly 956, or by a combination of both, wherein the scan assembly 950 controls a relative movement between the ion beam 910 and the semiconductor substrate 700 based on two orthogonal scan directions, which can be two linear directions or a rotational and a radial direction. A more detailed illustration and description of the scan assembly 950 is provided in the following. Fig. 1, which is based on scanning with electrostatic fields along the two scan directions, is in Fig. Figure 2 illustrates this. In this case, a typical scan frequency along both scan directions is in the kHz range. For optimal uniformity and scan speed, a deflection pattern can be selected. For example, a deflection pattern can include up-and-down sweeping movements in a first scan direction. At each endpoint in the first direction, the position in the second direction is incremented. When the endpoint in the second direction is reached, a displacement in the second direction can be applied. This basic pattern is then reversed by moving up and down in the first direction and decrementing the position in the second direction. Thus, a scan frequency, depending on the number of increments of a sweeping movement in the second direction, is higher in the first direction than in the second direction. A more detailed illustration and description of the Scan Assembly 950 is provided in Figure 2. Fig. 1, which is based on a combination of scanning with electrostatic fields and mechanical scanning, is in Fig. Figure 3 illustrates this. In this case, a typical scan frequency for scanning with electrostatic fields along a first scan direction is in the range of kHz, and a typical scan speed for mechanical scanning along a second direction is in the range of cm / s.

[0018] The ion implantation device 900 further includes a tilting assembly 960, which changes an inclination angle θ between a normal 704 to the main surface 701 and the beam axis 912 of the ion beam 910 during a single ion implantation process between a first inclination angle θ1 and a second inclination angle θ2. A single ion implantation process is an ion implantation process that is based on a single implantation formula and is not interrupted, for example, by a tuning period to change the implantation formula. Consequently, an inclination angle change is part of the single implantation formula. An angular range Δθ between the first inclination angle θ1 and the second inclination angle θ2 is at least 5°, for example, 45°. The first inclination angle θ1 and the second inclination angle θ2 can be symmetrical to each other with respect to the beam axis 912, i.e., θ2 = -θ1.According to another embodiment, the first inclination angle θ1 and the second inclination angle θ2 can be asymmetrical with respect to the beam axis 912, e.g. θ1 = 0°.

[0019] A control unit 990 can control the scan assembly 950 and the tilt assembly 960 in such a way that a change in the tilt angle θ is synchronized with at least one of the scans along the first and second scan directions.

[0020] Within the semiconductor substrate 700, the implanted ions come to rest over a region around a projected range and decrease in density on both sides of the projected range along a vertical direction orthogonal to the main surface 701. The projected range of the implanted ions decreases with increasing tilt angle θ, so that a continuous sweep of the tilt angle θ results in a continuous sweep of the projected range in the semiconductor substrate 700 along a vertical direction orthogonal to the main surface 701.

[0021] Continuously changing the tilt angle θ during scans of a single implant formulation improves the control of vertical dopant profiles and provides an additional degree of freedom for defining these profiles. For example, in semiconductor substrates 700 with relatively high diffusion coefficients, continuously changing the tilt angle θ reduces the heat balance required for the diffusion and smoothing of vertical dopants. For semiconductor substrates 700 with low diffusion coefficients, continuously changing the tilt angle θ can replace more complex alternatives. The tilt angle defines the current implantation angle.

[0022] Synchronizing the change in the tilt angle θ with at least one of the scans, for example the scan with the slower scan speed, can improve the uniformity of the implantation profile across the semiconductor substrate 700.

[0023] Furthermore, the control unit 990 can control the dose D(t) of the ion beam 910 as a function of the tilt angle θ. For example, an increase in the dose D(t) can compensate for a dose decrease resulting from the fact that, with increasing deviation of the tilt angle θ from 0°, the ion beam 910 is distributed over a larger partial area of ​​the main surface 701.

[0024] A suitable variation of the inclination angle θ and the dose D(θ) results in improved tuning of vertical dopant profiles to application-specific characteristics. For example, an implantation process with a continuously changing implantation angle can replace less precise epitaxy processes for forming comparatively thick, uniformly doped layers with a thickness greater than 1 µm.

[0025] Transitions between vertically stacked layers of different dopant concentrations can be defined more smoothly or sharply than with conventional methods. Compared to methods that smooth dopant profiles through diffusion, inclined implantation under a continuously sweeping implantation angle can accommodate a lower post-implantation temperature balance.

[0026] According to another embodiment, the control unit 990 provides a constant acceleration energy, whereby an implantation with a changing inclination angle θ during a single ion implantation process can achieve a result similar to processing multiple implantation recipes, i.e., multiple ion implantation processes at different acceleration energy levels. Therefore, no change in acceleration energy is required, thus eliminating the need for tuning cycles in which the acceleration energy of the ion implantation device 900 is recalibrated for each new acceleration energy level.

[0027] Increasing the tilt angle θ also results in a lower lower limit for the implantation depth. For example, some designs of ion implantation devices cannot provide a sufficient ion beam current at acceleration energies below 100 keV. By increasing the tilt angle θ to approximately 60°, the minimum implantation depth can be reduced to a projected range that is significantly shorter than the projected range for orthogonal implantation at the same acceleration energy.

[0028] Fig. Figure 2 shows a scan assembly 950, which includes a deflection unit 955 for deflecting the ion beam 910. The ion beam 910 traverses a region between a pair of first deflection electrodes 953, which deflect the ion beam 910 along a linear first scan direction 951. The ion beam 910 then passes a pair of second deflection electrodes 954, which deflect the ion beam 910 along a linear second scan direction 952 orthogonal to the drawing plane. The electric fields in the deflection unit 955 cause the ion beam 910 to scan the entire main surface 701 of the semiconductor substrate 700. One of the two scan speeds can be, for example, a factor of 10 to 100 faster than the other.A tilting assembly 960 can tilt the substrate holder 980 by an inclination angle θ with respect to the cross-sectional plane of the beam axis 912, wherein the inclination angle θ can be continuously varied over time during the ion implantation process.

[0029] The Hybrid Scan Assembly 950 from Fig. 3 comprises a deflection unit 955, which electrostatically scans the ion beam 910 in a linear first scan direction 951 orthogonal to the drawing plane, and a table assembly 956, which moves the substrate holder 980 in a linear second scan direction 952 orthogonal to the first scan direction 951.

[0030] Fig. 4 refers to a method for manufacturing semiconductor devices, which includes the implantation device 900 of Fig. 1. An ion beam is directed at a main surface of a semiconductor substrate 992, wherein a relative motion between the semiconductor substrate and the ion beam results in the ion beam completely scanning the main surface. During the relative motion, an inclination angle θ between a beam axis 912 of the ion beam and the normal to the main surface is changed from a first inclination angle θ1 to a second inclination angle θ2, wherein the angular range Δθ between the first inclination angle θ1 and the second inclination angle θ2 is at least 5°, e.g. at least 40° (994).

[0031] Fig. Figures 5A to 5D illustrate the projected range p(θ) of some ions as a function of the inclination angle θ between the normal to a principal surface and the beam axis of the ion beam.

[0032] According to Fig. 5A decreases the projected range of protons with a kinetic energy of 2.5 MeV in silicon from about 68 µm at θ = 0 to about 35 µm at θ = 60°.

[0033] According to Fig. 5B The projected range p(θ) of phosphorus ions in silicon at an implantation energy of 2.5 MeV decreases from about 2.0 µm at θ = 0 to about 1.0 µm at θ = 60°.

[0034] Fig. 5C shows that the projected range p(θ) of boron ions implanted in silicon at an implantation energy of 2.5 MeV falls from about 3.3 µm at θ = 0 to about 1.7 µm at θ = 60°.

[0035] According to Fig. In 5D, the projected range p(θ) for nitrogen ions implanted into a silicon carbide crystal at an acceleration energy of 4.0 MeV decreases from about 2.4 µm at θ = 0 to about 1.2 µm at θ = 60°.

[0036] The ion implantation device 900 from Fig. 6A includes a tilting assembly 960 which changes a tilt angle θ between the main surface 701 and the orthogonal cross-sectional plane of the ion beam 910 between a first tilt angle θ1 and a second tilt angle θ2 between two sweep movements along the second scan direction 952.

[0037] The angular span Δθ between the first tilt angle θ1 and the second tilt angle θ2 is at least 5°, but is greater than 40°, for example, 120°. The first tilt angle θ1 and the second tilt angle θ2 can be symmetrical to each other with respect to a beam axis 912 with θ2 = -θ1. According to another embodiment, the first tilt angle θ1 and the second tilt angle θ2 can be asymmetrical with respect to the beam axis 912, e.g., θ1 = 0°.

[0038] In Fig. Figure 6B shows a line 994 representing the position x(t) of the ion beam 910 along the second scan direction 952 during a sweep movement between x1 and x2, wherein during a sweep movement between x1 and x2 the ion implantation device 900 performs a plurality of sweep movements along the first scan direction 951. A line 995 shows the stepwise change of θ(t) between two successive sweep movements between x1 and x2.

[0039] The control unit 990 controls the tilting assembly 960 and the scanning assembly 950 so that the ion beam performs successive sweeping motions at different tilt angles without an intermediate tuning cycle. This process control allows the tilt angle θ to be changed within a single implantation formula in such a way that successive sweeping motions at different tilt angles can follow one another directly without an intermediate tuning cycle to recalibrate the acceleration energy, for example, by applying a different implantation formula.

[0040] According to one embodiment, the control unit 990 further controls the acceleration unit 920 to vary the acceleration of the ions between successive slow scans at different tilt angles without an intermediate tuning cycle. Such process control allows, within a single implantation formulation, both the tilt angle θ and the acceleration energy to be changed, so that scans at different tilt angles and different acceleration energies can follow one another directly without intermediate tuning cycles to recalibrate the acceleration energy.

[0041] The entire implant formulation can be calibrated as a whole, and the implantation process requires fewer time-consuming adjustment cycles.

[0042] Fig. 7 refers to a method for manufacturing semiconductor devices, which includes the implantation device 900 from Fig. 6A can be used. In process feature 996, an ion beam is directed at a main surface of a semiconductor substrate, wherein a relative movement between the semiconductor substrate and the ion beam results in the ion beam scanning the main surface along a first scan direction and a second scan direction orthogonal to the first scan direction. In process feature 998, between two scans along the second scan direction, an inclination angle θ between a beam axis 912 of the ion beam and a normal to the main surface is changed from a first inclination angle θ1 to a second inclination angle θ2, wherein an angular span Δθ between the first inclination angle θ1 and the second inclination angle θ2 is at least 5°, and wherein two successive sweep movements at different inclination angles follow each other directly without an intervening tuning cycle.

[0043] According to one embodiment, the acceleration energy applied to ions of the ion beam is changed between two successive scans at a different tilt angle, and two scans at different acceleration energies follow each other without an intermediate tuning cycle.

[0044] The following figures refer to methods for forming doped structures in semiconductor devices, for example in vertical power semiconductor devices that control a load current between a first load electrode on a front side and a second load electrode on the back side of a semiconductor chip, wherein at least one of the doped structures is formed by one of the implantation methods described with reference to the previous figures.

[0045] The doped structure formed by ion implantation with a continuously or stepwise changing implantation angle can include drift zones, field stop zones, charge compensation zones, body regions, source regions, transition termination extensions, VLD (variation of a lateral doping) regions, channel stop regions, and field rings, wherein the vertical dopant profile within the doped region in question can be adapted to the application, for example, with respect to the position of maxima of a dopant concentration, the position of minima of a dopant concentration, ripple, uniformity, and slope in both silicon and SiC substrates.

[0046] In the following figures, a normal to a main surface 701 of the respective semiconductor substrate 700 defines a vertical direction. Directions parallel to the main surface 701 are horizontal directions.

[0047] Fig. 8A to 11B refer to the manufacture of semiconductor devices that include a drift zone to absorb a significant proportion of a blocking voltage along the vertical direction.

[0048] An epitaxial layer 710 can be formed by epitaxy on a crystalline base substrate 705, wherein atoms of a deposited semiconductor material grow in accordance with or superimposed on the crystal lattice of the base substrate 705.

[0049] Fig. Figure 8A shows the resulting semiconductor substrate 700, which includes the epitaxial layer 710 on a front face of the base substrate 705. The base substrate 705 can be a crystal wafer obtained by sawing from a crystal ingot. For example, the base substrate 705 can be silicon, germanium, silicon germanium, 2H-SiC (silicon carbide of the 2H polytype), 4H-SiC, 6H-SiC, or 15R-SiC. The base substrate 705 can be heavily doped. The epitaxial layer 710 can be intrinsically or lightly doped, with a background dopant concentration in the range of 10 13 cm -3 up to 1 × 10 15 cm-3 or 5 × 10 13 cm -3 up to 5 × 10 14 cm -3 .

[0050] Through a primary surface 701 on the front face of the semiconductor substrate 700, dopants are implanted into at least one region of the epitaxial layer 710. An ion beam containing the dopants is directed at the primary surface 701, resulting in a relative motion between the semiconductor substrate 700 and the ion beam 910, causing the ion beam 910 to scan the primary surface 701. During this relative motion, an inclination angle θ between a beam axis 912 of the ion beam 910 and the normal 704 to the primary surface 701 is changed continuously or in steps from a first inclination angle θ1 to a second inclination angle θ2, where θ1 can be, for example, equal to -θ2 or equal to 0°. The angular range Δθ between the first inclination angle θ1 and the second inclination angle θ2 is at least 5°, for example, at least 20°.

[0051] As in Fig. As illustrated in Figure 8B, the implanted dopants define a drift layer 730 that is fully formed within the epitaxial layer 710. The drift layer 730 forms a horizontal transition j1 ​​with a surface section 732 of the epitaxial layer 710 between the main surface 701 and the drift layer 730, and the drift layer 730 can form a second horizontal transition j2 with either a lower section 733 of the first epitaxial layer 710 or with the base substrate 705. A vertical extent v1 of the drift layer 730 can be at least 1.0 µm, e.g., at least 1.5 µm.

[0052] Fig. Figure 8C shows a schematic vertical dopant profile 452 along a line CC of Fig. 8B for a total of nine implantations of boron atoms at an acceleration energy of 2.5 MeV and under nine different implantation angles in a range from θ1 = 0° to θ2 = 60°, with six implantations at θ = 0°, θ = 20°, θ = 28°, θ = 35°, θ = 40° and θ = 46° at an implantation dose of 1.0E13 cm -2 , an implantation at θ = 51° at a dose of 1.1E13 cm -2 , an implantation at θ = 56° at a dose of 1.2E13 cm -2 and implantation at θ = 60° at a dose of 1.4E13 cm -2 The parameter z specifies the distance to the main surface 701.

[0053] After implantation and prior to any heat treatment, the resulting vertical dopant profile 452 is nearly constant between z = 1.8 µm and z = 3.2 µm. For z < 1.0 µm and for z > 3.7 µm, the implantation has no significant influence on the background doping of the epitaxial layer 710.

[0054] The process can continue with the formation of an anode region of a semiconductor diode or of body regions and source zones of transistor cells in the unaffected surface section 732 of the epitaxial layer 710 and / or in a further thin layer formed by epitaxy on the epitaxial layer 710.

[0055] For silicon carbide-based semiconductor devices, continuous or stepwise changes in the implantation angle can result in drift zones containing dopants distributed with high uniformity along the vertical direction.

[0056] For silicon-based semiconductor devices, the illustrated stepwise change of the implantation angle results in the formation of drift zones with very uniform vertical dopant profiles at a significantly lower heat balance required for vertical diffusion of the dopants.

[0057] For silicon devices with a blocking voltage up to several hundred V, the drift layer 730 can be formed using a process based on a single epitaxy process and a single ion implantation at a continuously or stepwise changing implantation angle.

[0058] For silicon devices with a blocking voltage of up to several hundred V, the drift layer 730 can be formed using a process that includes a single epitaxy process and a single ion implantation at a changing implantation angle, as shown in Fig. 8A to 8C is illustrated.

[0059] Fig. 9A to 9C refer to a drift layer 730 formed in two or more successively created epitaxial layers. Another epitaxial layer 720 is formed on the main surface 701 of the semiconductor substrate 700 as shown in Fig. 8B illustrates the training.

[0060] Fig. Figure 9A shows the semiconductor substrate 700 with a second epitaxial layer 720 stacked on the first epitaxial layer 710, which in turn can be formed on a base substrate 705. The first epitaxial layer 710 comprises a drift layer 730 and a surface section 732 between the second epitaxial layer 720 and the drift layer 730.

[0061] Dopants are implanted at a continuously or stepwise changing angle in the same manner or at least similarly to the procedure described above. Fig. 8B described ion implantation, wherein the thickness of the second epitaxial layer 720 and the implantation parameters of the second ion implantation are selected such that the second ion implantation is also effective within the surface section 732 of the first epitaxial layer 710.

[0062] Fig. Figure 9B shows a reinforced drift layer 730 resulting from both ion implantations, with the second ion implantation overlapping to some extent with the first ion implantation along the vertical direction. The reinforced drift layer 730 comprises a first partial layer 7301 formed within the first epitaxial layer 710 and a second partial layer 7302 formed within the second epitaxial layer 720. The two partial layers 7301 and 7302 are directly adjacent to each other and form the drift layer 730. The drift layer 730 forms a horizontal first transition j1 ​​near the main surface 701 and a second horizontal transition j2 within either the lower portion 733 of the first epitaxial layer 710 or with the base substrate 705.

[0063] Fig. Figure 9C shows the vertical doping profile 453 for the drift layer 730 of Fig. 9B. According to the example shown, the vertical dopant profile 453 results from the superposition of two identical vertical dopant profiles 452, as shown in Fig. Figure 8C illustrates this and shows that the two layers are shifted relative to each other by the thickness v2 of the second epitaxial layer. According to other examples, the implantation parameters of the second implantation can be adjusted such that even in a transition area where the two vertical dopant profiles 452 overlap, the vertical dopant profile 453 is flat, as on both sides of the transition area.

[0064] The sequence of epitaxial growth and ion implantation into the epitaxial layer under changing implantation angles can be repeated several times to form a drift layer with a desired target thickness suitable for the target blocking voltage.

[0065] Fig. References 10A to 10C refer to an embodiment that enables the formation of a doped layer at a short distance from the main surface 701. The doped layer can, for example, be a drift layer 730. An absorber layer 410 is formed on the main surface 701 of a semiconductor substrate 700.

[0066] Fig. Figure 10A shows the absorber layer 410 covering the main surface 701 of the semiconductor substrate 700, which contains a first epitaxial layer 710 formed on a base substrate 705. The absorber layer 410 can be a photoresist or a hard mask, for example, a silicon oxide layer.

[0067] As in Fig. As illustrated in Figure 10B, dopants are implanted into the semiconductor substrate 700 through the absorber layer 410 using one of the implantation methods described above. The absorber layer 410 attenuates the ions and reduces the projected range.

[0068] Fig. 10C refers to a sequence of implantations as described with reference to Fig. 8B and Fig. 8C was described. The resulting vertical dopant profile 454 is the same as the vertical dopant profile 452 of Fig. 8C is predominantly similar, but is shifted to lower values ​​of z and closer to the main surface 701, so that the vertical dopant profile 454 is approximately uniform for a range of z between 0.9 µm and 2.5 µm.

[0069] Fig. References 11A to 11C relate to a method for controlling ion implantation under a continuously or stepwise changing implantation angle in combination with a significant change in at least the implantation dose for the integrated formation of a drift layer 730 and a field stop or charge compensation layer 738.

[0070] Fig. Figure 11A shows a semiconductor substrate 700 containing an epitaxial layer 710, which is placed on a base substrate 705 as described in the following. Fig. 8A was described. Ion implantation is performed under a stepwise or continuous change of the implantation angle during processing of a single implantation formulation as discussed above. Unlike the embodiment of Fig. 8B θ(t) and at least the implantation dose D(θ) are controlled to form, in addition to a drift layer 730 with an approximately uniform vertical dopant profile, a field stop or charge compensation layer 738 in a region of the first epitaxial layer 710 between the drift layer 730 and the base substrate 705, wherein a peak dopant concentration Npk in the field stop or charge compensation layer 738 is at least twice, for example at least ten times, a mean dopant concentration NDr in the drift layer 730.

[0071] Fig. 11C shows the vertical dopant profile 455 along a line CC of Fig. 11B. The vertical extent v3 of the drift layer can be in a range from 1 µm to 70 µm, for example, from 1 µm to 3 µm. Since both the drift layer 730 and the field-stop or charge-compensation layer 738 are formed from the same side, the distance between the first transition j1 ​​and the field-stop or charge-compensation layer 738 is well-defined and, unlike in the case of implantation of the field-stop or charge-compensation layer 738 from the rear, does not depend on the thickness of an epitaxial layer, the thickness of which is subject to fluctuations caused by process variations inherent in the epitaxial process.

[0072] The field-stop layer or charge compensation layer 738 can be designed to be effective as a field stop or to increase the avalanche insensitivity and radiation resistance of a semiconductor device obtained from the semiconductor substrate 700.

[0073] Fig. 12A and Fig. Figure 12B shows vertical cross-sections of semiconductor devices 500, which are made from one of the details relating to Fig. The methods described in 8A to 11C can be obtained, whereby any of the illustrated doped structures can result from ion implantation involving a stepwise or continuous change in the implantation angle during processing of a single implantation formulation. Vertical cross-sections orthogonal to the illustrated cross-sections may closely correspond to or be qualitatively identical to the illustrated cross-sections.

[0074] The semiconductor device 500 of Fig. 12A is a power semiconductor diode based on a semiconductor region 100, which can be, for example, a crystal of 4H-SiC, 2H-SiC, 6H-SiC, or 15R-SiC, silicon, germanium, or silicon-germanium. A first surface 101 of the semiconductor region 100 on the front side is parallel to an opposing second surface 102 on the back side. A drift structure 130 is directly adjacent to the second surface 102. The drift structure 130 can include a lightly doped drift zone 131 and a heavily doped contact region 139 between the drift zone 131 and the second surface 102, the contact region 139 having the same conductivity type as the drift zone 131.

[0075] The drift structure 130 can be electrically connected or coupled to a second load electrode 320 via a low-resistance contact. For example, the dopant concentration in the contact area 139 along the second surface 102 is sufficiently high to form a low-resistance contact with the second load electrode 320, which is directly adjacent to the second surface 102. The second load electrode 320 forms a cathode terminal K of the semiconductor diode or is electrically connected or coupled to one.

[0076] Drift zone 131 results from a drift layer formed by ion implantation at a continuously or stepwise changing inclination angle as described above. A net dopant concentration in drift zone 131 can be found in the range of 1 x 14 cm⁻¹. -3 up to 3E16 cm -3 lie, if the semiconductor area 100 is based on silicon carbide.

[0077] The drift structure 130 can further comprise doped regions between the drift zone 131 and the first surface 101 and between the drift zone 131 and the second surface 102. The drift zone 131 can form a horizontal pn junction pnx with an anode region 122 located between the first surface 101 and the drift structure 130. A first load electrode 310 is directly adjacent to the anode region 122 and can form an anode terminal A or be electrically connected or coupled to one. A dielectric layer 210 can cover sidewalls of the first load electrode 310.

[0078] Conventionally, the dopant concentration in drift zone 131 results from in-situ doping during the epitaxial growth of an epitaxial layer in which drift zone 131 is formed. The in-situ doping process leads to comparatively large variations in the total amount of dopants incorporated into the growing crystal and fluctuations in the dopant concentration within the same semiconductor device, both among devices obtained from the same semiconductor substrate and among devices obtained from different semiconductor substrates.

[0079] In contrast, ion implantation with a stepwise or continuous change of the tilt angle, as described above, allows tighter tolerances for the total amount of dopant atoms in the drift zone 131 and defines more precisely the distribution of dopant atoms in the drift zone 131 along the vertical direction.

[0080] Instead of or in addition to the drift zone 131, any of the other doped structures can result from ion implantation using a stepwise or continuous change of the implantation angle, e.g. the anode region 122, a field stop zone 137 or transition termination structures 128, which extend from the first surface 101 into the drift zone 131 in a peripheral region outside the anode region 122 and form pn transitions with the drift zone 131.

[0081] Fig. 12B is a semiconductor device 500 containing transistor cells TC. The semiconductor device 500 can be, for example, an IGFET (isolated gate field-effect transistor), an IGBT (isolated gate bipolar transistor), or an MCD (MOS-controlled diode). For details of the semiconductor area 100 and the drift structure 130, refer to the description of the semiconductor diode in Fig. referred to 12A.

[0082] Instead of an anode region, the semiconductor device contains 500 of Fig. 12B transistor cells TC, wherein in each transistor cell TC a body region 120 separates a source zone from the drift structure 130. The body regions 120 form first transistor pn junctions, which correspond to the pn junctions pnx of Fig. 12A correspond to the drift structure 130, e.g. with the drift zone 131. The body regions 120 also form second transistor pn junctions with the source regions.

[0083] A first load electrode 310, which is electrically connected to the body regions 120 and the source regions of the transistor cells TC, can form a first load terminal L1, which can be an anode terminal of an MCD, a source terminal of an IGFET or an emitter terminal of an IGBT, or can be electrically connected or coupled to such a terminal.

[0084] A second load electrode 320, which is electrically connected to the contact area 139, can form a second load terminal L2, which can be a cathode terminal of an MCD, a drain terminal of an IGFET or a collector terminal of an IGBT, or can be electrically connected or coupled to such a terminal.

[0085] The transistor cells TC can be planar gate electrodes or trench gate electrodes, with the trench gate electrodes controlling a lateral or a vertical channel. For example, the transistor cells TC are n-channel FET cells with p-doped body regions 120, n-doped source regions, and an n-doped drift region 131.

[0086] Instead of or in addition to the drift zone 131, any of the other doped structures can result from ion implantation using a stepwise or continuous change of an implantation angle, e.g. the anode region 122 or transition termination structures 128, which extend from the first surface 101 into the drift zone 131 in a peripheral region outside the anode region 122 and form pn transitions with the drift zone 131.

[0087] Instead of or in addition to the drift zone 131, any of the other doped structures can result from ion implantation using a stepwise or continuous change of an implantation angle, e.g. the body regions 125, the source regions, channel stopping devices or deep field rings 129, which extend in a peripheral region between the transistor cells TC and an outer surface from the first surface 101 into the drift zone 131 and form pn junctions with the drift zone 131.

[0088] The semiconductor devices 500 of the Fig. 12A and Fig. 12B feature a field stop or charge compensation zone 138, which consists of the field stop or charge compensation layer 738 of Fig. 11B was obtained. Alternatively, the semiconductor devices 500 can include a field-stop or charge-compensation zone 138 formed independently of the drift zone 131.

[0089] Fig. Figure 12C illustrates a vertical doping profile 456 of the field-stop or charge-compensation zones 138 of the semiconductor devices of the Fig. 12A or Fig. 12B, wherein the field-stop or charge-compensation zones 138 are formed by proton implantation from the rearward side at a continuously or stepwise changing implantation angle and at an acceleration energy dependent on the implantation angle. Heat treatment between 380°C and 420°C for typically at least 30 minutes and less than 10 hours can activate hydrogen-related donors.

[0090] The vertical dopant profile 456 can approximate a Gaussian distribution with low waviness. Alternatively, a vertical dopant profile 457 can contain two or more smooth steps.

[0091] Fig. 13 refers to the formation of a deep emitter layer on the back side of an IGBT, e.g. a reverse-blocking IGBT.

[0092] In a semiconductor substrate 700 containing a drift zone layer 731, transistor cells TC are formed on the front face between a main surface 701 and the drift zone layer 731. The transistor cells TC contain gate electrodes 155 that can extend from the main surface 701 into the drift zone layer 731 between body regions 120. The trench gate structures 150 can comprise a conductive gate electrode 155 and a gate dielectric 159 that separates the gate electrode 155 from the body regions 120. Source regions 110 directly adjoin at least one side wall of the trench gate structures 150. The body regions 120 separate the source regions 110 from the drift zone layer 731, forming first pn junctions pn1 with the drift zone layer 731 and second pn junctions pn2 with the source regions 110.

[0093] A field stop layer 737 can be formed between the drift zone layer 731 and a back surface 702 opposite the main surface 701, wherein the mean net dopant concentration in the field stop layer 737 is at least twice, for example at least ten times, the mean dopant concentration in the drift zone layer 731. The field stop layer 737 can be spaced apart from the back surface 702 or can be directly adjacent to the back surface 702.

[0094] Dopants with a conductivity type opposite to that of the drift zone layer 731 are implanted from the back side through the back surface 702 to form an emitter layer 739, whereby an implantation angle is changed stepwise or continuously during ion implantation as discussed above. The process can be continued by forming a back-side metallization and cutting the semiconductor substrate 700 along scribe lines to obtain a large number of identical semiconductor chips.

[0095] Fig. Figure 14A shows a semiconductor device 500 which consists of a semiconductor substrate 700. Fig. 13 can be a retained, reverse-blocking IGBT. The body regions 120 and the source zones 110 are electrically connected or coupled to a second load electrode 320, which forms an emitter terminal E or can be electrically connected to one. A drift zone 131 is separated from a region of the drift zone layer 731 by Fig. 13 formed, and a field stop zone 137 is formed by an area of ​​the field stop layer 737 of Fig. 13 formed.

[0096] A highly doped contact area 139 contains a hole emitter on the back side of the semiconductor device 500, wherein the hole emitter is formed from the emitter layer 739 of Fig. 13 and results from a stepwise or continuously changing implantation angle. A vertical extent v4 of the emitter layer 739 can be in a range of 100 nm to 3 µm, or from 200 nm to 2 µm, or even from 250 nm to 1 µm. If the hole emitter is not completely healed, it contains a comparatively large number of crystal defects and interstitial dopant atoms, thus reducing the hole emitter efficiency.

[0097] In Fig. Figure 14B shows line 461, the vertical dopant profile for donors, and line 462, the vertical dopant profile for acceptors. The donor concentration N A(z) can have one or more peaks. A distance d2 between the peak closest to the second surface 102 and the second surface can, for example, be in a range of 500 nm to 10 µm, or from 1 µm to 8 µm, or from 2 µm to 5 µm to the pn junction formed between the field stop zone 137 and the contact region 139. A small distance d2 between the peak of a donor concentration N A (z) and the pn junction and the not fully cured emitter layer allows for a further degree of freedom to design the saturation voltage V CSAT and insensitivity to short circuits.

[0098] Fig. 15A to 15E refer to a method for forming a superjunction structure using ion implantation at a stepwise or continuously changing implantation angle.

[0099] An initial ion implantation with a continuously or stepwise changing implantation angle, as described above, can introduce acceptor ions into a region of a lightly doped layer 750 in a semiconductor substrate 700.

[0100] Fig. Figure 15A shows the semiconductor substrate 700 and a superjunction layer 780 containing the implanted acceptors. The lightly doped layer 750 can be an epitaxial layer formed on a highly doped base substrate 705. An unaffected lower section 733 of the lightly doped layer 750 may not contain acceptors to a significant extent and may separate the superjunction layer 780 from a highly doped base substrate 705.

[0101] A second ion implantation with a continuously or stepwise changing implantation angle, as described above, introduces donors into the superjunction layer 780, where an angular span Δθ2 of the second ion implantation may be equal to or different from an angular span Δθ1 of the first implantation.

[0102] As in Fig. As illustrated in Figure 15B, after the second ion implantation, the superjunction layer 780 contains both acceptors and donors. Trenches 735 are etched into the semiconductor substrate 700 from the front side.

[0103] According to Fig. At 15C, the trenches 735 can extend from the main surface 701 into the superjunction layer 780. The trenches 735 can extend through the superjunction layer 780, exposing the lower section 733 of the drift layer 730. Residual areas of the semiconductor substrate 700 between the trenches 735 form columnar structures 753. A deposition process, e.g., an epitaxial process, can fill the trenches 735 with crystalline semiconductor material 736.

[0104] Fig. Figure 15D shows the semiconductor material 736, which fills the trenches 735 of Fig. 15C fills. The semiconductor material 736 can be intrinsically doped or can be lightly doped with an average dopant concentration less than 1E13 cm⁻¹. -3 or less than 5E13 cm -3During heat treatment, the acceptors and donors diffuse from the columnar structures 753 into the semiconductor material 736. Different diffusion coefficients for the acceptors and donors result in a partial separation of the acceptors and donors, so that after the heat treatment, the slower acceptors and donors outnumber the faster ones in the columnar structures 753, and the faster ones outnumber the slower ones in the semiconductor material 736.

[0105] Fig. Figure 15E shows the resulting superjunction structure with p-type columns 734 resulting from a local excess of acceptors and n-type columns 754 resulting from a local excess of donors. Since the initial distribution and number of acceptors and donors are determined by a precisely controllable ion implantation process, the manufacturing yield is high, and fluctuations in device parameters dependent on dopant profile details and concentration within the superjunction structure are reduced. The variable implantation angle provides a very uniform dopant profile along the vertical direction, and ripple in the vertical dopant profile is minimal in both the p-type and n-type columns 734.

[0106] Fig. Figure 16A shows a semiconductor device 500 with a drift structure 130 containing a superjunction structure 180, which can partially or completely replace a conventional drift zone. The superjunction structure 180 comprises p-doped columns 181, which are made up of the p-type columns 734 of Fig. 15E can result, and further comprises n-doped columns 182, which are derived from the n-type columns 754 of Fig. 15E can be formed. The semiconductor device 500 can be, for example, an MCD, a MOSFET, or an IGBT. For further details, refer to the semiconductor device of Fig. referred to 12B.

[0107] According to another embodiment, the superjunction structure 180 can be formed by two successive masked ion implantations at a continuously changing implantation angle. A donor ion implantation utilizes a first implantation mask with first mask openings, and an acceptor ion implantation utilizes a second mask with second mask openings. The first and second mask openings can be strip-shaped. With respect to the semiconductor substrate, the second mask openings are formed between the first mask openings.

[0108] Fig. Figure 16B shows a horizontal donor profile 481 and a horizontal acceptor profile 482 in the superjunction structure 180 of Fig. 16A.

[0109] Fig. 16C shows a vertical donor profile 483 and Fig. 16D a vertical acceptor profile 484 in the superjunction structure 180 of Fig. 16A.

[0110] Within the n-doped columns 182, the ratio between local maxima and local minima of the vertical donor profile 483 can, for example, be in a range of 1.03 to 20, or 1.05 to 5, or 1.1 to 3. Within the p-doped columns 181, the ratio between local maxima and local minima of the vertical acceptor profile 484 can, for example, be in a range of 1.03 to 20, or 1.05 to 5, or 1.1 to 3.

[0111] Fig. 17A to 17C refer to the formation of germanium-doped layers in silicon-based semiconductor substrates.

[0112] According to Fig. In 17A, germanium is ion-implanted through a main surface 701 on a front face of a silicon semiconductor substrate 700. The semiconductor substrate 700 can contain a lightly or heavily doped silicon layer 760. The germanium ions are implanted into a first substrate section 762, which is directly adjacent to the main surface 701, with the implantation angle changing continuously or in steps. A second substrate section 761 can remain unaffected.

[0113] Fig. Figure 17B shows the vertical germanium profile 471 along a line BB of Fig. 17A after ion implantation. The germanium concentration NGe(z) can be equal to a maximum value NGEmax over a distance d3, where the distance d3 can be at least 100 nm, for example at least 500 nm. The region of high germanium content can be directly adjacent to the main surface 701. Beyond the distance d3, the germanium content can decrease continuously over a vertical distance d4, which can be at least 100 nm, for example at least 500 nm.

[0114] In Fig. From 18A to 18B, the implantation forms a zone in which the germanium content increases steadily over a distance d5, where the distance d5 can be at least 100 nm, for example at least 500 nm, or equal to d4. The germanium concentration along and near the main surface 701 can be zero or insignificant.

[0115] The germanium-containing first substrate section 762 relaxes a mechanical stress which can be induced by a layer formed, for example, by epitaxy on the main surface 701 and which differs significantly from the second substrate section 761 with respect to dopant content.

[0116] Fig. Figure 19 shows a semiconductor device 500 with a drift structure 130, which includes a voltage relaxation layer 190. The voltage relaxation layer 190 is formed from the germanium-containing first substrate section 762 of Fig. 17A or Fig. 18A formed. The semiconductor device 500 can, for example, be a MOSFET. For further details, refer to the semiconductor device of Fig. referred to 12B.

[0117] The stress-relieving layer 190 is formed between or can overlap with at least one of the highly doped contact area 139, the field-stop zone 137, and the drift zone 131. The germanium-containing layer reduces the mechanical stress between the highly doped contact area on one side and the less doped field-stop zone 137 and drift zone 131 on the other side.

[0118] Fig. 20A to 20E refer to the formation of a buried oxide layer using a SIMOX (separation by implantation of oxygen) approach.

[0119] A mask layer is deposited on a main surface 701 of a semiconductor substrate 700 and structured by photolithography to form an implantation mask 420 with mask openings 425 that expose the semiconductor substrate 700.

[0120] According to the embodiment of Fig. 20A contains the implantation mask 420 with strip-shaped mask openings 425 that expose the main surface 701. The width and spacing between some or all of the mask openings 425 can be adjusted depending on the angle of inclination of the oxygen ion implantation to allow a continuous oxide layer between adjacent mask openings. In some areas, the oxide layer can also be omitted. The implantation mask 420 can, for example, consist of or contain a silicon nitride layer, a silicon oxide layer, a silicon oxynitride layer, a photoresist layer, or a combination thereof.Ion implantation at a stepwise or continuously changing implantation angle introduces oxygen atoms through the strip-shaped mask openings 425, whereby the oxygen ions come to rest in an oxygen-containing zone 774 around the projected range, which can be swept along the vertical direction with the implantation angle.

[0121] Fig. Figure 20B shows the oxygen-containing zone 774, which is formed at a distance from the main surface 701. Between the main surface 701 and the oxygen-containing zone 774, the implanted oxygen ions pass through first regions 776, in which the passing oxygen ions damage the crystal lattice of the semiconductor substrate 700 to a certain extent. Tapering second regions 778 under the implantation mask 420 remain unaffected.

[0122] The implantation mask 420 can be removed, and a heat treatment creates the buried silicon oxide layer 775 from the oxygen-containing zone 774 of Fig. 19B.

[0123] Fig. Figure 20C shows the buried silicon oxide layer 775 and the main surface 701 exposed by removing the implantation mask 420. An epitaxial layer 779 can be formed on the main surface 701.

[0124] Fig. Figure 20D shows the epitaxial layer 779. Since the silicon crystal is undamaged in the second regions 778, the epitaxial layer 779 grows with high crystal quality and can laterally overgrow the damaged first regions 776, whose lateral width is defined by the width w1 of the strip-shaped mask openings 425.

[0125] Fig.Figure 20E shows another example of an implantation mask 420, which includes a grid-like mask opening 425. The oxygen implantation can comprise two phases, with the semiconductor substrate 700 being rotated by 90° in the horizontal plane between the first and second phases.

Claims

[1] Implantation device comprising: a scan assembly (950) configured to perform a relative movement between an ion beam (910) and a semiconductor substrate (700) along a first linear scan direction (951) and along a second scan direction (952) that is orthogonal to the first scan direction (951); a tilting assembly (960) configured to change an inclination angle θ between a beam axis (912) of the ion beam (910) and a normal (704) to a principal surface (701) of the semiconductor substrate (700) from a first inclination angle θ1 to a second inclination angle θ2, wherein an angular range Δθ between the first inclination angle θ1 and the second inclination angle θ2 is at least 5°; and a control unit (990) configured to control the tilt assembly (960) to continuously change the tilt angle θ during the relative movement between the ion beam (910) and the semiconductor substrate (700), wherein a change in the tilt angle θ is synchronized with a scan along the first scan direction (951) and / or with a scan along the second scan direction (952). [2] Implantation device according to claim 1, wherein the scan assembly (950) comprises a deflection unit (955) configured to deflect the ion beam (910) along the first scan direction (951) and along the second scan direction (952). [3] Implantation device according to claim 2, wherein a scan speed along the first scan direction (951) is greater than a scan speed along the second scan direction (952) and wherein the control unit (990) is configured to synchronize the change in the tilt angle θ with the scan along the second scan direction (952). [4] Implantation device according to claim 1, wherein the scan assembly (950) comprises i) a deflection unit (955) configured to deflect the ion beam (910) along the first scan direction (951), and ii) a table assembly (956) configured to move the semiconductor substrate (700) along the second scan direction (952). [5] Implantation device according to any one of claims 1 to 4, wherein the control unit (990) is configured to change a dose of the ion beam (910) as a function of the tilt angle θ. [6] Implantation device according to any one of claims 1 to 4, further comprising an ion source (905) configured to generate the ion beam (910) from nitrogen, aluminium, arsenic, phosphorus, boron, selenium, germanium, oxygen and / or sulfur ions. [7] Method for manufacturing semiconductor devices, the method comprising: Directing an ion beam (910) towards a main surface (701) of a semiconductor substrate (700), wherein a relative movement between the semiconductor substrate (700) and the ion beam (910) results in the ion beam (910) scanning the main surface (701); and continuous change, during the relative motion, of an inclination angle θ between a beam axis (912) of the ion beam (910) and a normal (704) to the main surface (701) from a first inclination angle θ1 to a second inclination angle θ2, wherein an angular span Δθ between the first inclination angle θ1 and the second inclination angle θ2 is at least 5°, wherein ions implanted by the ion beam (910) form a doped layer extending from a first horizontal junction (j1) parallel to the main surface (701) to a second horizontal junction (j2) parallel to the main surface (701), and wherein the doped layer forms a drift layer (730) and the first horizontal junction (j1) a pn junction, or the doped layer forms a field-stopping or charge-compensating layer (738) or a hole-emitter layer of an insulated-gate bipolar transistor. [8] Method according to claim 7, wherein a deflection unit (955) deflects the ion beam (910) along a horizontal first scan direction (951) and along a horizontal second scan direction (952) which is inclined to the first scan direction (951). [9] Method according to claim 7, wherein a deflection unit (955) deflects the ion beam (910) along a horizontal first scan direction (951) and a table assembly (956) moves the semiconductor substrate (700) along a horizontal second scan direction (952) which is inclined to the first scan direction (951). [10] Method according to one of claims 8 and 9, wherein a scan speed along the first scan direction (951) is set greater than a scan speed along the second scan direction (952) and wherein the tilt angle θ is varied over the angular range Δθ during a single ion implantation process which includes a plurality of up and down sweeping movements of the ion beam (910) along the second scan direction (952). [11] Method according to any one of claims 7 to 10, wherein an implantation dose D(θ,t) of the ion beam (910) is controlled as a function of the tilt angle θ(t). [12] Method according to claim 11, wherein D(θ,t) = D0 / cos(θ(t)) is, where D0 is equal to the implantation dose at θ = 0°. [13] Method according to any one of claims 7 to 12, wherein the semiconductor substrate (700) comprises a silicon carbide crystal. [14] Method according to any one of claims 7 to 12, further comprising forming, prior to directing the ion beam (910) onto the semiconductor substrate (700), an implantation mask (420) on the main surface (701).

Images