X-RAYS DETECTOR DEVICE

Abstract

X-ray detector device (100), comprising: a switching section (102); and a photodetector section (101) which is connected to the switching section (102), wherein the photodetector section (101) has a lower electrode (206), a semiconductor region (207) formed above the lower electrode (206), and an upper electrode (208a) formed above the semiconductor region (207), and an area of ​​the upper electrode (208a) is smaller than an area of ​​a top surface of the semiconductor region (207), where a value obtained by dividing a first length (L1) between an edge (La) of the upper electrode (208a) and an edge (Lb) of the semiconductor region (207) by a height (h) of the semiconductor region (207) lies in a range of 1 / 1.2 to 1 / 0.8.

Description

BACKGROUND area

[0001] Exemplary embodiments relate to an X-ray detector device. Description of the related technology

[0002] According to X-ray diagnostic procedures widely used in medical applications, an image is captured using an X-ray detection film, and a predetermined time period must be taken for the film to print in order to obtain the result of the image capture.

[0003] Recently, however, due to the rapid development of semiconductor technology, research and development have been undertaken regarding digital X-ray detectors (DXDs) using thin-film transistors (TFTs). Such digital X-ray detectors can provide a real-time diagnostic result as soon as an X-ray image is acquired, since the TFTs are used as switching devices.

[0004] In general, direct-type digital X-ray detectors are used to generate an image by detecting an electric current within a panel. A direct-type digital X-ray detector features a transparent electrode formed on an amorphous selenium (Se) layer, which is itself deposited on the top layer of a TFT array substrate. A pixel electrode of the TFT can detect a current corresponding to a charge level received by the Se layer. Additionally, the direct-type digital X-ray detector uses a p-intrinsic n (PIN) diode. In a direct-type digital X-ray detector, an increase in PIN diode leakage current can degrade image quality.

[0005] In PIN diodes, the electrode configuration is sensitive to leakage current characteristics. Specifically, the electric field can vary significantly depending on the angle of the PIN diode's sidewalls. Changes in the angle of the sidewalls can result in varying amounts of leakage current flowing through the PIN diode. This can consequently produce uneven display patterns, degrading the quality of the output images.

[0006] The following publications are cited as state of the art: KR 10 2012 0 136 574 A, US 4 692 782 A, KR 10 1 400 282 B1, US 2008 / 0 067 324 A1, US 2014 / 0 027 828 A1. SHORT DESCRIPTION

[0007] Various aspects of the exemplary embodiments of the present disclosure provide an X-ray detector device that is able to maintain a leakage current of a p-intrinsic-n (PIN) diode at a predetermined level, thereby preventing the image quality from deteriorating or improving the image quality.

[0008] The present invention provides an X-ray detector device according to claim 1. Further embodiments of the invention are described in the dependent claims.

[0009] In one or more embodiments, the outer edge of the upper electrode formed above the semiconductor area is arranged closer to a center of the semiconductor area than to the outer edge of the semiconductor area.

[0010] In one or more embodiments, the first length between the outer edge of the upper electrode and the outer edge of the semiconductor area corresponds to the height of the semiconductor area.

[0011] In one or more embodiments, the switching section includes a transistor having a source electrode, a gate electrode and a drain electrode, and the lower electrode is connected to the source electrode or the drain electrode of the transistor.

[0012] In one or more embodiments, the switching section comprises a transistor having a source electrode, a gate electrode and a drain electrode, wherein the X-ray detector device further comprises: a data line electrode connected to a data line which is connected to the drain electrode or the source electrode of the transistor; and a bias line electrode connected to the upper electrode and a bias line, wherein the data line electrode and the bias line electrode are made of the same material.

[0013] In one or more embodiments, the X-ray detector device further comprises a light-blocking film which is arranged in a position that overlaps the gate electrode of the switching section.

[0014] In one or more embodiments, the X-ray detector device further comprises: a bias control circuit connected to the radiation detector section and configured to apply a bias voltage to the radiation detector section; a gate control circuit configured to switch on the switching section by applying a gate signal to the switching section; and an integrated readout circuit configured to receive an output signal and generate an image signal in response to the gate signal via the switching section.

[0015] In one or more embodiments, the upper electrode is a transparent electrode.

[0016] In one or more embodiments, a region of an upper section of the semiconductor area is covered by the upper electrode and a side wall of the semiconductor area extends towards the lower electrode with reference to a vertical at an angle, such as a right angle, an acute angle or an obtuse angle.

[0017] According to exemplary embodiments, it is possible to keep the leakage current of the PIN diode at a constant level, thereby causing the occurrence of the leakage current to be uniform or substantially uniform. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The preceding and other tasks, features and advantages of the present disclosure will be better understood with reference to the following detailed description in conjunction with the accompanying drawings, which show: Fig. 1 a circuit diagram illustrating an exemplary configuration of an X-ray detector device according to exemplary embodiments; Fig. 2 A cross-sectional view illustrating an example of the radiation detector pixel used in the X-ray detector device that is in Fig. 1 is illustrated, is used; Fig. 3A to 3D cross-sectional views illustrating a method for manufacturing a radiation detector section according to one embodiment; Fig. 4 including (a) to (c) cross-sectional views illustrating examples of the shapes of the PIN diode according to one embodiment; Fig. 5 a conceptual view illustrating the direction of exemplary electrical paths occurring in the PIN diode according to exemplary embodiments; Fig. Sections 6A to 6E show cross-sectional views illustrating a method for manufacturing a radiation detector section according to exemplary embodiments; Fig. 7A and Fig. 7B are graphs that each represent an electric field generated with respect to the inclination of the side walls of a PIN diode; Fig. Figures 8A to 8C are cross-sectional views illustrating examples of the shape of the PIN diode according to one embodiment; Fig. 9 a conceptual view illustrating the direction of exemplary electrical paths occurring in the PIN diode according to exemplary embodiments; and Fig. 10 a cross-sectional view illustrating the relationship between the height and the first length of the PIN diode according to exemplary embodiments. DETAILED DESCRIPTION OF THE EXECUTION FORMS

[0019] The following section refers in detail to embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Throughout this document, reference should be made to the drawings in which the same numbers and symbols are used to identify identical or similar components. In the following description of the present disclosure, detailed descriptions of known functions and components included herein are omitted if they might render the subject matter of the present disclosure unclear.

[0020] It is further to be understood that, while terms such as "first," "second," "A," "B," "(a)," and "(b)" may be used herein to describe different elements, these terms are used merely to distinguish one element from another. The substance, sequence, order, or number of such elements is not limited by these terms. It is to be understood that when an element is referred to as "connected to" or "coupled with" another element, it may not only be "directly connected or coupled with" the other element, but it may also be "indirectly connected or coupled with" the other element via an "interposed" element.In the same context, it should be understood that when an element is referred to as "on" or "under" another element, it can not only be directly on or under the other element, but it can also be indirectly on or under the other element with an element placed in between.

[0021] Fig. Figure 1 is a circuit diagram illustrating an exemplary configuration of an X-ray detector device according to the exemplary embodiments of the present disclosure. All components of the X-ray detector device according to all embodiments of the present disclosure are operationally coupled and configured.

[0022] Referring to Fig. 1 comprises an X-ray detector device 100, a photodetector circuit 110, a bias control circuit 120, a gate control circuit 130 and an integrated readout circuit (IC) 140.

[0023] The photodetector circuit 110 can detect light generated by a scintillator upon receiving X-rays emitted by an X-ray generator and output an electrical detection signal from the detected light by means of photoelectric conversion. The photodetector circuit 110 can have a plurality of photodetector pixels P arranged in a matrix, each adjacent to points where a plurality of gate lines GL and a plurality of data lines DL intersect. The plurality of gate lines GL and the plurality of data lines DL can intersect, particularly at right angles. However, the present disclosure is not limited to this.Although the photodetector circuit 110 is illustrated such that it has, for example, sixteen (16) photodetector pixels P arranged in four columns and four rows, the present disclosure is not limited thereto and the number of photodetector pixels P and / or their arrangement may be varied.

[0024] Each of the photodetector pixels P can have a photodetector section 101 that outputs an electrical detection signal, for example a photodetector voltage, by detecting light generated in response to the X-rays by means of the scintillator, and a switching section 102 that transmits the electrical detection signal output by the photodetector section 101 in response to a gate signal output by means of the gate control circuit 130.

[0025] The photodetector section 101 detects light generated by the scintillator and outputs an electrical detection signal from the detected light via photoelectric conversion. The photodetector section 101 may include a device that converts the incident light into an electrical signal via a photoelectric effect. Additionally, the photodetector section 101 may include a p-intrinsic n (PIN) diode. The PIN diode has an undoped intrinsic semiconductor region between a p-type semiconductor region and an n-type semiconductor region.

[0026] The switching section 102 can transmit a detection signal output by the photodetector section 101. The switching section 102 can include a transistor, wherein one gate electrode of the transistor is electrically connected to a gate line from the plurality of gate lines GL, and one source electrode of the transistor is electrically connected to the readout IC 140 via a data line from the plurality of data lines DL. The bias control circuit 120 can be electrically connected to the photodetector section 101. In particular, the bias control circuit 120 can apply a bias voltage to the photodetector section 101 via a plurality of bias lines BL. The bias control circuit 120 can selectively apply a reverse bias or a forward bias to the photodetector section 101.

[0027] The gate control circuit 130 can sequentially apply gate signals, which have gate-on voltage levels, to the majority of gate lines GL. The switching section 102 of the photodetector pixel P can be switched on in response to a gate pulse. When a switching section 102 is switched on, a detection signal output by the photodetector section 101 can be input to the readout IC 140 via the switching section 102 and a data line DL. The gate control circuit 130 can be provided as an IC mounted on a surface of the photodetector circuit 110, or it can be provided as a printed circuit board, like the photodetector circuit 110, by thin-film processing.

[0028] The readout IC 140 can receive and output a detection signal generated by the switching section 102, which is activated in response to a gate signal. The readout IC 140 can read the detection signal and transmit it to a signal processing device, which in turn can digitize and output the detection signal. The digitized detection signal can then be fed to a separate display device as an image signal.

[0029] Fig. Figure 2 is a cross-sectional view illustrating an example of a photodetector pixel P in the X-ray detector device shown in Fig. 1 is illustrated, is used.

[0030] Referring to Fig. 2. The photodetector pixel P can be arranged in a pixel area consisting of a plurality of pixel areas defined by the intersections of the data lines DL and the gate lines GL, which are arranged on the photodetector circuit 110 of the X-ray detector device 100. Each of the photodetector pixels P can have a photodetector section 101, which converts a photoelectric signal into an electrical signal, and a switching section 102, which performs a switching operation to control the photodetector section 101. Additionally, the photodetector section 101 can have a PIN diode 206, 207, or 208a, while the switching section 102 can have a thin-film transistor (TFT) 201, 203, 204a, or 204b.

[0031] The TFT 201, 203, 204a, and 204b can comprise a gate electrode 201 connected to a gate line GL from a plurality of gate lines GL, an active layer 203 arranged on the gate electrode 201, a source electrode 204a connecting one end of the active layer 203 to a data line electrode 210a connected to a data line DL from a plurality of data lines DL, and a drain electrode 204b connected to the other end of the active layer 203. The drain electrode 204b can be connected to the photodetector section 101. The photodetector section 101 can be connected to a bias line electrode 210b, which is connected to a bias line BL from a plurality of bias lines BL, through which bias voltages are applied to control electrons or holes. The bias lines BL can be made of a metal.

[0032] The gate electrode 201 can be formed by depositing a gate metal onto a substrate 200 and structuring the deposited gate metal. The gate electrode 201 can be made of aluminum (Al), molybdenum (Mo), and / or alloys thereof, but is not limited to these materials. A gate insulation film 202 can be formed on the substrate 200, including the gate electrode 201. Additionally, an active layer 203 can be formed over the gate insulation film 202. The active layer 203 can comprise a first amorphous silicon layer undoped with impurities and a second amorphous silicon layer doped with n-type impurities. Additionally, the source electrode 204a and the drain electrode 204b can be formed over the active layer 203 by depositing and structuring a source / drain metal. The source / drain metal can comprise Al, Mo, and / or alloys thereof, but is not limited to these materials.A first insulating film 205 can be formed over the gate insulating film 202, including the source electrode 204a and the drain electrode 204b. Additionally, a lower electrode 206 of the photodetector section 101 can be formed over the first insulating film 205. The lower electrode 206 can be referred to as the cathode.

[0033] The first insulating film 205 can have a first contact hole Ch1 formed at a position overlapping the drain electrode 204b, the first contact hole Ch1 connecting the lower electrode 206 to the drain electrode 204b. The PIN diode 206, 207, and 208a can be formed on the first insulating film 205. The PIN diode 206, 207, and 208a can have the lower electrode 206 and a semiconductor region 207 in which an n-type semiconductor layer, an intrinsic semiconductor layer, and a p-type semiconductor layer are sequentially formed. An upper electrode 208a can be formed above the semiconductor region 207 of the PIN diode 206, 207, and 208a. The upper electrode 208a can be a transparent electrode. The upper electrode 208a can be an indium tin oxide (ITO) electrode. A second insulating film 209 can be formed over the upper electrode 208a. The upper electrode 208a can be referred to as the anode.

[0034] A second contact hole Ch2 can be formed at a position overlapping the source electrode 204a, extending through the first insulating film 205 and the second insulating film 209, so that the data line electrode 210a is connected to the source electrode 204a via the second contact hole Ch2. Additionally, a third contact hole Ch3 can be formed at a position overlapping the upper electrode 208a, and the bias line electrode 210b can be connected to the upper electrode 208a via the third contact hole Ch3. Additionally, a light-blocking film 210c can be formed over the second insulating film 209 at a position overlapping the gate electrode 201. The light-blocking film 210c prevents leakage current from flowing through the TFT 201, 203, 204a, and 204b. Additionally, a third insulating film 211 can be formed over the second insulating film 209.The data transmission electrode 210a, the bias transmission electrode 210b, and the light-blocking film 210c can be manufactured using the same process. The data transmission electrode 210a, the bias transmission electrode 210b, and the light-blocking film 210c can be made from the same material.

[0035] The Fig. Figures 3A to 3D are cross-sectional views illustrating a method of manufacturing a photodetector section according to an embodiment of the present disclosure.

[0036] The PIN diode 206, 207 and 208a of the photodetector section 101 can have the lower electrode 206 formed above the first insulating film 205, as shown in Fig. Figure 3A shows that the lower electrode 206 is parallel to a horizontal surface, but the present disclosure is not limited to this and may include other variations. The semiconductor region 207 may be formed above the lower electrode 206. The semiconductor region 207 may have a p-type semiconductor layer, an intrinsic semiconductor layer, or an n-type semiconductor layer. Although the upper surface of the semiconductor region 207 is shown parallel to the horizontal surface, the upper surface of the semiconductor region 207 may conform to the lower electrode 206.

[0037] As in Fig. As shown in Figure 3B, a top electrode metal 208 can be deposited over the semiconductor region 207. Additionally, the upper electrode 208a can be formed over the semiconductor region 207 by carrying out wet deposition, as shown in Figure 3B. Fig. Figure 3C shows that dry etching can be performed using the upper electrode 208a as a mask. By performing dry etching, the semiconductor region 207 can be etched to match the upper electrode 208a. Consequently, the PIN diode 206, 207, and 208a can be fabricated, including the upper electrode 208a, the lower electrode 206, and the semiconductor region 207 corresponding to the upper electrode 208a and the lower electrode 206. In the semiconductor region 207, the n-type semiconductor layer, the intrinsic semiconductor layer, and the p-type semiconductor layer can be formed sequentially over the lower electrode 206. For the PIN diode 206, 207, and 208a, as shown in Figure 3C, the following processes can be carried out: Fig. In 3D representation, the side walls of the semiconductor area 207 are designed to correspond to the edges of the upper electrode 208a.

[0038] However, in the PIN diodes 206, 207 and 208a, the sidewalls of the semiconductor area 207, which correspond to the photodetector pixels P, can have a variety of inclinations, as shown in Fig. Figure 4 illustrates the variations that occur during the dry etching process.

[0039] Referring to Fig. 4, the inclination of the side walls of the PIN diode 206, 207 and 208a can be as in (a) of the Fig. 4 shown 90°, as in (b) the Fig. 4 shown 45° or as in (c) the Fig. Figure 4 shows -45°. The angles used herein, such as 90°, 45°, and -45°, are for illustrative purposes only, and the inclination of the side walls is not limited to them. For example, the side walls of PIN diodes 206, 207, and 208a may extend toward the lower electrode 206 at an inclination that is an acute angle, an obtuse angle, or a right angle with respect to a vertical line.

[0040] Additionally, as in Fig. As shown in Figure 5, the PIN diodes 206, 207, and 208a can be formed between sections of the second insulating film 209, and electrical paths 30 can run between the upper electrode 208a and the lower electrode 206. If the electrical paths 30 run from the lower electrode to the upper electrode 208a, they pass through the semiconductor region 207. However, some electrical paths 31 and 32 can also pass through the second insulating film 209, so that in addition to the semiconductor region 207, a leakage current can flow through the second insulating film 209. If the inclination of the side walls of the semiconductor region 207 is not constant, as shown in Figure 5, the electrical paths 30 can pass through the semiconductor region 207. Fig. As shown in Figure 4, varying amounts of leakage current can flow through the second insulating film 209, thus varying the magnitude of the current flowing through the photodetector section 101. This varying current magnitude can cause different amounts of current to be transmitted to the readout IC 140 via the data lines DL. Consequently, it is possible that the readout IC 140 receives an uneven current and generates image signals based on this uneven current, which is problematic.

[0041] The Fig. Figures 6A to 6E are cross-sectional views illustrating a method for manufacturing a photodetector section according to an exemplary embodiment.

[0042] As in Fig. As shown in Figure 6A, the semiconductor region 207 can be formed above the lower electrode 206. Although the lower electrode 206 is shown to be parallel to a horizontal surface, it is not limited to this and can have other variations. The semiconductor region 207 can have a p-type semiconductor layer, an intrinsic semiconductor layer, or an n-type semiconductor layer. Although the upper surface of the semiconductor region 207 is shown to be parallel to a horizontal surface, the upper surface of the semiconductor region can be adapted to the lower electrode 206 or can have other variations.

[0043] As in Fig. As illustrated in Figure 6B, the top electrode metal 208 can be formed over the semiconductor region 207. The top electrode metal 208 can be ITO. If wet forming is performed, the top electrode 208a can be formed over the semiconductor region 207, as shown in Figure 6B. Fig. Figure 6C illustrates this. Additionally, if the semiconductor region 207 is dry-etched using a mask, the semiconductor region 207 corresponding to the upper electrode 208a can be etched. Consequently, the PIN diode 206, 207, and 208a can be formed, including the upper electrode 208a, the lower electrode 206, and the semiconductor region 207 corresponding to the upper electrode 208a and the lower electrode 206.

[0044] As in Fig. As illustrated in Figure 6D, the PIN diodes 206, 207, and 208a can be configured such that their sidewalls correspond to the edges of the upper electrode 208a. The sidewalls of the PIN diodes 206, 207, and 208a, which correspond to each of the photodetector pixels P, can have the shapes shown in Figure 6D. Fig. Figure 4 shows the variations due to the deviations that occur during the dry etching process.

[0045] Additionally, the upper electrode 208a can be wet-etched. When the upper electrode 208a is wet-etched, its size can be reduced by the etching process. The term "size" used herein may refer to the surface area of ​​the upper electrode 208a. However, the present disclosure is not limited to this, and both the surface area and the height can be reduced.

[0046] If the upper electrode 208a is wet-etched, the size of the upper electrode 208a can be reduced so that it is smaller than the size of the upper surface of the PIN diodes 206, 207 and 208a, as shown in Fig. Figure 6E illustrates this. The distance between the outer edge La of the upper electrode 208a and the outer edge Lb of the semiconductor region 207 can be called the first length L1. Additionally, the outer edge La of the upper electrode 208a and the outer edge Lb of the semiconductor region 207 can be parallel to each other.

[0047] The Fig. 7A and Fig. Figure 7B shows graphs representing corresponding electric fields generated with respect to the inclination of the side walls of a PIN diode. The horizontal axes denote a length between the outer edge La of the upper electrode 208a and the outer edge Lb of the semiconductor area 207, while the vertical axis denotes the intensity of the electric field.

[0048] Additionally represents Fig. 7A a case where the thickness of PIN diode 206, 207 and 208a is 5000 Å (500 nm), while Fig. 7B represents a case where the thickness of PIN diode 206, 207 and 208a is 10,000 Å (1000 nm).

[0049] Referring to the Fig. 7A and Fig. 7B, it is acknowledged that the intensity of the electric field applied to the upper electrode 208a and the lower electrode 206 of the PIN diode 206, 207 and 208a varies depending on the length between the outer edge La of the upper electrode 208a and the outer edge Lb of the semiconductor area 207. Referring to Fig. 7A acknowledges that the electric field is saturated when the length between the outer edge La of the upper electrode 208a and the outer edge Lb of the semiconductor area 207 is 0.5 µm. Referring to Fig. 7B acknowledges that the electric field is saturated when the length between the outer edge La of the upper electrode 208a and the outer edge Lb of the semiconductor area 207 is 1 µm.

[0050] Consequently, as the distance between the outer edge La of the upper electrode 208a and the outer edge Lb of the semiconductor region 207 increases, the intensity of the electric field simply saturates. The smaller the area of ​​the upper electrode 208a is compared to the area of ​​the upper section of the semiconductor region 207, the more uniformly the amount of current flowing from the lower electrode 206 to the upper electrode 208a can be maintained.

[0051] The Fig. Figures 8A to 8C are cross-sectional views illustrating examples of the shapes of the PIN diode according to an embodiment of the present disclosure.

[0052] Referring to the Fig. 8A to 8C, the sidewalls of the semiconductor region 207 of the PIN diodes 206, 207 and 208a can have a variety of inclinations during the dry etching process. For example, the inclination of the sidewalls of the semiconductor region 207 can be as shown in Fig. 8A shown should be 90° as shown in Fig. 8B shown as 45° or can be as in Fig. 8C is shown as -45°. The angles used herein, such as 90°, 45° and -45°, are for illustrative purposes only and the inclination of the side walls is not limited to these and may vary.

[0053] Additionally, the upper electrode 208a can be designed to be shorter than the length of the upper section of the semiconductor region 207, regardless of the inclination of the side walls of the semiconductor region 207.

[0054] Therefore, the semiconductor area 207, which each of the photodetector sections of a plurality of photodetector circuits has, can be configured such that its upper section is covered with the upper electrode 208a and its side walls extend towards the lower electrode 206 with reference to the vertical at an angle, such as a right angle, an acute angle or an obtuse angle.

[0055] Additionally, as in Fig. As shown in Figure 9, the PIN diode 206, 207, and 208a can be formed between sections of the second insulating film 209, and electrical paths 30 can run between the upper electrode 208a and the lower electrode 206. If the area of ​​the upper electrode 208a is smaller than the area of ​​the semiconductor region 207, and the outer edge La of the upper electrode 208a is closer to the central section of the PIN diode 206, 207, and 208a than the outer edge Lb of the semiconductor region 207, and if the electrical paths 30 run from the lower electrode 206 to the upper electrode 208a, a leakage current will flow only through the semiconductor region 207 without passing through the second insulating film 209. This can consequently reduce the amount of leakage current, allowing a constant amount of current to be detected by the photodetector section 101.Although the inclination of the side walls of the semiconductor region 207 of the PIN diode 206, 207 and 208a has been described herein as being 90°, the present disclosure is not limited to this and may include other variations. Additionally, if the outer edge of the upper electrode 208a is closer to the central section of the PIN diode 206, 207 and 208a than the outer edge of the semiconductor region 207, regardless of the inclination of the side walls of the semiconductor region 207, the amount of leakage current flowing through the second insulating film 209 can be reduced so that a constant amount of current can be detected by the photodetector section 101.

[0056] Fig. Figure 10 is a cross-sectional view illustrating the relationship between the height and the first length of the PIN diode according to the example in the present disclosure.

[0057] Referring to Fig. 10. Levels of output sensitivity are measured with respect to the relationship between the height h and the first length L1 of the PIN diodes 206, 207, and 208a. Although the height of the PIN diodes 206, 207, and 208a has been described as being the height of the semiconductor region 207, the present disclosure is not limited to this and may include other variations. The lower electrode 206 and the upper electrode 208a may have very small heights, so that the height of the PIN diodes 206, 207, and 208a includes the heights of the lower electrode 206 and the upper electrode 208a. Table 1 1 2 3 4 5 8 7 8 9 1 te Length (L1) +3570Å +2540Å +100Å 0Å -5520Å -7143Å -10300Å -11800Å -13200Å Ausgabe (LSB) 5500 5000 3500 2800 2350 2150 2000 1900 1700

[0058] In Table 1 above, the symbol “+” indicates that the area of ​​the upper electrode 208a is larger than the area of ​​the semiconductor region 207 of the PIN diode 206, 207 and 208a, so that the upper electrode 208a exposes the edge region Lb of the semiconductor region 207 of the PIN diode 206, 207 and 208a; the symbol “0” indicates that the area of ​​the upper electrode 208a is the same as the area of ​​the semiconductor region 207 of the PIN diode 206, 207 and 208a; and the symbol “-” indicates that the area of ​​the upper electrode 208a is smaller than the area of ​​the semiconductor region 207, so that the edge La of the upper electrode 208a is closer to the center of the PIN diode 206, 207 and 208a. Additionally, the measurement was performed when the height h of the semiconductor area 207 was 10,000 Å (1000 nm). In this case, a normal output value, generated by detecting a current, was 2000 LSB (Least Significant Bit).

[0059] It is acknowledged that if the height h of the semiconductor area was 10,000 Å (1000 nm) and the first length was in the range from 7143 Å (714.3 nm) to 11,800 Å (1180 nm), the output value ranged from 2150 LSB to 1900 LSB.

[0060] Accordingly, the invention provides that a value obtained by dividing the first length L1 between the outer edge La of the upper electrode 208a and the outer edge Lb of the semiconductor area 207 by the height h of the semiconductor area 207 lies in a range of 1 / 1.2 to 1 / 0.8.

Claims

X-ray detector device (100) comprising: a switching section (102); and a photodetector section (101) connected to the switching section (102), wherein the photodetector section (101) comprises a lower electrode (206), a semiconductor region (207) formed above the lower electrode (206), and an upper electrode (208a) formed above the semiconductor region (207), and an area of ​​the upper electrode (208a) being smaller than an area of ​​a top surface of the semiconductor region (207), wherein a value obtained by dividing a first length (L1) between an edge (La) of the upper electrode (208a) and an edge (Lb) of the semiconductor region (207) by a height (h) of the semiconductor region (207) is in a range of 1 / 1.2 to 1 / 0.

8. X-ray detector device (100) according to claim 1, wherein the edge (La) of the upper electrode (208a) which is arranged above the semiconductor area (207) is arranged closer to a center of the semiconductor area (207) than the edge (Lb) of the semiconductor area (207). X-ray detector device (100) according to claim 2, wherein the first length (L1) between the edge (La) of the upper electrode (208a) and the edge (Lb) of the semiconductor area (207) corresponds to the height (h) of the semiconductor area (207). X-ray detector device (100) according to one of claims 1 to 3, wherein the switching section (102) has a transistor having a source electrode (204a), a gate electrode (201), and a drain electrode (204b), and the lower electrode (206) is connected to the source electrode (204a) or the drain electrode (204b) of the transistor. X-ray detector device (100) according to any one of claims 1 to 3, wherein the switching section (102) comprises a transistor having a source electrode (204a), a gate electrode (201) and a drain electrode (204b), the X-ray detector device further comprising: a data line electrode (210a) connected to a data line connected to the drain electrode (204b) or the source electrode (204a) of the transistor; and a bias line electrode (210b) connected to the upper electrode (208a) and a bias line, wherein the data line electrode (210a) and the bias line electrode (210b) are made of the same material. X-ray detector device (100) according to claim 5, further comprising a light-blocking film (210c) arranged in a position that overlaps the gate electrode (201) of the switching section (102). X-ray detector device (100) according to any one of claims 1 to 6, further comprising: a bias control circuit (120) connected to the photodetector section (101) and configured to apply a bias voltage to the photodetector section (101); a gate control circuit (130) configured to switch on the switching section (102) by applying a gate signal to the switching section (102); and an integrated readout circuit (140) configured to receive a signal output by the switching section (102) in response to the gate signal and to generate an image signal. X-ray detector device (100) according to one of claims 1 to 7, wherein the upper electrode (208a) is a transparent electrode. X-ray detector device (100) according to any one of claims 1 to 8, wherein a region of an upper section of the semiconductor area (207) is covered with the upper electrode (208a) and a side wall of the semiconductor area (207) extends towards the lower electrode (206) with respect to a vertical at an angle, such as a right angle, an acute angle or an obtuse angle.

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