Slave device, bus system and procedure

DE102019125493B4Active Publication Date: 2025-03-20INFINEON TECHNOLOGIES AG
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Patent Information

Application Number
DE102019125493
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Filing Date
2019-09-23
Publication Date
2025-03-20
Estimated Expiration
2039-09-23

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Abstract

Procedure, comprehensive: in a slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D), -Receiving an initialization signal, -In response to the initialization signal, send an identification of the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) via a bus (13; 53; 63), check if a collision occurs on the bus (13; 53; 63) when sending the initialization identification, -If a collision occurs, the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) is put into an inactive state, and -if no collision occurs, receiving an address for the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) after sending the identification, wherein checking whether a collision exists on the bus (13; 53; 63) is based on a signal on a transmit line (TxD) of the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D), and wherein the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) uses a push-pull driver to send the identification, wherein one push transistor or push-pull transistor of the push-pull driver is weaker than the other of the push transistor or pull transistor.
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Description

TECHNICAL FIELD

[0001] This application relates to slave devices, bus systems and corresponding methods. BACKGROUND

[0002] Bus systems enable communication between multiple bus devices. One application example is sensor systems in which multiple sensors communicate as slave devices with a control unit as the master device, for example, in an automotive system. In some applications, it is necessary to assign unique addresses to the various sensors so that the control unit can control the sensors individually via a common bus.

[0003] In some conventional approaches, such addresses are often permanently assigned to slaves, such as sensors, at the end of production or during configuration when setting up a bus system. Accordingly, preconfigured slave devices are used. This is relatively inflexible and can be very complex to implement in cases where multiple sensors share a single physical interface.

[0004] EP 3 016 351 A1 discloses an address assignment in a bus system in which multiple slaves simultaneously transmit an identification signal during system startup. If a collision is detected, it is identified based on dominant and recessive states on the bus, and one of the slaves is excluded from initialization.

[0005] Further possibilities for address assignment in a bus system are known from DE 10 2013 225 706 A1, DE 10 2010 041 810 A1 or WO 2014 / 037 404 A1. SUMMARY

[0006] A method according to claim 1, a slave device according to claim 10 and a system according to claim 17 are provided. The subclaims define further embodiments.

[0007] According to one embodiment, a method is provided, comprising: in a slave facility, - Receiving an initialization signal, - in response to the initialization signal, sending an identification of the slave device via a bus, checking whether a collision occurs on the bus when sending the initialization identification, - if a collision occurs, setting the slave device to an inactive state, and - if no collision occurs, receiving an address for the slave device after sending the identification, wherein checking whether a collision occurs on the bus is based on a signal on a transmit line of the slave device, and wherein the slave device uses a push-pull driver to send the identification, wherein one push transistor or push-pull transistor of the push-pull driver is weaker than the other of the push transistor or pull transistor.

[0008] According to a further embodiment, a slave device is provided, comprising: a communication circuit for sending signals to a bus and for receiving signals from a bus, wherein the slave device is arranged to: - Receiving an initialization signal, - in response to the initialization signal, sending an identification of the slave device via a bus, checking whether a collision occurs on the bus when sending the identification, - if a collision occurs, setting the slave device to an inactive state, and - if no collision occurs, receiving an address for the slave device after sending the identification, wherein the checking whether a collision exists on the bus is carried out on the basis of a signal on a transmission line of the slave device, and wherein the slave device for sending the identification comprises a push-pull driver, wherein one push transistor or push-pull transistor of the push-pull driver is weaker than the other of the push transistor or pull transistor.

[0009] The above summary serves merely as a brief overview of some embodiments and is not to be construed as limiting. In particular, other embodiments may include features other than those discussed above. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a diagram of a bus system according to one embodiment. Fig. 2 is a flowchart illustrating methods according to some embodiments. Fig. 3 shows examples of signals to illustrate embodiments. Fig. 4 shows a driver circuit with collision detection as used in some embodiments. Fig. 5 shows a diagram of a system according to another embodiment. Fig. 6 shows a diagram of a system according to another embodiment. Fig. 7 shows example signals to illustrate some embodiments. DETAILED DESCRIPTION

[0010] Various embodiments are explained in detail below. These embodiments are for illustrative purposes only and are not to be interpreted as limiting. Thus, in the described embodiments, features or components may be replaced by alternative features or components, or even omitted. In addition to the described features and components, further features or components may also be present.

[0011] In particular, the exemplary embodiments described below primarily relate to address assignment to slave devices of a bus system during initialization. Other features of the communication system, such as signaling details, protocols used, and the like, can be implemented in any conventional manner known for bus systems and are therefore not specifically explained. For example, in some exemplary embodiments, communication can take place via a CAN bus, and apart from the described address assignment and associated features and components, communication can take place as in conventional communication via a CAN bus.

[0012] Features and components of different embodiments may be combined. For example, variations and modifications described for one embodiment may also be applied to other embodiments and will therefore not be explained repeatedly.

[0013] The Fig. 1 shows a block diagram of a system 10 according to an embodiment. The system of Fig. 10 comprises a master device 11 and a plurality of slave devices 12 connected via a bus 13. Three slave devices 12A, 12B, 12C are shown as an example. The number of three slave devices 12 is merely an example, and a different number of slave devices may be provided. The bus 13 may be any wired bus, for example, a CAN bus, a FlexRay bus, or the like. The bus 13 may be provided in various configurations, for example, a star configuration, another branched configuration such as the illustrated component, a daisy chain configuration, and the like.

[0014] In some embodiments, as will be explained in more detail later, multiple slave devices may also be arranged in a cluster. As an example, slaves 12A and 12B are arranged in a cluster 14 that has a single connection for bus 13. Conversion from bus 13 to another communication mode may occur within cluster 14. Examples of this will also be explained in more detail later.

[0015] In some embodiments, the slave devices 12 are sensors, and the master device 11 is a control unit. In some embodiments, the system 10 is arranged in a vehicle, for example, a motor vehicle. In this case, the slave devices 12 can be, for example, sensors of the motor vehicle. The master device can also be referred to as "master" for short, and slave devices can be referred to as "slaves" for short.

[0016] In an initialization phase of the system 10, the master device 11 assigns addresses to the slave devices 12 in order to be able to address each of them separately, for example, in the case of sensors, to be able to specifically read or control individual sensors. A method for such address assignment according to some embodiments will now be described with reference to Fig. 2. The procedure of Fig. 2 can, for example, in the system 10 of Fig. 1 or subsequent systems, and for better understanding is described with reference to the Fig. 1. The procedure of Fig. 2 can also be carried out in other systems.

[0017] The procedure of Fig. 2 starts at 20. At 21 a master device, for example master device 11 on Fig. 1, an initialization signal via the bus, for example bus 13 of the Fig. 1. The initialization signal signals the slave devices, for example the slave devices 12 of the Fig. 1, indicating that initialization is now beginning. The initialization signal can be any predetermined signal sequence, for example, a predetermined sequence of values ​​corresponding to a logical 0 and values ​​corresponding to a logical 1, which allows the slave devices to recognize that initialization is now about to begin.

[0018] The slave devices 12 all have a predetermined identification (identification), which was programmed, for example, during manufacture. In some embodiments, a unique 32-bit sequence can be used, although other sequence lengths are also possible. A possible number of different identifications is selected such that each manufactured slave device can be assigned a unique identification. Different ranges of identifications can be reserved for different manufacturers of slave devices.

[0019] At 22, all slaves respond simultaneously with their assigned identification. For example, all slaves send the bit sequence assigned to them.

[0020] In exemplary embodiments, a communication protocol is used which has two possible levels on the bus, which are assigned to a logical 0 and a logical 1. One of the levels is dominant over the other level, i.e. if different bus participants drive different levels, the dominant level "wins". In CAN buses, for example, this can be implemented by actively driving one of the levels (in this case, a voltage difference between the bus lines above a threshold corresponding to a logical 0), while the other value corresponds to a voltage difference at or close to 0, which is passively set by connecting the bus lines via a resistor and corresponds to a logical 1. In this assignment, the logical 0 is dominant over the logical 1. In the context of this application, it is also referred to as a slave device "setting" a level on a bus.Depending on the implementation, this can be done by actively driving the device or by “allowing it to be adjusted”, where the slave device is passive and, for example, the level is adjusted via a resistor without active driving.

[0021] At 23, the slave devices detect a collision on the bus. From the perspective of a slave device, a collision occurs when the value present on the bus, e.g., the voltage level, does not match the identification it sent. In the above embodiment with dominant and recessive states, this occurs when another slave sends a more "dominant" identification than the slave detecting a collision.

[0022] Those slave devices that detect a collision are then eliminated at 23 from the current “initialization round”, i.e. the loop of the Fig. 2, which is currently being traversed. One of the slave devices will not detect a collision (e.g., because no other slave device ever drives a more "dominant" level during the transmission of the identifications). The master device then assigns an address to this slave device at 24. This slave device is thus configured with regard to the address and is excluded from initialization at 25, e.g., by being muted.

[0023] At step 26, a check is made to see if all slave devices have received an address. If so, the process ends at step 27; otherwise, the process jumps to step 21 for the next initialization round.

[0024] An example of such collision detection will now be described with reference to the Fig. 3 briefly explained. In the Fig. The signals shown in Figure 3 serve only as a simple example for better illustration and are not to be interpreted as limiting, since signal shapes may differ depending on the implementation.

[0025] In Fig. 3 assumes a situation in which a low bus level is dominant and a high bus level is recessive, so that if one node wants to send a low bus level and another wants to send a high bus level, the overall bus level is low. This is the case, for example, with a CAN bus.

[0026] In the example of Fig. 3 is operated by three slave devices (in Fig. 1 (denoted Slave 1, Slave 2, Slave 3). Data sent by Slave 1 is illustrated by a curve 30, data sent by Slave 2 is illustrated by a curve 31, and data sent by Slave 3 is illustrated by a curve 32. A curve 33 shows the level on a bus.

[0027] After receiving the initialization signal (for example at 21 of the Fig. 2) all participants begin to send their identification. This phase is also called the arbitration phase. In the example of Fig. 3, this is done first with a first bit, which indicates the start of a data frame (SOF, start of frame), where all slave devices pull the bus to a low level. The bus level is therefore low here. Then all participants send their identification, which in the example of Fig. 3 11 bits. In the example of the Fig. 3 starting with the most significant bit number 10, down to the least significant bit 0.

[0028] Those skilled in the art will immediately recognize that, in a CAN bus, arbitration results in maximum prioritization of the bus access procedure for the lowest identification, as explained below. The station with the highest priority (represented by a dominant address) prevails over all other stations and is permitted to transmit. This procedure is also known as CSMA-CR (Carrier Sense Multiple Access - Collision Resolution) and is used here to assign addresses. It is therefore possible to assign graded priorities to individual stations.

[0029] In the example of Fig. 3, address 1 for all slave devices begins with the bit sequence 11001, meaning that the slave devices send a high level for bits 10 and 9, a low level for bits 8 and 7, and a high level again for bit 6. Accordingly, the bus is also high for bits 10 and 9, low for bits 8 and 7, and high again for bit 6.

[0030] The identification of Slave 1 and Slave 3 continues at bit 5 with a 0 corresponding to a low level, while for Slave 2 the identification continues with a 1, that is, a high level. As mentioned above in the example of the Fig. 3, the low level is dominant, the bus level at bit 5 is low. Slave 2 can therefore detect a collision at 35, i.e., at bit 5, because the bus level does not correspond to its transmitted identification. Slave 2 is thus eliminated, as for 23 at Fig. 2. In this example, slave 2 remains in the recessive state, i.e., the high level.

[0031] The identification of slaves 1 and 3 continues at bits 4 and 3 with the bit sequence 11, meaning high level, and the bus level is also high. At the next bit (bit 2), the bit value for slave 1 is 1 (high level) and for slave 3 it is low (low level). The bus level is therefore low, and as indicated by arrow 34, slave 1 now detects a collision (low bus level while attempting to send a high bus level corresponding to bit 1) and is also eliminated. Slave 3 has thus "won" this round and sends its complete identification (0 for bit 1 and 1 for bit 0), followed by a completion bit (RPR) with a value of 0.

[0032] Subsequently, slave 3, the only one where no collision is detected, is assigned an address using control data and data bytes (corresponding to 24 of the Fig. 2). For the next round, slave 3 is muted, and only slaves 1 and 2 send their identifications. In this case, slave 1 will win next, since slave 2 will again detect a collision at 35. Finally, slave 2 is assigned an address. As can be seen, in the Fig. In the approach shown in Figure 3, where the 0 is dominant and the most significant bit is sent first, the slave device with the lowest identification always wins. In other embodiments, the least significant bit can also be sent first, in which case the lowest address does not automatically "win."

[0033] Even if the identification in Fig. 3 as 11-bit values ​​(bits 0 to 10), more or fewer bits may be used. For example, in some embodiments, a 32-bit value may be used, resulting in over 4,000,000,000 possible identifications. Different manufacturers of slave devices can be assigned different ranges of identifications that they can use for their products. Here, a portion of the bits can be assigned a code that indicates the manufacturer.

[0034] In the following, various options for collision detection and corresponding systems are explained in more detail. Fig. Figure 4 shows a transmission and collision detection circuit with collision detection via a transmission line TxD, on which a transmission signal, in particular the identification signal, is sent from a slave device. The transmission signal can then be converted to a bus signal by a line driver.

[0035] When switching the Fig. 4, a PMOS transistor 42 is connected between a transmit terminal 47 and a positive supply voltage 45, and an NMOS transistor 43 is connected between the transmit terminal 47 and ground 46. During normal operation (after the initialization phase described above), the PMOS transistor 42 serves as a push transistor and the NMOS transistor 43 as a pull transistor in order to connect the transmit terminal 47 either to the positive supply voltage 45 or to ground 46. For example, the positive supply voltage 45 can correspond to a logic 1 and ground 46 to a 0. The transistor 42 exhibits similar behavior to the transistor 43, for example through appropriate dimensioning, so that in this case the push transistor and pull transistor are approximately equally strong, i.e., they have a similar current driving capacity.

[0036] For transmitting the identification during the initialization phase, a PMOS transistor 41 is used instead of the PMOS transistor 42, which is also connected between the positive supply voltage 45 and the transmit output 47. The PMOS transistor 41 is dimensioned to be weaker than the PMOS transistor 42, i.e., it has a lower current conductivity and / or a higher resistance Ron in the switched-on state. This means that when transmitting the identifications, the PMOS transistor 45, which serves as a push transistor, is weaker than the NMOS transistor 43, which serves as a pull transistor. If a transmit circuit as in Fig. 4, during identification, a slave transmits a logical 1 corresponding to a high level of supply voltage 45 (by closing transistor 45 and opening transistor 43) and another slave transmits a logical 0 corresponding to the low level of ground 46 by means of such a transmission circuit (by closing the corresponding transistor 43 and opening transistor 41), a total of a logical 0 corresponding to the ground level is present on the transmission line TxD (since the transistor 45 used here is weaker). In the slave transmitting the logical 1, this is detected as a collision by means of a collision detection circuit 40, 44. In particular, an inverter 40 supplies a logic gate 44 with an inverted version of the signal on the transmission line TxD and a control signal s, which serves to control the transistors 41, 43.The logic gate 44 then determines whether the level on the transmit line TxD corresponds to the level intended by the control signal s.

[0037] In particular, in the event of a collision, signal s causes transistor 41 to be closed and transistor 43 to be open, while a low voltage corresponding to ground potential is still present at transmit output 47. In this case, logic gate 44 outputs a corresponding collision signal c.

[0038] It should be noted that in principle, in other embodiments, a reverse logic is also possible, with a weaker pull transistor replacing transistor 43 during initialization.

[0039] The distinction between the initialization phase and a later operating phase, in which transistor 42 is then used, can be made, for example, by means of an address flag in a slave device. As soon as an address has been assigned to the slave device, the address flag is set, and transistor 42 is used instead of transistor 41.

[0040] The transmission and collision detection circuit of the Fig. 4 can be used in particular in cases where several slave devices are arranged in a cluster that share a single line driver for a bus, for example, a CAN bus. An example of such a system 50 is shown in Fig. 5 shown.

[0041] The System 50 of Fig. 5 comprises a master device 51 and a plurality of slave clusters 52, of which a first slave cluster 52A and a second slave cluster 52B are shown. The number of two slave clusters 52A, 52B is merely an example, and only one or more than two slave clusters may be provided. The slave clusters 52 may, for example, each be implemented on a single chip.

[0042] The master device 51 is connected to the slave clusters 52 via a bus 53. In the example of Fig. 5, bus 53 is a CAN bus with two lines BusH, BusL.

[0043] The master device 51 has a microcontroller 54 (MC) and a line driver 55 for driving the BusH and BusL lines of the bus 53. The microcontroller 54 sends data to be transmitted via a transmit line TxD and receive line to the line driver 55 and receives received data via a receive line RxD from the line driver. The transmitted data includes the data shown at 21 in Fig. 2 initialization signal and the one at 24 in Fig. 2, and the received data includes the identifications sent by the slave devices.

[0044] In the embodiment of the Fig. 2, the slave clusters 52A and 52B are configured essentially the same. Therefore, only the slave cluster 52A is described in detail below, and the explanations apply accordingly to the slave cluster 52A. In other embodiments, different slave clusters may also be configured differently, for example, they may include different numbers or types of slave devices.

[0045] The slave cluster 52A includes a line driver 56 for communication via the bus 53 and a number of sensors 57, which serve as exemplary slave devices. In the example of Fig. 5A, the slave cluster 52A comprises a first sensor 57A and a second sensor 57B. In other embodiments, more than two sensors 57 may be provided. The sensors 57A and 57B communicate with the line driver 56 via a transmit line TxD and a receive line RxD. For example, data to be sent via the bus 53 is transmitted via the transmit line TxD, such as the identification explained above. Data is received via the receive line RxD via the bus 53, for example, the initialization signal which the master device 51 receives at 21 of the Fig. 2, as well as the assigned address (24 of the Fig. 2).

[0046] If the sensors 57A, 57B send different levels on the transmission line TxD, this can be done as described with reference to Fig. 4 explained with the transmission and collision detection circuitry provided there. For slaves of different slave clusters 52, collision detection is carried out in the same way, whereby the corresponding level that a slave of a slave cluster sends is also transmitted to the transmission lines TxD of the other slave clusters 52 (in the example of the Fig. 5 with two slave clusters of the other slave cluster).

[0047] The addresses assigned using the method discussed here are then stored in respective address registers 58A, 58B of the sensors 57A, 57B.

[0048] In other embodiments, collision detection can be performed by a feedback function in which the transmit signal sent to the bus is fed back to the receive lines. Collision detection can then be performed by comparing the transmitted signal with the signal on the receive line. An example system for this is described in Fig. 6 shown.

[0049] A system 60 of Fig. 6 comprises a master device 61 and a plurality of slave devices 62, of which four slave devices 62A, 62B, 62C and 62D are shown as an example. The slave devices 62 are connected to the master device 61 via a bus 63, which in the example of Fig. 6 is designed as a two-wire bus with two bus lines BusH, BusL, in particular as a CAN bus.

[0050] The master device 61 has a microcontroller 64 and a line driver 65, which, like the microcontroller 54 under line driver 55 of the master device 51 of the Fig. 5 and therefore will not be described in detail again.

[0051] In system 60, the slave devices 62A to 62D are configured identically. Therefore, only the slave device 62A will be explained in more detail below, and the description applies accordingly to the slave devices 62B to 62D. In other embodiments, the slave devices may also be configured differently.

[0052] The slave device 62A includes a line driver 66 and a sensor 67. In other embodiments, other components may be provided instead of the sensor 67.

[0053] The sensor 67 transmits transmit signals via a transmit line TxD to the line driver 66 and receives receive signals via a receive line RxD from the line driver 66, which accordingly converts signals between the bus 63 and the lines TxD, RxD. In particular, the sensor 67 transmits in response to an initialization signal as in 21 of the Fig. 2 his identification (at 22 in Fig. 2) and receives, if it does not detect a collision, an address assigned to it (for example, at 24 of the Fig. 2). This address is then stored in an address register 68.

[0054] For collision detection, during the initialization phase when the identification is sent, the corresponding value on bus 63 is looped back to the receive line RxD as a receive signal. By comparing a transmit signal on the transmit line TxD with this receive signal, a collision can be detected if the receive signal deviates from the transmit signal (for example, if sensor 67 sends a recessive value and another sensor a dominant value). In this way, collisions can be detected. The transmit speed when sending the identification is selected so that collision detection can occur even with a loop delay when looping back. This delay depends, for example, on the power length used. Again, it should be noted that the signals of the Fig. 7 are only an example and are not to be considered restrictive.

[0055] For further illustration, the Fig. 7 a more detailed example of signals such as those used in the system by the Fig. 6 may be present. For simplicity, the signals for one master device and two slave devices are shown.

[0056] In the example of Fig. 7 sends the master device (for example the master device 51 of the Fig. 5 or the master institution 61 of the Fig. 6) first an initialization signal (for example at 21 of the Fig. 2). In the example of Fig. 7, the hexadecimal value 0x55h corresponding to 3 bytes is sent three times as an initialization signal, alternating with values ​​1 and 0, each separated by a start / stop bit. The three-fold repetition creates redundancy in case a slave does not correctly identify the initialization signal the first time. However, any other bit sequence that can be clearly identified by the slave devices as an initialization signal can also be used. During this phase, in Fig. 7 is designated as Master, then a corresponding signal is present on the bus.

[0057] After the initialization signal has been completed, the slave devices respond with their identifications. These begin with a start bit followed by a 4-byte (32-bit) long identification, with the 4 bytes separated by a stop bit. In the example of the Fig. 7 is the 1st byte with the most significant bits (MSB) for both slave devices 00011011, so there is no collision here. The next byte of the identification (in Fig. 7 as the 3rd byte) is 11111000 for the first slave and 11111001 for the second slave, so that a collision occurs at the last bit. Again, it is assumed that the 0 is dominant over the 1, so that a level corresponding to a 0 is present on the bus. The second slave thus detects a collision (it wants to drive a 1 onto the bus, but the bus shows a 0) and is eliminated and muted, for example, to the recessive state. This is in Fig. 7 is marked with the reference number 70.

[0058] The first slave continues to send its identification (in Fig. 7 with 2nd byte and 1st byte) and is then assigned its address, as already explained. The first slave is then eliminated in the following round, so that in the case of two slave devices as in Fig. 7 an address is assigned to the second slave device.

[0059] Thus, with the embodiments discussed here, addresses can be assigned to a large number of slaves, with collision detection ensuring that only one slave receives identification at a time.

[0060] Some implementation examples are defined by the following examples: Example 1. A method comprising: in a slave facility, - Receiving an initialization signal, - in response to the initialization signal, sending an identification of the slave device via a bus, checking whether a collision occurs on the bus when sending the initialization identification, - if a collision occurs, setting the slave device to an inactive state, and - if no collision occurs, receiving an address for the slave device after sending the identification, wherein the checking whether a collision exists on the bus is carried out on the basis of a signal on a transmission line of the slave device, and wherein the slave device uses a push-pull driver to send the identification, wherein one push transistor or push-pull transistor of the push-pull driver is weaker than the other of the push transistor or pull transistor. Example 2. The method of example 1, wherein checking whether a collision exists on the bus comprises determining that a collision exists when a level on the bus does not correspond to a value expected based on the transmitted identification. Example 3. The method according to example 1 or 2, wherein the bus has a dominant level or a recessive level, and wherein a collision exists on the bus if, when sending the identification, the recessive level is set on the bus by the slave device and the dominant level is present on the bus. Example 4. The method of example 3, wherein the method comprises sending a further identification by a further slave device in response to the initialization signal, and wherein the collision on the bus occurs when the further slave device sets the dominant level on the bus. Example 5. The method according to any one of examples 1 to 4, wherein the slave device is arranged in a slave cluster in which a plurality of slave devices share a bus interface. Example 6. The method according to any one of examples 1 to 5, wherein checking whether a collision exists is performed based on a signal on a receive line of the slave device. Example 7. The method of any one of examples 1 to 6, further comprising transmitting the initialization signal by a master device and transmitting the address by the master device. Example 8. The method according to any one of examples 1 to 7, wherein the method is repeated at least until an address is assigned to the slave device. Example 9. Slave device comprising: a communication circuit for sending signals to a bus and receiving signals from the bus, wherein the slave device is arranged to: - Receiving an initialization signal, - in response to the initialization signal, sending an identification of the slave device over the bus, checking whether a collision occurs on the bus when sending the identification, - if a collision occurs, setting the slave device to an inactive state, and - if no collision occurs, receiving an address for the slave device after sending the identification, wherein the checking whether a collision exists on the bus is carried out on the basis of a signal on a transmission line of the slave device, and wherein the slave device for sending the identification comprises a push-pull driver, wherein one push transistor or push-pull transistor of the push-pull driver is weaker than the other of the push transistor or pull transistor. Example 10. The slave device of example 9, wherein checking whether a collision exists on the bus comprises determining that a collision exists when a level on the bus does not match an expected value based on the transmitted identification. Example 11. The slave device of example 9 or 10, wherein the bus has a dominant level or a recessive level, and wherein a collision occurs on the bus if, upon sending the identification, the recessive level on the bus is set by the slave device and the dominant level is present on the bus. Example 12. The slave device of example 11, wherein a collision occurs on the bus when the further slave device sets the dominant level on the bus. Example 13. The slave device of example 12, wherein the slave device is arranged in a slave cluster in which multiple slave devices share a bus interface. Example 14. The slave device of any one of examples 9 to 13, wherein checking whether a collision exists is performed based on a signal on a receive line of the slave device. Example 15. A system comprising a slave device according to any one of examples 9 to 14, and a master device configured to transmit the initialization signal and to transmit the address. Example 16. The system of example 15, comprising a plurality of slave devices, wherein the master device is arranged to send the initialization signal again after sending the address until all slave devices are assigned an address.

[0061] Although specific embodiments have been illustrated and described in this specification, those of ordinary skill in the art will recognize that a variety of alternative and / or equivalent implementations may be substituted for the specific embodiments shown and described in this specification without departing from the scope of the invention shown. It is the intention that this application cover any adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that this invention be limited only by the claims and the equivalents of the claims.

Claims

[1] Method comprising: in a slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D), -Receiving an initialization signal, -in response to the initialization signal, sending an identification of the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) via a bus (13; 53; 63), checking whether a collision occurs on the bus (13; 53; 63) when sending the initialization identification, -when a collision occurs, setting the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) to an inactive state, and -if no collision occurs, receiving an address for the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) after sending the identification, wherein the checking as to whether a collision is present on the bus (13; 53; 63) is carried out on the basis of a signal on a transmission line (TxD) of the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D), and wherein the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) uses a push-pull driver to send the identification, wherein a push transistor or push-pull transistor of the push-pull driver is weaker than the other of the push transistor or pull transistor. [2] The method of claim 1, wherein checking whether a collision exists on the bus (13; 53; 63) comprises determining that a collision exists when a level on the bus (13; 53; 63) does not correspond to a value expected based on the transmitted identification. [3] Method according to claim 1 or 2, wherein the bus (13; 53; 63) has a dominant level or a recessive level, and wherein a collision is present on the bus (13; 53; 63) if, when sending the identification, the recessive level on the bus (13; 53; 63) is set by the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) and the dominant level is present on the bus (13; 53; 63). [4] The method of claim 3, wherein the method comprises sending a further identification by a further slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) in response to the initialization signal, and wherein the collision on the bus (13; 53; 63) occurs when the further slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) sets the dominant level on the bus (13; 53; 63). [5] Method according to one of claims 1 to 4, wherein the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) is arranged in a slave cluster (52A, 52B) in which a plurality of slave devices (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) share a bus interface (56). [6] Method according to one of claims 1 to 5, wherein the checking whether a collision exists is carried out based on a signal on a receive line (RxD) of the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D). [7] Method according to one of claims 1 to 6, further comprising sending the initialization signal by a master device (11; 51; 61) and sending the address by the master device (11; 51; 61). [8] Method according to one of claims 1 to 7, wherein the method is repeated at least until an address is assigned to the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D). [9] A method according to any one of claims 1 to 8, wherein the push transistor or pull transistor which is weaker is used to send the identification, and the push-pull driver comprises a further push transistor or pull transistor which is used after an initialization phase which includes sending the identification. [10] Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D), comprising: a communication circuit for sending signals to a bus (13; 53; 63) and for receiving signals from the bus (13; 53; 63), wherein the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) is arranged to: -Receiving an initialization signal, -in response to the initialization signal, sending an identification of the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) via the bus (13; 53; 63), checking whether a collision occurs on the bus (13; 53; 63) when sending the identification, -when a collision occurs, setting the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) to an inactive state, and -if no collision occurs, receiving an address for the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) after sending the identification, wherein the checking as to whether a collision is present on the bus (13; 53; 63) is carried out on the basis of a signal on a transmission line (TxD) of the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D), and wherein the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) for sending the identification comprises a push-pull driver, wherein a push transistor or push-pull transistor of the push-pull driver is weaker is than the other of the push transistor or pull transistor. [11] The slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) of claim 10, wherein checking whether a collision exists on the bus (13; 53; 63) comprises determining that a collision exists when a level on the bus (13; 53; 63) does not correspond to a value expected based on the transmitted identification. [12] Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) according to claim 10 or 11, wherein the bus (13; 53; 63) has a dominant level or a recessive level, and wherein a collision is present on the bus (13; 53; 63) if, when sending the identification, the recessive level on the bus (13; 53; 63) is set by the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) and the dominant level is present on the bus (13; 53; 63). [13] Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) according to claim 12, wherein a collision occurs on the bus (13; 53; 63) when the further slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) sets the dominant level on the bus (13; 53; 63). [14] Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) according to claim 13, wherein the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) is arranged in a slave cluster (52A, 52B) in which a plurality of slave devices (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) share a bus interface (56). [15] Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) according to one of claims 10 to 14, wherein the checking as to whether a collision exists is carried out based on a signal on a receive line (RxD) of the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D). [16] Slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) according to one of claims 10 to 15, wherein the slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) is arranged to use the push transistor or pull transistor which is weaker for transmitting the identification, and the push-pull driver comprises a further push transistor or pull transistor for use after an initialization phase which comprises transmitting the identification. [17] System (10; 50; 60) comprising a slave device (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) according to one of claims 10 to 16, and a master device (11; 51; 61) which is arranged to send the initialization signal and to send the address. [18] System (10; 50; 60) according to claim 17, comprising a plurality of slave devices (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D), wherein the master device (11; 51; 61) is arranged to send the initialization signal again after sending the address until all slave devices (12A, 12B, 12C; 57A, 57B; 62A, 62B, 62C, 62D) are assigned an address.

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