LENS STRUCTURE CONFIGURED TO INCREASE THE QUANTUM YIELD OF AN IMAGE SENSOR
By using protrusions and microlenses with convex surfaces to focus radiation in CMOS image sensors, the issue of reflection and cross-coupling is mitigated, enhancing quantum efficiency and absorption.
Patent Information
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
- Filing Date
- 2020-03-16
- Publication Date
- 2026-06-03
AI Technical Summary
Existing CMOS image sensors face reduced quantum efficiency due to reflection of incident radiation from the side walls of protrusions, leading to cross-coupling between photodetectors and reduced absorption by lower-lying photodetectors.
The implementation of a substrate with protrusions and microlenses arranged laterally between them, where the microlenses have a convex upper surface to focus incident radiation to a focal point beneath, reducing reflection and enhancing absorption by the photodetectors.
This configuration increases the quantum efficiency of the image sensor by directing more incident radiation to the photodetectors, thereby improving performance.
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Abstract
Description
background
[0001] Numerous modern electronic devices (e.g., digital cameras, optical imaging devices, etc.) incorporate image sensors. Image sensors convert optical images into digital data that can be displayed as digital images. An image sensor is an array of pixel sensors, which are unitary components for converting an optical image into digital data. Types of pixel sensors include CCD image sensors (CCD: charge-coupled device) and CMOS image sensors (CISs) (CMOS: complementary metal oxide semiconductor). CISs are preferred over CCD pixel sensors due to their low power consumption, small size, fast data processing, direct data output, and low manufacturing costs.
[0002] US 2011 / 0076456A1 describes a lens array with a substrate over which a plurality of protrusions and lenses are arranged, with each lens being formed over a corresponding protrusion. Brief description of the drawings
[0003] Aspects of the present invention are best understood with reference to the detailed description below in conjunction with the accompanying drawings. It should be noted that, in accordance with common industry practice, various elements are not drawn to scale. Rather, for the sake of clarity of discussion, the dimensions of the various elements may be arbitrarily enlarged or reduced. Fig. Figure 1 shows a sectional view of some embodiments of an image sensor having a substrate with a plurality of protrusions and a plurality of microlenses arranged over the protrusions and spaced laterally between the protrusions. Fig. Figure 2 shows a sectional view of some alternative embodiments of the image sensor of Fig. 1, in which a plurality of semiconductor devices are arranged on a front side of the substrate. The Fig. 3A and Fig. Figure 3B shows sectional views of some alternative embodiments of the image sensor from Fig. 2, in which light filters are arranged over the majority of microlenses. The Fig. 4, Fig. 5, Fig. 6, Fig. 7, Fig. 8 to Fig. Figure 9 shows sectional views of some embodiments of a method for manufacturing an image sensor, comprising a substrate with a plurality of protrusions and a plurality of microlenses arranged over the protrusions and spaced laterally between the protrusions. Fig. Figure 10 is a flowchart format showing some embodiments for manufacturing an image sensor having a substrate with a plurality of protrusions and a plurality of microlenses arranged over the protrusions and spaced laterally between the protrusions. Detailed description
[0004] The present invention provides an image sensor with the features of claim 1, an integrated chip with the features of claim 8, and a method with the features of claim 16. Exemplary embodiments are given in the dependent claims. The following description provides many different embodiments or examples for implementing various features of the present invention. Specific examples of components and arrangements are described below to simplify the present invention. These are, of course, merely examples and are not intended to be limiting.For example, the fabrication of a first element over or on a second element in the following description may include embodiments in which the first and second elements are fabricated in direct contact, and it may also include embodiments in which additional elements can be fabricated between the first and second elements such that the first and second elements are not in direct contact. Furthermore, reference numerals and / or letters may be repeated in the various examples in the present invention. This repetition serves for simplicity and clarity and does not in itself imply any relationship between the various embodiments and / or configurations discussed.
[0005] Furthermore, spatially relative terms, such as "located below," "under," "lower," "located above," "upper," and the like, can be used here to simply describe the relationship of an element or structure to one or more other elements or structures depicted in the figures. These spatially relative terms are intended to encompass orientations of the device in use or operation beyond the orientation shown in the figures. The device may be oriented differently (rotated by 90 degrees or in a different orientation), and the spatially relative descriptors used here can be interpreted accordingly.
[0006] CMOS image sensors (CISs) typically feature an array of pixel regions, each containing a photodetector embedded in a semiconductor substrate. Light filters, such as color filters, infrared (IR) filters, and the like, are positioned over the photodetectors and configured to filter incoming light supplied to different photodetectors within the CIS. The photodetectors are further configured to generate electrical signals corresponding to the received light. These electrical signals can be processed by a signal processing unit to determine an image captured by the CIS. Quantum yield (QE) is the ratio of the number of photons contributing to an electrical signal generated by a photodetector in a pixel region to the number of photons incident on the pixel region.It has been recognized that the QE of a CIS can be improved with chip-integrated absorption enhancement structures.
[0007] An absorption enhancer (AMU) structure can have multiple protrusions arranged along a surface of the semiconductor substrate. The AMU increases absorption by reducing the reflection of incident radiation. A passivation layer is also applied over the AMU, filling the voids between the multiple protrusions. During the fabrication of the passivation layer over the AMU, an anti-reflective coating (ARC) layer is applied over the passivation layer. Subsequently, the ARC layer and the passivation layer are etched at the same rate until a flat top surface is achieved, resulting in a passivation layer with a substantially flat top surface.However, when incident radiation passes through the essentially flat top surface of the passivation layer, it can be reflected from a side wall of a projection located away from a photodetector below. This can occur because the incident light propagates along a path approximately perpendicular to the essentially flat top surface of the passivation layer and cannot be focused onto the photodetector below. The reflected radiation may be deflected to an adjacent lower-lying photodetector, resulting in cross-coupling between photodetectors, and / or it may be reflected away from the pixel region. Additionally, the reflected radiation may be deflected away from the semiconductor substrate, reducing the radiation reaching the lower-lying photodetector. This can partially reduce the quantum efficiency (QE) of the lower-lying photodetector.
[0008] Accordingly, some embodiments of the present invention relate to an image sensor comprising a substrate with a plurality of protrusions and a plurality of microlenses, each having a convex upper surface and arranged above the protrusions and spaced laterally between them. For example, in the fabrication of the image sensor, a photodetector is fabricated in a substrate, and a plurality of protrusions are produced along a rear surface of the substrate. A passivation layer is produced above the plurality of protrusions such that it fills a plurality of recesses arranged between the multiple protrusions. An arc-etching (ARC) layer is produced above the passivation layer, and partial etching is performed on the ARC layer until an upper surface of the passivation layer is reached, leaving at least a portion of the ARC layer exposed above the passivation layer.Furthermore, one or more highly selective etching processes are performed on the ARC layer and the passivation layer, such that the passivation layer is etched at a higher rate than the ARC layer. This partially defines a plurality of microlenses over the plurality of protrusions, such that a microlens is positioned between each pair of adjacent protrusions, and each microlens has a convex top surface. Due to this convex top surface, the microlenses are configured to focus incident radiation to a focal point between each pair of adjacent protrusions, thereby reducing reflection of incident radiation and directing more incident radiation to the photodetector. This, in turn, increases the quality factor (QE) of the image sensor.
[0009] Fig. Figure 1 shows a sectional view of some embodiments of an image sensor 100, which has a substrate 104 with a plurality of projections 110 and a plurality of microlenses 112 arranged above the projections 110 and spaced laterally between the projections 110.
[0010] The image sensor 100 has a connection structure 102 arranged along a front face 104f of the substrate 104. In some embodiments, the substrate 104 has a semiconductor body (e.g., solid silicon, epitaxial silicon, another suitable semiconductor material, or the like), and / or it has a first doping type (e.g., p-type doping). A photodetector 108 is arranged in the substrate 104 and is configured to convert incident electromagnetic radiation 114 (e.g., photons) into electrical signals (i.e., generate electron-hole pairs from the incident electromagnetic radiation 114). The photodetector 108 has a second doping type (e.g., n-type doping) that is the opposite of the first doping type. In some embodiments, the first doping type is n, and the second doping type is p, or vice versa.In further embodiments, the photodetector 108 can be configured as a photodiode, or it can include a photodiode. An insulating structure 106 is arranged in the substrate 104, extending from the front face 104f of the substrate 104 to a point above the front face 104f. In some embodiments, the insulating structure 106 can comprise a dielectric material (e.g., silicon dioxide, silicon nitride, silicon carbide, or the like), and / or it can be configured as an STI structure (STI: shallow trench insulation), a DTI structure (DTI: deep trench insulation), or another suitable insulating structure.
[0011] A back surface 104b of the substrate 104 is located opposite the front surface 104f of the substrate 104. The back surface 104b of the substrate 104 has a non-planar surface that defines a plurality of protrusions 110 arranged in a periodic structure. Therefore, the protrusions 110 can be made of the same material (e.g., silicon) as the substrate 104 or be made of the same material. The multiple protrusions 110 are laterally separated from each other by recesses in the back surface 104b of the substrate 104. Each of the multiple protrusions 110 has opposing beveled sidewalls. The protrusions 110 of the substrate 104 are configured to, for example, increase the light-receiving area on the photodetector 108 for the incident electromagnetic radiation 114. This partially increases the sensitivity and / or quantum efficiency (QE) of the image sensor 100.
[0012] Furthermore, a plurality of microlenses 112 are arranged laterally in the recesses between the projections 110 such that one of the microlenses 112 is located laterally between a corresponding pair of projections 110. In some embodiments, the microlenses 112 can, for example, be or comprise a dielectric material (e.g., silicon dioxide), and / or they can have a first refractive index. It should be understood that other materials for the microlenses 112 are also within the scope of protection of the invention. In further embodiments, the substrate 104 comprises a semiconductor material (e.g., silicon) that is different from the dielectric material of the microlenses 112, and / or it has a second refractive index that is different from the first. It should be understood that other materials for the substrate 104 are also within the scope of protection of the invention.In some embodiments, the second refractive index is greater than the first. In some embodiments, the microlenses 112 each have a microlens projection 112p that corresponds to the side walls of the projections 110 and fills the recesses between the projections 110. In other embodiments, the microlenses 112 contact the projections 110 directly. Each of the microlenses 112 has a convex upper surface 112us that is curved and / or rounded in a direction away from the projections 110. As in . Fig. As shown in Figure 1, the incident electromagnetic radiation 114 (represented by arrows) enters the microlenses 112 via the convex upper surface 112us. Due to the convex upper surface 112us of each microlens 112, the incident electromagnetic radiation 114 is significantly deflected and / or angled towards a focal point 119 below the convex surface 102r. The focal point 119 is arranged along a focal plane 120, which is vertically separated from a top surface 110ts of the projections 110 by a first height h1 and vertically separated from a bottom surface 110bs of the projections 110 by a second height h2. In some embodiments, the first height h1 is greater than the second height h2. In these embodiments, the incident electromagnetic radiation 114 is thereby prevented from being reflected from a side wall of the projections 110 in a direction away from the photodetector 108.In further embodiments, because the second height h2 is smaller than the first height h1, the angle θ1 of the electromagnetic radiation 114 incident on a side wall of the projections 110 is very small, so that light is not reflected away from the substrate 104. Other electromagnetic radiation (not shown), which is not parallel to the incident electromagnetic radiation 114 and which enters the microlenses 112, is refracted as described above, and it intersects at other focal points along the focal plane 120.
[0013] After the incident electromagnetic radiation 114 has been deflected towards the focal point 119, it can pass through the side walls of the projections 110. Since, in some embodiments, the microlenses 112 have a first refractive index that is smaller than the second refractive index of the projections 110 located below them, the incident electromagnetic radiation 114 is refracted away from the corresponding perpendicular axes 122 towards the photodetector 108. In other words, because the microlenses 112 have a lower refractive index than the projections 110, the incident electromagnetic radiation 114 has an angle of refraction θ2 that is smaller than a corresponding angle of incidence θ1, thereby focusing the incident electromagnetic radiation 114 towards the photodetector 108. This increases the absorption of the incident electromagnetic radiation 114 by the substrate 104 (e.g.,By reducing the reflection of the incident electromagnetic radiation 114 from the projections 110). By increasing the absorption of the incident electromagnetic radiation 114, the QE of the photodetector 102 is increased, thereby improving the performance of the image sensor 100.
[0014] Fig. Figure 2 shows a sectional view of some embodiments of an image sensor 200, which is an alternative embodiment of the image sensor 100. Fig. 1 corresponds.
[0015] In some embodiments, the image sensor 200 has a substrate 104 above a connection structure 102. The image sensor 200 can be configured as a back-illuminated CMOS image sensor (BSI-CIS). A plurality of semiconductor devices 212 are arranged in the connection structure 102 and along the front face 104f of the substrate 104. In some embodiments, the semiconductor devices 212 can be configured as pixel elements that can output and / or process an electrical signal generated by photodetectors 108. The semiconductor devices 212 can be configured, for example, as transfer transistors, source follower transistors, line selector transistors, and / or reset transistors. It should be understood that semiconductor devices 212 configured as other semiconductor devices are also within the scope of protection of the invention.Furthermore, the semiconductor devices 212 can each have a gate structure 216 arranged along the front face 104f of the substrate 104 and a sidewall spacer structure 214 arranged along the sidewalls of the gate structure 216. In further embodiments, the gate structure 216 has a dielectric gate layer and a gate electrode, the dielectric gate layer being arranged between the substrate 104 and the gate electrode.
[0016] The interconnection structure 102 can comprise a dielectric interconnection structure 206, a plurality of conductive wires 208, and a plurality of conductive vias 210. In some embodiments, the dielectric interconnection structure 206 has one or more interlayer dielectric layers (ILD layers), each of which can be or comprise an oxide, such as silicon dioxide, a fluorosilicate glass, a phosphate glass (e.g., boron phosphosilicate glass), another suitable dielectric material, or a combination thereof. It should be understood that an interconnection structure 206 comprising other suitable materials is also within the scope of the invention.The conductive wires and vias 208 and 210 are arranged in the dielectric interconnect structure 206 and are configured to electrically connect components located in the image sensor 200 to each other and / or to another integrated chip (not shown). In some embodiments, the conductive wires and vias 208 and 210 may, for example, each be made of copper, aluminum, titanium nitride, tantalum nitride, tungsten, another conductive material, or a combination thereof. It should be understood that conductive wires and vias 208 and 210 comprising other suitable materials are also within the scope of the invention.
[0017] In some embodiments, the substrate 104 can be a semiconductor body (e.g., solid silicon, another suitable semiconductor material, or the like), and / or it has a first doping type (e.g., p-doping). Pixel regions 202a and 202b are laterally separated from each other by a plurality of isolation structures 106. In some embodiments, the plurality of isolation structures 106 can be configured as STI structures, DTI structures, BDTI structures (BDTI: backside deep trench isolation), other suitable isolation structures, or a combination thereof. In further embodiments, the isolation structures 106 can be or comprise silicon dioxide, silicon nitride, silicon carbide, or the like. Furthermore, a photodetector 108 is arranged in each of the pixel regions 202a and 202b. The photodetectors 108 can, for example, have a second doping type (e.g., n-doping) that is opposite to the first doping type.It should be understood that a photodetector 108 and / or a substrate 104, which have a different type of doping, are also within the scope of protection of the invention.
[0018] In some embodiments, the photodetectors 108 can be configured to generate electrical signals from NIR radiation (NIR: near-infrared), which is electromagnetic radiation in a first wavelength range. For example, the first wavelength range can be approximately 850 nm to 940 nm. It should be understood that other values for the first wavelength range are also within the scope of the invention. The substrate 104 has a thickness Ts, which is defined between the front face 104f of the substrate 104 and its rear face 104b. In some embodiments, the thickness Ts is approximately 4 µm to 6 µm. It should be understood that other values for the thickness Ts are also within the scope of the invention. The thickness Ts of the substrate 104 is selected to ensure a high QE for the first wavelength range. If, for example, the thickness Ts of the substrate 104 is too small (e.g.,If the substrate thickness (Ts) is less than approximately 4 µm, the photodetectors 108 have a low NIR light QE, which can reduce phase detection capability. Furthermore, if the substrate thickness Ts is too large (e.g., greater than approximately 6 µm), the placement of pixel elements, such as contact areas, insulation structures, and / or transfer transistors, can be affected without, for example, increasing the NIR light QE.
[0019] The rear side 104b of the substrate 104 has a plurality of projections 110, and a plurality of microlenses 112 are arranged between adjacent pairs of projections 110. The microlenses 112 each have a convex upper surface 112us configured to direct incident radiation to lower-lying photodetectors 108, as shown in Fig. Figure 1 is shown and explained with reference to it. This increases the QE of the photodetectors 108, thereby increasing the performance of the image sensor 200.
[0020] In further embodiments, the plurality of microlenses 112 can be configured or designated as a passivation layer extending continuously laterally across the rear surface 104b of the substrate 104. In these embodiments, the passivation layer is arranged above each projection 110 and has a plurality of upper convex projections 112up spaced laterally between adjacent pairs of projections 110, and a plurality of lower projections 112lp arranged below the upper convex projections 112up. The lower projections 112lp directly contact the side walls of the projections 110. Furthermore, in some embodiments, the passivation layer can extend continuously laterally across the projections 110 along an uninterrupted path.
[0021] Fig. Figure 3A shows a sectional view of some embodiments of an image sensor 300a, which is an alternative embodiment of the image sensor 200. Fig. 2 correspond.
[0022] The image sensor 300a has an upper dielectric layer 302 over the microlenses 112 and the back surface 104b of the substrate 104. In some embodiments, the upper dielectric layer 302 can be, for example, a PEOX layer (PEOX: plasma-enhanced oxide), silicon dioxide, or another suitable dielectric material. It should be understood that other materials for the upper dielectric layer 302 are also within the scope of the invention. Furthermore, a plurality of light filters 304 (e.g., color filters, infrared filters, and the like) are arranged over the upper dielectric layer 302. The multiple light filters 304 are each configured to transmit specific wavelengths of incident radiation.For example, a first light filter can transmit radiation with wavelengths in a first range, while a second light filter adjacent to the first light filter can transmit radiation with wavelengths in a second range that differs from the first range. In other embodiments, the light filters 304 can, for example, be configured as color filters, wherein a first light filter is configured to transmit a first color (e.g., green light), and an adjacent second light filter is configured to transmit a second color (e.g., blue light) that differs from the first color. Furthermore, a plurality of upper lenses 306 are arranged above the plurality of light filters 304. Each of the upper lenses 306 is oriented laterally to the light filters 304 and is arranged above the pixel regions 202a and 202b.The multiple upper lenses 306 are configured to focus incident electromagnetic radiation to the photodetectors 108, thereby increasing the QE of the photodetectors and improving the performance of the image sensor 300a.
[0023] The photodetectors 108 are configured to generate electrical signals from electromagnetic radiation with a wavelength λ. In some embodiments, the wavelength λ can include NIR radiation, which is electromagnetic radiation in a wavelength range of approximately 850 nm to 940 nm. It should be understood that other values for the wavelength λ are also within the scope of the invention. In other embodiments, the height hp of the projections 110 can be greater than approximately λ / 2.5, thus increasing the light-receiving area on the substrate 104 for incident electromagnetic radiation. The height hp can, for example, be greater than approximately 340 nm. It should be understood that other values for the height hp are also within the scope of the invention. This partially increases the sensitivity and / or QE of the image sensor 300a.A distance d1 is defined between the top surfaces of two adjacent projections 110. In further embodiments, the distance d1 can be greater than approximately λ / 2, thus increasing the light-receiving area on the substrate 104 for incident electromagnetic radiation. The distance d1 can, for example, be greater than approximately 425 nm. It should be understood that other values for the distance d1 are also within the scope of the invention. This partially increases the sensitivity and / or QE of the image sensor 300a. Because the height hp is greater than approximately λ / 2.5 and the distance d1 is greater than approximately λ / 2, the absorption of incident radiation with wavelength λ by the substrate 104 is increased, while the reflection of the incident radiation with wavelength λ away from the photodetectors 108 is reduced. In some embodiments, the distance d1 is greater than the height hp.
[0024] Fig. Figure 3B shows a sectional view of some embodiments of an image sensor 300b, the alternative embodiments of the image sensor 300a of Fig. 3A, in which the upper dielectric layer 302 is omitted. In these embodiments, the majority of light filters 304 contact the majority of microlenses 112 directly.
[0025] The Fig. 4, Fig. 5, Fig. 6, Fig. 7, Fig. 8 to Fig. Figures 9 show sectional views 400 to 900 of some embodiments of a method for manufacturing an image sensor, which in some embodiments of the present invention comprises a substrate with a plurality of projections and a plurality of microlenses arranged above the projections and spaced laterally between the projections. The Fig. 4, Fig. 5, Fig. 6, Fig. 7, Fig. 8 to Fig. The sectional views shown, numbers 400 to 900, are indeed described for a specific process, but it should be understood that the structures shown in these figures are not limited to that process, but can be used as structures independently of the process. Fig. 4, Fig. 5, Fig. 6, Fig. 7, Fig. 8 to Fig. Although Figure 9 is described as a series of steps, it should be understood that the order of these steps can be changed in other embodiments and that the disclosed methods can also be used for other structures. In other embodiments, some of the illustrated and / or described steps can be omitted completely or partially.
[0026] As shown in section view 400 of Fig. As shown in Figure 4, a substrate 104 is provided, and an insulating structure 106 is fabricated on a front face 104f of the substrate 104. In some embodiments, the substrate 104 may, for example, be a solid substrate (e.g., a solid silicon substrate), a silicon-on-insulator (SOI) substrate, or another suitable substrate. It should be understood that other materials for the substrate 104 are also within the scope of the invention. In some embodiments, a first implantation process is carried out before fabricating the insulating structure 106 to dope the substrate 104 with a first doping agent (e.g., p). In some embodiments, a method for fabricating the insulating structure 106 may include: selectively etching the substrate 104 to create a trench in the substrate 104 extending from the front face 104f of the substrate 104 into the substrate 104; and filling the trench, e.g.B. by chemical vapor deposition (CVD), atomic layer deposition (ALD), physical vapor deposition (PVD), thermal oxidation, or the like, with a dielectric material, e.g., silicon nitride, silicon carbide, silicon dioxide, another suitable dielectric material, or a combination thereof. In further embodiments, the substrate 104 is selectively etched by producing a masking layer (not shown) on the front face 104f of the substrate 104, and subsequently the substrate 104 is treated with one or more etchants configured to selectively remove unmasked parts of the substrate 104.
[0027] As in Fig. As shown in Figure 4, a photodetector 108 is then fabricated in the substrate 104. In some embodiments, the photodetector 108 has a region of the substrate 104 with a second doping type (e.g., n) that is opposite to the first doping type. In some embodiments, the photodetector 108 can be fabricated by a selective ion implantation process in which a masking layer (not shown) on the front face 104f of the substrate 104 is used to selectively implant ions into the substrate 104. In further embodiments, the first doping type comprises p-type dopants, and the second doping type comprises n-type dopants, or vice versa. The photodetector 108 is configured to generate electrical signals from electromagnetic radiation with a wavelength λ.In some embodiments, the wavelength λ may include NIR radiation, which is electromagnetic radiation in a wavelength range of approximately 850 nm to 940 nm. It should be understood that other values for the wavelength λ are also within the scope of protection of the invention.
[0028] As also in Fig. As shown in Figure 4, after the fabrication of the photodetector 108, a thinning process is carried out on the back side 104b of the substrate 104 to reduce an initial thickness Ti of the substrate 104 to a thickness Ts. The thickness Ts is defined as the area between the front side 104f of the substrate 104 and its back side 104b. In some embodiments, the thickness Ts is approximately 4 µm to 6 µm. It should be understood that other values for the thickness Ts are also within the scope of the invention. In some embodiments, the thinning process may include performing a mechanical grinding process, a CMP process (CMP: chemical-mechanical planarization), another suitable thinning process, or a combination thereof.
[0029] As shown in section view 500 of Fig. As shown in section 5, the structure of Fig. 4 is turned and then structured to define a plurality of projections 110 along the back side 104b of the substrate 104. The back side 104b of the substrate 104 faces its front side 104f. In some embodiments, the plurality of projections 110 is produced by performing one or more etching processes corresponding to one or more masking layers (not shown). The one or more etching processes may, for example, include a wet etching process, a dry etching process, other suitable etching processes, or a combination thereof. Furthermore, in some embodiments, the projections 110 are produced such that a height hp of the projections 110 is greater than approximately λ / 2.5 and a spacing d1 is greater than approximately λ / 2, thus increasing the light-receiving area on the substrate 104 for incident electromagnetic radiation. The spacing d1 is defined between the top surfaces of two adjacent projections 110.In further embodiments, the height hp can be greater than approximately 340 nm, and / or the spacing d1 can be greater than approximately 425 nm. It should be understood that other values for the height hp and / or the spacing d1 are also within the scope of protection of the invention.
[0030] As shown in section view 600 of Fig. As shown in Figure 6, an upper dielectric layer 602 is deposited over the projections 110. The top surface of the upper dielectric layer 602 can conform to the shape of the projections 110. In some embodiments, the upper dielectric layer 602 can be deposited, for example, by CVD, ALD, PVD, thermal oxidation, a plasma-enhanced deposition process, e.g., plasma-enhanced CVD (PECVD), or by another suitable deposition or growth process. Thus, the upper dielectric layer 602 can, for example, be or comprise a plasma-enhanced oxide, silicon dioxide, silicon dioxide carbide (SiOC), another suitable dielectric material, or a combination thereof, and / or it can be produced with a thickness of about 3000 Å to 5000 Å. It should be understood that other values for the thickness of the upper dielectric layer 602 are also within the scope of the invention.In further embodiments, a BARC layer 604 (BARC: bottom anti-reflective coating) is produced over the upper dielectric layer 602. In some embodiments, the BARC layer 604 can be produced, for example, by CVD, ALD, PVD, or by another suitable deposition or growth process. In still further embodiments, the BARC layer 604 can be, for example, a high-k dielectric material (i.e., a dielectric material with a dielectric constant greater than 3.9), another suitable dielectric material, or a combination thereof, and / or it can be produced with a thickness of about 4000 Å to 6000 Å. It should be understood that other values for the thickness of the BARC layer 604 are also within the scope of the invention.Thus, in some embodiments, the BARC layer 604 has a greater thickness than the upper dielectric layer 602.
[0031] As shown in section view 700 of Fig. As shown in Figure 7, a first structuring process is performed on the BARC layer 604, thereby reducing the initial thickness of the BARC layer 604. In some embodiments, the first structuring process includes performing a dry etching process, a protective dry etching process, or another suitable etching process. In further embodiments, the first structuring process may include treating the BARC layer 604 with one or more etchants, such as oxygen (O2), carbon monoxide (CO), another suitable etchant, or a combination thereof. In still other embodiments, the upper dielectric layer 602 is not etched in the first structuring process.
[0032] The Fig. Figures 8A to 8C show sectional views 800a to 800c, which correspond to some embodiments of carrying out a second structuring process on the upper dielectric layer 602 and the BARC layer 604, by which the microlenses 112 are produced. The second structuring process is carried out such that the microlenses 112 each have a convex upper surface 112us located above the projections 110. Fig. 8A and Fig. Figure 8B shows sectional views 800a and 800b, which correspond to some embodiments of a first snapshot and a second snapshot of the second structuring process. Fig. Figure 8C shows a sectional view 800c corresponding to some embodiments of the microlenses 112 after completion of the second etching process.
[0033] In some embodiments, the second structuring process comprises performing a dry etching process, a protective dry etching process, or another suitable etching process. In several embodiments, the second structuring process is performed exclusively with a protective dry etching process. In further embodiments, the second structuring process may include treating the upper dielectric layer 602 and the BARC layer 604 with one or more etchants, such as polymer-rich etchants, octafluorocyclobutane (C4F8), trifluoromethane (CHF3), another suitable etchant, or a combination thereof. During the second structuring process, the upper dielectric layer 602 is etched at a first etch rate, and the BARC layer 604 is etched at a second etch rate. In some embodiments, the first etch rate is at least 10 times greater than the second etch rate.In these embodiments, the second etching process has a lower etch selectivity for the BARC layer 604 than for the upper dielectric layer 602, so the upper dielectric layer 602 is etched faster (e.g., at least 10 times faster) than the BARC layer 604. This may be because one or more etchants remove the upper dielectric layer 602 faster than the BARC layer 604. Because the first etch rate is at least 10 times higher than the second etch rate, the microlenses 112 each have a convex top surface 112µm. In some embodiments, the ratio of the first etching rate to the second etching rate is, for example, approximately 10:1, approximately 11:1, approximately 12:1, or it is between 10:1 and 20:1, or it is greater than 10:1. It should be understood that other values for the ratio of the first etching rate to the second etching rate are also within the scope of protection of the invention.The convex upper surfaces 112µs of the microlenses 112 are each configured to deflect and / or angulate incident electromagnetic radiation to a focal point under the corresponding convex upper surface 112µs. This increases the absorption of the incident electromagnetic radiation by the substrate 104 (e.g., by reducing the reflection of the incident electromagnetic radiation away from the substrate 104). By increasing the absorption of the incident electromagnetic radiation, the quantum efficiency (QE) of the photodetector 108 is increased.
[0034] Section view 800a of Fig. Figure 8A shows some embodiments of a first snapshot taken at a first time point of the second structuring process, in which the upper dielectric layer 602 is removed faster than the BARC layer 604. Furthermore, the sectional view 800b shows... Fig. 8B Some embodiments of a second snapshot of the second structuring process, taken at a second time point in time, wherein the second snapshot is taken some time after the first snapshot. As in Fig. As shown in Figure 8B, remnants of the BARC layer 604 are arranged along the top surface of the upper dielectric layer 602, such that a top surface of the BARC layer 604 or the upper dielectric layer 602, spaced laterally between adjacent pairs of projections 110, is curved and / or rounded outwards in a direction away from the projections 110 (i.e., becomes convex). Sectional view 800c of Fig. Figure 8C shows some embodiments of the microlenses 112 after performing the second structuring process on the upper dielectric layer 602 and the BARC layer 604. The convex top surface 112us of each of the microlenses 112 corresponds to the domed top surface of the BARC layer 604 and the upper dielectric layer 602, which are shown in Figure 8C. Fig. 8B are shown.
[0035] As shown in section view 900 of Fig. As shown in Figure 9, a light filter 304 is fabricated over the microlenses 112. The light filter 304 is made of a material that can transmit incident electromagnetic radiation (e.g., light) with a specific wavelength range while blocking incident light with other wavelengths outside the specified range. In further embodiments, the light filter 304 can be fabricated by CVD, PVD, ALD, sputtering, or the like, and / or can be planarized after fabrication, for example, by a CMP process. An upper lens 306 is also fabricated over the light filter 304. In some embodiments, the upper lens 306 can be fabricated by depositing (e.g., by CVD, PVD, and the like) a lens material onto the light filter 304. A lens template (not shown) with a convex upper surface is structured over the lens material.The upper lens 306 is then produced by selectively etching the lens material according to the lens template.
[0036] Fig. Figure 10 shows a method 1000 for manufacturing an image sensor comprising a substrate with a plurality of protrusions and a plurality of microlenses arranged over the protrusions and spaced laterally between the protrusions, according to some embodiments of the present invention. Although the method 1000 is presented and / or described as a series of steps or events, it should be understood that the method is not limited to the sequence or steps shown. Therefore, in some embodiments, the steps can be performed in a different sequence than shown and / or simultaneously. Furthermore, in some embodiments, the steps or events shown can be subdivided into several steps or events that can occur at different times or simultaneously with other steps or sub-steps.In some embodiments, some depicted steps or events may be omitted, and other non-depicted steps or events may be added.
[0037] In step 1002, an insulation structure is produced in a front face of a substrate. Fig. Figure 4 shows a sectional view 400, which corresponds to some embodiments of step 1002.
[0038] In step 1004, a photodetector is manufactured in the substrate. Fig. Figure 4 shows a sectional view 400, which corresponds to some embodiments of step 1004.
[0039] In step 1006, a plurality of protrusions are produced in a back side of the substrate. Fig. Figure 5 shows a sectional view 500, which corresponds to some embodiments of step 1006.
[0040] In step 1008, an upper dielectric layer is deposited over the majority of protrusions. Additionally, a BARC layer is deposited over the upper dielectric layer. Fig. Figure 6 shows a sectional view 600, which corresponds to some embodiments of step 1008.
[0041] In step 1010, an initial structuring process is carried out on the BARC layer. Fig. Figure 7 shows a sectional view 700, which corresponds to some embodiments of step 1010.
[0042] In step 1012, a second structuring process is performed on the upper dielectric layer and the BARC layer. The upper dielectric layer is etched faster than the BARC layer. Furthermore, in this second structuring process, a plurality of microlenses are defined over the protrusions such that each microlens has a convex upper surface. Fig. Figures 8A to 8C show sectional views 800a to 800c corresponding to some embodiments of step 1012.
[0043] In step 1014, a light filter is produced over the majority of microlenses. Fig. Figure 9 shows a sectional view 900, which corresponds to some embodiments of step 1014.
[0044] In step 1016, an upper lens is manufactured above the light filter. Fig. Figure 9 shows a sectional view 900, which corresponds to some embodiments of step 1014.
[0045] Thus, according to some embodiments, the present invention relates to an image sensor comprising a substrate with a plurality of projections arranged along a rear side of the substrate. Furthermore, a plurality of microlenses are arranged above the projections and spaced laterally between them. Each microlens has a convex upper surface configured to direct incident radiation to a focal point beneath the convex upper surface.
[0046] In some embodiments, the present application provides an image sensor comprising: a substrate with a plurality of side walls defining a plurality of projections along a first side of the substrate, wherein the substrate has a first refractive index; a photodetector arranged in the substrate and beneath the plurality of projections; and a plurality of microlenses above the first side of the substrate, wherein the microlenses have a second refractive index less than the first refractive index, the microlenses are each arranged laterally between and directly contact a pair of adjacent projections of the plurality of projections, and each has a convex top surface.
[0047] In some embodiments, the present application provides an integrated chip comprising: a substrate with a plurality of first projections along a rear side of the substrate, wherein the substrate comprises a first material with a first refractive index; a connecting structure arranged along a front side of the substrate; a photodetector arranged in the substrate and beneath the plurality of first projections; a passivation layer arranged on and between the plurality of first projections, wherein the passivation layer comprises a plurality of second projections along a top side of the passivation layer, wherein the plurality of second projections is different from the plurality of first projections, and wherein the passivation layer comprises a second material with a second refractive index different from the first; and a light filter above the passivation layer.
[0048] In some embodiments, the present application provides a method for manufacturing an image sensor comprising the following steps: performing an ion implantation process to define a photodetector in a substrate; etching a first side of the substrate to define a plurality of protrusions over the photodetector; depositing a dielectric layer over the plurality of protrusions, wherein the dielectric layer comprises a first material; depositing an ARC layer (ARC: antireflection coating) over the dielectric layer, wherein the ARC layer comprises a second material different from the first material; performing a first structuring process on the ARC layer;and performing a second structuring process on the dielectric layer and the ARC layer, defining a plurality of microlenses, each having a convex top surface, wherein the dielectric layer is etched at a first rate during the second structuring process and the ARC layer is etched at a second rate during the second structuring process, the first rate being higher than the second rate.
Claims
[1] Image sensor (100, 200, 300a, 300b) with: a substrate (104) with a plurality of side walls defining a plurality of projections (110) along a first side (104b) of the substrate (104), wherein the substrate (104) has a first refractive index; a photodetector (108) arranged in the substrate (104) and under the plurality of projections (110); and a plurality of microlenses (112) over the first side (104b) of the substrate (104), wherein the microlenses (112) have a second refractive index that is smaller than the first refractive index, wherein the microlenses (112) are each arranged laterally between a pair of adjacent projections (110) of the plurality of projections (110) and directly contact this, and each have a convex top surface (112us). [2] Image sensor (100, 200, 300a, 300b) according to claim 1, wherein the multiple projections (110) are laterally separated from each other by recesses in the first side (104b) of the substrate (104), wherein the multiple microlenses (112) each have a lens projection (112p) that fills a corresponding recess. [3] Image sensor (100, 200, 300a, 300b) according to claim 1 or 2, wherein the substrate (104) comprises silicon and the microlenses (112) comprise silicon dioxide. [4] Image sensor (100, 200, 300a, 300b) according to one of the preceding claims, wherein a height of the plurality of microlenses (112) is greater than a height of the projections (110). [5] Image sensor (100, 200, 300a, 300b) according to any of the preceding claims, wherein the plurality of projections (110) comprises a first projection (110) and a second projection (110) that are laterally adjacent to each other, wherein the first projection (110) has a first upper point (110ts) and the second projection (110) has a second upper point (110ts), wherein a height (hp) of the plurality of projections (110) is less than a lateral distance (d1) between the first and the second upper point (110ts). [6] Image sensor (100, 200, 300a, 300b) according to claim 5, wherein the plurality of microlenses (112) comprises a first microlens (112) arranged between the first and the second projection (110), wherein a convex top surface (112us) of the first microlens (112) is spaced laterally between the first upper point (110ts) of the first projection (110) and the second upper point (110ts) of the second projection (110). [7] Image sensor (100, 200, 300a, 300b) according to claim 5 or 6, wherein the first microlens (112) is configured to direct incident electromagnetic radiation to a focal point (119) under the convex top surface (112us) of the first microlens, wherein the focal point (119) is spaced laterally between the first and second projections (110) and vertically above a bottom surface (110bs) of the plurality of projections (110). [8] Integrated chip (200, 300a, 300b) with: a substrate (104) having a plurality of first projections (110) along a rear side (104b) of the substrate (104), wherein the substrate (104) has a first material with a first refractive index; a connecting structure (102) arranged along a front face (104f) of the substrate (104); a photodetector (108) which is arranged in the substrate (104) and under the plurality of first projections (110); a passivation layer arranged on and between the multiple first projections (110), wherein the passivation layer has a plurality of second projections (112up) along a top surface of the passivation layer, wherein the plurality of second projections (112up) is different from the plurality of first projections (110), and wherein the passivation layer has a second material having a second refractive index different from the first refractive index; and a light filter (304) above the passivation layer. [9] Integrated chip (200, 300a, 300b) according to claim 8, wherein the first projections (110) each have a triangular shape and the second projections (112up) each have a semicircular shape. [10] Integrated chip (200, 300a, 300b) according to claim 8 or 9, wherein an underside of the passivation layer has a plurality of third projections (112lp) that snap into a plurality of recesses spaced apart between the multiple first projections (110) of the substrate (104). [11] Integrated chip (200, 300a, 300b) according to any one of claims 8 to 10, wherein the first refractive index is at least twice as large as the second refractive index. [12] Integrated chip (200, 300a, 300b) according to any one of claims 8 to 11, wherein the photodetector (108) is configured to generate electrical signals from near-infrared radiation, NIR radiation. [13] Integrated chip (200, 300a, 300b) according to any one of claims 8 to 12, wherein the thickness (Ts) of the substrate (104) is about 4 µm to 6 µm. [14] Integrated chip (200, 300a, 300b) according to any one of claims 8 to 13, further comprising an upper lens (306) above the light filter (304), wherein a top surface of the upper lens (306) is convex. [15] Integrated chip (200, 300a, 300b) according to any one of claims 8 to 14, wherein a bottom surface of the light filter (304) directly contacts the plurality of second projections (112up). [16] Method (1000) for manufacturing an image sensor (100, 200, 300a, 300b) by the following steps: Performing an ion implantation process to define a photodetector (108) in a substrate (104); Etching a first side (104b) of the substrate (104) to define a plurality of projections (110) above the photodetector (108); Deposition of a dielectric layer (602) over the plurality of projections (110), wherein the dielectric layer (602) comprises a first material; Deposition of an antireflective coating layer (604), ARC layer (604), over the dielectric layer (602), wherein the ARC layer (604) comprises a second material that is different from the first material; Performing an initial structuring process at the ARC layer (604); and Performing a second structuring process on the dielectric layer (602) and the ARC layer (604), defining a plurality of microlenses (112) each having a convex top surface (110µs), wherein the dielectric layer (602) is etched at a first rate during the second structuring process and the ARC layer (604) is etched at a second rate during the second structuring process, the first rate being higher than the second rate. [17] Method (1000) according to claim 16, wherein the second structuring process comprises a protective dry etching process. [18] Method (1000) according to claim 16 or 17, further comprising manufacturing a light filter (304) over the plurality of microlenses (112) such that the light filter (304) directly contacts the microlenses (112). [19] Method (1000) according to claim 18, further comprising manufacturing an upper lens (306) over the light filter (304) such that the upper lens (306) has a curved top surface. [20] Method (1000) according to one of claims 16 to 19, wherein the second structuring process comprises treating the dielectric layer (602) and the ARC layer (604) with one or more etchants, wherein the one or more etchants comprise octafluorocyclobutane and / or tetrafluoromethane.