ELECTROLUMINESCENT DISPLAY DEVICE AND HEAD-MOUNTED DISPLAY DEVICE

Abstract

An electroluminescent display device comprising: a substrate (100) having a display area (DA) and a non-display area (NDA); an emission device in the display area (DA) on the substrate (100); an encapsulation layer (300) extending from the display region (DA) to the non-display region (NDA), the encapsulation layer (300) being provided on the emission device; a plurality of pad electrodes (400) in the non-display area (NDA) on the substrate (100); and a protective layer (500) provided in the region between each of the plurality of pad electrodes (400) and adapted to protect an insulating layer disposed thereunder, wherein the encapsulation layer (300) is provided with an opening region (OA) configured to expose at least one portion in each of the plurality of pad electrodes (400) and at least one portion of the protective layer (500), and wherein the protective layer (500) is formed from a conductive material.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to an electroluminescent display device and, more particularly, to a method for exposing a pad electrode. BACKGROUND

[0002] An electroluminescence display device is provided such that an emission layer is provided between an anode electrode and a cathode electrode, and the emission layer emits light by means of an electric field generated between the above two electrodes to thereby display an image.

[0003] The emission layer may be formed of an organic material that emits light when an exciton is produced by bonding an electron and a hole and the exciton falls from an excited state to a ground state, or may be formed of an inorganic material such as a quantum dot.

[0004] To enable the emission layer to emit light, various circuit devices are provided, wherein the circuit device can be controlled by an external drive signal applied via a pad electrode. This means that an external drive device is connected to the pad electrode, allowing a drive signal generated in the external drive device to be transmitted to the circuit device via the pad electrode.

[0005] Accordingly, an upper surface of the pad electrode is exposed to the outside to connect the pad electrode to the external drive device. In this case, if the upper surface of the pad electrode is exposed to the outside, it may pose a problem regarding damage to the periphery of the pad electrode.

[0006] US 2018 / 0 350 884 A1 describes a display device comprising a substrate with an active region and a non-active region; a light-emitting element arranged on the substrate; an encapsulation structure arranged on the light-emitting element, wherein the encapsulation structure has a plurality of inorganic encapsulation layers and at least one organic encapsulation layer arranged between the inorganic encapsulation layers; a plurality of touch sensors arranged on the encapsulation structure; at least one dam arranged between the active region and the non-active region; and at least one of a first planarization layer arranged in the non-active region, wherein a side surface of the first planarization layer and a side surface of the encapsulation structure face each other;and wherein an inorganic layer is arranged between the side surface of the first planarization layer and the side surface of the encapsulation structure;

[0007] DE 10 2018 127 234 A1 describes a display device comprising: a first substrate including a display region on which pixels are arranged and a non-display region surrounding the display region; a dam surrounding the display region and arranged on the non-display region; a pad electrode arranged outside the dam; and an encapsulation film covering the display region and comprising a first inorganic film and a second inorganic film arranged on the first inorganic film, wherein the second inorganic film overlaps with the pad electrode.

[0008] DE 10 2018 131 255 A1 describes an electroluminescent display device comprising a substrate having a plurality of pixel regions; an air gap formed above the substrate and configured to separate the plurality of pixel regions; a first electrode arranged in each of the plurality of pixel regions; an insulating pattern configured to cover an edge of the first electrode; a light-emitting portion arranged on the first electrode and the insulating pattern; and a second electrode arranged on the light-emitting portion. SUMMARY

[0009] The present disclosure has been made in view of the above-mentioned problems, and it is an object of the present disclosure to provide an electroluminescence display device that can realize reduction of manufacturing cost and exposure of an upper surface of a pad electrode without damage on its periphery.

[0010] In accordance with one aspect of the present disclosure, the above and other objects can be achieved by providing an electroluminescent display device according to claim 1. Further embodiments are described by means of the dependent claims. In accordance with one aspect of the present disclosure, an electroluminescent display device is provided, comprising a substrate having a display region and a non-display region, an emitting device in the display region on the substrate, an encapsulation layer extending from the display region to the non-display region, the encapsulation layer being provided on the emitting device, a plurality of pad electrodes in the non-display region on the substrate, and a protective layer provided in the region between each of the plurality of pad electrodes and configured to form an insulating layer disposed thereunder.to protect, wherein the encapsulation layer is provided with an opening region configured to expose at least a portion of each of the plurality of pad electrodes and at least a portion of the protective layer, and wherein the protective layer is formed of a conductive material.

[0011] In accordance with another aspect of the present disclosure, an electroluminescent display device is provided, comprising a substrate having a display region and a non-display region, a thin-film transistor provided in the display region on the substrate and configured to have an active layer, a gate electrode, a source electrode, and a drain electrode, a pad electrode provided in the non-display region on the substrate and arranged in the same layer as the source electrode and the drain electrode, a passivation layer extending from the display region to the non-display region, the passivation layer being provided on the thin-film transistor, a protective layer provided on the passivation layer of the non-display region, a planarization layer,provided on the passivation layer of the display region, an emission device provided in the planarization layer, and an encapsulation layer extending from the display region to the non-display region, wherein the encapsulation layer is provided on the electroluminescent display device, wherein the encapsulation layer is provided for exposing at least a portion of the pad electrodes and at least a portion of the protective layer with an opening region, and wherein the protective layer is formed of a conductive material. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The above and other objects, features, and other advantages of the present disclosure will become more clearly understood from the following detailed description when taken in conjunction with the accompanying drawings, in which: Fig. 1 is a plan view illustrating an electroluminescent display device according to an embodiment of the present disclosure; Fig. 2 is a cross-sectional view illustrating the electroluminescent display device according to an embodiment of the present disclosure, which is a cross-sectional view taken along a line I-II of Fig. 1 corresponds; Fig. 3A to Fig. 3D cross-sectional views illustrating a method of manufacturing the electroluminescent display device according to an embodiment of the present disclosure; Fig. 4A is a plan view illustrating an electroluminescent display device according to another embodiment of the present disclosure, corresponding to an enlarged view of the area “A” of the Fig. 1 corresponds; Fig. 4B is a cross-sectional view along a line AB of the Fig. 4A; Fig. 4C is a cross-sectional view along a line CD of the Fig. 4A; Fig. 4D a cross-sectional view along a line EF of the Fig. 4A; Fig. 5A is a plan view illustrating an electroluminescent display device according to another embodiment of the present disclosure, corresponding to an enlarged view of the area “A” of the Fig. 1 corresponds; Fig. 5B is a cross-sectional view along a line AB of the Fig. 5A; Fig. 5C is a cross-sectional view along a line CD of the Fig. 5A; Fig. 5D is a cross-sectional view along a line EF of the Fig. 5A; Fig. 6 is a cross-sectional view illustrating an electroluminescent display device according to another embodiment of the present disclosure, corresponding to a cross-sectional view of a display region; Fig. 7A to Fig. 7C illustrate an electroluminescent display device according to another embodiment of the present disclosure. DETAILED DESCRIPTION OF REVELATION

[0013] Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. Where possible, the same reference numerals are used to identify the same or similar parts throughout the drawings.

[0014] A shape, a size, a ratio, an angle, and a number disclosed in the drawings for describing embodiments of the present disclosure are merely an example, and thus the present disclosure is not limited to these illustrated details. Like reference numerals refer to like parts throughout. In the following description, the detailed description will be omitted when it is determined that the detailed description of the relevant known function or arrangement unnecessarily obscures the important aspect of the present disclosure.

[0015] When designing an element, the element is designed in such a way that it has a fault range, even if there is no explicit description of it.

[0016] When describing a spatial relationship, for example, when a spatial relationship between two parts is described as "on~," "over~," "under~," and "next to~," one or more other parts may be placed between the two parts, except when "exactly" or "directly" is used.

[0017] When describing a temporal relationship, for example, when the temporal sequence is described as "after ~", "following ~", "next ~", and "before ~", a case that does not occur continuously may be included unless "exactly" or "directly" is used.

[0018] It should be noted that while the terms "first," "second," etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, a first element could be referred to as a second element, and similarly, a second element could be referred to as a first element, without departing from the scope of the present disclosure.

[0019] Features of various embodiments of the present disclosure may be partially or fully interconnected or combined with each other, and may be operated and technically controlled in various ways, as will be readily understood by those skilled in the art. The embodiments of the present disclosure may be practiced independently of each other or may be practiced together in an interdependent relationship.

[0020] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0021] Fig. 1 is a plan view illustrating an electroluminescent display device according to an embodiment of the present disclosure.

[0022] As in Fig. 1, the electroluminescent display device according to an embodiment of the present disclosure may include a display area (DA) and a non-display area (NDA) on a substrate 100.

[0023] The display area (DA) contains a plurality of subpixels. Each of the plurality of subpixels contains a circuit device and an emission device.

[0024] The circuit device includes various signal lines, thin-film transistors, and a capacitor. The signal lines may include a gate line, a data line, a power line, and a reference line, and the thin-film transistors may include a switching thin-film transistor, a driving thin-film transistor, and a detecting thin-film transistor.

[0025] The switching thin-film transistor is switched by a gate signal supplied to the gate line, and the switching thin-film transistor supplies a data voltage supplied from the data line to the driving thin-film transistor. The driving thin-film transistor is switched by the data voltage supplied from the switching thin-film transistor, and the driving thin-film transistor generates a data current from the power supplied from the power supply line and supplies the data current to a first electrode of an organic light-emitting device. The detection thin-film transistor detects a deviation of a threshold voltage in the driving thin-film transistor that causes deterioration in image quality.The detection thin film transistor supplies a current of the drive thin film transistor to the reference line in response to a detection control signal supplied from the gate line or an additional detection line.

[0026] The capacitor maintains the data voltage supplied to the drive thin-film transistor for one frame period, and the capacitor is connected to a gate terminal and a source terminal of the drive thin-film transistor, respectively.

[0027] The emission device may include the organic light-emitting device driven by the circuit device, wherein the organic light-emitting device includes a first electrode, a second electrode, and an emission layer provided between the first electrode and the second electrode.

[0028] The non-display area (NDA) is provided in the periphery of the display area (DA). This means that the non-display area (NDA) is provided in the upper peripheral side, the lower peripheral side, the right peripheral side, and the left peripheral side of the display area (DA). The non-display area (NDA) may have a pad area (PA). The pad area (PA) may be provided in the lower peripheral side of the display area (DA), but is not limited to this arrangement. The pad area (PA) may be provided in the upper peripheral side, the right peripheral side, or the left peripheral side of the display area (DA). If necessary, the pad area (PA) may be provided in at least two of the upper peripheral side, the lower peripheral side, the right peripheral side, and the left peripheral side of the display area (DA).

[0029] A plurality of pad electrodes 400 may be provided in the pad region (PA). The plurality of pad electrodes 400 are connected to the various signal lines provided in the display region (DA), such as a gate line, a data line, a power line, or a reference line, via a plurality of connection lines. Accordingly, a drive signal applied from an external drive circuit can be transmitted to the various signal lines provided in the display region (DA) via the plurality of pad electrodes 400. To connect the external drive circuit to the plurality of pad electrodes 400, a contact region is provided in an upper surface of the plurality of pad electrodes 400, whereby at least a portion of the upper surface of the plurality of pad electrodes 400 is exposed to the outside via the contact region.

[0030] Fig. 2 is a cross-sectional view illustrating the electroluminescent display device according to an embodiment of the present disclosure, which is a cross-sectional view taken along a line I-II of Fig. 1 corresponds.

[0031] As in Fig. 2, the driving thin film transistor (T) is provided in the display area (DA) on the substrate 100.

[0032] The substrate 100 may be formed of glass or plastic, but is not limited to these materials. The substrate 100 may be formed of a semiconductor material, such as a silicon wafer. The substrate 100 may be formed of a light-transmitting material or an opaque material.

[0033] The driving thin-film transistor (T) may include an active layer 110, a gate insulating layer 120, a gate electrode 130, an interlayer insulating layer 140, a source electrode 151, and a drain electrode 152. The active layer 110 is formed on the substrate 100, the gate insulating layer 120 is formed on the active layer 110, the gate electrode 130 is formed on the gate insulating layer 120, the interlayer insulating layer 140 is formed on the gate electrode 130, and the source electrode 151 and the drain electrode 152 are formed on the interlayer insulating layer 140, with the source electrode 151 and the drain electrode 152 facing each other.

[0034] The gate insulating layer 120 and the interlayer insulating layer 140 may be formed of an inorganic insulating material and may extend to the non-display area (NDA). Specifically, the gate insulating layer 120 and the interlayer insulating layer 140 may extend to the end of the non-display area (NDA) substrate 100.

[0035] The source electrode 151 is connected to one side of the active layer 110 via a contact hole provided on the gate insulating layer 120 and the interlayer insulating layer 140, and the drain electrode 152 is connected to the other side of the active layer 110 via a contact hole provided on the gate insulating layer 120 and the interlayer insulating layer 140.

[0036] The driving thin-film transistor (T) may be formed in a top-gate structure in which the gate electrode 130 is provided above the active layer 110, but is not limited to this structure. It is possible to provide a bottom-gate structure in which the gate electrode 130 is provided below the active layer 110.

[0037] A passivation layer 160 is formed on the source electrode 151 and the drain electrode 152, and a planarization layer 180 is formed on the passivation layer 160.

[0038] The passivation layer 160 may be formed from an inorganic insulating layer, and the planarization layer 180 may be formed from an organic insulating layer. The passivation layer 160 extends to the non-display area (NDA), and the planarization layer 180 may not extend to the non-display area (NDA). The passivation layer 160 may extend to the end of the substrate 100 of the non-display area (NDA). However, the planarization layer 180 may not extend to the end of the substrate 100 of the non-display area (NDA). In particular, the planarization layer 180 may be provided so as not to overlap with the pad area (PA).

[0039] The organic light-emitting device, which includes a first electrode 200, a dam 210, an emission layer 220, and a second electrode 230, is formed on the planarization layer 180.

[0040] The first electrode 200 is formed on the planarization layer 180. The first electrode 200 can act as an anode. The first electrode 200 can be connected to the drain electrode 152 of the driving thin-film transistor (T) via a contact hole provided in the passivation layer 160 and the planarization layer 180. If necessary, the first electrode 200 can be connected to the source electrode 151 of the driving thin-film transistor (T) via a contact hole provided in the passivation layer 160 and the planarization layer 180.

[0041] The dam 210 covering the periphery of the first electrode 200 is formed as a matrix array in the boundary between each of the plurality of subpixels, thereby defining an emission region in each individual subpixel. This means that an exposed portion of the first electrode 200 not covered by the dam 210 becomes the emission region.

[0042] The emission layer 220 may be provided in the plurality of subpixel regions and may be provided in the boundary region between each of the plurality of subpixels. This means that the emission layer 220 may be formed on the first electrode 200 and the dam 210. The emission layer 220 may be configured to emit white (W) light. For this purpose, the emission layer 220 may include a plurality of stacks for emitting light of different colors.

[0043] The second electrode 230 is formed on the emission layer 220. The second electrode 230 can act as a cathode. Like the emission layer 220, the second electrode 230 can be provided in the plurality of subpixel regions and can be provided in the boundary region between each of the plurality of subpixels.

[0044] The electroluminescent display device according to an embodiment of the present disclosure may be formed in a top-emission type. In this case, the second electrode 230 may comprise a light-transmitting conductive material for transmitting light emitted from the emission layer 220 upward. Likewise, the second electrode 230 may be formed of a semi-transparent electrode, making it possible to achieve a microcavity effect by means of each subpixel. When the second electrode 230 is formed of the semi-transparent electrode, the microcavity effect can be achieved by repeatedly reflecting and re-reflecting the light between the second electrode 230 and the first electrode 200, thereby improving light efficiency. To achieve the microcavity effect, the first electrode 200 may comprise a reflective electrode.In particular, the first electrode 200 may include a lower reflective electrode and an upper translucent electrode. In this case, the reflective electrode and the translucent electrode may be spaced apart from each other, provided a dielectric is interposed therebetween.

[0045] An encapsulation layer 300 is formed on the second electrode 230. The encapsulation layer 300 may include a first encapsulation layer 310, a second encapsulation layer 320, a third encapsulation layer 330, and a fourth encapsulation layer 340.

[0046] The first encapsulation layer 310 is formed on the second electrode 230, the second encapsulation layer 320 is formed on the first encapsulation layer 310, the third encapsulation layer 330 is formed on the second encapsulation layer 320, and the fourth encapsulation layer 340 is formed on the third encapsulation layer 330.

[0047] The first encapsulation layer 310 may extend to the non-display area (NDA). Specifically, the first encapsulation layer 310 may extend to the end of the substrate 100 of the non-display area (NDA), but the first encapsulation layer 310 is not formed in the pad area (PA). The second encapsulation layer 320 may extend to the non-display area (NDA), but the second encapsulation layer 320 does not extend to the end of the substrate 100 of the non-display area (NDA). Specifically, the second encapsulation layer 320 is not formed in the pad area (PA). In the same manner as the structure of the first encapsulation layer 310, the second encapsulation layer 320 may extend to the end of the substrate 100 of the non-display area (NDA). If necessary, the second encapsulation layer 320 may be omitted.The third encapsulation layer 330 may extend to the non-display area (NDA), but the third encapsulation layer 330 does not extend to the end of the substrate 100 of the non-display area (NDA). In particular, the third encapsulation layer 330 is not formed in the pad area (PA). The fourth encapsulation layer 340 may extend to the non-display area (NDA). In particular, the fourth encapsulation layer 340 may extend to the end of the substrate 100 of the non-display area (NDA), but the fourth encapsulation layer 340 is not formed in the pad area (PA). The fourth encapsulation layer 340 may be formed in the same structure as that of the first encapsulation layer 310.

[0048] The encapsulation layer 300 may be formed in an alternating stacked structure of inorganic insulating layers and organic insulating layers. For this purpose, each of the first encapsulation layer to the fourth encapsulation layer 310, 320, 330, and 340 may be formed from the inorganic insulating layer or the organic insulating layer. Specifically, the first encapsulation layer 310 and the fourth encapsulation layer 340, which extend to the end of the substrate 100, may be formed from the inorganic insulating layer, and the third encapsulation layer 330, which does not extend to the end of the substrate 100, may be formed from the organic insulating layer.

[0049] In the non-display area (NDA) of the substrate 100, the gate insulating layer 120 and the interlayer insulating layer 140 are sequentially formed thereon, and the pad electrode 400 is formed on the interlayer insulating layer 140. The pad electrode 400 is formed of the same material as the source electrode 151 and the drain electrode 152, and the pad electrode 400, the source electrode 151, and the drain electrode 152 can be formed by the same process, but are not limited to this method.

[0050] The passivation layer 160 is formed on the pad electrode 400. The passivation layer 160 exposes a portion of a top surface of the pad electrode 400, and the passivation layer 160 overlaps one side of the pad electrode 400 and the other side of the pad electrode 400. This means that a portion of the passivation layer 160 is removed from a portion of the top surface of the pad electrode 400, thereby providing a contact area (CA) between the pad electrode 400 and the external drive circuit. The passivation layer 160 extends to the end of the non-display area (NDA) substrate 100, and the passivation layer 160 may overlap the end of the non-display area (NDA) substrate 100.

[0051] A protective layer 500 is formed on an upper surface of the passivation layer 160 provided between each of the plurality of pad electrodes 400. The protective layer 500 protects the passivation layer 160 provided thereunder. The protective layer 500 may be formed in the same structure as that of the passivation layer 160 provided thereunder. The protective layer 500 is formed of a conductive material such as Al, ITO, IZO, or Ti. In particular, the protective layer 500 and the first electrode 200 may be formed of the same material and may be manufactured by the same process, but are not limited to this method.

[0052] Likewise, the encapsulation layer 300 may be formed on the passivation layer 160 in the non-display area (NDA). The encapsulation layer 300 is removed from the pad area (PA), thereby forming an opening area (OA) achieved by removing the encapsulation layer 300. The opening area (OA) overlaps the pad electrode 400 and the protective layer 500. In particular, the opening area (OA) overlaps the contact area (CA) from which the passivation layer 160 is removed. Accordingly, the pad electrode 400 and the protective layer 500 may be exposed to the outside via the opening area (OA).

[0053] The encapsulation layer 300 is formed in the non-display area (NDA), but the encapsulation layer 300 is not formed in the opening area (OA). Thus, the encapsulation layer 300 may overlap the end of the substrate 100 of the non-display area (NDA). Specifically, the encapsulation layer 300 overlapping the end of the substrate 100 may include the first encapsulation layer 310 made of an inorganic insulating material contacting the upper surfaces of the passivation layer 160 and the protective layer 500, and the fourth encapsulation layer 340 made of an inorganic insulating material contacting the first encapsulation layer 310.

[0054] Accordingly, a thickness of the encapsulation layer 300 provided in the display area (DA) may be greater than a thickness of the encapsulation layer 300 provided in the non-display area (NDA).

[0055] Fig. 3A to Fig. 3D are cross-sectional views illustrating a method of manufacturing the electroluminescent display device according to an embodiment of the present disclosure, illustrating a manufacturing process of the aforementioned electroluminescent display device of the Fig. 2 concern.

[0056] First, as in Fig. 3A, the active layer 110 is formed on the substrate 100, the gate insulating layer 120 is formed on the active layer 110, the gate electrode 130 is formed on the gate insulating layer 120, the interlayer insulating layer 140 is formed on the gate electrode 130, the source electrode 151, the drain electrode 152, and the pad electrode 400 are formed on the interlayer insulating layer 140, the passivation layer 160 is formed on the source electrode 151, the drain electrode 152, and the pad electrode 400, and the planarization layer 180 is formed on the passivation layer 160.

[0057] Accordingly, since a contact hole is formed in a predetermined region of the gate insulating layer 120 and the interlayer insulating layer 140, the source electrode 151 and the drain electrode 152 are connected to one side of the active layer 110 and the other side of the active layer 110 via the contact hole.

[0058] The gate insulating layer 120, the interlayer insulating layer 140, and the passivation layer 160 are formed over the entire display area (DA) and the entire non-display area (NDA). The planarization layer 180 is formed over the display area (DA) and may be formed in a portion of the non-display area (NDA). However, the planarization layer 180 does not overlap the pad electrode 400.

[0059] Then, as in Fig. 3B, the first electrode 200 is formed on the planarization layer 180, the dam 210 is formed to cover the periphery of the first electrode 200, the emission layer 220 is formed on the first electrode 200 and the dam 210, and the second electrode 230 is formed on the emission layer 220.

[0060] Accordingly, since a contact hole is formed in a predetermined region of the passivation layer 160 and the planarization layer 180, the first electrode 200 is connected to the drain electrode 152 or the source electrode 151 via the contact hole.

[0061] Likewise, a protective layer 500 is formed on the passivation layer 160 of the non-display area (NDA). The protective layer 500 is formed on an upper surface of the passivation layer 160 between each of the plurality of pad electrodes 400. The protective layer 500 and the first electrode 200 may be formed from the same material and may be formed using the same process, but are not limited to this method.

[0062] Then, as in Fig. 3C, the encapsulation layer 300 is formed on the second electrode 230 of the display region (DA) and the passivation layer 160 of the non-display region (NDA). Specifically, the first encapsulation layer 310 is formed on the second electrode 230 of the display region (DA) and the passivation layer 160 of the non-display region (NDA), the second encapsulation layer 320 is formed on the first encapsulation layer 310, the third encapsulation layer 330 is formed on the second encapsulation layer 320, and the fourth encapsulation layer 340 is formed on the third encapsulation layer 330.

[0063] The first encapsulation layer 310 is formed on the entire display area (DA) and the entire non-display area (NDA). The second encapsulation layer 320 is formed on the entire display area (DA) and a portion of the non-display area (NDA). In particular, the second encapsulation layer 320 may not overlap the pad electrode 400. The third encapsulation layer 330 is formed on the entire display area (DA) and a portion of the non-display area (NDA). In particular, the third encapsulation layer 330 may not overlap the pad electrode 400. The fourth encapsulation layer 340 is formed on the entire display area (DA) and the entire non-display area (NDA). Thus, in a portion of the non-display area (NDA), the upper surface of the first encapsulation layer 310 is brought into contact with the lower surface of the fourth encapsulation layer 340.

[0064] Then, as in Fig. 3D, the encapsulation layer 300 provided on the plurality of pad electrodes 400 and the boundary region between each of the pad electrodes 400 is removed, and the passivation layer 160 provided thereunder is also removed. Thus, an opening region (OA) is formed by removing the encapsulation layer 300, and the contact region (CA) is formed by removing the passivation layer 160 provided under the encapsulation layer 300. However, the protective layer 500 provided in the boundary region between each of the pad electrodes 400 remains without being removed, whereby the passivation layer 160 provided under the protective layer 500 also remains.

[0065] A process of removing the encapsulation layer 300 and the passivation layer 160 disposed thereunder can be performed by means of a laser ablation process. In this case, there is no need for an additional mask. This means that it is advantageous in that no additional manufacturing costs for the mask are incurred. When laser scanning is performed by means of the laser ablation process, the encapsulation layer 300 and the passivation layer 160 disposed thereunder are removed, but the protective layer 500 remains without being removed. In general, a penetration depth of an electromagnetic wave, such as a laser, into an inorganic insulating material is relatively large, while a penetration depth of an electromagnetic wave, such as a laser, into a conductive material is relatively small.Thus, when using the protective layer 500 made of the conductive material, the protective layer 500 can remain without being removed by the laser ablation process. Accordingly, the passivation layer 160 remains under the protective layer 500, making it possible to prevent damage to the peripheral area of ​​the pad electrode 400, particularly the periphery of the area between each of the pad electrodes 400.

[0066] However, it is not always necessary to perform the laser ablation process to remove the encapsulation layer 300 and the passivation layer 160 provided thereunder. For example, it is possible to perform a dry etching process to remove the encapsulation layer 300 and the passivation layer 160 provided thereunder.

[0067] According to one embodiment of the present disclosure, the protective layer 500 is formed in the boundary region between each of the plurality of pad electrodes 400, whereby the protective layer 500 and the passivation layer 160 provided thereunder remain after the process of removing the encapsulation layer 300 and the passivation layer 160 provided thereunder, so that the upper surface of the plurality of pad electrodes 400 is exposed. Thus, it is possible to prevent the periphery of the region between each of the plurality of pad electrodes 400 from being damaged. In this case, the protective layer 500 is arranged at a distance from the plurality of pad electrodes 400 under the condition that the passivation layer 160 is interposed therebetween, whereby the protective layer 500 is electrically insulated from the plurality of pad electrodes 400.

[0068] Fig. 4A is a plan view illustrating an electroluminescent display device according to another embodiment of the present disclosure, which is an enlarged view of the area “A” of the Fig. 1 corresponds to

[0069] As in Fig. As shown in Figure 4A, the electroluminescent display device according to another embodiment of the present disclosure includes a display area (DA) and a non-display area (NDA) on a substrate 100. Hereinafter, only parts different from those of the above embodiment will be described in detail.

[0070] A pad region (PA) is provided in the non-display region (NDA), and a plurality of pad electrodes 400 and a plurality of first protection layers 510 are provided in the pad region (PA).

[0071] The plurality of pad electrodes 400 are provided at fixed intervals.

[0072] Each of the plurality of pad electrodes 400 has a first side 400a facing the display area (DA), a second side 400b extending from the first side 400a and facing the adjacent pad electrode 400, a third side 400c extending from the second side 400b and facing the first side 400a, and a fourth side 400d extending from the third side 400c and facing the second side 400b. Each of the plurality of pad electrodes 400 is formed in a rectangular structure.

[0073] The plurality of first protective layers 510 are provided at fixed intervals, with each of the first protective layers 510 being disposed between the pad electrodes 400. Each of the plurality of first protective layers 510 is disposed between the second side 400b of one pad electrode 400 and the fourth side 400d of another, adjacent pad electrode 400. Hereinafter, the leftmost first protective layer 510 faces the fourth side 400d of the leftmost pad electrode 400, and the rightmost first protective layer 510 faces the second side 400b of the rightmost pad electrode 400.

[0074] Each of the plurality of first protective layers 510 has a first side 510a facing the display area (DA), a second side 510b extending from the first side 510a and facing the left-side pad electrode 400, a third side 510c extending from the second side 510b and facing the first side 510a, and a fourth side 510d extending from the third side 510c and facing the second side 510b. Each of the plurality of first protective layers 510 is formed in a rectangular structure.

[0075] The first side 510a of the first protective layer 510 and the first side 400a of the pad electrodes 400 may be arranged along the same extended line, whereby it is possible to draw a straight line by combining the first side 510a in the plurality of first protective layers 510 and the first side 400a in the plurality of pad electrodes 400.

[0076] The second side 510b of the first protective layer 510 may or may not coincide with the second side 400b of a single-sided pad electrode 400 (e.g., a left-side pad electrode). Specifically, the second side 510b of the first protective layer 510 extends to an upper portion of the left-side pad electrode 400 area, so that the first protective layer 510 may overlap the left-side pad electrode 400.

[0077] The third side 510c of the first protective layer 510 and the third side 400c of the pad electrode 400 may be arranged along the same extended line, whereby it is possible to draw a straight line by combining the third side 510c in the plurality of first protective layers 510 and the third side 400c in the plurality of pad electrodes 400.

[0078] The fourth side 510d of the first protective layer 510 may or may not coincide with the fourth side 400d of the other-side pad electrode 400 (e.g., a right-side pad electrode). Specifically, the fourth side 510d of the first protective layer 510 extends to an upper portion of the right-side pad electrode 400 area, so that the first protective layer 510 may overlap the right-side pad electrode 400.

[0079] The first protective layer 510 may be arranged while not facing the first side 400a and the third side 400c of the pad electrode 400.

[0080] An opening region (OA) achieved by removing the encapsulation layer 300 is provided on the first protection layer 510 and the pad electrode 400, and a contact region (CA) is provided in an overlap region between the opening region (OA) and the pad electrode 400.

[0081] As described above, the opening region (OA) may be a region from which the encapsulation layer 300 is removed by a laser ablation process, and may be a region formed in a rectilinear structure while overlapping a portion of the plurality of first protection layers 510 and a portion of the plurality of pad electrodes 400.

[0082] The opening area (OA) does not extend to the periphery of the first protective layer 510 and the pad electrode 400, whereby the entire opening area (OA) overlaps the first protective layer 510 and the pad electrode 400. If the opening area (OA) extends to the periphery of the first protective layer 510 and the pad electrode 400, the encapsulation layer 300 is removed from the area not protected by the first protective layer 510, which may damage the peripheral area of ​​the pad electrode 400.

[0083] The opening area (OA) may be smaller than the entire area of ​​the first protective layer 510 and the pad electrode 400, but is not limited to this structure. The opening area (OA) may be identical in size to the entire area of ​​the first protective layer 510 and the pad electrode 400.

[0084] One end of the opening region (OA), for example, an upper end of the opening region (OA), may or may not coincide with the first side 510a of the first protective layer 510 and the first side 400a of the pad electrode 400. Likewise, the other end of the opening region (OA), for example, a lower end of the opening region (OA), may or may not coincide with the third side 510c of the first protective layer 510 and the third side 400c of the pad electrode 400. Likewise, a lateral end of the opening region (OA) may or may not coincide with the second side 510b or the fourth side 510d of the first protective layer 510.

[0085] Fig. 4B is a cross-sectional view taken along a line AB of the Fig. 4A.

[0086] As in Fig. 4B, a gate insulating layer 120 is formed on the substrate 100, an interlayer insulating layer 140 is formed on the gate insulating layer 120, and a plurality of pad electrodes 400 are formed on the interlayer insulating layer 140.

[0087] A passivation layer 160 is formed on the plurality of pad electrodes 400, and a first protective layer 510 is formed on the passivation layer 160. Each of the second side 400b and the fourth side 400d of the pad electrode 400 is overlapped by the first protective layer 510, and each of the second side 510b and the fourth side 510d of the first protective layer 510 overlaps the pad electrode 400.

[0088] The first protective layer 510 disposed between the adjacent two pad electrodes 400 is formed in the same structure as that of the passivation layer 160 formed under the first protective layer 510.

[0089] An encapsulation layer 300 is formed on the upper surface of the first protective layer 510 provided at one end (for example, a leftmost first protective layer). Specifically, a first encapsulation layer 310 of an inorganic insulating layer is formed on the upper surface of the first protective layer 510, and a fourth encapsulation layer 340 of an inorganic insulating layer is formed on the first encapsulation layer 310. The encapsulation layer 300 overlaps a portion of the leftmost first protective layer 510, but does not overlap the remaining portions of the first protective layer 510 and the pad electrode 400. Thus, a region where the encapsulation layer 300 is not formed becomes an opening region (OA), and a region for exposing the pad electrode 400 in the opening region (OA) becomes a contact region (CA).

[0090] Fig. 4C is a cross-sectional view along a line CD of the Fig. 4A.

[0091] As in Fig. 4C, a gate insulating layer 120 is formed on the substrate 100, an interlayer insulating layer 140 is formed on the gate insulating layer 120, and a pad electrode 400 is formed on the interlayer insulating layer 140.

[0092] A passivation layer 160 is formed on the pad electrode 400, and an encapsulation layer 300 is formed on the passivation layer 160.

[0093] Each of the first side 400a and the third side 400c of the pad electrode 400 is overlapped by the passivation layer 160 and the encapsulation layer 300. An opening region (OA) is formed by removing a portion of the encapsulation layer 300 on the pad electrode 400, and a contact region (CA) for exposing a portion of the upper surface of the pad electrode 400 is provided by removing a portion of the passivation layer 160 provided on the pad electrode 400. An end of the passivation layer 160 contacting the contact region (CA) coincides with an end of the encapsulation layer 300.

[0094] The encapsulation layer 300 includes a first encapsulation layer 310 of an inorganic insulating layer provided on the upper surface of the passivation layer 160 and a fourth encapsulation layer 340 of an inorganic insulating layer provided on the upper surface of the first encapsulation layer 310.

[0095] Fig. 4D is a cross-sectional view along a line EF of the Fig. 4A.

[0096] As in Fig. 4D, a gate insulating layer 120 is formed on the substrate 100, an interlayer insulating layer 140 is formed on the gate insulating layer 120, a passivation layer 160 is formed on the interlayer insulating layer 140, and a first protection layer 510 is formed on the passivation layer 160.

[0097] An encapsulation layer 300 is formed on the first protective layer 510. The encapsulation layer 300 includes a first encapsulation layer 310 of an inorganic insulating layer provided on the upper surface of the first protective layer 510, and a fourth encapsulation layer 340 of an inorganic insulating layer provided on the upper surface of the first encapsulation layer 310.

[0098] Each of the first side 510a and the third side 510c of the first protective layer 510 is overlapped by the encapsulation layer 300. An opening region (OA) for exposing a portion of the upper surface of the first protective layer 510 is provided by removing a portion of the encapsulation layer 300 provided on the first protective layer 510. The first encapsulation layer 310 is structured such that an end of the first encapsulation layer 310 contacting the opening region (OA) coincides with an end of the fourth encapsulation layer 340.

[0099] Fig. 5A is a plan view illustrating an electroluminescent display device according to another embodiment of the present disclosure, corresponding to an enlarged view of the area “A” of the Fig. 1. In the following, only different parts that are different from those of the Fig. 4A, will be described in detail.

[0100] As in Fig. 5A, a plurality of pad electrodes 400 and a protective layer 500 are formed on a substrate 100. In the same manner as each of the plurality of pad electrodes 400 shown in Fig. 4A, each of the plurality of pad electrodes shown in Fig. 5A, a first side 400a, a second side 400b, a third side 400c and a fourth side 400d.

[0101] The protective layer 500 includes a plurality of first protective layers 510 and a second protective layer 520 provided to interconnect the plurality of first protective layers 510. In the same manner as the plurality of first protective layers 510 shown in Fig. 4A, the first protective layer 510 has a first side 510a, a second side 510b, a third side 510c, and a fourth side 510d.

[0102] The second protective layer 520 contacts the third side 510c in each of the plurality of first protective layers 510 and also faces the third side 400c of the pad electrode 400. The first protective layer 510 and the second protective layer 520 are formed of the same material and are formed as one body. Thus, according to another embodiment of the present disclosure, the protective layer 500 faces the second side 400b, the third side 400c, and the fourth side 400d, except for the first side 400a, of the pad electrode 400.

[0103] An opening region (OA) may be formed in a rectilinear structure while overlapping a portion of the plurality of first protective layers 510, a portion of the second protective layer 520, and a portion of the plurality of pad electrodes 400. However, the opening region (OA) may not overlap the second protective layer 520, whereby the opening region (OA) may be identical in structure to that of the opening region (OA) formed in Fig. 4A is shown.

[0104] One end of the opening region (OA), for example, an upper end of the opening region (OA), may or may not coincide with the first side 510a of the first protective layer 510 and the first side 400a of the pad electrode 400. Likewise, the other end of the opening region (OA), for example, a lower end of the opening region (OA), may or may not coincide with the lower end of the second protective layer 520. Likewise, a lateral end of the opening region (OA) may or may not coincide with the second side 510b or the fourth side 510d of the first protective layer 510.

[0105] According to another embodiment of the present disclosure, the second protective layer 520 is additionally provided so that the entire area of ​​the protective layer 500 is reduced compared to the case of Fig. 4A is relatively larger. Thus, a process tolerance for forming the opening area (OA) by removing the encapsulation layer 300 can be large, and a contact area (CA) for exposing the pad electrode 400 to the outside can be increased.

[0106] Fig. 5B is a cross-sectional view taken along a line AB of the Fig. 5A, which is identical to the above Fig. 4B, thereby omitting repeated description of the same parts.

[0107] Fig. Figure 5C is a cross-sectional view along a line CD of the Fig. 5A.

[0108] As in Fig. 5C, a gate insulating layer 120 is formed on the substrate 100, an interlayer insulating layer 140 is formed on the gate insulating layer 120, a pad electrode 400 is formed on the interlayer insulating layer 140, and a passivation layer 160 is formed on the pad electrode 400.

[0109] An encapsulation layer 300 is formed on the passivation layer 160 disposed over a first side 400a of the pad electrode 400, a second protection layer 520 is formed on the passivation layer 160 disposed over a third side 400c of the pad electrode 400, and an encapsulation layer 300 is formed on the second protection layer 520.

[0110] The first side 400a of the pad electrode 400 is overlapped by the passivation layer 160 and the encapsulation layer 300, and the third side 400c of the pad electrode 400 is overlapped by the passivation layer 160 and the second protection layer 520.

[0111] An opening area (OA) is formed by removing a portion of the encapsulation layer 300 provided over the pad electrode 400 and removing a portion of the encapsulation layer 300 provided over the second protection layer 520. Likewise, a contact area (CA) is formed for exposing a portion of the upper surface of the pad electrode 400 by removing a portion of the passivation layer 160 provided over the gate electrode 400. The opening area (OA) is relatively larger than the contact area (CA), and the entire contact area (CA) is overlapped by the opening area (OA).

[0112] In the vicinity of the first side 400a of the pad electrode 400, the passivation layer 160 is structured such that one end of the passivation layer 160 coincides with one end of the encapsulation layer 300. However, in the vicinity of the third side 400c of the pad electrode 400, one end of the passivation layer 160 does not coincide with one end of the encapsulation layer 300.

[0113] The encapsulation layer 300 includes a first encapsulation layer 310 of an inorganic insulating layer provided on the upper surface of the passivation layer 160 and a fourth encapsulation layer 340 of an inorganic insulating layer provided on the upper surface of the first encapsulation layer 310.

[0114] Fig. Figure 5D is a cross-sectional view along a line EF of the Fig. 5A.

[0115] As in Fig. 5D, a gate insulating layer 120 is formed on the substrate 100, an interlayer insulating layer 140 is formed on the gate insulating layer 120, a passivation layer 160 is formed on the interlayer insulating layer 140, and a first protective layer 510 and a second protective layer 520 are formed on the passivation layer 160.

[0116] An encapsulation layer 300 is formed on the first protective layer 510 and the second protective layer 520. The encapsulation layer 300 includes a first encapsulation layer 310 of an inorganic insulating layer provided on the upper surface of the first protective layer 510 and the second protective layer 520, and a fourth encapsulation layer 340 of an inorganic insulating layer provided on the upper surface of the first encapsulation layer 310.

[0117] One end of the first protective layer 510 and one end of the second protective layer 520 are each overlapped by the encapsulation layer 300. An opening region (OA) for exposing a portion of the upper surface of the first protective layer 510 and the second protective layer 520 is provided by removing a portion of the encapsulation layer 300 provided above the first protective layer 510 and the second protective layer 520. An end of the first encapsulation layer 310 contacting the opening region (OA) coincides with an end of the fourth encapsulation layer 340.

[0118] Fig. 6 is a cross-sectional view illustrating an electroluminescent display device according to another embodiment of the present disclosure, corresponding to a cross-sectional view of a display region.

[0119] As in Fig. 6, the electroluminescent display device according to another embodiment of the present disclosure includes a substrate 100, a circuit device layer 150, a planarization layer 180, a first electrode 200, a dam 210, an emission layer 220, a second electrode 230, an encapsulation layer 300, and a color filter layer 610, 620, and 630. Hereinafter, only different parts from those of the above embodiment will be described in detail.

[0120] The circuit device layer 150 is provided on the substrate 100. In the circuit device layer 150, a circuit device including various signal lines, thin-film transistors, and a capacitor is provided by each subpixel (P1, P2, P3). In particular, as shown in Fig. 2, an active layer 110, a gate insulating layer 120, a gate electrode 130, an insulating interlayer 140, a source electrode 151, a drain electrode 152 and a passivation layer 160 may be provided.

[0121] The planarization layer 180 is provided on the circuit device layer 150, and the first electrode 200 is patterned on the planarization layer 180 by each subpixel (P1, P2, P3). The first electrode 200 is connected to a source electrode or a drain electrode of the driving thin-film transistor (T) provided in the circuit device layer 150.

[0122] The dam 210 is arranged to overlap both ends of the first electrode 200 while being provided on the planarization layer 180. Here, a portion of the upper surface of the first electrode 200 exposed without being covered by the dam 210 can become an emission region.

[0123] A trench (T) of a trench structure is provided on the dam 210 and the planarization layer 180. The trench (T) may penetrate the dam 210 in the boundary region between each of the subpixels (P1, P2, P3) and may extend to a predetermined portion of the planarization layer 180. Thus, the trench (T) may be formed by removing the predetermined portion of the planarization layer 180 and the dam 210. Likewise, but not shown, the trench (T) may extend to the inside of the circuit device layer 150 under the planarization layer 180.

[0124] The notch (T) is provided to separate at least a portion of the emission layer 220 from the remaining portion of the emission layer 220. This means that since at least a portion of the emission layer 220 is provided non-contiguously, it is possible to prevent charge transfer between the adjacent subpixels (P1, P2, P3) through the emission layer 220, thereby preventing leakage current between the adjacent subpixels (P1, P2, P3). To provide the at least a portion of the emission layer 220 non-contiguously in the notch (T), a depth (b) of the notch (T) is preferably greater than a width (a) of the notch (T).

[0125] The emission region 220 is provided in the plurality of subpixels (P1, P2, P3) and the boundary region between each of the plurality of subpixels (P1, P2, P3). That is, the emission layer 220 is formed on the first electrode 200 and the dam 210, and also on the planarization layer 180 within the recess (T).

[0126] The emission layer 220 may be configured to emit white (W) light. For this purpose, the emission layer 220 may comprise a plurality of stacks configured to emit light of different colors. Specifically, the emission layer 220 may comprise a first stack 221 for emitting light of a first color, a second stack 223 for emitting light of a second color, and a charge generation layer (CGL) 222 provided between the first stack 221 and the second stack 223.

[0127] The emission layer 220 is formed within the notch (T) and above the notch (T). According to one embodiment of the present disclosure, when the emission layer 220 is formed within the notch (T), at least a portion of the emission layer 220 is provided non-continuously, so that it is possible to prevent leakage current from occurring in the region between the adjacent subpixels (P1, P2, P3).

[0128] The first stack 221 may be formed on a side surface within the recess (T) and may also be formed on a bottom surface within the recess (T).

[0129] In this case, with respect to the center of the notch (T), a first portion 221a of the first stack 221, formed on one lateral surface of the inside of the notch (T), for example, a left-side lateral surface of the inside of the notch (T), is separated from a second portion 221b of the first stack 221, formed on the other lateral surface of the inside of the notch (T), for example, a right-side lateral surface of the inside of the notch (T). Likewise, a third portion 221c of the first stack 221, formed on the lower surface of the inside of the notch (T), is separated from the first portion 221a and the second portion 221b of the first stack 221, which are formed on the lateral surfaces of the inside of the notch (T).Accordingly, charges in the region between the subpixels (P1, P2, P3) arranged adjacent to each other are not transferred through the first stack 221 under the condition that the notch (T) is inserted therebetween.

[0130] Likewise, the charge generation layer 222 is formed on the first stack 221. In this case, the charge generation layer 222 may be formed only over the notch (T) without being provided inside the notch (T). This means that the charge generation layer 222 may be provided over an upper surface 210a of an end of the dam 210 through which the notch (T) passes. In other words, the charge generation layer 222 may be provided over the upper surface 210a of an end of the dam 210 that contacts the notch (T), but is not limited to this structure. The charge generation layer 222 may extend to the inside of the notch (T).

[0131] In this case, with respect to the center of the notch (T), a first portion 222a of the charge generation layer 222, formed on one side surface of the inside of the notch (T), for example, a left-side side surface of the inside of the notch (T), is separated from a second portion 222b of the charge generation layer 222, formed on the other side surface of the inside of the notch (T), for example, a right-side side surface of the inside of the notch (T). The first portion 222a of the charge generation layer 222 is formed on the first portion 221a of the first stack 221, and the second portion 222b of the charge generation layer 222 is formed on the second portion 221b of the first stack 221.

[0132] Accordingly, charges in the region between the subpixels (P1, P2, P3) arranged adjacent to each other are not transferred through the charge generation layer 222 under the condition that the notch (T) is inserted therebetween.

[0133] Likewise, the second stack 223 may be provided continuously without interruption in the area between the subpixels (P1, P2, P3) arranged adjacent to each other, provided that the notch (T) is interposed therebetween. That is, with respect to the center of the notch (T), a first portion 223a of the second stack 223 formed on one lateral surface of the inside of the notch (T), for example, a left-side lateral surface of the inside of the notch (T), is connected to a second portion 223b of the second stack 223 formed on the other lateral surface of the inside of the notch (T), for example, a right-side lateral surface of the inside of the notch (T).Thus, in the area between the subpixels (P1, P2, P3) arranged adjacent to each other, charges are transferred through the second stack 223 under the condition that the notch (T) is inserted therebetween.

[0134] In this case, a first thickness (d1) in the portion of the second stack 223 corresponding to the portion of the notch (T) in which the charge generation layer 222 is provided non-continuously may be relatively smaller than a second thickness (d2) in the portion of the second stack 223 corresponding to the portion not overlapping the notch (T). In other words, the first thickness (d1) in the portion of the second stack 223 overlapping the portion between the first portion 222a of the charge generation layer 222 and the second portion 222b of the charge generation layer 222 is relatively smaller than the second thickness (d2) in the first portion 223a or the second portion 223b of the second stack 223 overlapping the dam 210.

[0135] The reason why the first thickness (d1) is relatively smaller in the portion of the second stack 223 is that the second stack 223 is arranged in such a manner that the second stack 223 on the upper surface of the first portion 222a of the charge generation layer 222 is first arranged at a distance from the second stack 223 on the upper surface of the second portion 222b of the charge generation layer 222, and then meets the second stack 223 on the upper surface of the second portion 222b of the charge generation layer 222. Thus, a portion of the lower portion of the second stack 223 formed in the relatively small first thickness (d1) can be provided non-continuously above the recess (T). This means that a portion of the lower portion of the first portion 223a of the second stack 223 may be non-contiguous from a portion of the lower portion of the second portion 223b of the second stack 223.

[0136] A hole (H) is formed within the notch (T) by the structure of the first stack 221, the charge generation layer 222, and the second stack 223. The hole (H) is defined by the planarization layer 180 and the emission layer 220, and the hole (H) is provided below the emission layer 220. That is, the hole (H) provided below the emission layer 220 is defined by the planarization layer 180, the first stack 221, the charge generation layer 222, and the second stack 223. The hole (H) extends from the inside of the notch (T) to the top portion of the notch (T), and the end (HT) of the hole (H) is located relatively higher than at least a portion of the emission layer 220, which is provided discontinuously within the notch (T).Specifically, the end (HT) of the hole (H) is arranged relatively higher than the charge generation layer 222, and the first portion 222a of the charge generation layer 222 and the second portion 222b of the charge generation layer 222 are separated from each other by the hole (H).

[0137] A conductivity of the charge generation layer 222 is greater than a conductivity of each of the first stack 221 and the second stack 223. In particular, an N-type charge generation layer for the charge generation layer 222 may include a metal material, whereby a conductivity of the charge generation layer 222 is greater than a conductivity of each of the first stack 221 and the second stack 223. Thus, a charge transfer between the adjacent subpixels (P1, P2, P3) arranged adjacently is substantially performed through the charge generation layer 222, and a charge transfer between the second stack 223 is not significant.Thus, according to another embodiment of the present disclosure, the charge generation layer 222 is provided non-continuously within the recess (T), so that it is possible to largely reduce the charge transfer between the adjacent subpixels (P1, P2, P3) arranged adjacent to each other, thereby preventing an occurrence of leakage current.

[0138] The second electrode 230 is formed in each subpixel (P1, P2, P3) on the emission layer 220 and is also formed in the boundary region between each of the subpixels (P1, P2, P3) on the emission layer 220.

[0139] The encapsulation layer 300 is formed on the second electrode 230. In the same manner as the above embodiments, the encapsulation layer 300 may include a first encapsulation layer 310, a second encapsulation layer 320, a third encapsulation layer 330, and a fourth encapsulation layer 340.

[0140] The color filter layers 610, 620, and 630 are formed on the encapsulation layer 300. The color filter layers 610, 620, and 630 may include, but are not limited to, a red (R) color filter layer 610 provided in the first subpixel (P1), a green (G) color filter layer 620 provided in the second subpixel (P2), and a blue (B) color filter layer 630 provided in the third subpixel (P3). Here, although not shown, a black matrix may additionally be provided in the region between each of the color filter layers 610, 620, and 630, so that it is possible to prevent light leakage in the boundary region between each of the subpixels (P1, P2, P3).

[0141] Fig. 7A to Fig. 7C relate to an electroluminescent display device according to another embodiment of the present disclosure and relate to a head-mounted display (HMD) device. Fig. 7A is a schematic perspective view, Fig. 7B is a schematic plan view of a virtual reality (VR) structure, and Fig. Figure 7C is a schematic cross-sectional view of an augmented reality (AR) structure.

[0142] As in Fig. 7A, the HMD device according to the present disclosure may include a receiving housing 10 and a head mounting band 30.

[0143] The receiving housing 10 can accommodate elements such as a display device, a lens array and an eyepiece lens.

[0144] The head-mounting strap 30 may be attached to the receiving housing 10. The head-mounting strap 30 is illustrated as being designed to surround a top surface and both side surfaces of a user, but is not limited thereto. The head-mounting strap 30 may secure the HMD device to a user's head and may be replaced by a goggle-frame type structure or a helmet type structure.

[0145] As in Fig. 7B, an HMD device having the VR structure according to the present disclosure may include a left-eye display device 12, a right-eye display device 11, a lens array 13, a left-eye eyepiece 20a, and a right-eye eyepiece 20b.

[0146] The left-eye display device 12, the right-eye display device 11, the lens array 13, the left-eye eyepiece 20a and the right-eye eyepiece 20b may be accommodated in the accommodating housing.

[0147] The left-eye display device 12 and the right-eye display device 11 may display the same image, and in this case, a user can view a two-dimensional (2D) image. Alternatively, the left-eye display device 12 may display a left-eye image, and the right-eye display device 11 may display a right-eye image. Each of the left-eye display device 12 and the right-eye display device 11 may be implemented as the electroluminescent display device explained above. In this case, an upper portion (e.g., a color filter layer 610, 620, and 630) corresponding to a surface displaying an image may face the lens array 13.

[0148] The lens array 13 may be arranged at a distance from both the left-eye eyepiece 20a and the left-eye display device 12, and may be provided between the left-eye eyepiece 20a and the left-eye display device 12. This means that the lens array 13 may be arranged in front of the left-eye eyepiece 20a and behind the left-eye display device 12. Likewise, the lens array 13 may be arranged at a distance from both the right-eye eyepiece 20b and the right-eye display device 11, and may be provided between the right-eye eyepiece 20b and the right-eye display device 11. This means that the lens array 13 may be arranged in front of the right-eye eyepiece 20b and behind the right-eye display device 11.

[0149] The lens array 13 may be a microlens array. The lens array 13 may be replaced with a pinhole array. By using the lens array 13, an image displayed by the left-eye display device 12 or the right-eye display device 11 can be zoomed to a specific magnification, and thus a zoomed-in image can be viewed by a user.

[0150] A left eye LE of a user may be arranged on the left-eye eyepiece 20a, and a right eye RE of the user may be arranged on the right-eye eyepiece 20b.

[0151] As in Fig. 7C, an HMD device having the AR structure according to the present disclosure may include a left-eye display device 12, a lens array 13, a left-eye eyepiece 20a, a light-transmitting reflection part 14, and a light-transmitting window 15. In Fig.7C, only left-eye elements are shown for convenience, and right-eye elements may be the same as the left-eye elements.

[0152] The left-eye display device 12, the lens array 13, the left-eye eyepiece 20a, the light-transmitting reflection part 14 and the light-transmitting window 15 may be accommodated in the accommodating case 10.

[0153] The left-eye display device 12 can be arranged in one side (e.g., an upper side) of the light-transmitting reflection part 14 without obscuring the light-transmitting window 15. Therefore, the left-eye display device 12 can provide an image on the light-transmitting reflection part 14 without obscuring an external background seen through the light-transmitting window 15.

[0154] The left-eye display device 12 may be implemented as the electroluminescent display device as explained above. In this case, an upper portion (for example, a color filter layer 610, 620, and 630) corresponding to a surface that displays an image may face the light-transmitting reflection part 14.

[0155] The lens matrix 13 may be provided between the left-eye eyepiece 20a and the light-transmitting reflection part 14.

[0156] The user's left eye may be arranged on the left-eye eyepiece 20a.

[0157] The light-transmitting reflection part 14 may be arranged between the lens array 13 and the light-transmitting window 15. The light-transmitting reflection part 14 may have a reflection surface 14a that transmits part of the light and reflects the other part of the light. The reflection surface 14a may be provided such that an image displayed by the left-eye display device 12 spreads toward the lens array 13. Accordingly, the user can view the entire external background and the image displayed by the left-eye display device 12 through the light-transmitting window 15. This means that the user can view an image including a real background and a virtual image, and thus AR can be implemented.

[0158] The translucent window 15 may be arranged in front of the translucent reflection part 14.

[0159] According to one embodiment of the present disclosure, the protective layer is provided in the boundary region between each of the plurality of pad electrodes. Thus, for the process of removing the encapsulation layer and the passivation layer provided thereunder to expose the upper surface of the plurality of pad electrodes, the protective layer and the passivation layer provided thereunder remain, making it possible to prevent damage to the peripheral region between each of the plurality of pad electrodes.

[0160] The feature, structure, and effect described in at least one embodiment of the present disclosure can be implemented by those skilled in the art through a combination or modification of other embodiments. Therefore, content associated with the combination and modification should be construed as being within the scope of the present disclosure.

Claims

[1] An electroluminescent display device comprising: a substrate (100) having a display area (DA) and a non-display area (NDA); an emission device in the display area (DA) on the substrate (100); an encapsulation layer (300) extending from the display region (DA) to the non-display region (NDA), the encapsulation layer (300) being provided on the emission device; a plurality of pad electrodes (400) in the non-display area (NDA) on the substrate (100); and a protective layer (500) provided in the region between each of the plurality of pad electrodes (400) and adapted to protect an insulating layer arranged thereunder, wherein the encapsulation layer (300) is provided with an opening region (OA) configured to expose at least one portion in each of the plurality of pad electrodes (400) and at least one portion of the protective layer (500), and wherein the protective layer (500) is formed from a conductive material. [2] The electroluminescent display device according to claim 1, wherein the insulating layer comprises a passivation layer (160) provided under the protective layer (500), and the protective layer (500) and the passivation layer (160) provided thereunder overlap the plurality of pad electrodes (400). [3] The electroluminescent display device according to any one of claims 1 to 2, wherein each of the plurality of pad electrodes (400) is connected to an external driving circuit via a contact region (CA), and the contact region (CA) is overlapped by the opening region (OA). [4] The electroluminescence display device according to any one of claims 1 to 3, wherein the opening region (OA) is formed in an elongated rectilinear structure while overlapping the plurality of pad electrodes (400) and the protective layer (500). [5] The electroluminescent display device according to claim 4, wherein a size in the opening region (OA) is equal to or smaller than a size in an entire region including the plurality of pad electrodes (400) and the protective layer (500). [6] The electroluminescent display device according to any one of claims 1 to 5, wherein each of the plurality of pad electrodes (400) has a first side (400a) opposite the display area (DA), a second side (400b) extending from the first side (400a) and opposite the adjacent pad electrode (400), and a third side (400c) extending from the second side (400b) and opposite the first side (400a), and wherein the protective layer (500) comprises a plurality of first protective layers (510), each first protective layer (510) being provided between each of the plurality of pad electrodes (400), and each of the plurality of first protective layers (510) has a first side (510a) facing the display area (DA), a second side (510b) extending from the first side (510a) and facing a pad electrode (400), and a third side (510c) extending from the second side (510b) and facing the first side (510a). [7] The electroluminescent display device according to claim 6, wherein each of the plurality of first protective layers (510) does not oppose the first side (400a) of the plurality of pad electrodes (400). [8] The electroluminescent display device according to claim 6 or 7, wherein the second side (510b) in each of the plurality of first protective layers (510) overlaps each of the plurality of pad electrodes (400). [9] The electroluminescent display device according to any one of claims 6 to 8, wherein the first side (510a) in each of the plurality of first protective layers (510) and the first side (400a) in each of the plurality of pad electrodes (400) are arranged along the same extended line. [10] The electroluminescent display device according to any one of claims 6 to 9, further comprising a second protective layer (520) contacting the third side (510c) in each of the plurality of first protective layers (510) and opposing the third side (400c) in each of the plurality of pad electrodes (400). [11] The electroluminescent display device according to claim 10, wherein the opening region (OA) overlaps a portion of the first protective layers (510) and a portion of the second protective layer (520). [12] The electroluminescent display device according to any one of claims 1 to 11, wherein the encapsulation layer (300) comprises a first inorganic insulating layer, an organic insulating layer on the first inorganic insulating layer, and a second inorganic insulating layer on the organic insulating layer, the first inorganic insulating layer and the second inorganic insulating layer extend to one end of the substrate (100) and the organic insulating layer does not extend to one end of the substrate (100), and an upper surface of the first inorganic insulating layer and a lower surface of the second inorganic insulating layer contact each other at one end of the substrate (100). [13] The electroluminescent display device according to claim 12, wherein a portion of the first inorganic insulating layer and a portion of the second inorganic insulating layer overlap the pad electrode (400) and the protective layer (500). [14] The electroluminescent display device according to any one of claims 1 to 13, wherein the emission device comprises a first electrode (200), a dam (210) adapted to surround the periphery of the first electrode (200), an emission layer (220) provided on the first electrode (200) and the dam (210), and a second electrode (230) provided on the emission layer (220), and a portion of the emission layer (220) is provided non-continuously within a notch (T) in the dam (210). [15] An electroluminescent display device comprising: a substrate (100) having a display area (DA) and a non-display area (NDA); a thin film transistor provided in the display area (DA) on the substrate (100) and configured to have an active layer (110), a gate electrode (130), a source electrode (151) and a drain electrode (152); a pad electrode (400) provided in the non-display area (NDA) on the substrate (100) and arranged in the same layer as the source electrode (151) and the drain electrode (152); a passivation layer (160) extending from the display region (DA) to the non-display region (NDA), the passivation layer (160) being provided on the thin film transistor; a protective layer (500) provided on the passivation layer (160) of the non-display area (NDA); a planarization layer (180) provided on the passivation layer (160) of the display area (DA); an emission device provided in the planarization layer (180); and an encapsulation layer (300) extending from the display area (DA) to the non-display area (NDA), the encapsulation layer (300) being provided on the emission device, wherein the encapsulation layer (300) is provided with an opening region (OA) for exposing at least a portion of the pad electrode (400) and at least a portion of the protective layer (500), and wherein the protective layer (500) is formed from a conductive material. [16] The electroluminescent display device according to claim 15, wherein the emission device comprises a first electrode (200), a second electrode (230) and an emission layer (220) provided between the first electrode (200) and the second electrode (230), and the protective layer (500) and the first electrode (200) are formed from the same material. [17] The electroluminescence display device according to claim 15 or 16, wherein the protective layer (500) and the passivation layer (160) disposed thereunder overlap the pad electrode (400), at least a portion of the pad electrode (400) is connected to an external driving circuit via a contact region (CA), and the contact region (CA) is overlapped by the opening region (OA). [18] The electroluminescence display device according to any one of claims 15 to 17, wherein a thickness of the encapsulation layer (300) provided in the display region (DA) is greater than a thickness of the encapsulation layer (300) provided in the non-display region (NDA), and the encapsulation layer (300) provided in the non-display region (NDA) overlaps one end of the substrate (100). [19] The electroluminescent display device according to claim 15, wherein the emission device comprises a first electrode (200), a dam (210) adapted to surround the periphery of the first electrode (200), an emission layer (220) provided on the first electrode (200) and the dam (210), and a second electrode (230) provided on the emission layer (220), and a portion of the emission layer (220) is provided non-continuously within a notch (T) in the dam (210). [20] A head-mounted display device comprising: the electroluminescent display device according to any one of claims 1 to 19. [21] The head-mounted display device according to claim 20, further comprising a lens array (13) arranged at a distance from the electroluminescent display device, and a receiving housing (10) for receiving therein the electroluminescent display device and the lens array (13).

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