DEVICE AND METHOD FOR ANALOGUE-DIGITAL CONVERSION

Abstract

Analog-to-digital conversion device comprising: a control unit that receives an analog-to-digital conversion (AD conversion) request from a plurality of processing modules; and an analog-to-digital converter (ADC) that performs analog-to-digital conversion according to the AD conversion request transmitted by the control unit, wherein the control unit integrates the AD conversion request according to the periodicity of the AD conversion request and transmits the integrated AD conversion request to the ADC.

Description

TECHNICAL FIELD

[0001] The present invention relates to an apparatus and method for analog-to-digital conversion. More particularly, the present invention relates to an apparatus and method for analog-to-digital conversion capable of integrating and processing multiple analog-to-digital signal conversion requests. STATE OF THE ART

[0002] With increasing safety and productivity challenges in the automotive industry, the need for a standardized software platform to ensure reliability and reusability is growing. AUTomotive Open System Architecture (AUTOSAR) is a software standard platform for electronic vehicle components designed for reliability and reusability, focusing on the development of commercial vehicles with platforms developed by many automotive companies based on AUTOSAR.

[0003] AUTOSAR is attached to an electronic control unit (ECU), which is a basic unit of vehicle control, and each ECU consists of a basic software module (BSW module) to perform a function and application software components that operate on it, as well as a runtime environment (RTE) that supports communication between them.

[0004] Meanwhile, the current state-of-the-art vehicle-mounted electronic control unit uses a microcontroller (MCU) for each control function. The MCU had only one core, but in recent years, a multi-core MCU with multiple cores embedded within it has been used, and the MCU has evolved to a form where each core can perform separate control functions.

[0005] During the vehicle control process, the ECU often needs to receive an analog signal and convert the received analog signal to a digital signal. However, even if an analog-to-digital converter (ADC) that converts an analog signal to a digital signal includes multiple channels, if the analog signal is converted to digital via any one channel, the signal conversion via other channels is not possible. Therefore, if the analog-to-digital signal conversion is performed via any one channel, the analog-to-digital signal conversion via other channels is ignored (the ADC simply returns "Not OK").

[0006] Since each core individually requests AD conversion from an analog-to-digital converter (ADC) that converts the analog signal into the digital signal, even when using the multi-core MCU, there is a case where the AD conversion requests of other cores are unsuccessful when one core requests signal conversion by the ADC.

[0007] One problem is that even when reading a conversion result from the ADC, a lot of load is consumed, which increases the load of the entire platform.

[0008] US 5 844 514 A discloses a periodically integrating analog-to-digital converter and a sensor device with a detector arrangement that can be read out in parallel columns. SUMMARY OF THE INVENTION

[0009] The present invention was made in an effort to provide an analog-to-digital conversion apparatus and method capable of increasing analog-to-digital conversion efficiency and reducing system load by integrating and processing digital conversion requests for multiple analog signals.

[0010] An exemplary embodiment of the present invention provides an analog-to-digital conversion device comprising: a control unit that receives an analog-to-digital conversion (ADC) request from a plurality of processing modules; and an analog-to-digital converter (ADC) that performs analog-to-digital conversion according to the ADC conversion request transmitted from the control unit, wherein the control unit integrates the ADC conversion request according to the periodicity of the ADC conversion request and transmits the integrated ADC conversion request to the ADC.

[0011] In an exemplary embodiment, when the AD conversion request is periodic, the control unit may transmit the AD conversion request to the ADC at a predetermined time interval.

[0012] In an exemplary embodiment, when the AD conversion request is an aperiodic AD conversion request, the control unit may integrate a periodic AD conversion request to be performed after the aperiodic AD conversion request and the aperiodic AD conversion request.

[0013] In the aperiodic AD conversion request, a delay tolerance time, which is an allowable delay time for the AD conversion, may be set, and when the delay tolerance time is equal to or greater than a time until the periodic AD conversion request, the control unit may integrate the aperiodic AD conversion request into the periodic AD conversion request.

[0014] In the aperiodic AD conversion request, the delay tolerance time, which is the allowable delay time for AD conversion, can be set, and if the delay tolerance time is less than the time until the periodic AD conversion request, the control unit can process the aperiodic AD conversion request separately.

[0015] In an exemplary embodiment, the control unit may include a transmitting / receiving unit that transmits and receives a signal, a conversion information storage unit that stores information of the processing module requesting AD conversion, and an AD conversion integrating unit that integrates and transmits the AD conversion request.

[0016] The conversion information storage unit may store, as conversion information, whether the AD conversion request is periodic, a delay tolerance time when the AD conversion request is aperiodic, and channel information of the ADC to be allocated for the AD conversion request.

[0017] In an exemplary embodiment, the analog-to-digital conversion device may further include a multi-core microprocessor having a first core, a second core, and a peripheral device, wherein the processing module and the control unit may be provided in the first core, the ADC may be included in the peripheral device, and an input / output device that receives the AD conversion request in the control unit and transmits the AD conversion request to the ADC may be provided in the second core.

[0018] The peripheral device may include a shared memory that receives the AD conversion request from the first core and temporarily stores the AD conversion request and temporarily stores an AD conversion result from the ADC.

[0019] Another exemplary embodiment of the present invention provides a method for converting an analog signal to a digital signal, comprising: (a) receiving, by a control unit, an analog-to-digital (AD) conversion request from a plurality of processing modules; (b) determining, by the control unit, the periodicity of the AD conversion request; and (c) if the AD conversion request is an aperiodic AD conversion request, performing an AD conversion, by the control unit, by determining whether to integrate a periodic AD conversion request to be performed after the aperiodic AD conversion request and the aperiodic AD conversion request.

[0020] In an exemplary embodiment, in step (c), a delay tolerance time of the aperiodic AD conversion request and a time A until the periodic AD conversion request to be performed after the aperiodic AD conversion request may be compared with each other, and if the delay tolerance time is equal to or greater than the time A, the aperiodic AD conversion request may be integrated with the periodic AD conversion request.

[0021] In an exemplary embodiment, in step (c), the delay tolerance time of the aperiodic AD conversion request and the time A until the periodic AD conversion request to be performed after the aperiodic AD conversion request may be compared with each other, and if the delay tolerance time is less than the time A, the aperiodic AD conversion request may be processed separately.

[0022] In an exemplary embodiment, when the aperiodic AD conversion request is processed separately, the aperiodic AD conversion request may be integrated and processed when another aperiodic AD conversion request exists within an AD conversion latency that is less than the delay tolerance time.

[0023] According to an exemplary embodiment of the present invention, it is possible to increase the efficiency of analog-to-digital conversion and reduce a system load by integrating and processing requests for digital conversion of multiple analog signals.

[0024] According to an exemplary embodiment of the present invention, a problem in which the conversion request is rejected during an analog-to-digital conversion process can be solved.

[0025] The foregoing summary is illustrative only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, other aspects, embodiments, and features will become apparent by reference to the drawings and the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram of an analog-to-digital conversion apparatus according to an exemplary embodiment of the present invention. Fig. 2 is a diagram illustrating exemplary AD conversion information in an analog-to-digital conversion apparatus according to an exemplary embodiment of the present invention. Fig. 3 is a diagram illustrating by way of example that an AD conversion request based on the Fig. 2 is integrated and processed. Fig. 4 is a flowchart illustrating an analog-to-digital conversion method according to an exemplary embodiment of the present invention. Fig. 5 is a block diagram of an analog-to-digital conversion device according to another embodiment of the present invention.

[0026] It should be understood that the accompanying drawings are not necessarily to scale, presenting a somewhat simplified representation of various features intended to illustrate the basic principles of the invention. The specific embodiments of the present invention as disclosed herein, including, for example, specific dimensions, orientations, positions, and shapes, will be determined in part by the particular intended application and environment of use.

[0027] In the figures, reference numerals refer to identical or equivalent parts of the present invention in the various figures of the drawing. DETAILED DESCRIPTION

[0028] A preferred embodiment of the present invention will now be described in detail with reference to the accompanying drawings. When reference numerals refer to components in the individual drawings, it should first be noted that the same components will be designated by the same reference numerals wherever possible, even if the same components are illustrated in different drawings. Furthermore, in describing the present invention, a detailed description of known related configurations and functions may be omitted in order not to unnecessarily obscure the subject matter of the present invention. Furthermore, the preferred embodiment of the present invention will now be described, but the technical spirit of the present invention is not limited thereto or restricted thereby, and the embodiments can be modified and embodied in various ways by those skilled in the art.

[0029] Fig. 1 is a block diagram of an analog-to-digital conversion device according to an exemplary embodiment of the present invention.

[0030] In a vehicle control system, analog-to-digital conversion (hereinafter referred to as “AD conversion”) is required with respect to various elements, including a current or voltage value for battery monitoring, a measured value of an analog sensor such as a radar or ultrasonic sensor, a steering angle measurement, and the like.

[0031] In Fig. 1 shows several processing modules 12 that request the AD conversion. The processing module 12 can be various application programs for the vehicle control, a sensor processing module, a battery monitoring module, etc. To simplify the description, Fig. 1 shows the first to fifth processing modules 12a, 12b, 12c, 12d and 12e, wherein the processing modules 12 can be implemented in the form of software or hardware.

[0032] An analog-to-digital conversion device 10 according to an exemplary embodiment of the present invention includes a control unit 20 that receives an AD conversion request from the processing module 12 and transmits an AD conversion result to the processing module 12, a memory 30 that temporarily stores the AD conversion request and the AD conversion result from the control unit 20, and an analog-to-digital converter (ADC) 40 that performs AD conversion upon request of the control unit 20.

[0033] The control unit 20 may include a transmitting / receiving unit 22 for transmitting / receiving a signal, a conversion information storage unit 24 that stores information of the processing module 12 requesting the AD conversion, and an AD conversion integration unit 26 that integrates the AD conversion request and transmits the AD conversion request to the memory 30.

[0034] The transmitting / receiving unit 22 may receive an analog signal from the processing module 12 and transmit the received analog signal to the memory 30. Furthermore, the transmitting / receiving unit 22 may receive a digital signal modified by the ADC 40 and transmit the received digital signal to the processing module 12.

[0035] The conversion information storage unit 24 may store information (AD conversion information) about the AD conversion requested by the processing module 12. The AD conversion information may include whether the AD conversion request is periodic, a period in the case of a periodic AD conversion request, a processing delay tolerance time when the AD conversion request is aperiodic, channel information of the ADC 40 to be allocated for the AD conversion request, and the like. The AD conversion information may be stored in the conversion information storage unit 24 in the form of a table.

[0036] The AD conversion integration unit 26 may transmit multiple AD conversion requests to the memory 30 to integrate the multiple AD conversion requests and convert the AD conversion requests simultaneously in the ADC 40.

[0037] The ADC 40 may include multiple channels, and in one exemplary embodiment, the ADC 40 may have eight channels and digitally convert the analog signal into a 10-bit value. However, in the exemplary embodiment of the present invention, the ADC 40 may have various numbers of channels, including 4 channels, 16 channels, etc., and an output digital value may also be less than or greater than 10 bits.

[0038] Fig. 2 is a diagram illustrating exemplary AD conversion information in an analog-to-digital conversion apparatus according to an exemplary embodiment of the present invention, and Fig. 3 is a diagram illustrating by way of example that an AD conversion request based on the Fig. 2 illustrated AD conversion information is integrated and processed.

[0039] With reference to Fig. 2 shows the AD conversion information stored in the conversion information storage unit 24. The AD conversion information can be stored in advance or received from each processing module 12. The second processing module 12b and the fourth processing module 12d request AD conversion periodically, and the remaining processing modules 12a, 12c, and 12e request AD conversion aperiodically. An AD conversion period of the second processing module 12b is 10 ms, and the AD conversion period of the fourth processing module 12d is 20 ms. The delay tolerance times of a first processing module 12a, a third processing module 12c, and a fifth processing module 12e are shown as 3, 2, and 5 ms, respectively, after the AD conversion request. Furthermore, it is shown that in the first to fifth processing modules 12a to 12e, the channels of the ADC 40 are assigned the numbers 1, 2, 4, 5 and 8.

[0040] The AD conversion integration unit 26 integrates the AD conversion request with reference to the AD conversion information of the conversion information storage unit 24, which will be described below.

[0041] (a) of Fig. 3 illustrates the periodic AD conversion processing, (b) of Fig. 3 also illustrates an aperiodic AD conversion request, and (c) of Fig. Figure 3 illustrates that the AD conversion is integrated and processed.

[0042] With reference to (a) of Fig. 3, the periodic AD conversion requests of the second processing module 12b and the fourth processing module 12d are processed in predetermined periods. In Fig. 2, the AD conversion period of the second processing module 12b and the fourth processing module 12d is shown as 10 ms and 20 ms, respectively, and the AD conversion of the request of the second processing module 12b is shown as ②, and the AD conversion of the request of the fourth processing module 12d is shown as ④ in Fig. 3, are carried out according to the corresponding period.

[0043] As in (b) of Fig. 3, however, it is assumed that there are an aperiodic AD conversion request of the first processing module 12a, shown as ①, an aperiodic AD conversion request of the third processing module 12c, shown as ③, and an aperiodic AD conversion request of the fifth processing module 12e, shown as ⑤.

[0044] In case A, the AD conversion request of the first processing module 12a occurs at 13 ms, the periodic AD conversion request of the second processing module 12b is provided at 15 ms, and with reference to Fig. 2, the delay tolerance time of the AD conversion of the first processing module 12a is 3 ms. In this case, as shown in (c) of Fig. 3, the AD conversion of the first processing module 12a is processed together with the AD conversion of the second processing module 12b, and the AD conversion is performed via the assigned channel of the ADC 40. Referring to Fig. 2, the AD conversion requested by the first processing module 12a can be performed in channel 1 of the ADC 40 and the AD conversion requested by the second processing module 12b can be performed in channel 2 of the ADC 40.

[0045] In case B, the AD conversion request of the third processing module 12c occurs at 22 ms, but the subsequent periodic AD conversion is scheduled for the second processing module 12b at 25 ms. Referring to Fig. 2, however, the AD conversion request of the third processing module 12c may not be performed together with another periodic AD conversion because the delay tolerance time of the AD conversion of the third processing module 12c is 2 ms, so a separate AD conversion is performed.

[0046] In case C, the AD conversion request of the fifth processing module 12e is made at 27 ms, the periodic AD conversion request of the fourth processing module 12d is provided at 30 ms, and with reference to Fig. 2, the delay tolerance time of the AD conversion of the fifth processing module 12e is 5 ms. As shown in (c) of Fig. 3, in this case, the AD conversion of the fifth processing module 12e may be processed together with the AD conversion of the fourth processing module 12d.

[0047] In Case D, the AD conversion request of the fifth processing module 12e occurs at 36 ms. Since the delay tolerance time of the AD conversion of the fifth processing module 12e is 5 ms, and further periodic AD conversion is not scheduled within the delay tolerance time, the AD conversion should be performed one at a time. However, in Case D, it is possible to wait for another AD conversion request (AD conversion wait) while taking the delay tolerance time into account. If the AD conversion request of the first processing module 12a occurs at 38 ms, as in Case D, the AD conversions of the fifth processing module 12e and the first processing module 12a can be integrated and processed together. In this case, the AD conversion wait time should be shorter than the delay tolerance time, and the AD conversion wait time can be set differently depending on the system characteristics.

[0048] Fig. 4 is a flowchart showing an analog-to-digital conversion method according to an embodiment of the present invention.

[0049] An analog-to-digital conversion device 10 receives an AD conversion request from a processing module 12 (S10).

[0050] A control unit 20 of the analog-to-digital conversion device 10 determines whether the received AD conversion request is periodic or aperiodic (S20). As described above, the control unit 20 can determine the periodicity of an AD conversion request based on information stored in a conversion information storage unit 24.

[0051] When an aperiodic AD conversion request is present, the control unit 20 transmits the corresponding AD conversion request to an ADC 40 (S50).

[0052] When there is an aperiodic AD conversion request, the control unit 20 confirms a delay tolerance time for the corresponding AD conversion request and compares the delay tolerance time with a time A to an earliest AD conversion period from the subsequent periodic AD conversions (S30).

[0053] If the delay tolerance time is less than the time A until the next AD conversion period, as a determination result in step S30, the corresponding AD conversion request should be executed immediately, and as a result, the AD conversion request is transmitted to the ADC 40 (S50).

[0054] However, when the delay tolerance time is equal to or greater than the time A until the next AD conversion period, as a determination result in step S30, the corresponding AD conversion request is integrated into the next AD conversion period (S40), and the corresponding AD conversion request is allowed to be performed together with the periodically performed AD conversion (S50).

[0055] After step S50, the ADC 40 executes the AD conversion request transmitted to the channel and transmits an AD conversion result to the control unit 20 (S60). The control unit 20 can, in turn, transmit the AD conversion result to a processing module 12.

[0056] Meanwhile, in the exemplary embodiment of the present invention, as a determination result in step S30, when the delay tolerance time is less than the time A until the next AD conversion period, the corresponding AD conversion request may not be executed immediately, and when there are other aperiodic AD conversion requests within an AD conversion waiting time (< delay tolerance time), it may be possible to execute the AD conversion request to the ADC by integrating the aperiodic AD conversion requests.

[0057] Fig. 5 is a block diagram of an analog-to-digital conversion device according to another embodiment of the present invention.

[0058] Fig. 5 shows a multi-core microprocessor-based analog-to-digital conversion device 100 including a first core 110A and a second core 110B, and a timer, a memory, and an ADC 140 are provided as peripheral devices 150.

[0059] The first core 110A and the second core 110B may be implemented using an AUTOSAR-based software platform and may include base software modules (BSW modules) and application software components (APPs) operating thereon, as well as a runtime environment (RTE) that supports communication between them. Base software modules (BSW modules) (BSW1, BSW2, BSW3, Battery Management BM, Other1, and Other2) and application software components (APP1, APP2, and APP3) may request AD conversion from the control unit 120.

[0060] The control unit 120 may be configured to perform the same function as the control unit 20 described with reference to Fig. 1 is described.

[0061] With respect to the AD conversion request, the control unit 120 may integrate the AD conversion request and transmit it to a common memory 130.

[0062] The AD conversion request in the control unit 120 can be transmitted to the ADC 140.

[0063] In an exemplary embodiment, the second core 110B may forward the AD conversion request to the ADC 140. Thus, the AD conversion request integrated by the first core 110A may be stored in the shared memory 130, and the second core 110B may receive the AD conversion request stored in the shared memory 130 using an input / output (I / O) device 114 and request AD conversion from the ADC 140. Furthermore, the second core 110B may receive an AD conversion result in the ADC 140 and transmit the AD conversion result to the control unit 120 of the first core 110A via the shared memory 130.

[0064] In such a structure, in a multi-core microprocessor consisting of multiple cores, any one core is designated as the second core 110B in Fig.5, and other cores transmit the AD conversion request to the second core 110B so that a particular core in relation to the ADC 140 can exclusively load and process the AD conversion request.

[0065] As described above, the exemplary embodiments have been described and illustrated in the drawings and the specification. The exemplary embodiments were chosen and described in order to explain certain principles of the invention and their practical application, to thereby enable others skilled in the art to make and use various exemplary embodiments of the present invention, as well as various alternatives and modifications thereof. As is apparent from the foregoing description, certain aspects of the present invention are not limited to the particular details of the examples illustrated herein, and it is therefore contemplated that those skilled in the art will discover other modifications and applications or equivalents thereof.However, many changes, modifications, variations, and other uses and applications of the present invention will become apparent to those skilled in the art after considering the specification and the accompanying drawings. All such changes, modifications, variations, and other uses and applications that do not depart from the spirit and scope of the invention are intended to be covered by the invention, which is limited only by the following claims.

Claims

[1] Analog-to-digital conversion device comprising: a control unit that receives an analog-to-digital conversion (AD conversion) request from a plurality of processing modules; and an analog-to-digital converter (ADC) that performs analog-to-digital conversion according to the AD conversion request transmitted by the control unit, wherein the control unit integrates the AD conversion request according to the periodicity of the AD conversion request and transmits the integrated AD conversion request to the ADC. [2] The analog-to-digital conversion device according to claim 1, wherein, when the AD conversion request is periodic, the control unit transmits the AD conversion request to the ADC at a predetermined time interval. [3] The analog-to-digital conversion device according to claim 1, wherein the control unit, when the AD conversion request is an aperiodic AD conversion request, integrates a periodic AD conversion request to be performed after the aperiodic AD conversion request and the aperiodic AD conversion request. [4] The analog-to-digital conversion device according to claim 3, wherein a delay tolerance time which is an allowable delay time for the AD conversion is set in the aperiodic AD conversion request, and the control unit, when the delay tolerance time is equal to or greater than a time until the periodic AD conversion request, integrates the aperiodic AD conversion request into the periodic AD conversion request. [5] The analog-to-digital conversion device according to claim 3, wherein in the aperiodic AD conversion request, the delay tolerance time which is the allowable delay time for the AD conversion is set, and the control unit, when the delay tolerance time is less than the time until the periodic AD conversion request, processes the aperiodic AD conversion request separately. [6] Analog-to-digital conversion device according to one of the preceding claims, wherein the control unit comprises a transmitting / receiving unit that sends and receives a signal, a conversion information storage unit that stores information of the processing module requesting the AD conversion, and an AD conversion integration unit that integrates and transmits the AD conversion request. [7] The analog-to-digital conversion device according to claim 6, wherein the conversion information storage unit stores, as conversion information, whether the AD conversion request is periodic, stores a delay tolerance time when the AD conversion request is aperiodic, and stores channel information of the ADC to be assigned for the AD conversion request. [8] Analog-to-digital conversion device according to any one of claims 1-7, further comprising a multi-core microprocessor having a first core, a second core and a peripheral, wherein the processing module and the control unit are provided in the first core, the ADC is included in the peripheral device and an input / output device that receives the AD conversion request in the control unit and transmits the AD conversion request to the ADC is provided in the second core. [9] The analog-to-digital conversion device according to claim 8, wherein the peripheral device has a shared memory that receives the AD conversion request from the first core and temporarily stores the AD conversion request and temporarily stores an AD conversion result from the ADC. [10] A method for converting an analogue signal into a digital signal, the method comprising: (a) receiving an analog-to-digital conversion (AD conversion) request from a plurality of processing modules by a control unit; (b) determining the periodicity of the AD conversion request by the control unit; and (c) if the AD conversion request is an aperiodic AD conversion request, performing AD conversion by the control unit by integrating a periodic AD conversion request to be performed after the aperiodic AD conversion request and the aperiodic AD conversion request. [11] The method according to claim 10, wherein in step (c), a delay tolerance time of the aperiodic AD conversion request and a time A to the periodic AD conversion request to be performed after the aperiodic AD conversion request are compared with each other, and when the delay tolerance time is equal to or greater than the time A, the aperiodic AD conversion request is integrated with the periodic AD conversion request. [12] The method according to claim 10, wherein in step (c), a delay tolerance time of the aperiodic AD conversion request and the time A until the periodic AD conversion request to be performed after the aperiodic AD conversion request are compared with each other, and if the delay tolerance time is less than the time A, the aperiodic AD conversion request is processed separately. [13] The method of claim 12, wherein, in a separate processing of the aperiodic AD conversion request, the aperiodic AD conversion requests are integrated and processed when another aperiodic AD conversion request is present within an AD conversion wait time that is less than the delay tolerance time.

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