SCREENBOARD AND DISPLAY DEVICE AND MOBILE DEVICE CONTAINING THEM

Abstract

A display panel (100) comprising a first pixel region (NML), a second pixel region (UDC), and a boundary pixel region (BDR) disposed between the first pixel region (NML) and the second pixel region (UDC), wherein the boundary pixel region (BDR) includes: several first emission areas (BA); and several second emission areas (BB), wherein each of the first and second emission areas (BA, BB) contains one or more pixels, the second pixel area (UDC) contains several emission areas (A), at least one of the second emission regions (BB) is arranged adjacent to each other between the first emission regions (BA), the maximum luminance of the first emission area (BA) decreases with increasing distance from the second pixel area (UDC) and the maximum luminance of the second emission area (BB) increases with increasing distance from the second pixel area (UDC), a separation distance between the first emission area (BA) of the boundary pixel area (BDR) and the emission area (A) of the second pixel area (UDC) is constant at a boundary between the boundary pixel area (BDR) and the second pixel area (UDC), the first emission regions (BA) and the second emission regions (BB) are arranged alternately on a first line (LINE1) along a first direction (X) of the boundary pixel region (BDR), and the second emission regions (BB) are continuously arranged on a second line (LINE2) along the first direction (X) of the boundary pixel region (BDR), without the first emission region (BA).

Description

[0001] This application claims priority to and the benefit of Republic of Korea Patent Application No. 10-2022-0054899, filed on May 3, 2022 in the Republic of Korea, and Republic of Korea Patent Application No. 10-2022-0079664. BACKGROUND1. Area

[0002] The present disclosure relates to a display panel having an optical element disposed thereunder, a display device, and a mobile terminal including the same. 2. Discussion of related technology

[0003] Electroluminescent display devices are generally classified into inorganic light-emitting display devices and organic light-emitting display devices according to the materials of the light-emitting layers. Active matrix-type organic light-emitting display devices contain organic light-emitting diodes (hereinafter referred to as "OLEDs") that emit light themselves. They have fast response speeds and advantages such as large light-emitting efficiency, brightness, and viewing angles. In organic light-emitting display devices, OLEDs are formed into pixels.Since the organic light-emitting display devices have fast response speeds and excellent light-emitting performance, brightness and viewing angle, and are capable of showing a black gradation in a full black color, the organic light-emitting display devices are excellent in terms of contrast ratio and color reproduction.

[0004] Recently, various optical elements have been added to mobile terminals. The optical elements may include a sensor or an illumination device required to support a multimedia function or perform biometric recognition. The optical element may be mounted below the display panel. To enlarge the screen of the mobile terminal, the optical element may be arranged in a notch area constructed in a concave shape on top of the display panel screen or in a punch hole within the screen. However, since an image is not displayed in the notch area or punch hole, there are many limitations to the design of a full-screen display. US 2021 / 0065620 A1 relates to a display device with three display areas. The transmittance of the second display area is higher than the transmittance of the first display area and the transmittance of the third display area, and the third pixels are controlled so that the luminance gradually changes depending on the distance from the second display area. US 2021 / 0065625 A1 relates to a display device comprising two display sub-regions, wherein the pixel density in the two display sub-regions differs such that a light transmittance of the second display sub-region is greater than a light transmittance of the first display sub-region. SUMMARY

[0005] Recently, a technique has been proposed in which a low-pixel-density region is provided in a display panel and an optical element is arranged below the region. This technique can realize a full-screen display device because the optical element is placed below an image-displayed region, but the boundary between a high-pixel-density region and a low-pixel-density region can be visually recognized, and a sense of heterogeneity in luminance and color between the regions can be felt.

[0006] An object of the present disclosure is to satisfy the above-mentioned needs and / or solve problems.

[0007] Another object of the present disclosure is to provide a display panel capable of preventing boundary detection and a sense of heterogeneity between areas with different pixel densities, and a display device and a mobile terminal incorporating the same.

[0008] The objects of the present disclosure are not limited to those mentioned above, and other unmentioned objects will be clearly understood by those skilled in the art from the following description. One or more of these objects are achieved by the features of the independent claims.

[0009] A display panel according to an embodiment of the present disclosure includes a first pixel region, a second pixel region, and a boundary pixel region disposed between the first pixel region and the second pixel region. The boundary pixel region includes a plurality of first emission regions and a plurality of second emission regions. Each of the first and second emission regions includes one or more pixels. At least one of the second emission regions is disposed between the first emission regions adjacent to each other. The second pixel region may include a plurality of emission regions. The separation distance between the first emission region of the boundary pixel region and an emission region of the second pixel region may be constant at a boundary between the boundary pixel region and the second pixel region.Preferably, the maximum luminance of the first emission region may decrease with increasing distance from the second pixel region, and a maximum luminance of the second emission region may increase with increasing distance from the second pixel region.

[0010] A display device according to an embodiment of the present disclosure includes a display panel according to any one of the embodiments described herein and a display panel driver for driving the display panel. A display device according to an embodiment of the present disclosure includes: a display panel including a first pixel region, a second pixel region, and a boundary pixel region disposed between the first pixel region and the second pixel region; and a display panel driver configured to write pixel data of an input image to pixels disposed in pixel regions of the display panel. The second pixel region includes a plurality of unit emission regions. The boundary pixel region includes a plurality of unit emission regions. Each of the unit emission regions of the second pixel region includes an emission region and a non-emission region.Each of the unit emission regions of the boundary pixel region has the same size as the unit emission region of the second pixel region. Each of the unit emission regions of the boundary pixel region includes a first emission region and a second emission region. The first emission regions are spaced apart from each other by a distance equal to a distance between the emission regions of the second pixel region, with the second emission region sandwiched therebetween. A distance between the first emission region of the boundary pixel region and the emission region of the second pixel region may be constant at a boundary between the boundary pixel region and the second pixel region. Preferably, a maximum luminance of the first emission region may decrease with increasing distance from the second pixel region, and a maximum luminance of the second emission region may increase with increasing distance from the second pixel region.

[0011] A mobile terminal according to an embodiment of the present disclosure includes a display panel according to any one of the embodiments described herein and an optical element arranged below the second pixel region of the display panel. A mobile terminal according to an embodiment of the present disclosure includes a display device according to any one of the embodiments described herein and an optical element arranged below the second pixel region of the display panel.A mobile terminal according to an embodiment of the present disclosure includes: a display panel including a first pixel region, a second pixel region, and a boundary pixel region disposed between the first pixel region and the second pixel region; a display panel driver configured to write pixel data of an input image to pixels disposed in pixel regions of the display panel; and an optical element disposed below the second pixel region of the display panel. The second pixel region includes a plurality of unit emission regions. The boundary pixel region includes a plurality of unit emission regions. Each of the unit emission regions of the second pixel region includes an emission region and a non-emission region. Each of the unit emission regions of the boundary pixel region has the same size as the unit emission region of the second pixel region.Each of the unit emission regions of the boundary pixel region includes a first emission region and a second emission region. The first emission regions are spaced apart from each other by a distance equal to the distance between the emission regions of the second pixel region, with the second emission region sandwiched therebetween. A separation distance between the first emission region of the boundary pixel region and the emission region of the second pixel region may be constant at or along a boundary between the boundary pixel region and the second pixel region. Preferably, a maximum luminance of the first emission region decreases with increasing distance from the second pixel region, and a maximum luminance of the second emission region may increase with increasing distance from the second pixel region.

[0012] The display panel, the display device and / or the mobile terminal according to the above embodiments may include one or more of the following features:

[0013] The separation distance can be defined as the shortest distance between a center of one of the first emission regions of the boundary pixel region and one of the emission regions of the second pixel region. The separation distance can cross the boundary. The boundary can be a straight line.

[0014] The second pixel region may contain multiple emission regions and multiple light-transmitting sections / regions. The first pixel region may contain multiple emission regions. The first pixel region may be non-transmitting, i.e., it may not contain any light-transmitting section / region.

[0015] The maximum luminance of the first emission region may be lower than a maximum luminance of the second pixel region and / or higher than a maximum luminance of the first pixel region.

[0016] The maximum luminance of the second emission region may be lower than the maximum luminance of the second pixel region and / or lower than the maximum luminance of the first pixel region.

[0017] The light can pass through the second pixel area to an optical element located below the display panel.

[0018] A difference between the maximum luminance of the first emission region and the maximum luminance of the second emission region may decrease with increasing distance from the second pixel region.

[0019] A distance between the adjacent first emission regions may be equal to a distance between the emission regions of the plurality of adjacent emission regions in the second pixel region.

[0020] A distance between an emission region of the second pixel region and the first emission region of the boundary pixel region, which are adjacent to each other, may be equal to the distance between the adjacent emission regions in the second pixel region.

[0021] Each of the first and second emission regions may contain several subpixels with different colors.

[0022] In subpixels of the same color, a number of subpixels arranged in the second emission region may be an integer multiple of a number of subpixels arranged in the first emission region.

[0023] In subpixels of the same color, the number of subpixels arranged in the second emission region may be greater than the number of subpixels arranged in the first emission region by an integer multiple of the number of subpixels arranged in the first emission region.

[0024] A pixel density of the boundary pixel region may be equal to that of the first pixel region and higher than that of the second pixel region.

[0025] A pixel density of a portion of the boundary pixel region adjacent to the second pixel region may be lower than a pixel density of the first pixel region and / or may be equal to or higher than a pixel density of the second pixel region.

[0026] Pixels of the first pixel region and pixels arranged in the second emission region of the boundary pixel region can emit light with a luminance defined by a first gamma compensation curve. Pixels of the second pixel region and pixels arranged in the first emission region of the boundary pixel region can emit light with a luminance defined by a second gamma compensation curve. A maximum luminance of the second gamma compensation curve can be higher than a maximum luminance of the first gamma compensation curve.

[0027] Each of the first and second emission regions may contain a plurality of subpixels with different colors. The number of subpixels arranged in the first emission region and the number of subpixels arranged in the second emission region may differ by an integer multiple for each color.

[0028] The maximum luminance of the first emission region may be lower than a maximum luminance of the second pixel region and / or higher than a maximum luminance of the first pixel region. The maximum luminance of the second emission region may be lower than the maximum luminance of the second pixel region and / or lower than the maximum luminance of the first pixel region. A difference between the maximum luminance of the first emission region and the maximum luminance of the second emission region may decrease with increasing distance from the second pixel region.

[0029] According to the present disclosure, a full-screen display can be realized because an optical module is arranged under the screen on which an image is displayed.

[0030] According to the present disclosure, a sense of heterogeneity for the boundary pixel region can be reduced by controlling a spatial emission period of the boundary pixel region and the second pixel region to be substantially the same.

[0031] According to the present disclosure, a sense of heterogeneity for the pixel region can be reduced by controlling the luminance of the pixels so that the luminance of the first emission region of the boundary pixel region between the first pixel region and the second pixel region gradually changes.

[0032] According to the present disclosure, a color difference between the pixel regions can be improved by controlling the luminance of the first and second emission regions by using first and second gamma compensation curves having different maximum luminances in the boundary pixel region.

[0033] The effects of the present disclosure are not limited to those mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the description. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The above and other objects, features and advantages of the present disclosure will become more apparent to those of ordinary skill in the art by describing in detail exemplary embodiments thereof with reference to the accompanying drawings in which: Fig. 1 is a cross-sectional view schematically showing a display panel according to an embodiment of the present disclosure; Fig. 2 is a diagram illustrating an optical element overlapping a second pixel region of a display panel according to an embodiment of the present disclosure; Fig. 3 is a diagram illustrating an example of optical elements arranged in a second pixel region and a notch region according to an embodiment of the present disclosure; Fig. 4 is a diagram illustrating a pixel arrangement of a first pixel region according to an embodiment of the present disclosure; Fig. 5A and Fig. 5B are diagrams illustrating a boundary pixel region and a pixel arrangement of a second pixel region according to an embodiment of the present disclosure; Fig. 6 to 8 are circuit diagrams illustrating various pixel circuits applicable to a display device according to an embodiment of the present disclosure; Fig. 9 is a waveform diagram showing a method for driving the Fig. 8 according to an embodiment of the present disclosure; Fig. 10 is a block diagram illustrating a display device according to an embodiment of the present disclosure; Fig. 11 is a diagram illustrating an example in which a display device is applied to a mobile device according to an embodiment of the present disclosure; Fig. 12A and Fig. 12B are plan views illustrating unit emission regions of a second pixel region and a boundary pixel region according to an embodiment of the present disclosure; Fig. 13 to 16 are diagrams illustrating various embodiments of a second pixel region UDC and a border pixel region BDR according to an embodiment of the present disclosure; Fig. 17 is a diagram illustrating an example in which a spatial period of unit emission regions of a boundary pixel region is equal to a spatial period of unit emission regions of a second pixel region, according to an embodiment of the present disclosure; Fig. 18 is a diagram illustrating an example in which the luminances of a first emission region and a second emission region of a boundary pixel region are gradually changed to be opposite to each other between a first pixel region and a second pixel region according to an embodiment of the present disclosure; Fig. 19A is a diagram illustrating an example of an area ratio between a first emission region and a second emission region in a boundary pixel region according to an embodiment of the present disclosure; Fig. 19B is a diagram showing an example of a method for controlling the luminance of unit emission areas as in Fig. 19A according to an embodiment of the present disclosure; Fig. 20A is a diagram illustrating another example of an area ratio between a first emission region and a second emission region in a boundary pixel region according to an embodiment of the present disclosure; Fig. 20B is a diagram showing an example of a method for controlling the luminance of unit emission areas as in Fig. 20A according to an embodiment of the present disclosure; Fig. 21 and Fig. 22 are diagrams illustrating the effect of improving the sense of heterogeneity of the edge pixel area according to an embodiment of the present disclosure; Fig. 23 is a diagram illustrating a comparative example in which high luminance emission regions are adjacent to each other and low luminance emission regions are adjacent to each other at a left boundary of a second pixel region according to an embodiment of the present disclosure; Fig. 24 is an enlarged view illustrating a left boundary of a second pixel region in a simulation for a comparative example; Fig. 25 is a diagram illustrating a comparative example in which high luminance emission regions are adjacent to each other and low luminance emission regions are adjacent to each other at an upper boundary of a second pixel region; Fig. 26 is an enlarged view illustrating an upper boundary of a second pixel region in a simulation for a comparative example; Fig. 27 is a diagram illustrating an effect of improving a color difference in a boundary pixel region according to an embodiment of the present disclosure; and Fig. 28 is a diagram illustrating an example of a single gamma reference voltage range and gamma compensation curves according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0035] The advantages and features of the present disclosure and the methods for implementing them will be better understood from the embodiments described below with reference to the accompanying drawings. However, the present disclosure is not limited to the following embodiments, but may be implemented in various different forms. Rather, the present embodiments will complete the disclosure of the present disclosure and enable those skilled in the art to fully appreciate the scope of the present disclosure.

[0036] The shapes, sizes, ratios, angles, numbers, and the like illustrated in the accompanying drawings for describing the embodiments of the present disclosure are merely examples, and the present disclosure is not limited thereto. Like reference numerals generally denote like elements throughout this specification. Furthermore, in the description of the present disclosure, a detailed description of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of the present disclosure.

[0037] Terms used herein, such as "comprise," "include," "have," and "include," are generally intended to encompass the addition of other components, unless the terms are used in conjunction with the term "only." All references to the singular may include the plural unless expressly stated otherwise.

[0038] Components are interpreted to include a normal margin of error, even if this is not explicitly stated.

[0039] When the positional relationship between two components is described using terms such as "on", "above", "below", "next to", "connect", "couple", "cross", "intersect", etc., one or more components may be positioned between the two components, provided these terms are not used with the term "immediate" or "direct".

[0040] The terms "first," "second," and the like may be used to distinguish components from one another, but the functions or structures of the components are not limited by ordinal numbers or component names that precede the components. These terms need not define an order.

[0041] The same reference numerals may refer to substantially the same elements throughout this disclosure.

[0042] The following embodiments may be partially or completely connected or combined with each other and may be linked and operated in technically different ways. The embodiments may be carried out independently of each other or in conjunction with each other.

[0043] In each display device of the present disclosure, the pixel circuit and the gate drive circuit may include a plurality of transistors. Transistors may be implemented as oxide thin-film transistors (oxide TFTs) containing an oxide semiconductor, low-temperature polysilicon TFTs (LTPS TFTs) containing low-temperature polysilicon, or the like. Each of the transistors may be implemented as a p-channel TFT or an n-channel TFT.

[0044] A transistor is a three-electrode device containing a gate, a source, and a drain. The source is an electrode that supplies charge carriers to the transistor. In the transistor, the charge carriers begin to flow from the source. The drain is an electrode through which charge carriers exit the transistor. In a transistor, charge carriers can flow from a source to a drain. In the case of an n-channel transistor, since the charge carriers are electrons, a source voltage is a voltage lower than a drain voltage, allowing electrons to flow from the source to the drain. The n-channel transistor has a direction of current flowing from the drain to the source. In the case of a p-channel transistor, since the charge carriers are holes, a source voltage is higher than a drain voltage, allowing holes to flow from the source to the drain. Since holes flow from the source to the drain in the p-channel transistor, a current flows from the source to the drain.It should be noted that a source and a drain of a transistor are not fixed. For example, the source and drain can be changed according to the applied voltage. Therefore, the disclosure is not limited to a source and a drain of a transistor. In the following description, a source and a drain of a transistor are referred to as first and second electrodes.

[0045] A gate signal fluctuates between a gate on voltage and a gate off voltage. The gate on voltage is set to a voltage higher than a threshold voltage of a transistor, and the gate off voltage is set to a voltage lower than the transistor's threshold voltage. The transistor turns on in response to the gate on voltage and turns off in response to the gate off voltage. In the case of the n-channel transistor, a gate on voltage may be a gate high voltage VGH and VEH, and a gate off voltage may be a gate low voltage VGL and VEL. In the case of the p-channel transistor, a gate on voltage may be a gate low voltage VGL and VEL, and a gate off voltage may be a gate high voltage VGH and VEH.

[0046] Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0047] With reference to the Fig. 1 to 3, the display panel 100 includes a screen for displaying an input image according to an embodiment of the present disclosure.

[0048] A pixel array constituting the screen of the display panel 100 may include a first pixel area NML and a second pixel area UDC. The first pixel area NML and the second pixel area UDC contain pixels into which the pixel data of the input image is written. Accordingly, the input image may be displayed in the first pixel area NML and the second pixel area UDC.

[0049] The first pixel area NML is a display area in which multiple pixels are arranged to render the input image. The first pixel area NML is larger than the second pixel area UDC and is a main display area of ​​the screen where most images are displayed. The second pixel area UDC is a display area in which multiple pixels are arranged to render the input image. The pixel density or resolution of the second pixel area UDC can be equal to or smaller than that of the first pixel area NML. Pixel density can be interpreted as pixels per inch (PPI).

[0050] The second pixel region UDC may include, but is not limited to, a plurality of light-transmitting portions that do not have a light-blocking medium. The light-transmitting portion may be arranged between subpixels. Light can pass through the light-transmitting portion with little loss. When the light-transmitting portion of the second pixel region UDC is enlarged to increase the amount of light received by the optical element onto which light is incident through the second pixel region UDC, the pixel density is reduced due to the area of ​​the light-transmitting portion, so that the pixel density or resolution of the second pixel region UDC may become smaller than that of the first pixel region NML.

[0051] Each of the pixels of the first pixel area NML and the second pixel area UDC includes subpixels of different colors to implement an image color. The subpixels include red, green, and blue subpixels. Hereinafter, the red subpixel is abbreviated as "R subpixel," the green subpixel is abbreviated as "G subpixel," and the blue subpixel is abbreviated as "B subpixel." Each of the pixels may further include a white subpixel. Each of the subpixels may include a pixel circuit for driving a light-emitting element.

[0052] One or more optical elements 200 may be disposed beneath the back of the display panel 100 so as to overlap the second pixel region UDC of the display panel 100. External light may pass through the second pixel region UDC to the optical element 200 disposed beneath the display panel 100. The optical element 200 may include at least one of an image sensor (or camera), a proximity sensor, a white light illuminator, and a face recognition optical element.

[0053] The optical element for face recognition may include an infrared light source, an infrared camera, an infrared illuminator, or the like, arranged below the second pixel area UDC of the display panel 100. In Fig. 2, reference numeral “201” denotes the infrared light source and reference numeral “202” denotes the infrared camera, but they are not limited thereto. In an example of Fig. 3, an ambient light sensor 204, a proximity sensor 205, a floodlight illuminator 206, and the infrared camera 202 and a front camera 207 may be arranged in a notch area 210 of a mobile terminal, and the infrared light source 201 may be arranged in the second pixel area UDC. The notch area 210 is a non-display area without pixels at the top of the screen of the mobile terminal.

[0054] In the display device of the present disclosure, since the optical elements 200 are arranged under the back surface of the display panel 100 so as to overlap the second pixel region UDC, the display area of ​​the screen is not restricted by the optical elements 200. Accordingly, the display device of the present disclosure can realize a full-screen display by increasing the display area of ​​the screen and increase the degree of freedom of screen design.

[0055] The display panel 100 has a width in a first direction (X-axis), a length in a second direction (Y-axis), and a thickness in a third direction (Z-axis). The first direction and the second direction are orthogonal to each other on the plane of the display panel 100. The display panel 100 may include a circuit layer 12 disposed on a substrate 10 and a light-emitting element layer 14 disposed on the circuit layer 12. A polarizing plate 18 may be disposed on the light-emitting element layer 14, and a cover glass 20 may be disposed on the polarizing plate 18.

[0056] The circuit layer 12 may include a pixel circuit connected to wires such as data lines, gate lines crossing the data lines, and power supply lines, a gate driver connected to the gate lines, and the like. The circuit layer 12 may include transistors implemented as thin-film transistors (TFTs) and circuit elements such as capacitors. The wiring and circuit elements of the circuit layer 12 may be formed from a plurality of insulating layers, two or more metal layers separated by an insulating layer therebetween, and an active layer containing a semiconductor material.

[0057] The light-emitting element layer 14 may include a light-emitting element driven by the pixel circuit. The light-emitting element may be implemented with an OLED. The OLED includes an organic compound layer formed between an anode and a cathode. The organic compound layer may include, but is not limited to, a hole-injection layer (HIL), a hole-transport layer (HTL), an emission layer (EML), an electron-transport layer (ETL), and an electron-injection layer (EIL). When a voltage is applied to the anode and cathode electrodes of the OLED, holes passing through the hole-transport layer (HTL) and electrons passing through the electron-transport layer (ETL) are transported to the emission layer (EML) to form excitons, and visible light is emitted from the emission layer (EML).The light emitting element layer 14 may further include a color filter array disposed on the light emitting element to selectively pass red, green, and blue wavelengths.

[0058] The light-emitting element layer 14 may be covered by a passivation layer, and the passivation layer may be covered by an encapsulation layer. The passivation layer and the encapsulation layer may have a multi-layer insulation film structure in which an organic film and an inorganic film are alternately stacked. The inorganic film blocks the penetration of moisture or oxygen. The organic film planarizes the surface of the inorganic film. When the organic film and the inorganic film are stacked in multiple layers, the movement path of moisture or oxygen becomes longer than that of a single layer, so that the penetration of moisture / oxygen affecting the light-emitting element layer 14 can be effectively blocked.

[0059] A touch sensor layer (omitted from the drawing) may be formed on the encapsulation layer, and the polarizing plate 18 or a color filter layer may be disposed thereon. The touch sensor layer may include capacitive touch sensors that detect touch input based on a capacitance change before and after the touch input. The touch sensor layer may include insulation films and metal wiring patterns that form the capacitance of the touch sensors. The insulation films may insulate intersecting portions in the metal wiring patterns and may planarize the surface of the touch sensor layer. The polarizing plate 18 may improve visibility and contrast ratio by changing the polarization of external light reflected by the metal of the touch sensor layer and the circuit layer.The polarizing plate 18 may be implemented as a circular polarizing plate or a polarizing plate in which a linear polarizing plate and a phase retarder film are bonded. The cover glass 20 may be bonded to the polarizing plate 18. The color filter layer disposed on the touch sensor layer may include red, green, and blue color filters. The color filter layer may further include a black matrix structure. The color filter layer may absorb a portion of the wavelength of the light reflected from the circuit layer and the touch sensor layer to replace the role of the polarizing plate 18 and increase the color purity of an image reproduced in the pixel array. In this case, the polarizing plate 18 is not required. Fig. 4 is a diagram illustrating an example of a pixel arrangement of the first pixel region NML according to an embodiment of the present disclosure. Fig. 5A and Fig. 5B are diagrams illustrating an example of pixels and the light-transmitting portions of the second pixel region UDC according to an embodiment of the present disclosure. The wires connected to the pixels are shown in Fig. 4 to 5B omitted.

[0060] Referring to Fig. 4, the first pixel area NML contains multiple pixels. Each of the pixels may be implemented as a real-type pixel in which R, G, and B subpixels of the three primary colors are configured as one pixel. Each of the pixels may further include a W subpixel, which is omitted from the drawing. The pixel density of the first pixel area NML may be higher than that of the second pixel area UDC.

[0061] Each pixel may consist of two subpixels using a subpixel rendering algorithm. For example, a first pixel may consist of an R subpixel and a first G subpixel, and a second pixel may consist of a B subpixel and a second G subpixel. Color inadequacy in both the first and second pixels may be compensated for by averaging the corresponding color data between neighboring pixels.

[0062] In the subpixels, the light-emitting efficiency of the light-emitting element may vary for each color. Therefore, the size of the subpixels may vary for each color. For example, among the R, G, and B subpixels, the B subpixel may be the largest, and the G subpixel may be the smallest.

[0063] Referring to Fig. 5A and Fig. 5B, the second pixel area UDC includes pixel groups PG spaced apart by a predetermined distance and light-transmitting portions AG arranged between adjacent pixel groups PG. The pixel group arranged within an area indicated by a dashed line includes a plurality of subpixels.

[0064] The light-transmitting section AG is a region that does not have any pixels. The light-transmitting sections AG can be made of transparent, insulating materials and do not contain any metal wires or pixels. Due to the light-transmitting sections AG, the pixel density of the second pixel region UDC can be reduced, but the average light transmittance of the second pixel region UDC can be greater than that of the first pixel region NML, so that the amount of light received by the optical elements 200 can be increased.

[0065] In the second pixel area UDC, one or two pixels can be included in the pixel group PG to emit light with a luminance corresponding to a grayscale of pixel data. Each of the pixels of the pixel group PG can contain two to four subpixels. In the example of Fig. 5A and Fig. 5B, a first pixel consists of R and G subpixels, and a second pixel consists of B and G subpixels, but the present disclosure is not limited thereto. An emission region in the pixel group PG is determined as the sum of the emission regions associated with the subpixels in the pixel group PG.

[0066] The shape and size of an emission region of each color in each of the pixels of the first and second pixel regions is determined by a fine metal mask (FMM). The emission region for each color in the pixel group PG of the second pixel region UDC may be constructed to be substantially the same as that of the first pixel region NML, or it may be constructed to have a shape and / or size different from that of the emission region of the first pixel region NML by using an FMM whose shape differs from that of the first pixel region NML.

[0067] The shape of the translucent sections AG is in Fig. 5A and Fig. 5B is shown as a circle, but is not limited thereto. The translucent sections AG can be constructed in various shapes, such as circular, elliptical, or polygonal.

[0068] Due to process variations and element characteristic variations caused by the display panel manufacturing process, there may be differences in the electrical characteristics of the driving elements between pixels, and thus, the difference may increase as the pixel driving time elapses. To compensate for variations in the electrical characteristics of the driving elements between pixels, an internal compensation technique or an external compensation technique can be applied to an organic light-emitting display device.

[0069] As in Fig. 5A and Fig. 5B, the pixel array of the display panel 100 further includes a boundary pixel region BDR having a predetermined size disposed between the first pixel region NML and the second pixel region UDC.

[0070] The boundary pixel area BDR is a pixel area of ​​a predetermined size between the first pixel area NML and the second pixel area UDC. The boundary pixel area BDR contains a plurality of pixels. The pixel density of the boundary pixel area BDR can be, as shown in Fig. 5A, be constructed so that it is substantially equal to that of the first pixel region NML and higher than that of the second pixel region UDC. The pixel density of the boundary pixel region BDR may be lower than that of the first pixel region NML. In a further embodiment, as shown in Fig. 5B, the pixel density of a part of the boundary pixel area BDR adjacent to the second pixel area UDC may be smaller than that of the first pixel area NML and may be equal to or larger than that of the second pixel area UDC.

[0071] At least one of the pixel density, the pixel size, and the maximum pixel luminance may be different between the first pixel region NML and the second pixel region UDC. Accordingly, the boundary pixel region BDR may be viewed differently from the first pixel region NML and the second pixel region UDC. In order to reduce the phenomenon in which the boundary pixel region BDR is visually recognized, in the present disclosure, as shown in FIGS. Fig. 12A and Fig. 12B, a unit emission area UA' having the same size as a unit emission area UA of the second pixel area UDC is defined in the boundary pixel area BDR. A first emission area BA in each of the unit emission areas UA' of the boundary pixel area BDR has a spatial period (or pitch) similar to or equal to an emission area A of the second pixel area UDC.

[0072] The pixel density of the boundary pixel region BDR can be constructed to be equal to that of the first pixel region NML. The boundary pixel region BDR can be interpreted as a subpixel region contained in the first pixel region NML near the second pixel region UDC.

[0073] Internal compensation technology detects a threshold voltage of the driving element for each subpixel using an internal compensation circuit implemented in each pixel circuit and compensates a gate-source voltage Vgs of the driving element by the threshold voltage. External compensation technology detects a current or voltage of the driving element that changes according to the electrical characteristics of the driving element in real time using an external compensation circuit. External compensation technology compensates for the deviation (or change) of the electrical characteristic of the driving element in each pixel in real time by modulating the pixel data (digital data) of the input image with the deviation (or change) of the electrical characteristic of the driving element detected for each pixel. Fig. 6 to 8 are circuit diagrams illustrating various pixel circuits applicable to any display device according to an embodiment of the present disclosure.

[0074] In a first example, which refers to Fig. 6, the pixel circuit includes a light-emitting element EL, a drive element DT configured to supply a current to the light-emitting element EL, a switching element MO1 configured to connect a data line DL to a second node n2 in response to a scanning pulse SCAN, and a capacitor Cst connected between the second node n2 and a third node n3. The drive element DT and the switching element MO1 may be implemented as n-channel transistors.

[0075] The drive element DT includes a gate electrode connected to the second node n2, a first electrode connected to a first node n1, and a second electrode connected to the third node n3. A VDD (power supply) line PL is connected to the first node n1, to which a pixel drive voltage ELVDD is applied. The light-emitting element EL includes an anode connected to the third node n3 and a cathode connected to a VSS line, to which a low-potential voltage ELVSS is applied.

[0076] The drive element DT drives the light-emitting element EL by supplying a current to the light-emitting element EL according to the gate-source voltage Vgs. The light-emitting element EL turns on and emits light when a forward voltage between the anode and cathode is equal to or greater than a threshold voltage. The capacitor Cst is connected between the gate electrode and a source electrode of the drive element DT to maintain the gate-source voltage Vgs of the drive element DT. Fig. 7 shows a second example of the pixel circuit according to an embodiment.

[0077] Referring to Fig. 7 contains the pixel circuit according to Fig. 7 in addition to the Fig. The pixel circuit configuration shown in Figure 6 further includes a second switching element MO2 connected between a reference voltage line REFL and a second electrode of the drive element DT. In this pixel circuit, the drive element DT and the switching elements MO1 and MO2 can be implemented as n-channel transistors.

[0078] The second switching element MO2 applies a reference voltage VREF to the third node n3 in response to the scanning pulse SCAN or a separate detection pulse SENSE. The reference voltage VREF is applied to the pixel circuit via the REF line REFL.

[0079] In a detection mode, a current flowing through the channel of the drive element DT or a voltage between the drive element DT and the light-emitting element EL can be detected via the reference line REFL. The current flowing through the reference line REFL is converted into a voltage via an integrator and converted into digital data via an analog-to-digital converter (hereinafter referred to as "ADC"). This digital data includes detection data, the threshold voltage, or mobility information of the drive element DT. The detection data is transmitted to a data processing section.The data processing part can receive the acquisition data from the ADC and compensate for drive deviations and degradations of pixels by adding a compensation value selected based on the acquisition data to the pixel data or multiplying the compensation value selected based on the acquisition data by the pixel data.

[0080] Fig. 8 is a circuit diagram illustrating a third example of the pixel circuit according to an embodiment of the present disclosure. Fig. 9 is a waveform diagram showing a method of driving the Fig. 8 according to an embodiment of the present disclosure.

[0081] With reference to the Fig. 8 and Fig. 9, the pixel circuit includes a light-emitting element EL, a driving element DT configured to supply a current to the light-emitting element EL, and a switching circuit configured to switch a voltage applied to the light-emitting element EL and the driving element DT.

[0082] The switching circuit is connected to power supply lines PL1, PL2, and PL3, to which pixel drive voltage ELVDD, low-potential voltage ELVSS, and initialization voltage Vini are applied, as well as to a data line DL and gate lines GL1, GL2, and GL3. It switches the voltages applied to light-emitting element EL and drive element DT in response to a gate signal. The gate signal may include scanning pulses SCAN(N-1) and SCAN(N), as well as an emission control pulse (hereinafter referred to as "EM pulse") EM(N). Here, N is a number, such as a positive integer.

[0083] The switching circuit includes an internal compensation circuit that samples a threshold voltage Vth of the drive element DT using a plurality of switching elements M1 to M6, stores the voltages in a capacitor Cst, and compensates the gate voltage of the drive element DT by the threshold voltage Vth of the drive element DT. The drive element DT and the switching elements M1 to M6 can each be implemented as a p-channel TFT.

[0084] A driving period of the pixel circuit can be divided into an initialization period Tini, a sampling period Tsam and an emission period Tem, as shown in Fig. 9 shown.

[0085] The Nth scanning pulse SCAN(N) is generated with the gate on voltage VGL in the scanning period Tsam and applied to the first gate line GL1. The (N-1)th scanning pulse SCAN(N-1) is generated with the gate on voltage VGL in the initialization period Tini before the scanning period and applied to the second gate line GL2. An emission control pulse (hereinafter referred to as "EM pulse") EM(N) is generated with the gate off voltage VGH in the initialization period Tini and the scanning period Tsam and applied to the third gate line GL3.

[0086] During the initialization period Tini, the (N-1)th scanning pulse SCAN(N-1) is generated with the gate-on voltage VGL, and the voltage of both the Nth scanning pulse SCAN(N) and the EM pulse EM(N) is the gate-off voltage VGH / VEH. During the scanning period Tini, the Nth scanning pulse SCAN(N) is generated with the gate-on voltage VGL, and the voltage of both the (N-1)th scanning pulse SCAN(N-1) and the EM pulse EM(N) is the gate-off voltage VGH / VEH. During at least a part of the emission period Tem, the EM pulse EM(N) is generated with the gate-on voltage VEL, and the voltage of both the (N-1)th scanning pulse SCAN(N-1) and the Nth scanning pulse SCAN(N) is the gate-off voltage VGH.

[0087] During the initialization period Tini, the fifth switching element M5 is turned on in response to the gate on voltage VGL of the (N-1)th scanning pulse SCAN(N-1) to initialize the pixel circuit. During the scanning period Tsam, the first and second switching elements M1 and M2 are turned on in response to the gate on voltage VGL of the Nth scanning pulse SCAN(N), so that the data voltage Vdata compensated by the threshold voltage of the drive element DT is stored in the capacitor Cst1. In addition, the sixth switching element M6 is turned on during the scanning period Tsam to lower the voltage of the fourth node n4 to the reference voltage VREF, thereby suppressing the light emission of the light-emitting element EL.

[0088] When the light emission period Tem begins, the EM line GL3 is inverted to the gate on voltage VGL. During the light emission period Tem, the scanning lines GL1 and GL2 maintain the gate off voltage VGH. During the light emission period Tem, since the third and fourth switching elements M3 and M4 are turned on, the light-emitting element EL can emit light. During the light emission period Tem, a voltage level of the EM pulse EM(N) can be inverted at a predetermined duty cycle between the gate on voltage VGL and the gate off voltage VGH to accurately express the luminance of low gray levels. In this case, the third and fourth switching elements M3 and M4 can be repeatedly turned on and off according to the duty cycle of the EM pulse EM(N) during the light emission period Tem.

[0089] The anode of the light-emitting element EL is connected to the fourth node n4 between the fourth and sixth switching elements M4 and M6. The fourth node n4 is connected to the anode of the light-emitting element OLED, a second electrode of the fourth switching element M4, and a second electrode of the sixth switching element M6. The cathode of the light-emitting element EL is connected to the VSS line PL3, to which the low-potential power supply voltage ELVSS is applied. The light-emitting element EL emits light with a current Ids flowing according to the gate-source voltage Vgs of the driving element DT. A current path of the light-emitting element EL is switched by the third and fourth switching elements M3 and M4.

[0090] The storage capacitor Cst is connected between the VDD line PL1 and the second node n2. The data voltage Vdata, compensated by the threshold voltage Vth of the driver DT, is charged into the capacitor Cst. Since the data voltage Vdata in each of the subpixels is compensated by the threshold voltage Vth of the driver DT, the variation in the characteristics of the driver DT in the subpixels is compensated.

[0091] The first switching element M1 is turned on in response to the gate on voltage VGL of the N-th scanning pulse SCAN(N) to connect the second node n2 to the third node n3. The second node n2 is connected to a gate electrode of the drive element DT, a first electrode of the capacitor Cst, and a first electrode of the first switching element M1. The third node n3 is connected to a second electrode of the drive element DT, a second electrode of the first switching element M1, and a first electrode of the fourth switching element M4. A gate electrode of the first switching element M1 is connected to the N-th scanning line GL1 to receive the N-th scanning pulse SCAN(N). The first electrode of the first switching element M1 is connected to the second node n2, and the second electrode of the first switching element M1 is connected to the third node n3.

[0092] Since the first switching element M1 is turned on during a very short single horizontal period (1H) in which the Nth scanning signal SCAN(N) is generated as the gate on voltage VGL in one frame period, a leakage current may occur in the off state. To limit the leakage current of the first switching element M1, the first switching element M1 may be implemented with a transistor with a double-gate structure in which two transistors are connected in series.

[0093] The second switching element M2 is turned on in response to the gate on voltage VGL of the Nth scanning pulse SCAN(N) to supply the data voltage Vdata to the first node n1. A gate electrode of the second switching element M2 is connected to the Nth scanning line GL1 to receive the Nth scanning pulse SCAN(N). A first electrode of the second switching element M2 is connected to the first node n1. The second electrode of the second switching element M2 is connected to the data lines DL of the first region DA to which the data voltage Vdata is applied. The first node n1 is connected to the first electrode of the second switching element M2, a second electrode of the third switching element M3, and a first electrode of the drive element DT.

[0094] The third switching element M3 is turned on in response to the gate on voltage VGL of the EM pulse EM(N) to connect the VDD line PL1 to the first node n1. A gate electrode of the third switching element M3 is connected to the EM line GL3 to receive the EM pulse EM(N). A first electrode of the third switching element M3 is connected to the VDD line PL1. The second electrode of the third switching element M3 is connected to the first node n1.

[0095] The fourth switching element M4 is turned on in response to the gate on voltage VGL of the EM pulse EM(N) to connect the third node n3 to the anode of the light-emitting element OLED. A gate electrode of the fourth switching element M4 is connected to the EM line GL3 to receive the EM pulse EM(N). The first electrode of the fourth switching element M4 is connected to the third node n3, and the second electrode is connected to the fourth node n4.

[0096] The fifth switching element M5 is turned on in response to the gate on voltage GL of the (N-1)th scanning pulse SCAN(N-1) to connect the second node n2 to the Vini line PL2. A gate electrode of the fifth switching element M5 is connected to the (N-1)th scanning line GL2 to receive the (N-1)th scanning pulse SCAN(N-1). A first electrode of the fifth switching element M5 is connected to the second node n2, and a second electrode is connected to the Vini line PL2. To limit the leakage current of the fifth switching element M5, the fifth switching element M5 is implemented with a transistor with a double-gate structure in which two transistors are connected in series.

[0097] The sixth switching element M6 is turned on in response to the gate on voltage VGL of the Nth scanning pulse SCAN(N) to connect the Vini line PL2 to the fourth node n4. A gate electrode of the sixth switching element M6 is connected to the Nth scanning line GL1 to receive the Nth scanning pulse SCAN(N). A first electrode of the sixth switching element M6 is connected to the Vini line PL2, and a second electrode of the sixth switching element M6 is connected to the fourth node n4.

[0098] In another embodiment, the gate electrodes of the fifth and sixth switching elements M5 and M6 may be commonly connected to the (N-1)th scanning line GL2, to which the (N-1)th scanning pulse SCAN(N-1) is applied. In this case, the fifth and sixth switching elements M5 and M6 may be turned on simultaneously in response to the (N-1)th scanning pulse SCAN(N-1).

[0099] The drive element DT drives the light-emitting element EL by controlling the current flowing through the light-emitting element EL according to the gate-source voltage Vgs. The drive element DT includes the gate electrode connected to the second node n2, the first electrode connected to the first node n1, and the second electrode connected to the third node n3. Fig. 9, “DTG” is the gate voltage of the drive element DT, i.e. the voltage of the second node n2.

[0100] It should be noted that the configuration of the pixel circuit present in the display devices of the present disclosure is not limited to the examples of Fig. 6 to 8. For example, the data voltage Vdata may be applied to the gate electrode of the drive element DT, or applied to the first electrode or the second electrode of the drive element DT. The gamma characteristic of the data voltage Vdata can be set as a positive gamma curve or an inverse gamma curve according to the channel characteristic of the drive element DT or an electrode to which the data voltage Vdata is applied. The data voltage Vdata may be applied to the first electrode or the second electrode of the n-channel drive element DT, or the data voltage Vdata may be applied to the gate electrode of the p-channel drive element DT. The data voltage Vdata applied to the gate electrode of the n-channel drive element DT is a voltage determined by the positive gamma curve.The data voltage Vdata applied to the first electrode or the second electrode of the n-channel drive element DT is a voltage determined by the inverse gamma curve. The data voltage Vdata applied to the gate electrode of the p-channel drive element DT is a voltage determined by the inverse gamma curve. The data voltage Vdata applied to the first electrode or the second electrode of the p-channel drive element DT is a voltage determined by the positive gamma curve.

[0101] Fig. 10 is a block diagram showing a display device according to an embodiment of the present disclosure.

[0102] Referring to Fig. 10, a display device according to an embodiment of the present disclosure includes the display panel 100, a display panel driver 110 and 120 for writing pixel data of an input image into pixels P of the display panel 100, a timing control unit 130 for controlling the display panel driver, and a power supply unit 150 for generating power required to drive the display panel 100.

[0103] The display panel 100 includes a pixel array that displays an input image on the screen. As described above, the pixel array may be divided into the first pixel region NML and the second pixel region UDC. Each of the subpixels of the pixel array may comprise the light-emitting element EL using the Fig. 6 to 8. In one variant, the pixel array may include one or more first pixel areas DAs and one or more second pixel areas CAs.

[0104] Touch sensors may be disposed on the screen of the display panel 100. The touch sensors may be implemented as on-cell or add-on touch sensors disposed on the display panel screen, or may be implemented as in-cell touch sensors embedded in the pixel array.

[0105] The display panel 100 may be implemented as a flexible display panel in which the pixels P are arranged on a flexible substrate, such as a plastic substrate or a metal substrate. In the flexible display device, the size and shape of the screen can be changed by winding, folding, or bending the flexible display panel. The flexible display device may include a sliding display device, a rollable display device, a bendable display device, a foldable display device, etc.

[0106] The display panel drivers display the input image on the screen of the display panel 100 by writing the pixel data of the input image into the subpixels. The display panel drivers include the data driver 110 and the gate driver 120. The display panel drivers may further include a demultiplexer 112 disposed between the data driver 110 and the data lines DL.

[0107] Each display panel driver can operate in a slow drive mode under the control of the timing control unit 130. In the slow drive mode, the power consumption of the display device can be reduced when the input image does not change for a preset time by analyzing the input image. In the slow drive mode, when a still image is input for a predetermined time or longer, the power consumption can be reduced by lowering the refresh rate of the pixels P and controlling the data write period of the pixels P to be longer. The slow drive mode is not restricted when the still image is input.For example, when the display device operates in a standby mode or when no user command or input image is input to the display panel drive circuit for a predetermined time or longer, the display panel drive circuit may operate in the slow drive mode.

[0108] The data driver 110 receives the pixel data of the input image, which is digital data, and generates a data voltage Vdata using a digital-to-analog converter (hereinafter referred to as a "DAC"). The DAC receives the pixel data, which is digital data, and receives a gamma reference voltage from a gamma voltage generator of the power supply unit 150. The data driver 110 divides the gamma reference voltage into gamma compensation voltages, each corresponding to the gray levels of the pixel data, using a voltage divider circuit. The DAC of the data driver 110 is arranged in each of the channels of the data driver 110. The DAC converts the pixel data into the gamma compensation voltage by using a switching element arrangement that selects a voltage in response to one bit of the pixel data and outputs the data voltage Vdata.The data voltage Vdata output from each of the channels of the data driver 110 can be supplied to the data lines DL of the display panel 100 via the demultiplexer 112.

[0109] Demultiplexer 112 temporally divides the data voltage Vdata output via the channels of data driver 110 and distributes it to the multiple data lines DL. The number of channels of data driver 110 can be reduced due to demultiplexer 112. Demultiplexer 112 can be omitted. In this case, the channels of data driver 110 are directly connected to the data lines DL.

[0110] The gate driver 120 may be implemented as a gate-in-panel (GIP) circuit formed together with a TFT array of pixel array directly on a bezel region BZ of the display panel 100. The gate driver 120 outputs gate signals to the gate lines GL under the control of the timing control unit 130. The gate driver 120 may sequentially supply the gate signals to the gate lines GL by shifting the gate signals using a shift register. The voltage of the gate signal fluctuates between the gate-off voltage VGH and the gate-on voltage VGL. The gate signal may include the sampling pulse, the EM pulse, the detection pulse, etc., as shown in FIGS. Fig. 6 to 8 is shown.

[0111] The gate driver 120 can be arranged on either the left or right bezel (or on two opposite sides) of the display panel 100 to supply the gate signal to the gate lines GL in a dual-feed method. In the dual-feed method, the gate drivers 120 on both sides are synchronized so that the gate signals can be applied simultaneously from both ends of a gate line. In another exemplary embodiment, the gate driver 120 can be arranged on either the left or right bezel (or on two opposite sides) of the display panel 100 and supply the gate signals to the gate lines GL in a single-feed method.

[0112] The gate driver 120 may include a first gate driver 121 and a second gate driver 122. The first gate driver 121 outputs a sampling pulse and a detection pulse, and shifts the sampling pulse and the detection pulse according to the shift clock. The second gate driver 122 outputs the EM pulse and shifts the EM pulse according to the shift clock. In a bezel-less model, at least some of the switching elements constituting the first and second gate drivers 121 and 122 may be distributed throughout the pixel array.

[0113] The timing control unit 130 receives pixel data of an input image and a timing signal synchronized with the pixel data from the host system. The timing signal includes a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a clock CLK, a data enable signal DE, and so on. One period of the vertical synchronization signal Vsync is one frame period. One period of the horizontal synchronization signal Hsync and the data enable signal DE is each equal to one horizontal period 1H. The pulse of the data enable signal DE is synchronized with one-line data to be written to the pixels P of one pixel row. Since the frame period and the horizontal period can be known by counting the data enable signal DE, the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync can be omitted.

[0114] Timing unit 130 transmits the pixel data of the input image to data driver 110 and synchronizes data driver 110, demultiplexer 112, and gate driver 120. Timing unit 130 may include a data operator that receives detection data obtained from the pixels P in the display panel driver to which the external compensation technology is applied and modulates the pixel data. In this case, timing unit 130 may transmit the pixel data modulated by the data operator to data driver 110.

[0115] The timing control unit 130 can control the operating scheduling of the display panel drivers 110, 112, and 120 at an input frame rate of xi Hz (i is a positive integer greater than 0) by multiplying the input frame rate by i. The input frame rate is 60 Hz in the NTSC scheme (National Television Standards Committee scheme) and 50 Hz in the PAL ("Phase Alternating Line" scheme). The timing control unit 130 can reduce the frame rate to a frequency between 1 Hz and 30 Hz to reduce the refresh rate of the pixels P in the slow drive mode.

[0116] The timing control unit 130 generates a data timing signal for controlling the operation timing of the data driver 110, a switch control signal for controlling the operation timing of the demultiplexer 112, and a gate timing signal for controlling the operation timing of the gate driver 120 based on the timing signals Vsync, Hsync, and DE received from the host system.

[0117] The voltage level of the gate timing signal output from the timing control unit 130 can be converted into the gate high voltage VGH / VEH and the gate low voltage VGL / VEH via a level shifter (omitted from the drawing), and can be supplied to the gate driver 120. The level shifter receives a clock of the gate timing signal from the timing control unit 130 and outputs a timing signal, such as a start pulse and a shift clock, required to drive the gate driver 120. The low voltage of the gate timing signal input to the level shifter can be converted into the gate low voltage VGL via the level shifter, and the high voltage of the gate timing signal can be converted into the gate high voltage VGH / VEH.

[0118] The power supply unit 150 may include a charge pump, a regulator, a buck converter, a boost converter, a gamma voltage generation circuit, and the like. The power supply unit 150 adjusts an input DC voltage from the host system to generate power required to drive the display panel 100 and the display panel driver. The power supply unit 150 may output DC voltages such as the gamma reference voltage, the gate off voltage VGH / VEH, the gate on voltage VGL / VEL, the pixel drive voltage ELVDD, the low potential voltage ELVSS, the initialization voltage Vini, and the reference voltage VREF.

[0119] The gamma voltage generation circuit can be implemented with a programmable gamma IC (P-GMA IC). The programmable gamma IC can vary the gamma reference voltage depending on a register setting. The gamma reference voltage is supplied to the data driver 110. The gate off voltage VGH / VEH and the gate on voltage VGL / VEL are supplied to the level shifter and the gate driver 120. The pixel drive voltage ELVDD, the low-potential voltage ELVSS, the initialization voltage Vini, and the reference voltage VREF are supplied to the pixel circuits together via the power supply lines. The pixel drive voltage ELVDD is higher than the low-potential voltage ELVSS, the initialization voltage Vini, and the reference voltage VREF.

[0120] The host system may be a mainboard of a television system (TV system), a set-top box, a navigation system, a personal computer (PC), a vehicle system, a home theater system, a mobile device, or a wearable device. The mobile device or wearable device may contain, as described in Fig. 11, the timing unit 130, the data driver 110 and the power supply unit 150 may be integrated into an integrated control circuit (D-IC). Fig. In Figure 11, reference numeral "200" denotes the host system. Host system 200 includes an authentication module. The authentication module may execute a facial recognition algorithm that processes user authentication by comparing facial pattern data received from infrared camera 202 with preset feature points of a user's facial pattern. The authentication module may be software stored in hardware (e.g., a processor circuit) to process user authentication.

[0121] In the present disclosure, in order to reduce the difference of luminance and color of the boundary pixel area BDR, as shown in Fig. 12A and Fig. 12B, the unit emission areas UA and UA' of the same size are defined in the second pixel area UDC and the boundary pixel area BDR, and the unit emission area UA' of the boundary pixel area BDR is divided into the first emission area BA and a second emission area BB whose luminance is controlled differently. Fig. 12A is a plan view illustrating the unit emission region UA ​​of the second pixel region UDC according to an embodiment of the present disclosure. Fig. 12B is a plan view illustrating a first emission region and a second emission region of the boundary pixel region BDR according to an embodiment of the present disclosure. In Fig. 12A and Fig. 12B, “R” denotes an R subpixel, “G” denotes a G subpixel, and “B” denotes a B subpixel.

[0122] As in Fig. 5A and Fig. As shown in Figure 5B, the second pixel region UDC includes pixel groups PG spaced at a predetermined distance. The second pixel region UDC has repeatability in which the unit emission area UA including a pixel group PG is regularly arranged along the X and Y axes.

[0123] Each of the unit emission regions UA in the second pixel region UDC includes an emission region A and a non-emission region NA arranged around the emission region A. The emission region A may include at least one pixel or two or more sub-pixels having different colors and may include two or more color emission regions. Each of the sub-pixels may drive a light-emitting element of a color emission region. In the second pixel region UDC, the plurality of emission regions A are spaced from each other by a distance corresponding to the length of the unit emission region UA, and the non-emission region NA is positioned between the emission regions A. The non-emission region NA may include the light-transmitting portion AG that does not have a pixel.

[0124] The boundary pixel region BDR includes the unit emission region UA', which has the same size as the unit emission region UA. The unit emission region UA' includes the first emission region BA, which is set to the same size as the emission region A of the unit emission region UA, and the second emission region BB, which is set to the same size as the non-emission region NA of the unit emission region UA. The first emission region BA and the second emission region BB may each include at least one pixel or at least two or more subpixels with different colors and may include two or more color emission regions. Each of the subpixels can drive a light-emitting element of a color emission region.

[0125] Each of the first and second emission regions BA and BB may have one or more pixels arranged therein and including an emission region. At least one of the second emission regions BB may be arranged between adjacent first emission regions BA. The luminance of the first emission regions BA and the luminance of the second emission regions BB may be controlled differently, e.g., so that they are opposite to each other.

[0126] In the boundary pixel region BDR, the numbers of subpixels of the same color in the first and second emission areas BA and BB satisfy an integer multiple relationship. Fig. 12B, for example, the number of subpixels for each color in the second emission region BB is three times that of the same color in the first emission region BA. In Fig. 12B, the first emission region BA of the unit emission region UA' contains two R subpixels, four G subpixels, and two B subpixels. The second emission region BB of the unit emission region UA' contains six R subpixels, twelve G subpixels, and six B subpixels.

[0127] However, as in Fig. 5B, the second emission region BB does not contain any pixel and any color emission region in a part of the boundary pixel region BDR adjacent to the second pixel region UDC.

[0128] As in Fig. As shown in Figure 12A, the emission area A occupies approximately 25% of a unit emission area UA, but is not limited thereto. For example, the emission area A may be set to occupy approximately 25% to 75% of a unit emission area UA. Fig. 13 to 16 are diagrams illustrating various embodiments of a second pixel region UDC and the boundary pixel region BDR according to an embodiment of the present disclosure.

[0129] Referring to Fig. 13 to 16, the unit emission area UA' of the boundary pixel region BDR may include more subpixels than the unit emission area UA of the second pixel region UDC. The subpixels arranged in the unit emission area UA' of the boundary pixel region BDR may include an emission area having a different shape than an emission area of ​​the subpixels arranged in the unit emission area UA of the second pixel region UDC. The number and shape of the subpixels arranged in the unit emission area UA' of the boundary pixel region BDR may be the same as those of the subpixels arranged in the same size in the first pixel region NML. Each of the subpixels arranged in the unit emission area UA of the second pixel region UDC has a larger and different shape than the subpixels arranged in the same color in the unit emission area UA' of the boundary pixel region BDR.

[0130] In the example of Fig. 13, the unit emission area UA of the second pixel region UDC may include two emission areas A. An area occupied by the two emission areas A may be approximately 1 / 2 in the unit emission area UA. Each of the emission areas A may include one R subpixel, two G subpixels, and one B subpixel. Each of the subpixels arranged in the emission area A may include a square or rectangular color emission area. The R subpixel of the second pixel region UDC may be larger than the R subpixel of the boundary pixel region BDR, and the G subpixel of the second pixel region UDC may be larger than the G subpixel of the boundary pixel region BDR. In addition, the B subpixel of the second pixel region UDC may be larger than the B subpixel of the boundary pixel region BDR.

[0131] In the example of Fig. 13, the unit emission area UA' and the first emission area BA in the boundary pixel area BDR have the same shape and size as the unit emission area UA and the emission area A in the second pixel area UDC, respectively. In the unit emission area UA' of the boundary pixel area BDR, the first emission area BA and the second emission area BB can each occupy approximately 1 / 2 of the unit emission area.

[0132] In the boundary pixel region BDR, 1 / 3 of the areas of the first emission region BA and the second emission region BB, which have the same size, may contain two R subpixels, four G subpixels, and two B subpixels. Each of the subpixels arranged in the first emission region BA and the second emission region BB may contain a diamond-shaped or parallelogram-shaped color emission region.

[0133] In the example of Fig. 14, the unit emission area UA of the second pixel region UDC may include an emission area A. An area occupied by one emission area A may be approximately 1 / 4 in the unit emission area UA. Each of the emission areas A may include two R subpixels, four G subpixels, and two B subpixels. The G subpixels arranged in the emission area A may each include a square or rectangular color emission area, and the R and B subpixels may each include a wedge-shaped color emission area with a slanted corner. The R subpixel of the second pixel region UDC may be larger than the R subpixel of the boundary pixel region BDR, and the B subpixel of the second pixel region UDC may be larger than the B subpixel of the boundary pixel region BDR. The G subpixel of the second pixel region UDC may be equal to or larger than the G subpixel of the boundary pixel region BDR.

[0134] In the example of Fig. 14, the unit emission region UA' and the first emission region BA of the boundary pixel region BDR have the same shape and the same size as the unit emission region UA ​​and the emission region A of the second pixel region UDC, respectively. In the unit emission region UA' of the boundary pixel region BDR, an area occupied by the first emission region BA may be approximately 1 / 4, and an area occupied by the second emission region BB may be approximately 3 / 4.

[0135] In the boundary pixel region BDR, 1 / 3 of the areas of the first emission region BA and the second emission region BB, which have the same size, may contain two R subpixels, four G subpixels, and two B subpixels. Each of the subpixels arranged in the first emission region BA and the second emission region BB may contain a square or rectangular color emission region.

[0136] In the example of Fig. 15, the unit emission area UA of the second pixel region UDC may include an emission area A. An area occupied by an emission area A may be approximately 1 / 2 in the unit emission area UA. The emission area A may include an R subpixel, a G subpixel, and a B subpixel. Each of the subpixels arranged in the emission area A may include a square, octagonal, circular, or elliptical color emission area. The R subpixel of the second pixel region UDC may be larger than the R subpixel of the boundary pixel region BDR, and the G subpixel of the second pixel region UDC may be larger than the G subpixel of the boundary pixel region BDR. In addition, the B subpixel of the second pixel region UDC may be larger than the B subpixel of the boundary pixel region BDR.

[0137] In the example of Fig. 15, the unit emission area UA' and the first emission area BA of the boundary pixel area BDR have the same size as the unit emission area UA and the emission area A of the second pixel area UDC, respectively. In the unit emission area UA' of the boundary pixel area BDR, the first emission area BA and the second emission area BB can each occupy approximately 1 / 2 of the unit emission area.

[0138] In the emission area UA' of the boundary pixel region BDR, the first emission area BA and the second emission area BB may each contain one R subpixel, two G subpixels, and one B subpixel. Each of the subpixels arranged in the first and second emission areas BA and BB may contain a diamond-shaped or rectangular emission area for each color.

[0139] As can be seen from the Fig. 13 to 15, at least one of the number, size and shape of the subpixels arranged in the unit emission area UA of the second pixel region UDC may be constructed differently than those of the boundary pixel region BDR. In addition, as shown in Fig. 16, the number, size and shape of the subpixels arranged in the unit emission area UA of the second pixel region UDC may be designed to be the same as or similar to those of the boundary pixel region BDR.

[0140] The host system 200 or the timing control unit 130 may control the luminance of the first emission area BA and the second emission area BB of the boundary pixel region BDR to be different from each other. Fig. 17 is a diagram illustrating an example in which a spatial period of unit emission regions of a boundary pixel region is equal to a spatial period of unit emission regions of a second pixel region, according to an embodiment of the present disclosure.

[0141] Referring to Fig. 17, the unit emission regions UA' of the boundary pixel region BDR are defined to have substantially the same size as the unit emission regions UA of the second pixel region UDC. In the boundary pixel region BDR, a distance or gap Lx, Ly between the first emission regions BA that are adjacent in both the first direction (X-axis) and the second direction (Y-axis) is set to be equal to or similar to a distance Lx, Ly between the emission regions A of the second pixel region UDC. In other words, at a boundary between the boundary pixel region BDR and the second pixel region UDC, the separation distance between the first emission region BA of the boundary pixel region BDR and the emission region A of the second pixel region UDC may be constant.A distance Lx, Ly between the first emission region BA of the boundary pixel region BDR and the emission region A of the second pixel region UDC existing at the boundary between the boundary pixel region BDR and the second pixel region UDC is equal to or similar to the distance Lx, Ly between the emission regions A of the second pixel region UDC. Accordingly, the spatial period of light emission of bright pixels in the boundary pixel region BDR near the second pixel region can become substantially the same as that of the second pixel region UDC, so that a sense of heterogeneity for the boundary pixel region BDR can be reduced.

[0142] As in Fig. As shown in Fig. 17, the second low luminance emission region BB is arranged between the emission region A of the second pixel region UDC and the first emission region BA of the boundary pixel region BDR to ensure the separation distance Lx, Ly.

[0143] As in Fig. As shown in Figure 17, the second pixel region UDC and the boundary pixel region BDR include a first line LINE1 on which bright emission regions A and BA and the relatively dark regions NA and BB are arranged along the first direction X, and a second line LINE2 on which the relatively dark regions NA and BB are arranged along the first direction X. The first emission regions BA and the second emission regions BB are alternately arranged on the first line LINE1 of the boundary pixel region BDR. The second emission regions BB are continuously arranged on the second line LINE2 of the boundary pixel region BDR, excluding the first emission region BA.

[0144] Fig. 18 is a diagram illustrating an example in which the luminance of the first emission region BA and the second emission region BB of the boundary pixel region BDR between the first pixel region NML and the second pixel region UDC is gradually changed to be opposite to each other according to an embodiment of the present disclosure.

[0145] Referring to Fig. 18, the maximum luminance of the first emission region BA in the boundary pixel region BDR decreases to a level equal to or similar to the maximum luminance of the first pixel region NML as the distance to the second pixel region UDC increases, that is, as the distance to the first pixel region NML decreases. In the boundary pixel region BDR, the maximum luminance of the subpixels of the second emission region BB arranged around the first emission region BA increases to a level equal to or similar to the maximum luminance of the first pixel region NML as the distance to the second pixel region UDC increases, that is, as the distance to the first pixel region NML decreases. Accordingly, since the average luminance of the unit emission regions UA and UA' between the first pixel region NML and the second pixel region UDC can be equal to or almost equal to the boundary pixel region BDR can be prevented from appearing in the form of a bright line or a dark line.

[0146] The maximum luminance of the second pixel area UDC can be set higher than the maximum luminance of the first pixel area NML. As can be seen from Fig. 19B and Fig. As can be seen in Figure 20B, the maximum luminance of the first emission regions BA in the boundary pixel region BDR may be lower than the maximum luminance of the second pixel region UDC and higher than the maximum luminance of the first pixel region NML. The maximum luminance of the second emission regions BB in the boundary pixel region BDR may be lower than the maximum luminance of the second pixel region UDC and lower than the maximum luminance of the first pixel region NML. Fig. 19A is a diagram illustrating an example of an area ratio between the first emission region BA and the second emission region BB in the boundary pixel region BDR. In Fig. 19A, "BA+BB" indicates a pixel group including the first emission area BA emitting light with high luminance and the second emission area BB emitting light with low luminance within the unit pixel area UA' of the boundary pixel area BDR. In the example of Fig. 19A, the subpixel arrangement of the first emission region BA is equal to that of the unit emission region UA ​​of the second pixel area UDC. In the example of Fig. 19A, the area ratio between the first emission area BA and the second emission area BB is approximately 1:3. Fig. 19B is a diagram showing an example of a method for controlling the luminance of the unit emission areas UA and UA' as shown in Fig. 19A according to an embodiment of the present disclosure. In Fig. 19B, the numbers outside the brackets indicate the maximum luminance, and the numbers inside the brackets indicate the luminance proportions (%) of the emission areas UA and UA' to which the area ratio is applied.

[0147] As in Fig. As shown in Figure 19, the second pixel region UDC and the boundary pixel region BDR include a first line LINE1 on which bright emission regions A and BA and relatively dark regions NA and BB are arranged along a diagonal direction θ between the first direction X and the second direction Y, and a second line LINE2 on which the relatively dark regions NA and BB are arranged along the diagonal direction θ. The first emission regions BA and the second emission regions BB are alternately arranged on the first line LINE1 of the boundary pixel region BDR. The second emission regions BB are continuously arranged on the second line LINE2 of the boundary pixel region BDR, excluding the first emission region BA. Fig. 20A is a diagram illustrating another example of an area ratio between the first emission region BA and the second emission region BB of the boundary pixel region BDR according to an embodiment of the present disclosure. In Fig. 20A, "BA+BB" indicates a pixel group including the first emission area BA and the second emission area BB emitting light with high luminance within the unit pixel area UA' of the boundary pixel area BDR. In the example of Fig. 20A, the subpixel arrangement of the first emission region BA is different from that of the unit emission region UA ​​of the second pixel area UDC. In the example of Fig. 20A, the area ratio between the first emission area BA and the second emission area BB is approximately 1:1. Fig. 20B is a diagram showing an example of a method for controlling the luminance of unit emission areas UA and UA' as shown in Fig. 20A according to an embodiment of the present disclosure. In Fig. 20B, the numbers outside the brackets indicate the maximum luminance, and the numbers inside the brackets indicate the luminance proportions (%) of the emission areas UA and UA' to which the area ratio is applied.

[0148] With reference to the Fig. 19A to 20B, the maximum luminance of the first emission region BA in the boundary pixel region BDR may gradually decrease as the distance to the first pixel region NML decreases. On the other hand, the maximum luminance of the second emission region BB in the boundary pixel region BDR gradually increases as the distance to the second pixel region UDC increases, that is, as the distance to the first pixel region NML decreases. The maximum luminance difference between the first emission region BA and the second emission region BB decreases with increasing distance from the second pixel region UDC. As described above, the maximum luminance of the first emission regions BA in the boundary pixel region BDR may be lower than the maximum luminance of the second pixel region UDC and higher than the maximum luminance of the first pixel region NML.The maximum luminance of the second emission regions BB in the boundary pixel region BDR may be lower than the maximum luminance of the second pixel region UDC and lower than the maximum luminance of the first pixel region NML. Such a method of controlling the luminance of the first and second emission regions BA and BB can improve the sense of heterogeneity for the boundary pixel region BDR, as shown in FIG. Fig. 21 and Fig. 22. The left image of Fig. 21 is a part of a screen image taken when the pixels were as in Fig. 13 emitted light with a medium gray scale, and the right diagram shows the pixels of the second pixel area UDC and the adjacent border pixel area BDR. The left image of Fig. 22 is a part of a screen image taken when the pixels were as in Fig. 16 emitted light with a medium gray scale, and the right diagram thereof shows the pixels of the second pixel area UDC and the border pixel area BDR adjacent to it.

[0149] In the second pixel area UDC, only the subpixels of emission area A emit light. Accordingly, the luminance contribution of emission area A in the second pixel area UDC is 100%. The luminance contribution of the first emission area BA and the second emission area BB in the boundary pixel area BDR can be calculated using their maximum luminance and their area ratio.

[0150] As in the example of Fig. 19A, when the area ratio of the first emission region BA to the second emission region BB is 1:3, the luminance ratio of the first emission region BA is a value obtained by multiplying the maximum luminance by 1 / 4. The luminance ratio of the second emission region BB is a value obtained by multiplying the maximum luminance by 3 / 4. Here, 1 / 4 is a ratio of the area occupied by the first emission region BA within the unit emission area UA', and 3 / 4 is a ratio of the area occupied by the second emission region BB within the unit emission area UA'. The luminance of the unit emission region UA' is a value obtained by adding the luminance of the first emission region BA and the luminance of the second emission region BB.Accordingly, the sum of the luminance contribution (%) of the first emission region BA and the luminance contribution (%) of the second emission region BB in the unit emission region UA' is 100%. For example, in the unit emission region UA' adjacent to the first pixel region NML, the luminance contribution of the first emission region BA is 160*(1 / 4) = 40%, and the luminance contribution of the second emission region BB is 80*(3 / 4) = 60%. In the unit emission region UA' adjacent to the second pixel region UDC, the luminance contribution of the first emission region BA is 340*(1 / 4) = 85%, and the luminance contribution of the second emission region BB is 20*(3 / 4) = 15%.

[0151] As in the example of Fig. 20A, when the area ratio of the first emission region BA to the second emission region BB is 1:1, the luminance ratio of the first emission region BA is a value obtained by multiplying the maximum luminance by 1 / 2. Similarly, the luminance ratio of the second emission region BB is a value obtained by multiplying the maximum luminance by 1 / 2. In the example of Fig. 20A and Fig. 20B, in the unit emission area UA' adjacent to the first pixel area NML, the luminance component of the first emission area BA is 120*(1 / 2) = 60% and the luminance component of the second emission area BB is 80*(1 / 2) = 40%. In the unit emission area UA' adjacent to the second pixel area UDC, the luminance component of the first emission area BA is 180*(1 / 2) = 90% and the luminance component of the second emission area BB is 20*(1 / 2) = 10%. The middle diagram in Fig. Figure 20B shows a high luminance 20a and a low luminance 20b in grayscale in the unit emission areas UA and UA'.

[0152] Meanwhile, in a Fig. 23 to 26, in the second pixel region UDC and the boundary pixel region BDR, the high-luminance emission regions A and BA may be arranged almost seamlessly next to each other, or the low-luminance emission region BB or the non-emission region NA may be arranged almost seamlessly next to each other. In the comparison example, in the boundary pixel region BDR between the first pixel region NML and the second pixel region UDC, bright spots BPNT appear conspicuous because bright pixels are adjacent to each other, and dark spots BPNT appear conspicuous because dark pixels are adjacent to each other. In this comparison example, bright and dark spots are periodically seen in the boundary pixel region BDR, so the user feels a sense of heterogeneity.In contrast, in the embodiments of the present disclosure, at the boundary between the boundary pixel region BDR and the second pixel region UDC in each of the first and second directions X and Y, the separation distance Lx, Ly between the first emission region BA of the boundary pixel region BDR and the emission region A of the second pixel region UDC is constant, so that the boundary pixel region BDR is not visually recognized and the user does not feel a sense of heterogeneity with respect to the boundary pixel region BDR.

[0153] In the boundary pixel region BDR, the pixels of the first emission region BA and the pixels of the second emission region BB can emit light through gamma compensation curves with different maximum luminances. The second emission region BB can emit light with a luminance defined by a first gamma compensation curve whose maximum luminance is equal to or less than the maximum luminance of the first pixel region NML. The first emission region BA can emit light with a luminance defined by a second gamma compensation curve whose maximum luminance is equal to or less than the maximum luminance of the second pixel region UDC. The maximum luminance defined by the second gamma compensation curve can be higher than that of the first gamma compensation curve.As described above, the pixels of the first and second emission regions BA and BB emit light through the first and second gamma compensation curves with different maximum luminances within the boundary pixel region BDR. As a result, even if a color difference is detected between the first pixel region NML and the second pixel region UDC due to different color coordinates between them, as shown in FIG. Fig. 27, the color difference can be improved by the effect (gradation effect) of gradually changing color coordinate values ​​and luminance.

[0154] The maximum luminance of the pixels can be controlled using a digital gamma technique and an analog gamma technique. In the present disclosure, heterogeneous gamma compensation curves with different maximum luminances can be used by using heterogeneous gamma compensation voltages. As in Fig. For example, as shown in Figure 28, a programmable gamma IC may generate gamma reference voltages in a single gamma reference voltage range (PGMA range) capable of achieving a luminance equal to or greater than the maximum luminance of the second pixel region UDC. The timing control unit 130 may modulate the gamma characteristic of the pixel data by using a digital gamma compensation technique using first and second look-up tables (LUTs). The first look-up table contains data (or gamma compensation values) of the first gamma compensation curve defining a voltage-luminance in a range less than or equal to the maximum luminance of the first pixel region NML.The second lookup table contains data (or gamma compensation values) of the second gamma compensation curve, which defines a voltage-luminance in a range less than or equal to the maximum luminance of the second pixel area UDC. In . Fig. 28, "NML GMA" is a luminance range defined by the first gamma compensation curve. "UDC GMA" is a luminance range defined by the second gamma compensation curve.

[0155] The timing control unit 130 can input pixel data to be written to the pixels of the first pixel region NML into the first lookup table to modulate the pixel data to be written to the pixels of the first pixel region NML. The timing control unit 130 can input pixel data to be written to the pixels located in the second emission region BB of the boundary pixel region BDR into the first lookup table to modulate the pixel data to be written to the pixels of the second emission region BB of the boundary pixel region BDR.

[0156] The timing control unit 130 may input pixel data to be written to the pixels located in the emission region A of the second pixel region UDC into the second lookup table to modulate the pixel data to be written to the pixels of the emission region A of the second pixel region UDC. The timing control unit 130 may input pixel data to be written to the pixels located in the first emission region BA of the boundary pixel region BDR into the second lookup table to modulate the pixel data to be written to the pixels of the first emission region BA of the boundary pixel region BDR. When the pixel data is input to the lookup tables, the gamma compensation value data stored at an address specified by the pixel data is output.Accordingly, the timing control unit 130 may modulate the gamma characteristic of the pixel data using the first and second lookup tables.

[0157] The objects to be achieved by the present disclosure, the means for achieving the objects, and the above-described advantages and effects of the present disclosure do not specify essential features of the claims, and therefore the scope of the claims is not limited to the disclosure of the present disclosure.

[0158] Although the embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and may be embodied in many different forms without departing from the technical concept of the present disclosure. Therefore, the embodiments disclosed in the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it is to be understood that the embodiments described above are illustrative in all aspects and do not limit the present disclosure. EXAMPLES: 1. Scoreboard, which includes: a first pixel area (NML), a second pixel area (UDC) and a boundary pixel region (BDR) arranged between the first pixel region (NML) and the second pixel region (UDC), wherein the boundary pixel area (BDR) contains a plurality of first emission areas (BA) and a plurality of second emission areas (BB), wherein the first emission areas (BA) and the second emission areas (BB) each contain one or more pixels, wherein the second pixel area (UDC) contains a plurality of emission areas (A), wherein at least one of the second emission regions (BB) is arranged adjacent to each other between first emission regions (BA), wherein a maximum luminance of the first emission regions (BA) decreases with increasing distance from the second pixel region (UDC), and a maximum luminance of the second emission regions (BB) increases with increasing distance from the second pixel region (DC), and a separation distance between first emission regions (BA) of the boundary pixel region (BDR) and emission regions (A) of the second pixel region (UDC) is constant, wherein the first emission regions (BA) and the emission regions (A) are adjacent to a boundary between the boundary pixel region (BDR) and the second pixel region (UDC). 2. The display panel according to example 1, wherein the maximum luminance of the first emission areas (BA) is lower than a maximum luminance of the emission areas (A) of the second pixel area (UDC) and higher than a maximum luminance of the emission areas (A) of the first pixel area (NML), and the maximum luminance of the second emission areas (BA) is lower than the maximum luminance of the emission areas (A) of the second pixel area (UDC) lower than the maximum luminance of the emission areas (A) of the first pixel area (NML). 3. The display panel of example 1 or 2, wherein the second pixel region (UDC) is configured to allow light to pass therethrough. 4. Display panel according to one of the preceding examples, wherein a difference between the maximum luminance of the first emission areas (BA) and the maximum luminance of the second emission areas (BB) decreases with increasing distance from the second pixel area (UDC). 5. Display panel according to one of the preceding examples, wherein a distance between adjacent first emission regions (BA) of the boundary pixel region (BDR) is equal to a distance between adjacent emission regions (AA) of the second pixel region (UDC). 6. The display panel according to claim 5, wherein a distance between an emission region (A) of the second pixel region (UDC) and a first emission region (BA) of the boundary pixel region, which are adjacent to each other, is equal to a distance between adjacent emission regions (A) of the second pixel region (UDC). 7. A display panel according to any one of the preceding examples, wherein each of the first and second emission regions (BA, BB) contains a plurality of subpixels having different colors, and a number of subpixels of the same color arranged in the second emission region (BA) is an integer multiple of a number of subpixels of said color arranged in the first emission region (AA). 8. A display panel according to any one of the preceding examples, wherein a pixel density in the boundary pixel region (BDR) is equal to that in the first pixel region (NML) and higher than that in the second pixel region (UDC). 9. The display panel according to any one of the preceding examples 1 to 7, wherein a pixel density of a part of the boundary pixel area (BDR) adjacent to the second pixel area (UDC) is lower than a pixel density of the first pixel area (NML) and equal to or higher than a pixel density of the second pixel area (UDC). 10. Display panel according to one of the preceding examples, wherein pixels of the first pixel area (NML) and pixels arranged in the second emission area (BB) of the boundary pixel area (NDR) emit light with a luminance defined by a first gamma compensation curve, pixels of the second pixel area (UDC) and pixels arranged in the first emission area (BA) of the boundary pixel area (BDR) emit light with a luminance defined by a second gamma compensation curve, and a maximum luminance of the second gamma compensation curve is higher than a maximum luminance of the first gamma compensation curve. 11. Display device comprising: a display panel (100) including a first pixel area (NML), a second pixel area (UDC), and a boundary pixel area (BDR) disposed between the first pixel area (NML) and the second pixel area (UDC); and a display board driver (120) for driving the display board (100), wherein the second pixel area (UDC) contains a plurality of unit emission areas (UA), and the boundary pixel area (BDR) contains several unit emission areas (UA'), wherein each of the plurality of unit emission regions (UA) of the second pixel area (UDC) includes an emission region (A) and a non-emission region (NA), each of the plurality of unit emission areas (UA') of the boundary pixel area (BDR) has the same size as a unit emission area (UA) of the second pixel area (UDC), and each of the plurality of unit emission areas (UA') of the boundary pixel area (BDR) contains a first emission area (BA) and a second emission area (BB), wherein the first emission regions (BA) are spaced apart from one another by a distance equal to a distance between the emission regions (A) of the second pixel region (UDC), the second emission region (BA) being interposed therebetween, a maximum luminance of the first emission areas (BA) decreases with increasing distance from the second pixel area (UDC), and a maximum luminance of the second emission areas (BB) increases with increasing distance from the second pixel area (DC), and a separation distance between first emission regions (BA) of the boundary pixel region (BDR) and emission regions (A) of the second pixel region (UDC) is constant, wherein the first emission regions (BA) and the emission regions (A) are arranged along a boundary between the boundary pixel region and the second pixel region. 12. The display device according to example 11, wherein each of the first and second emission regions (BA, BB) contains a plurality of subpixels having different colors, and a number of subpixels arranged in the first emission area (BA) and a number of subpixels arranged in the second emission area (BB) differ for each color by an integer multiple. 13. Mobile device that includes: a display panel (100) according to any one of Examples 1 to 11 or a display device according to any one of Examples 12 to 17; and an optical element (200) arranged below the second pixel area (UDC) of the display panel (100). 14. The mobile terminal according to example 13, wherein the maximum luminance of the first emission area (BA) is lower than a maximum luminance of the second pixel area (UDC) and higher than a maximum luminance of the first pixel area (NML), the maximum luminance of the second emission area (BA) is lower than the maximum luminance of the second pixel area (UDC) and lower than the maximum luminance of the first pixel area (NML), and a difference between the maximum luminance of the first emission area (BA) and the maximum luminance of the second emission area (BB) decreases with increasing distance to the second pixel area (UDC).

Claims

[1] A display panel (100) comprising a first pixel region (NML), a second pixel region (UDC), and a boundary pixel region (BDR) disposed between the first pixel region (NML) and the second pixel region (UDC), the boundary pixel region (BDR) including: several first emission areas (BA); and several second emission areas (BB), wherein each of the first and second emission areas (BA, BB) contains one or more pixels, the second pixel area (UDC) contains several emission areas (A), at least one of the second emission regions (BB) is arranged adjacent to each other between the first emission regions (BA), the maximum luminance of the first emission area (BA) decreases with increasing distance from the second pixel area (UDC) and the maximum luminance of the second emission area (BB) increases with increasing distance from the second pixel area (UDC), a separation distance between the first emission area (BA) of the boundary pixel area (BDR) and the emission area (A) of the second pixel area (UDC) is constant at a boundary between the boundary pixel area (BDR) and the second pixel area (UDC), the first emission regions (BA) and the second emission regions (BB) are arranged alternately on a first line (LINE1) along a first direction (X) of the boundary pixel region (BDR), and the second emission regions (BB) are continuously arranged on a second line (LINE2) along the first direction (X) of the boundary pixel region (BDR), without the first emission region (BA). [2] A display panel (100) according to any one of the preceding claims, wherein the maximum luminance of the first emission region (BA) is lower than the maximum luminance of the second pixel region (BB) and higher than the maximum luminance of the first pixel region (NML), and the maximum luminance of the second emission region (BB) is lower than the maximum luminance of the second pixel region (UDC) and lower than the maximum luminance of the first pixel region (NML). [3] A display panel (100) according to any one of the preceding claims, wherein light passes through the second pixel region (UDC) to an optical element arranged below the display panel. [4] Display panel (100) according to one of the preceding claims, wherein a difference between the maximum luminance of the first emission region (BA) and the maximum luminance of the second emission region (BB) decreases with increasing distance from the second pixel region (UDC). [5] A display panel (100) according to any one of the preceding claims, wherein a distance between the first adjacent emission regions (BA) is equal to a distance between the adjacent emission regions (A) in the second pixel area (UDC). [6] The display panel (100) according to claim 5, wherein a distance between the emission region (A) of the second pixel region (UDC) and the first emission region (BA) of the boundary pixel region (BDR) which are adjacent to each other is equal to the distance between the emission regions (A) adjacent to each other in the second pixel region (UDC). [7] A display panel (100) according to any one of the preceding claims, wherein each of the first and second emission regions (BA, BB) includes a plurality of subpixels having different colors, and in subpixels of the same color, the number of subpixels arranged in the second emission region (BB) is an integer multiple of the number of subpixels arranged in the first emission region (BA). [8] Display panel (100) according to claim 7, wherein in subpixels of the same color, the number of subpixels arranged in the second emission region (BB) is greater than the number of subpixels arranged in the first emission region (BA) by an integer multiple of the number of subpixels arranged in the first emission region (BA). [9] A display panel (100) according to any one of the preceding claims, wherein the pixel density of the boundary pixel region (BDR) is equal to that of the first pixel region (NML) and higher than that of the second pixel region (UDC). [10] A display panel (100) according to any one of the preceding claims, wherein a pixel density of a part of the boundary pixel region (BDR) adjacent to the second pixel region (UDC) is lower than the pixel density of the first pixel region (NML) and equal to or higher than the pixel density of the second pixel region (UDC). [11] Display panel (100) according to one of the preceding claims, wherein pixels of the first pixel region (NML) and pixels arranged in the second emission region (BB) of the boundary pixel region (BDR) emit light with a luminance defined by a first gamma compensation curve, Pixels of the second pixel area (UDC) and pixels arranged in the first emission area (BA) of the boundary pixel area (BDR) emit light with a luminance defined by a second gamma compensation curve, and the maximum luminance of the second gamma compensation curve is higher than the maximum luminance of the first gamma compensation curve. [12] Display device comprising: a display panel (100) including a first pixel area (NML), a second pixel area (UDC), and a boundary pixel area (BDR) disposed between the first pixel area (NML) and the second pixel area (UDC); and a display panel driver (120) configured to write pixel data of an input image into pixels arranged in pixel areas of the display panel (100), wherein the second pixel area (UDC) contains several unit emission areas (UA), and the boundary pixel region (BDR) contains several unit emission areas (UA'), where each of the unit emission areas (UA) of the second pixel area (UDC) contains an emission area (A) and a non-emission area (NA), each of the unit emission areas (UA') of the boundary pixel area (BDR) has the same size as the unit emission area (UA) of the second pixel area (UDC), and each of the unit emission areas (UA') of the boundary pixel area (BDR) contains a first emission area (BA) and a second emission area (BB), wherein the first emission regions (BA) are spaced apart from one another by a distance equal to a distance between the emission regions (A) of the second pixel region (UDC), the second emission region (BB) being inserted therebetween, the maximum luminance of the first emission area (BA) decreases with increasing distance from the second pixel area (UDC) and the maximum luminance of the second emission area (BB) increases with increasing distance from the second pixel area (UDC), a separation distance between the first emission area (BA) of the boundary pixel area (BDR) and the emission area (A) of the second pixel area is constant at a boundary between the boundary pixel area (BDR) and the second pixel area (UDC), the first emission regions (BA) and the second emission regions (BB) are arranged alternately on a first line (LINE1) along a first direction (X) of the boundary pixel region (BDR), and the second emission regions (BB) are continuously arranged on a second line (LINE2) along the first direction (X) of the boundary pixel region (BDR), without the first emission region (BA). [13] A display device according to claim 12, wherein the maximum luminance of the first emission region (BA) is lower than the maximum luminance of the second pixel region (UDC) and higher than the maximum luminance of the first pixel region (NML), and the maximum luminance of the second emission region (BB) is lower than the maximum luminance of the second pixel region (UDC) and lower than the maximum luminance of the first pixel region (NML). [14] A display device according to claim 12 or 13, wherein light passes through the second pixel region (UDC) to an optical element (200) arranged below the display panel (100). [15] A display device according to claim 12, 13 or 14, wherein a difference between the maximum luminance of the first emission region (BA) and the maximum luminance of the second emission region (BB) decreases with increasing distance from the second pixel region (UDC). [16] A display device according to claim 12, 13, 14 or 15, wherein each of the first and second emission regions (BA, BB) contains a plurality of subpixels having different colors, and the number of subpixels arranged in the first emission region (BA) and the number of subpixels arranged in the second emission region (BB) differ for each color by an integer multiple. [17] Display device according to one of the preceding claims 12 to 16, wherein pixels of the first pixel area (NML) and pixels arranged in the second emission area (BB) of the boundary pixel area (BDR) emit light with a luminance defined by a first gamma compensation curve, Pixels of the second pixel area (UDC) and pixels arranged in the first emission area (BA) of the boundary pixel area (BDR) emit light with a luminance defined by a second gamma compensation curve, and the maximum luminance of the second gamma compensation curve is higher than the maximum luminance of the first gamma compensation curve. [18] Mobile device comprising: a display panel (100) including a first pixel area (NML), a second pixel area (UDC), and a boundary pixel area (BDR) disposed between the first pixel area (NML) and the second pixel area (UDC); a display panel driver (120) configured to write pixel data of an input image into pixels arranged in pixel areas of the display panel (100); and an optical element arranged under the second pixel area (UDC) of the display panel (100), wherein the second pixel area (UDC) contains several unit emission areas (UA), and the boundary pixel region (BDR) contains several unit emission areas (UA'), where each of the unit emission areas (UA) of the second pixel area (UDC) contains an emission area (A) and a non-emission area (NA), each of the unit emission areas (UA') of the boundary pixel area (BDR) has the same size as the unit emission area (UA) of the second pixel area (UDC), and each of the unit emission areas (UA') of the boundary pixel area (BDR) contains a first emission area (BA) and a second emission area (BB), wherein the first emission regions (BA) are spaced apart from one another by a distance equal to a distance between the emission regions (BB) of the second pixel region (UDC), the second emission region (BB) being inserted therebetween, the maximum luminance of the first emission area (BA) decreases with increasing distance from the second pixel area (UDC) and the maximum luminance of the second emission area (BB) increases with increasing distance from the second pixel area (UDC), a separation distance between the first emission region (BA) of the boundary pixel region (BDR) and the emission region (D) of the second pixel region (UDC) is constant at a boundary between the boundary pixel region (BDR) and the second pixel region (UDC), the first emission regions (BA) and the second emission regions (BB) are arranged alternately on a first line (LINE1) along a first direction (X) of the boundary pixel region (BDR), and the second emission regions (BB) are continuously arranged on a second line (LINE2) along the first direction (X) of the boundary pixel region (BDR), without the first emission region (BA). [19] Mobile terminal according to claim 18, wherein the maximum luminance of the first emission area (BA) is lower than the maximum luminance of the second pixel area (UDC) and higher than the maximum luminance of the first pixel area (NML), the maximum luminance of the second emission area (BB) is lower than the maximum luminance of the second pixel area (UDC) and lower than the maximum luminance of the first pixel area (NML), and a difference between the maximum luminance of the first emission area (BA) and the maximum luminance of the second emission area (BB) decreases with increasing distance to the second pixel area (UDC). [20] Mobile terminal according to claim 18 or 19, wherein pixels of the first pixel area (NML) and pixels arranged in the second emission area (BB) of the boundary pixel area (BDR) emit light with a luminance defined by a first gamma compensation curve, Pixels of the second pixel area (UDC) and pixels arranged in the first emission area (BA) of the boundary pixel area (BDR) emit light with a luminance defined by a second gamma compensation curve, and the maximum luminance of the second gamma compensation curve is higher than the maximum luminance of the first gamma compensation curve.

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