Semiconductor package with floating metal part and method for manufacturing

Abstract

Semiconductor package (1900), which includes the following: a semiconductor chip an encapsulation (1901, 1902), wherein the semiconductor chip is at least partially embedded in the encapsulation (1901, 1902), a metal structure formed on an outer surface of the encapsulation (1901, 1902), wherein the metal structure includes a floating part (1905), wherein the floating part (1905) hovers above the encapsulation (1901, 1902), wherein the metal structure is electrically coupled to the semiconductor chip, wherein the floating part (1905) is provided in a recess (1907) of the encapsulation (1901, 1902).

Description

background

[0001] Many applications require a metallic structure that is surrounded only by a fluid and / or is capable of moving mechanically with respect to a stationary element.

[0002] US 2015 / 0 084 139 A1 discloses techniques and mechanisms for providing precisely manufactured structures of a semiconductor package. In one embodiment, a build support of the semiconductor package includes a layer of porous dielectric material. Seed copper and plated copper are disposed on the layer of porous dielectric material. Subsequently, etching is performed to remove copper adjacent to the layer of porous dielectric material, forming a gap separating a suspended portion of a MEMS structure from the layer of porous dielectric material. In another embodiment, the semiconductor package includes a copper structure disposed between portions of an insulating layer or portions of a layer of a silicon nitride material. The layer of a silicon nitride material couples the insulating layer to another insulating layer.One or both of the insulation layers are each protected from desmear processing with a respective release layer structure.

[0003] However, the techniques disclosed in US 2015 / 0 084 139 A1 are not suitable for back-end-of-line (BEOL) processing.

[0004] US 2016 / 0 192 085 A1 discloses a device in which a semiconductor chip is at least partially arranged in an encapsulation. A metallic shield is arranged floating above the encapsulation and electrically connected to the semiconductor chip.

[0005] US 2015 / 0 084 139 A1 discloses another device in which a metallic structure is arranged floating above an encapsulation.

[0006] US 2014 / 0 000 377 A1 shows another floating metal structure. Brief description

[0007] There may be a need for a semiconductor package having a floating metal part and a method of manufacturing the package that is suitable for BEOL processing.

[0008] The need has been addressed by the subject matter of the independent claims. The dependent claims describe advantageous embodiments.

[0009] Examples disclose a semiconductor package comprising: a semiconductor chip; an encapsulant, wherein the semiconductor chip is at least partially embedded in the encapsulant; a metal structure formed on an outer surface of the encapsulant, wherein the metal structure includes a floating portion, wherein the floating portion floats above the encapsulant, wherein the metal structure is electrically coupled to the semiconductor chip. The floating portion is provided in a recess of the encapsulant.

[0010] Further examples disclose a method of manufacturing a semiconductor package, the method comprising: providing a semiconductor chip at least partially embedded in an encapsulant; providing a metal structure on the encapsulant; forming a floating portion of the metal structure by forming a recess in the encapsulant such that the floating portion is provided in the recess. Short description of the characters

[0011] Embodiments will now be described with reference to the accompanying figures. Fig. 1 shows a semiconductor package in a perspective view; Fig. 2 shows the semiconductor package of Fig. 1 in a plan view; Fig. 3 shows the semiconductor package of Fig. 1 in a cross-sectional view; Fig. 4 shows a semiconductor package in a perspective view; Fig. 5 shows the semiconductor package of Fig. 4 in a plan view; Fig. 6 shows the semiconductor package of Fig. 4 in a cross-sectional view; Fig. 7 shows a semiconductor package in a perspective view; Fig. 8 shows the semiconductor package of Fig. 7 in a plan view; Fig. 9 shows the semiconductor package of Fig. 7 in a cross-sectional view; Fig. 10 shows a semiconductor package in a perspective view; Fig. 11 shows the semiconductor package of Fig. 10 in a plan view; Fig. 12 shows the semiconductor package of Fig. 10 in a cross-sectional view; Fig. 13 shows a semiconductor package in a plan view; Fig. 14 shows the semiconductor package of Fig. 13 in a cross-sectional view; Fig. 15 shows a semiconductor package in a plan view; Fig. 16 shows the semiconductor package of Fig. 10 in a cross-sectional view; Fig. 17 shows a semiconductor package in a cross-sectional view; Fig. 18 shows a semiconductor package in a cross-sectional view; and Fig. 19 shows a semiconductor package in a cross-sectional view. Detailed description

[0012] The Fig. Figure 19 shows a claimed embodiment. The remaining figures serve for explanation purposes but do not, in and of themselves, represent claimed embodiments.

[0013] Fig. 1 to 3 show a semiconductor package 0100 comprising an encapsulation 0101, 0102, wherein a semiconductor chip (not shown) is at least partially embedded in the encapsulation 0101, 0102. Fig. 1 shows a perspective view of the semiconductor package 0100, Fig. 2 shows a top view of the semiconductor package 0100 and Fig. 3 shows a cross-sectional view of the semiconductor package 0100 along the section line 0203, which in Fig. 2 is shown.

[0014] Fig. 4 to 6 show a semiconductor package 0400 obtained after a processing step of plating a surface of the encapsulant 0102 with a first metal 0404, wherein the resulting metal layer 0404 may be formed. The first metal forming the metal layer 0404 may include at least one of copper (Cu), aluminum (Al), tungsten (W), nickel (Ni), palladium (Pd), and platinum (Pt).

[0015] Fig. 7 to 9 show a metal structure 0705, 0706 on the encapsulation 0102. The metal structure 0705, 0706 may have been formed by patterning the metal layer 0404. However, the metal structure 0705, 0706 may also have been formed directly on the surface of the encapsulation 0102, e.g., by printing a first metal structure on the surface of the encapsulation 0102.

[0016] As in Fig. As shown in Figures 10 to 12, a recess 1007 may be formed in the encapsulant 0101. The formation of the recess 1007 results in the formation of a floating portion 1005 of the metal structure 0705, 0706. Forming the recess 1007 in the encapsulant 0102 may include removing a portion of the encapsulant 0102 using a laser. Additionally, or as an alternative, forming the recess 1007 in the encapsulant 0102 may include etching a portion of the encapsulant 0102. In particular, laser processing may be used for window opening, and chemical removal may be used to clean / allow the metal to be free from the encapsulant.

[0017] The recess 1007 may have a rectangular, in particular square, or round, in particular circular or elliptical, opening. In some examples, the metal structure 1005, 1006, in particular the floating part 1005, may comprise a meander 1005 and / or a pad 1006. In further examples, the metal structure may also comprise a coil and / or a conductor track.

[0018] Fig. 13 and Fig. 14 shows another semiconductor package 1300 comprising an encapsulation 1401, 1302, a recess 1307, a floating part 1305 and a metal structure 1306.

[0019] Fig. 14 is a cross-sectional view of the semiconductor package 1300 shown in a top view along section line 1303 shown in Fig. 13. Although the processing steps for obtaining the floating part 1305 of the embodiment described with reference to Fig. 1 to 12, the floating portion 1305 comprises a coil. Furthermore, the recess 1307 is at least partially covered with a second metal 1308, which second metal 1308 may be different from or identical to the first metal forming the floating portion 1305 and the metal structure 1306.

[0020] In particular, the second metal 1308 may comprise at least one of copper (Cu), aluminum (Al), tungsten (W), nickel (Ni), palladium (Pd), and platinum (Pt).

[0021] The second metal 1308 may be provided only on the bottom of the cavity 1307, as in Fig. 13 and Fig. 14. However, the second metal may additionally or alternatively be provided on a sidewall of the cavity 1307. The floating portion 1305 and the second metal 1308 may form an antenna. In particular, the second metal 1308 may be considered a ground plane for the antenna.

[0022] Fig. 15 and Fig. 16 show another semiconductor package 1500 in a plan view ( Fig. 15) and in a cross-sectional view ( Fig. 16) along section line 1503.

[0023] The semiconductor package 1500 includes an encapsulant 1601, 1502 that at least partially encapsulates a semiconductor chip (not shown). A metal structure 1505, 1506, including a floating portion 1505 floating above the encapsulant 1601, is formed by removing a portion of the encapsulant 1502. The semiconductor package 1500 further includes a membrane 1509 and a magnet 1610. Therefore, the metal structure 1505 can be part of a loudspeaker.

[0024] Fig. 17 to 19 show further semiconductor packages 1700, 1800, 1900. The semiconductor packages 1700, 1800 and 1900 comprise a lead frame 1712, 1812, 1912 and semiconductor chips 1711, 1811, 1911 connected to the respective lead frame.

[0025] The semiconductor chips 1711, 1811, 1911 are at least partially embedded in encapsulations 1701, 1702, 1801, 1802, 1902. Floating parts 1705, 1805, 1905 of metal structures 1705, 1706; 1805, 1806; 1905 float above the encapsulations 1701, 1801, 1901.

[0026] The encapsulation 1701, 1702; 1801, 1802; 1901, 1902 may comprise a substrate 1701, 1801, 1901. The substrate may be made of at least one of plastic, glass, ceramic, metal, or PCB-like material. The encapsulation 1702, 1802, 1902 may cover the substrate 1701, 1801, 1901 and may comprise a photoresist. The photoresist may be removed to form the floating portions 1705, 1805, 1905. The process may be implemented in a modified, fan-out-like wafer-level package flow.

[0027] As in Fig. 17, the metal structure may be the metal structure 1706, which may be electrically connected to the lead frame 1712.

[0028] The material below the floating part 185 can be completely removed to obtain a recess 1807 in the form of a through-hole. As in Fig. As shown in Figure 19, the floating portion may be provided in a recess 1907 of the encapsulation 1901, 1902. This may allow for a more level placement of a lid 1913.

[0029] The semiconductor packages disclosed herein, particularly those used in Fig. 1 to 19 may enable integration of the floating parts with other components (semiconductors, passive components, etc.).

Claims

[1] Semiconductor package (1900), which includes: a semiconductor chip, an encapsulation (1901, 1902), wherein the semiconductor chip is at least partially embedded in the encapsulation (1901, 1902), a metal structure formed on an outer surface of the encapsulation (1901, 1902), wherein the metal structure comprises a floating part (1905), the floating part (1905) floating above the encapsulation (1901, 1902), wherein the metal structure is electrically coupled to the semiconductor chip. wherein the floating part (1905) is provided in a recess (1907) of the encapsulation (1901, 1902). [2] The semiconductor package (1900) of claim 1, wherein the metal structure, in particular the floating part (1905), comprises at least one of a meander (0706), a coil (1305; 1505), a conductive track and a pad. [3] The semiconductor package (1900) of claim 1 or 2, wherein the metal structure is made of a first metal, the first metal comprising at least one of copper, Cu, aluminum, Al, tungsten, W, nickel, Ni, palladium, Pd, platinum, Pt. [4] The semiconductor package (1900) of any one of claims 1 to 3, wherein the recess (1907) is at least partially covered with a second metal (1308), the second metal (1308) being different from or equal to the first metal. [5] The semiconductor package (1900) of claim 4, wherein the second metal (1308) comprises at least one of copper, Cu, aluminum, Al, tungsten, W, nickel, Ni, palladium, Pd, platinum, Pt. [6] Semiconductor package (1900) according to one of claims 1 to 5, wherein the metal structure is a part of at least one of a heating element (0705), an antenna (1305), a loudspeaker (1505), a switch, a resistor, in particular a gas sensor element. [7] Semiconductor package (1900) according to one of claims 1 to 6, wherein the metal structure (1905) is covered with a lid (1913). [8] Semiconductor housing (1900) according to one of claims 1 to 7, wherein the recess (1907) has a rectangular, in particular square, or round, in particular circular or elliptical, opening. [9] A method for producing a semiconductor package (1900), in particular a semiconductor package according to one of claims 1 to 8, the method comprising: Providing a semiconductor chip at least partially embedded in an encapsulation (1901, 1902); Providing a metal structure on the encapsulation (0102); Forming a floating part (1905) of the metal structure by forming a recess (1907) in the encapsulation (1901, 1902) such that the floating part (1905) is provided in the recess (1907). [10] The method of claim 9, wherein providing the metal structure on the encapsulation (1901, 1902) comprises at least one of the following: Plating a surface of the encapsulation (1901, 1902) with a first metal (0404), Printing a first metal (0705, 0706) on a surface of the encapsulation (1901, 1902). [11] The method of claim 10, wherein providing the metal structure on the encapsulation (1901, 1902) comprises: Structuring the first metal (0404). [12] The method of any one of claims 9 to 11, wherein forming a recess (1907) in the encapsulation (1901, 1902) comprises removing a portion of the encapsulation (1901, 1902) using a laser. [13] The method of any one of claims 9 to 12, wherein forming a recess (1907) in the encapsulation (1901, 1902) comprises etching a portion of the encapsulation (1901, 1902).

Images