Processes for printed circuit board manufacturing

The method addresses limitations in printed circuit board manufacturing by using phase transformation or chemical conversion of a mask layer to enhance resolution and reduce environmental impact, achieving precise conductor structures with improved yield and cost-efficiency.

DE102023116529B4Active Publication Date: 2026-05-21GEBR SCHMID GMBH & CO
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Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
GEBR SCHMID GMBH & CO
Filing Date
2023-06-23
Publication Date
2026-05-21

AI Technical Summary

Technical Problem

Existing methods for manufacturing printed circuit boards face challenges such as limited resolution of conductor structures, environmental impact from photoresist waste, and issues with laser-based mask layer removal, including dust and fumes.

Method used

A method involving a phase transformation or chemical conversion of a mask layer using a laser or heat treatment, followed by etching with a controlled etching solution, to selectively remove the top metal layer without ablation, allowing for precise conductor structure formation.

Benefits of technology

Enables the production of printed circuit boards with high resolution and reduced environmental impact, minimizing dust and fumes, and achieving accurate conductor structures with lower production costs and higher yield.

✦ Generated by Eureka AI based on patent content.

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Abstract

Method for manufacturing a printed circuit board with a metallic conductor structure (109, 119) comprising the steps a. Provision of a base substrate (101) formed as a film or plate with a first substrate side (101a) and a second substrate side, which consists at least partially of an electrically non-conductive organic polymer material and in which the first substrate side (101a) is covered with a cover metal layer (102), and b. partial removal of the top metal layer (102), where the top metal layer is removed in sections (102) c. a mask layer (103) is applied to the top metal layer (102), d. the mask layer (103) is removed in sections, so that the first substrate side (101a) is divided into at least one first sub-area (104) in which the first substrate side (101a) is covered only with the cover metal layer (102), and into at least one second sub-area (105) in which the first substrate side (101a) is covered with the cover metal layer (102) and by the mask layer (103), and e. the cover metal layer (102) in which at least one first sub-area (104) is removed, characterized by the fact that f. the mask layer (103) in the first sub-area (104) is removed by an etching treatment using an etching solution and prior to the etching treatment to remove the mask layer (103) in the first sub-area (104) a phase transformation or a chemical transformation is effected in the mask layer (103), wherein the mask layer (103) consists of an inorganic semiconductor or a compound of an inorganic semiconductor or of a polymer material which can assume at least a partially crystalline state and an amorphous state.
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Description

[0001] The invention described below relates to a method for manufacturing printed circuit boards. BACKGROUND OF THE INVENTION

[0002] A printed circuit board (PCB) serves as a substrate for electronic components and ensures their electrical connections. Almost every electronic device contains one or more PCBs.

[0003] Printed circuit boards (PCBs) always consist of a base substrate that is electrically non-conductive and has a structure of conductive traces (or conductor structure) on at least one side for electrically contacting the electronic components. Base substrates for PCBs are typically made of fiber-reinforced plastic, plastic films, or hard paper. The conductive traces are usually made of a metal such as copper.

[0004] In the simplest case, only one side of the base substrate has a conductor structure. However, more complex circuits often require more than one conductor layer, necessitating a multilayer printed circuit board (MLB). In these cases, both sides of a base substrate can be equipped with a conductor structure, or several base substrates, each with a conductor layer, can be combined to form an MLB. In particular, base substrates with a conductor structure on both sides can also serve as a foundation for multilayer structures. The conductors of the different conductor layers can be electrically connected via vias. For this purpose, holes can be drilled into the base substrates and the hole walls metallized.

[0005] The formation of conductor structures on a base substrate is classically subtractive, occurring in a multi-stage photolithographic process using a photoresist (or simply resist). The solubility of this resist in a developer solution can be influenced by radiation, particularly UV radiation. In a typical procedure, a metal layer is formed on the base substrate and covered with a layer of photoresist. This photoresist layer can, for example, be laminated onto the metal layer. Subsequently, the photoresist layer is exposed to the aforementioned radiation in an exposure step, with certain areas of the layer being protected from radiation exposure by an exposure mask.Depending on the photoresist and developer solution used, after the exposure step either the exposed or the unexposed portions of the photoresist layer become soluble in the developer solution and can be removed in a subsequent step. In this subsequent step, the development step, portions of the metal layer on the base substrate are exposed, which can then be removed by wet chemical means in a further step, the etching step. The remaining metal layer fragments after the subsequent complete removal of the resist form the desired conductor structure. If necessary, this structure can be reinforced in a deposition step – for example, by electroplating a suitable metal.

[0006] Due to the manufacturing process, the conductive traces are located on the surface of a base substrate. This can be disadvantageous in the production of multilayer substrates (MLBs). When a substrate surface with conductive traces is pressed onto another substrate, subsequent inspection and correction are often necessary due to deviations caused by the pressures and temperatures encountered during pressing. Conductive traces on the surface of base substrates are particularly susceptible to such stresses. Generally, the smaller the spacing and dimensions of the conductive traces on the substrate, the greater the corresponding need for inspection and correction, for example, with regard to existing impedance and signal velocity requirements.

[0007] A general disadvantage of classical subtractive processes remains the limited resolution of the conductor structures that can be produced. Conductor tracks with widths of at least 40 to 80 µm are typical. Conductor tracks with widths in the low double-digit or even single-digit µm range are virtually impossible to produce using this method.

[0008] WO 2021 / 001167 A1 discloses a process for manufacturing printed circuit boards (PCBs) in which a thin plastic film serves as the base substrate, covered on at least one side with a top layer of metal. This layer is partially removed, followed by plasma treatment, which simultaneously creates depressions in the film wherever it is exposed. To form a conductor structure, the depressions are then filled with a filler metal. Afterward, the remnants of the top layer, which served as a mask during the plasma treatment, are removed. PCBs manufactured in this way are characterized by the fact that the conductor tracks are not arranged on a surface but are embedded in the processed film, which compensates for some disadvantages of conductor tracks manufactured using classical subtractive processes.However, the subtractive etching of the metal layer formed on the base substrate, which is required in classical subtractive processes, is also necessary when using a procedure according to WO 2021 / 001167 A1.

[0009] Such etching processes are problematic from an ecological perspective. Commercially available photoresists are not recyclable. The resulting waste solutions contain organic compounds, making their environmentally sound disposal complex and expensive. Furthermore, many processes require the removal of the resist formed after subtractive etching in a separate step.

[0010] From WO 2022 / 028852 A1, a method for manufacturing a printed circuit board with a metallic conductor structure is known, in which a base substrate in the form of a film or plate with a first substrate side and a second substrate side, which consists at least partially of an electrically non-conductive organic polymer material and in which the first substrate side is covered with a cover metal layer, is provided, and the cover metal layer is removed in certain areas. For the area-by-area removal of the cover metal layer, a mask layer made of titanium, zinc, titanium dioxide, titanium nitride, zinc oxide and / or a polymer material is applied to the cover metal layer.This mask layer is selectively removed using a laser, dividing the first substrate side into at least one first sub-region where the first substrate side is covered only by the top metal layer, and at least one second sub-region where the first substrate side is covered by both the top metal layer and the mask layer. Subsequently, the top metal layer in the first sub-region is removed using an etching solution. This approach allows the classic photoresist process in printed circuit board manufacturing to be replaced. Instead of the conventionally used photoresists, the metal and / or metal compound and / or polymer material is used to form the mask layer, which has the advantage of being structurable using a laser ablation process. For example, the metal ablated in the preceding step...The ablated metal compound can be extracted, collected, and reused, for example, to form further mask layers. Thus, the described process enables environmentally friendly production of printed circuit boards in a closed-loop system.

[0011] However, this approach also has its drawbacks. In some cases, a significant disadvantage is that the selective removal of the mask layer using a laser can produce fumes and dust, depending on the material used for the mask layer, which then require complex removal processes.

[0012] A copper layer from GB 2207395 A is deposited onto a substrate, which is then covered with a gold layer. A gold-copper alloy is formed in certain areas by diffusion using a laser. This alloy is subsequently removed using an etching solution.

[0013] From DE 69601784 T2, the ablative removal of a cover metal layer with a proportion of at least 50% tin by means of a laser is known. DESCRIPTION OF THE INVENTION

[0014] The present invention was based on the objective of further improving the method for manufacturing printed circuit boards known from WO 2022 / 028852 A1, in particular to avoid or at least reduce the problems described.

[0015] To solve this problem, the invention proposes the method with the features of claim 1. Further developments of the invention are the subject of dependent claims. The wording of all claims is hereby incorporated by reference into this description.

[0016] The inventive method for manufacturing a printed circuit board with a metallic conductor structure always comprises the immediately following steps a. and b.: a. Provision of a base substrate formed as a film or plate with a first substrate side and a second substrate side, which consists at least partially of an electrically non-conductive organic polymer material and in which the first substrate side is covered with a metal cover layer. b. Sectional removal of the top metal layer.

[0017] The partial removal of the top metal layer is carried out as follows: c. A mask layer is applied to the top metal layer. d. The mask layer is removed in sections, so that the first substrate side is divided into at least one first sub-area in which the first substrate side is covered only with the top metal layer, and into at least one second sub-area in which the first substrate side is covered with the top metal layer and by the mask layer. e. The top metal layer is removed in at least one initial sub-area.

[0018] The process is particularly distinguished by the following step: f. The mask layer is removed in the first sub-area by an etching treatment using an etching solution, and prior to the etching treatment to remove the mask layer, a phase transformation or a chemical transformation is effected in the mask layer in the first sub-area, wherein the mask layer consists of an inorganic semiconductor or a compound of an inorganic semiconductor or of a polymer material that can assume at least a semi-crystalline state and an amorphous state.

[0019] A phase transformation in this context means that the material of the mask layer in the sub-area is completely or partially transformed either from a crystalline or semi-crystalline state into an amorphous state or from an amorphous state into a crystalline or semi-crystalline state.

[0020] Steps a. to e. are already known from WO 2022 / 028852 A1, the contents of which are hereby incorporated by reference. Step e., however, is new and offers the advantage that no dust is generated when the mask layer is removed. It is preferred that the phase transformation takes place without removing any material from the mask layer. Instead of ablation, the present invention provides for said phase transformation or said chemical transformation in combination with said etching treatment. The mask layer can be removed wet-chemically using the etching solution.

[0021] Phase transformations can, in principle, be effected in several ways. According to the invention, however, at least one laser is preferably used for this purpose. Accordingly, the method according to the invention is preferably characterized by at least one of the following features a. to e.: a. The phase transition is effected using a laser. b. The laser is operated in pulsed or continuous mode. c. The laser has a wavelength in the range of 300 nm to 600 nm. d. The laser is operated at an energy that is insufficient to cause ablation of the mask layer. e. The laser is operated in pulsed mode with a pulse energy in the range of 0.1-100 µJ.

[0022] Particularly short laser pulses can lead to amorphization or recrystallization of areas, depending on the chosen mask layer material, for example, areas with diameters of approximately 1 µm. The laser should not be operated at excessively high energy to avoid ablation of the mask layer. Suitable laser parameters can be optimized through experimentation if necessary. These parameters depend, for example, on the material of the mask layer.

[0023] In a preferred embodiment, for example, a polycrystalline mask layer can be formed, for instance, by depositing silicon using PECVD (plasma-enhanced chemical vapor deposition) and subsequent heat treatment (for example, annealing at 850 °C for a period of, for example, one minute), and then transformed into an amorphous phase state using a laser. Suitable lasers for this purpose include, for example, lasers with a wavelength of 354 nm, 515 nm, or 532 nm, a pulse energy of, for example, 100 nJ, and a pulse duration of, for example, 100 ps.

[0024] Alternatively, the phase transformation can also be brought about by heat treatment. This applies in particular to the transition from amorphous to crystalline or semi-crystalline. Accordingly, the process according to the invention is preferably characterized by the immediately following feature a.: a. The phase transition is brought about by means of a heat treatment.

[0025] In a preferred embodiment, for example, an amorphous mask layer can be formed, for instance by sputtering silicon, and transformed into a polycrystalline phase state by heat treatment. During the heat treatment, the mask layer in the first sub-region can, for example, be heated to a temperature in the range of 800 °C to 1000 °C.

[0026] In particularly preferred embodiments, the mask layer is formed from a mask material capable of reversible amorphization and crystallization, wherein the resistance of the mask material to the etching solution depends on the phase state in which the mask material is located.

[0027] In further particularly preferred embodiments, the mask layer consists of an inorganic semiconductor or a compound of an inorganic semiconductor from the group consisting of silicon, SiO2, SiN, gallium, indium and GaAs.

[0028] The mask layer can also consist of a ceramic material, an oxide, or a nitride.

[0029] The concept of the present invention is based on the understanding that the etch rate at which the mask layer is removed during the etching process in the first sub-area depends on the phase state of the material in question for most of the materials under consideration. In other words, the effectiveness of an etching solution can be influenced by a phase change in the material being etched. For example, a sub-area in which the mask layer is amorphous may be chemically less resistant to an etching solution than a crystalline or semi-crystalline sub-area. Conversely, the same is possible, depending on the choice of material.

[0030] The same effect can also be achieved by chemically transforming the material to be etched.

[0031] In the context of the invention, comparatively high chemical resistance means that a material in contact with an etching solution exhibits a lower tendency to dissolve than a comparable material. Thus, a material is chemically more resistant than another if it dissolves more slowly, i.e., at a lower etching rate, in contact with an etching solution under identical conditions (in particular, the same etching solution and the same temperature).

[0032] The method according to the invention is particularly preferably characterized by one of the following features a. and b.: a. The mask layer is transformed by the phase transformation in the first sub-area into a phase state in which it has a lower chemical resistance to the etching solution than before the phase transformation. b. The mask layer is transformed by the chemical conversion in the first sub-area into a state in which it has a lower chemical resistance to the etching solution than before the chemical conversion.

[0033] In preferred embodiments, a mask material is selected that is capable of laser-induced reversible amorphization and crystallization. The concept is applicable to inorganic and organic mask layers. Essentially, the only important factor is that the phase transformation can occur and that different phase states lead to different etch rates. This, too, can be determined for individual materials and optimized experimentally.

[0034] Silicon is a particularly preferred material, as it can be transformed both from an amorphous to a crystalline or semi-crystalline state and from a crystalline or semi-crystalline to an amorphous state.

[0035] The chemical transformation mentioned above means that the material of the mask layer in the first sub-region undergoes a complete or partial chemical transformation. Preferably, this chemical transformation is an oxidation (for example, Si → SiO₂). X with x ≤ 2). However, other chemical transformations are also possible, for example nitride formation (e.g. silicon → SiN).

[0036] Accordingly, the method according to the invention is characterized in some preferred embodiments by at least one of the following additional features a. to c.: a. The chemical transformation is an oxidation. b. The chemical transformation takes place when the mask layer is exposed to an oxidative atmosphere. c. The chemical transformation takes place while the mask layer is being heated. d. The chemical conversion is carried out using a laser.

[0037] The features a. and b. immediately preceding are preferably implemented in combination. Features a. to c. immediately preceding are particularly preferably implemented in combination. In further preferred embodiments, features a. and b. and d., or features a. to d., are implemented in combination.

[0038] The following characteristics may be preferred in potential further training programs: In particularly preferred embodiments, the mask layer is formed from a metallic or semi-metallic mask material, the oxide or nitride of which is chemically less resistant to the etching solution than the metallic or semi-metallic mask material.

[0039] In further particularly preferred embodiments, the mask layer consists of a doped or undoped inorganic semiconductor.

[0040] It may be necessary to protect the mask layer outside the first sub-region to carry out the chemical conversion. However, it is preferable to also perform the chemical conversion using laser induced processes. For this purpose, the mask layer can be exposed to an oxidizing atmosphere or an atmosphere containing another reactant, such as nitrogen or ammonia. A laser then selectively supplies the activation energy required for the respective chemical conversion to the first sub-region. Masking outside the first sub-region is then not strictly necessary.

[0041] The top metal layer is also preferably removed by etching with an etching solution. In principle, two different etching solutions can be used to remove the mask layer in the first section and the top metal layer, and / or the etching can be carried out in separate steps. However, it is particularly preferred that the etching of the mask layer and the etching of the top metal layer are carried out in one step with one and the same etching solution.

[0042] The method according to the invention is particularly preferably further characterized by at least one of the following features a. and b.: a. The etching treatment using the etching solution removes the mask layer and the top metal layer in the first sub-area in one step. b. The etching solution is an acidic or alkaline solution for etching copper.

[0043] Commercially available etching solutions, particularly aqueous commercially available etching solutions, can be used within the scope of the invention. The core concept of the invention is based on varying the sensitivity of a material to an etching solution through targeted phase transformation or chemical conversion. This can, in principle, be achieved with any etching solution.

[0044] In preferred embodiments, potassium hydroxide or sodium hydroxide can be used as alkaline etching solutions.

[0045] In preferred embodiments, an aqueous solution comprising nitric acid and hydrogen fluoride or an aqueous solution comprising hydrochloric acid and hydrogen peroxide can be used as the acidic etching solution. The solution comprising nitric acid and hydrogen fluoride may be particularly preferred when etching silicon.

[0046] In a preferred embodiment of the invention, the method additionally comprises at least one of the following features a. and b.: a. The top metal layer is made of copper. b. The etching solution is a solution for etching copper.

[0047] Those skilled in the art understand that the copper used does not necessarily have to be pure copper. The coating may contain, preferably in small quantities, traces of one or more other metals. The coating can therefore also consist of a copper alloy.

[0048] As an alternative to copper or copper alloys, nickel-chromium alloys are also suitable as a cover metal. In this case, the etching solution is specifically designed for etching the nickel-chromium alloy. The metal and / or metal compound and / or polymer material from which the mask layer is formed must, in this case, be more chemically resistant to the etching solution than to the nickel-chromium alloy itself.

[0049] The etching solution is preferably based on copper chloride, sodium persulfate, ammonium persulfate, copper sulfate, and iron(III) chloride. A solution comprising hydrochloric acid and hydrogen peroxide is also suitable. This applies particularly to cases where the top metal layer is made of copper or a copper alloy.

[0050] In particular, these copper etching solutions can also etch specially formulated mask layer materials. It is therefore possible to etch the mask layer and the top metal layer with the same etching solution, possibly even in a single step.

[0051] Regardless of its material composition, the cover metal layer should be intact before being removed section by section. It preferably has a thickness in the range of 10 nm to 10 µm, particularly preferably in the range of 20 nm to 6 µm.

[0052] To form the top metal layer, a thin metal foil, in particular a thin copper foil, can be applied to the first substrate side, especially by laminating or coating. Alternatively, the top metal layer can also be formed on the first substrate side by physical (PVD) or chemical vapor deposition (CVD), by sputtering, or by a wet chemical coating process.

[0053] Metallization by physical and chemical vapor deposition as well as the production of metal layers by means of wet chemical coating processes or sputtering deposition are state of the art and require no further explanation.

[0054] It may be preferable to apply an adhesion-promoting adhesive layer to the first substrate side before the formation of the cover metal layer or when applying the cover metal layer.

[0055] In a preferred embodiment of the invention, the method additionally comprises at least one of the following additional features a. to d.: a. The mask layer has a thickness in the range of 5 nm to 10 µm or 10 nm to 10 µm. b. The mask layer is formed by means of physical or chemical vapor deposition. c. The mask layer is formed by sputtering. d. The mask layer is formed by a wet chemical coating process.

[0056] Feature a. is particularly preferred when implemented in combination with one of steps b., c. or d.

[0057] The mask layer is most preferably formed with a thickness in the range of 5 nm to 1000 nm, more preferably from 5 nm to 500 nm, and particularly preferably from 5 nm to 250 nm. When using a polymer material, the layer can also have a thickness in the micrometer range, for example in the range of 2 to 10 µm.

[0058] In a particularly preferred first variant of the method, the method is additionally characterized by the immediately following feature a.: a. The mask layer is removed after the removal of the cover metal layer in at least one second sub-area, with the cover metal layer remaining as a metallic conductor structure in the second sub-area.

[0059] The selective removal of the top metal layer using a masking step is now complete. The remaining top metal layer in the second section forms the metallic conductor structure. The printed circuit board (PCB) manufacturing process can then continue in the conventional manner. For example, the conductor structure can be coated with a solder mask for protection. Exposed contacts can be coated with a precious metal, such as gold, silver, or platinum.

[0060] In an alternative, particularly preferred second variant of the method, the method is additionally characterized by at least one of the following features a. to d.: a. After removing the cover metal layer in the at least one first sub-area, the first substrate side is subjected to a plasma, with the help of which the polymer material is removed in the at least one first sub-area, forming at least one depression. b. The at least one depression is filled with a filler metal. c. Complete removal of the cover metal layer and the mask layer in the at least one second sub-area, preserving a metallic conductor structure in the at least one recess. d. If necessary, level the first substrate side with the filled at least one depression.

[0061] The immediately preceding steps a, b, and c are particularly preferred when implemented in combination. Step d is an optional step that may follow. In some embodiments, however, the complete removal of the top metal layer and the mask layer can also be achieved during planarization according to step d. Therefore, step c and step d may be identical in some embodiments.

[0062] In some preferred embodiments of this variant, step c is performed before step b. Thus, after the plasma is applied to the first substrate side, the cover metal layer and the mask layer are completely removed in at least one second sub-area. This results in a first substrate side with depressions that is free of the cover metal layer and the mask layer. The depressions are then filled with the filler material in a subsequent step, ideally followed by planarization according to step d.

[0063] According to this second variant of the method, the ladder structure is formed in at least one depression and not in the second sub-area. This results in a ladder structure that is embedded in the base substrate.

[0064] In particularly preferred embodiments, the complete removal of the mask layer does not occur in a separate removal step. Rather, it is preferred that the mask layer is removed during the plasma treatment according to feature a. of the described particularly preferred second embodiment of the process. This is particularly efficient if the mask layer is formed from the polymer material. With a sufficiently long treatment time, the mask layer can be completely removed by the plasma. This eliminates an entire process step, which can significantly increase the efficiency of the process.

[0065] In a further development of the particularly preferred first and second variants of the method, the process serves to construct a multilayer printed circuit board. The conductor structure embedded in the base substrate, obtained according to the second variant, or the cover metal layer remaining in the second sub-area, which functions as a conductor structure according to the first variant of the method, forms a first conductor structure in this multilayer printed circuit board, which can optionally be connected to further conductor structures in the printed circuit board.

[0066] In this advanced training course, the procedure additionally includes at least one of the following additional features a. to f.: a. Covering the first conductor structure with a layer of an electrically insulating material, which, in combination with the base substrate, has a bottom surface in direct contact with the first conductor structure and a top surface facing away from the first conductor structure, and which consists at least partially of an electrically non-conductive organic polymer material. b. If not already present, formation of a cover metal layer on the top side of the layer of electrically insulating material, c. Sectional removal of the top metal layer by dividing the top surface into at least one first sub-area in which the top surface is free of the top metal layer, and at least one second sub-area in which the top surface is covered with the top metal layer, d. Action of a plasma on the upper surface, with the help of which the polymer material is removed in at least one first sub-area, forming at least one depression, e. Filling the at least one depression with a filler metal as well as f. Complete removal of the cover metal layer in at least one second sub-area, forming a second conductor structure or part of a second conductor structure.

[0067] Preferably, at least the immediately preceding features a. to c. are implemented in combination with one another. In preferred embodiments, the three steps according to features d. to f. follow in combination.

[0068] However, it is also conceivable that the remaining cover metal layer in the second sub-area of ​​the top surface already forms a second metallic conductor structure or part of the metallic conductor structure, analogous to the particularly preferred first variant of the method described above. In this case, the immediately preceding steps d. to f. are not required.

[0069] Of course, in preferred embodiments, the partial removal of the cover metal layer in the immediately preceding step c. by subdividing the top side of the layer from the electrically insulating material can be carried out in the same way as in the case of the partial removal of the cover metal layer on the first substrate side of the base substrate.

[0070] The layer of electrically insulating material can be a plastic film. In particular, the layer can also be configured like the base substrate provided in step a. of claim 1. It thus preferably consists at least partially of an electrically non-conductive organic polymer material. In particularly preferred embodiments, the layer of electrically insulating material and the base substrate are identical.

[0071] By repeatedly performing the immediately preceding steps a. to c., in particular the immediately preceding steps a. to f., MLBs with an arbitrarily large number of layers can be built sequentially.

[0072] In a preferred embodiment of the invention, the method comprises at least one of the following features a. and b.: a. The base substrate and / or the layer of electrically insulating material has a thickness in the range of 10 µm to 3 mm, preferably in the range of 10 µm to 2 mm. b. The organic polymer material of the base substrate and / or the layer of electrically insulating material is a thermoplastic polymer material, preferably selected from the group consisting of polyimide, polyamide, Teflon, polyester, polyphenylene sulfide, polyoxymethylene and polyetherketone.

[0073] The features a. and b. immediately preceding are preferably implemented in combination with each other.

[0074] Particularly preferably, the base substrate and the layer of electrically insulating material are each a film made of a polymer material, especially one of the aforementioned polymer materials. This applies particularly when the printed circuit board to be manufactured is multilayered. In the case of a single-layer printed circuit board, a comparatively thicker base substrate in the form of a plate is chosen in some preferred embodiments.

[0075] The method according to the invention, and in particular the second preferred variant of the method, is particularly preferably characterized by at least one of the following additional features a. to c.: a. The base substrate and / or the layer of electrically insulating material includes fillers, in particular dielectric fillers. b. The base substrate and / or the layer of electrically insulating material is a plastic film containing the fillers. c. The fillers have a mean particle size (d50) < 1 µm.

[0076] Preferably, the features a. and b. immediately preceding, and in particular a. to c., are realized in combination with each other.

[0077] Optionally, the base substrate and / or the layer of electrically insulating material may include fillers, in particular dielectric fillers. For example, the base substrate and / or the layer of electrically insulating material may each be a film of one of the aforementioned polymer materials in which silicon dioxide particles are embedded.

[0078] Suitable dielectric fillers include, in particular, metal or semimetal oxides (besides silicon dioxide, especially aluminum oxide, zirconium oxide, or titanium oxide) and other ceramic fillers (especially silicon carbide, boron nitride, or boron carbide). Silicon can also be used if necessary.

[0079] The fillers are preferably in particulate form, especially with a mean particle size (d50) in the nano range (< 1 µm).

[0080] For easier handling, the base substrate can be applied to a carrier or an auxiliary substrate, for example made of glass or aluminum, for processing.

[0081] In a further preferred embodiment of the invention, in particular the preferred second embodiment of the method described above, the method comprises at least one of the immediately following steps a. and b.: a. To provide the plasma, a process gas from the group consisting of O2, H2, N2, Argon, Helium, CF4, C3F8, CHF3 and mixtures of the aforementioned gases such as O2 / CF4 is used. b. The plasma is applied at a temperature in the range of minus 15 °C to 200 °C, preferably in the range of minus 15 °C to 80 °C.

[0082] The features a. and b. immediately preceding are preferably implemented in combination with each other.

[0083] Particularly preferably, the process gas used for plasma provision within the scope of the present invention comprises at least one of the reactive gases from the group consisting of CF4, C3F8 and CHF3.

[0084] Plasma etching is also state of the art. In plasma etching, process gases are used that can convert the material to be etched into the gas phase. The gas, enriched with the etched material, is pumped out, and fresh process gas is supplied. This achieves a continuous material removal process.

[0085] Particularly preferred in the context of the invention is the use of an inductively coupled plasma (ICP plasma), for example generated by an ICP generator with DC bias.

[0086] The process gases mentioned immediately above are particularly well suited for etching the above-mentioned preferred polymer materials.

[0087] It is important to note that in at least one first sub-region of the first substrate side and / or in at least one first sub-region of the top surface, the base substrate consisting of the polymer material and / or the layer of electrically insulating material can come into direct contact with the plasma, while at least one second sub-region of the first substrate side and / or at least one second sub-region of the top surface is covered with the respective top metal layer. Generally, metals are etched more slowly by a plasma, particularly when using the aforementioned process gases, than polymer materials.As a result of the plasma's action, depressions form exclusively in the area of ​​at least one first sub-region of the first substrate side, while the cover metal layer and the mask layer (the latter at least temporarily) form a barrier that shields the respective at least one second sub-region from the plasma. The surface of the base substrate and the surface of the layer made of electrically insulating material can thus be selectively and precisely structured with depressions.

[0088] In particularly preferred embodiments, the plasma is used in an anisotropic etching process. Ideally, plasma ions are accelerated perpendicular to the surface of the substrate to be etched. The accelerated ions cause physical sputtering.

[0089] Particularly suitable as anisotropic etching processes are embodiments of reactive ion etching (RIE) and reactive ion beam etching (RIBE).

[0090] In a further preferred embodiment of the invention, the method comprises one of the immediately following steps a. to c.: a. To fill the at least one depression in the first substrate side of the base substrate and / or in the top of the layer of electrically insulating material, the at least one depression is metallized in one step and the metallized at least one depression is filled with the filler metal in a subsequent step. b. The metallization of the at least one depression is carried out by means of physical or chemical vapor deposition, in particular by sputtering the first substrate side, or by a wet chemical process. c. The first substrate side and / or the top surface is fully metallized.

[0091] Preferably, the features a. and b. immediately preceding, in particular a. to c., are realized in combination with each other.

[0092] Preferably, a thin layer of copper or a copper alloy is formed during the metallization process.

[0093] In the case of wet chemical metallization, the metallization takes place, for example, by deposition of copper from a solution.

[0094] The filling with the filler metal is preferably carried out by electrochemical deposition. Particularly preferably, the filling is carried out using a so-called via-fill process, which allows the deposition to take place primarily in the at least one recess and optionally in bores or blind holes, while simultaneously minimizing unwanted deposition on the first substrate side and / or the top surface, and reinforcing the cover metal layer and optionally the mask layer in the at least one second sub-area.

[0095] A metallization layer applied across the entire surface enables electrical contacting of the first substrate side and / or the top surface, for example to position a cathodic contact for subsequent electrochemical deposition and to ensure that the entire substrate side can be coated.

[0096] In principle, all metals and alloys suitable for creating conductive track structures on printed circuit boards can be used as filler metals. However, the following is particularly preferred: a. the filler metal with which the at least one depression is filled is copper or a copper alloy.

[0097] In a further preferred development of the particularly preferred second variant of the procedure, the procedure comprises one of the immediately following steps a. or b.: a. The removal of the top metal layer and / or the mask layer in at least one second sub-area of ​​the substrate side and / or the top surface is carried out by means of an etching step. b. The removal of the top metal layer and / or the mask layer in at least one second sub-area is carried out by mechanical processing of the first substrate side and / or the top surface.

[0098] The etching step is, for example, a classic etching step using a strong acid such as hydrochloric acid.

[0099] If the removal of the top metal layer is done mechanically, it can be done, for example, by polishing and / or grinding. The preferred goal is to completely remove the top metal layer in at least one other sub-area. Only then is the formation of the conductor structure complete.

[0100] The complete removal of the cover metal layer in the at least one second sub-area may preferably also include the removal of filler metal in the at least one first sub-area and optionally also in the area of ​​the at least one recess, at least insofar as the filler metal extends beyond the edge or edges of the at least one recess.

[0101] A particularly advantageous aspect of mechanically processing the first substrate side is that not only can the cover metal layer be removed, but the first substrate side can also be planarized simultaneously. The preferred goal of planarization is to flatten the first substrate side so that it has no conductor tracks protruding from the surface. Instead, the conductor structure is preferably completely recessed within the at least one depression.

[0102] In preferred embodiments, external conductor structures formed according to the method are coated with a solder mask for protection. Exposed contacts can be coated with a precious metal, for example, gold, silver, or platinum.

[0103] According to the described method, printed circuit boards with the highest resolution in the µm range can be manufactured with less effort and lower production costs, while simultaneously achieving a higher yield than is possible with the state of the art.

[0104] In the fabrication of MLBs, particularly with the described sequential structure, the fact that the conductor structures are embedded in the base substrate is advantageous. The pressures exerted on the conductor structures during the compression of the base substrate and subsequent layers are comparatively low, which has a positive effect on existing impedance and signal velocity requirements. Furthermore, the fact that channels can be formed with exceptionally high accuracy using plasma etching is also beneficial in this regard. BRIEF DESCRIPTION OF THE DRAWINGS

[0105] Further features, details, and advantages of the invention will become apparent from the claims and the abstract, the wording of which is incorporated by reference into the description, the following description of preferred embodiments of the invention, and the drawings. These are illustrated schematically. - Fig. 1 the process of a method according to the invention in accordance with the above-described, particularly preferred second variant and - Fig. 2 the process of a further embodiment of the method according to the invention. - Fig. 3 the process of a further embodiment of the method according to the invention. DESCRIPTION OF PREFERRED EXAMPLES

[0106] In a procedure according to Fig. In step A, a base substrate 101 is prepared. In step B, its first substrate side 101a is covered with a copper top layer 102. To partially remove the top layer 102, a phosphorus-doped polycrystalline silicon mask layer 103 is applied to the top layer 102 in step C. For this purpose, a 100 nm thick phosphorus-doped silicon layer is deposited using PECVD and heat-treated at 850 °C for one minute. In step D, the first sub-regions 104 of the mask layer 103 undergo a polycrystalline to amorphous phase transformation using a laser (354 nm, pulses with a duration of 100 ps and 100 nJ pulse energy) and are subsequently removed using an etching solution (HF / HNO3).In step E, the top metal layer 102 is removed in the first sub-areas 104, which are no longer covered by the mask layer 103, using a further etching solution, for example, with ammonium persulfate solution. It should be emphasized here that steps D and E can also be combined if an etching solution suitable for removing both the mask layer and the top metal layer is used.

[0107] The substrate side 101a, originally completely covered with the top metal layer 102, is now subdivided into the first sub-areas 104, where it is free of the top metal layer 102, and the second sub-areas 105, where it is still covered with the top metal layer 102 and the mask layer 103. In step F, a plasma is applied to the substrate side 101a. While the sub-areas 105 are shielded from the plasma by the top metal layer 102 and the mask layer 103, the plasma causes material removal in the sub-areas 104, resulting in the formation of the depressions 106. With sufficient plasma exposure, the mask layer can also be removed in this step. In step G, the depressions 106 are metallized by sputtering, followed by filling the depressions 106 by electrochemical deposition of a filler metal 108 in step H.Excess filler metal 108 is then mechanically removed in step I together with the cover metal layer 102 and the mask layer 103 (if not already done) in the sub-areas 105. This forms the conductor structure 109, which is recessed in the depressions 106.

[0108] To form an MLB, in step J a film made of an electrically insulating polymer material 110 is laminated directly onto the substrate side 101a with the conductor structure 109. In step K, its top surface 110a is covered with a cover metal layer 111, which is partially removed in steps L, M, and N – analogous to steps C, D, and E – by applying a mask layer 112 and then removing it in certain areas. The top surface 110a of the film 110, which was originally completely covered with the cover metal layer 111, is now divided into the first sub-areas 113, where it is free of the cover metal layer 111, and the second sub-areas 114, where it is still covered with the cover metal layer 111 and the mask layer 112. In step O, a plasma is applied to the top surface 110a of the film 110.While the sub-areas 114 are shielded from the plasma by the cover metal layer 111 and the mask layer 112, the plasma causes material removal in the sub-areas 113, resulting in the formation of the depressions 115. With sufficient plasma exposure, the mask layer could also be removed simultaneously. In step P, the mask layer 112 and the cover metal layer 111 are removed using an etching solution – unlike in the processing of the base substrate 101. Furthermore, one of the depressions 115 is connected by a bore 116 to a depression 106 of the first conductor structure 109, which is already filled with the filler metal 108. In step Q, the depressions 115, including the bore 116, are metallized by sputtering, followed by filling the depressions 115 by electrochemical deposition of a filler metal 118 in step R.Excess filler metal 118 is then mechanically removed in step S, along with the cover metal layer 111 and the mask layer 112, from the sub-areas 114. This forms the conductor structure 119, which is recessed in the depressions 115. In step T, a solder resist 120 is applied, followed by partial gold plating 121 of individual contacts of the conductor structure 119.

[0109] In a procedure according to Fig. 2. A base substrate 101 is provided, which is covered on its first substrate side 101a with the copper cover metal layer 102 and on its second substrate side 101b with the copper cover metal layer 107. In step A, a silicon mask layer 103 with a thickness of 100 nm is deposited onto the cover metal layer 102 by sputtering. In step B, the mask layer 103 undergoes a phase transformation from amorphous to crystalline in at least a first subregion 104 using a laser (354 nm, pulses with a duration of 100 ps and 100 nJ pulse energy). Subsequently, the mask layer is removed from the subregion 104 using an etching solution (HF / HNO3).The first substrate side 101a is then subdivided into at least one first sub-area 104, in which the first substrate side 101a is covered only by the top metal layer 102, and into at least one second sub-area 105, in which the first substrate side 101a is covered by the top metal layer 102 and by the mask layer. In step C, the top metal layer 102 in the at least one sub-area 104 is removed with an etching solution. Finally, in step D, the mask layer 103 is removed. The remaining top metal layer 102 in the second sub-area 105 forms a metallic conductor structure.

[0110] In a procedure according to Fig. 3 will be the same basic substrate 101 as in the procedure according to Fig. 2 provided. Analogous to Fig.In step A, a 100 nm thick mask layer 103 made of polycrystalline silicon with phosphorus doping is applied. In step B, this mask layer is selectively ablated by laser-induced phase transition (354 nm laser, pulses with a duration of 100 ps and a pulse energy of 100 nJ) followed by etching, so that the first substrate side 101a comprises at least one sub-region 104 in which the first substrate side 101a is covered only by the top metal layer 102. In step C, the top metal layer 102 is then removed in the at least one sub-region 104 using an etching solution. In step D, the substrate side 101a is subjected to a plasma, which causes material ablation in the at least one sub-region 104 and consequently the formation of the depressions 106. Afterwards, the cover metal layer 102 and the mask layer 103 are completely removed, whereby the mask layer can also be removed beforehand using the plasma if necessary.In step E, the wells 106 are metallized by sputtering (not shown), followed by filling the wells 106 by electrochemical deposition of a filler metal 108. In step F, the substrate side 101a is planarized. Excess filler metal 108 is mechanically removed. This forms the conductor structure 109, which is embedded in the wells 106.

Claims

[1] Method for manufacturing a printed circuit board with a metallic conductor structure (109, 119) comprising the steps a. Provision of a base substrate (101) formed as a film or plate with a first substrate side (101a) and a second substrate side, which consists at least partially of an electrically non-conductive organic polymer material and in which the first substrate side (101a) is covered with a cover metal layer (102), and b. partial removal of the top metal layer (102), where the top metal layer is removed in sections (102) c. a mask layer (103) is applied to the top metal layer (102), d. the mask layer (103) is removed in sections, so that the first substrate side (101a) is divided into at least one first sub-area (104) in which the first substrate side (101a) is covered only with the cover metal layer (102), and into at least one second sub-area (105) in which the first substrate side (101a) is covered with the cover metal layer (102) and by the mask layer (103), and e. the cover metal layer (102) in which at least one first sub-area (104) is removed, characterized by , that f. the mask layer (103) in the first sub-area (104) is removed by an etching treatment using an etching solution and prior to the etching treatment to remove the mask layer (103) in the first sub-area (104) a phase transformation or a chemical transformation is effected in the mask layer (103), wherein the mask layer (103) consists of an inorganic semiconductor or a compound of an inorganic semiconductor or of a polymer material which can assume at least a partially crystalline state and an amorphous state. [2] Method according to claim 1, wherein the phase transformation is effected by means of a laser and the laser is operated according to at least one of the following additional features: a. The laser is operated in pulsed or continuous mode. b. The laser has a wavelength in the range of 300 nm to 600 nm. c. The laser is operated at an energy that is insufficient to cause ablation of the mask layer (103). d. The laser is operated in pulsed mode with a pulse energy in the range of 0.1-100 µJ. [3] Method according to claim 1 or according to claim 2 with at least one of the following additional features: a. The mask layer (103) is formed from a mask material capable of reversible amorphization and crystallization, the resistance of the mask material to the etching solution depending on the phase state in which the mask material (103) is located. b. The mask layer (103) consists of an inorganic semiconductor from the group containing silicon, SiO2, SiN, gallium, indium and GaAs. [4] Method according to any of the preceding claims with the following additional feature: a. The mask layer (103) is transformed by the phase transformation or the chemical transformation in the first sub-area (104) into a phase state or state in which it has a lower chemical resistance to the etching solution than before the phase transformation or the chemical transformation. [5] The method of claim 1 with at least one of the following additional features: a. The chemical transformation is an oxidation. b. The chemical transformation takes place by exposing the mask layer (103) to an oxidative atmosphere. c. The chemical transformation takes place under heating of the mask layer (103). d. The chemical conversion is carried out using a laser. [6] The method of claim 5 with at least one of the following additional features: a. The mask layer (103) is formed from a semi-metallic mask material, the oxide or nitride of which is chemically less resistant to the etching solution than the semi-metallic mask material. b. The mask layer (103) consists of an inorganic semiconductor or a compound of an inorganic semiconductor, in particular from the group comprising silicon, gallium, indium and GaAs. [7] Method according to any of the preceding claims with at least one of the following additional features: a. The etching treatment using the etching solution removes in one step the mask layer (103) and the cover metal layer (102) in the first sub-area (104). b. The etching solution is an acidic or alkaline solution for etching copper. [8] The method of claim 1 with at least one of the following additional features: a. The cover metal layer (102) is made of copper. b. The etching solution is a solution for etching copper.