ERROR CORRECTION DEVICE AND METHOD FOR CORRECTING A DATA BLOCK

Abstract

According to one embodiment, a method for correcting a data block is provided, comprising representing the data block as a matrix, applying a first error correction and error detection method according to a predetermined first code to the first set of vectors, wherein the first code is a code that makes it possible to detect vectors with a number of errors exceeding a maximum number as erroneous but uncorrectable vectors, but to correct only vectors with a number of errors not equal to or greater than the maximum number of errors, and applying a second error correction and error detection method according to a predetermined second code to at least a part of the second set of vectors, wherein, if an error correction of a vector of the second set results in the first error correction and error detection method failing for a vector of the first set,which it has detected as faulty but uncorrectable, indicates that the number of errors is lower than the maximum number, the error correction of the vector of the second sentence is reversed.

Description

[0001] Examples of implementation generally relate to error correction devices and methods for correcting data blocks.

[0002] To enable the correction of errors in data, such as those that occur during data transmission, storage, or retrieval, data is typically encoded using a code. Such a code can also be used, for example, to reconstruct a value provided by a physically obfuscated key (POK). In both cases, it is necessary to correct a received, erroneous data block. Ideally, this should allow for the correction of data blocks containing a high number of errors without requiring an excessive amount of additional data (e.g., parity bits, auxiliary data, etc.). Furthermore, the risk of decoding errors (i.e., incorrectly corrected entries) should be minimized.

[0003] Publication US 2010 / 0241926 A1 describes a communication device with binary product coding and integrated selective additional cyclic redundancy checking (CRC). The product code coding (e.g., by row and column coding of matrix-formatted bits, optionally with nesting and / or permutation of the bits contained therein) can be combined with additional error correction code (ECC) or forward error correction (FEC) coding, thereby generating coded bits for use in generating a signal to be fed into a communication channel.

[0004] Publication US 2010 / 0253555 A1 discloses an encoding method comprising receiving data, generating a set of first codewords by applying a first encoding process to the received data, and applying a second encoding process to a folded version of each first codeword to provide a set of second codewords, wherein a folded version of a first codeword is representative of storing the first codeword in a two-dimensional memory space, and wherein the second codeword includes redundancy bits.

[0005] In the publication Galligan, K., Solomon A., Riaz A. et al. “IGRAND: decode any product code”, 2021, IEEE Global Communications Conference (GLOBECOM), Madrid, Spain, 2021, pages 1-6, a product code decoder is described that decodes component codes using GRAND (Guessing Random Additive Noise Decoding).

[0006] According to one embodiment, a method for correcting a data block is provided, comprising: • Representing the data block as a matrix with a first set of vectors and a second set of vectors, where the first set of vectors are the row vectors and the second set are the column vectors, or the first set of vectors are the column vectors and the second set are the row vectors of the matrix, such that each entry of the matrix is ​​contained in a vector of the first set as a component of the vector and in a vector of the second set as a component of the vector corresponding to the component of the vector of the first set; • Applying a first error correction and error detection procedure according to a predefined first code to the first set of vectors (e.g., rows), wherein the first code is a code that makes it possible to detect vectors with a number of errors exceeding a maximum number as erroneous but uncorrectable vectors (as long as the number does not exceed the maximum number too much), but to correct only vectors with a number of errors equal to or less than the maximum number of errors; and • Applying a second error correction and error detection procedure according to a predefined second code to at least a part of the second set of vectors (e.g., columns), wherein, if it is found that an error correction of a vector of the second set of vectors results in the first error correction and error detection procedure (after this column correction) indicating for a vector of the first set of vectors (e.g., row) which it has detected as an erroneous but uncorrectable vector that the error count is lower than the maximum count, the error correction of the vector of the second set of vectors is withdrawn.

[0007] According to another embodiment, an error correction device is provided which is configured to perform the above-described method for correcting a data block.

[0008] The figures do not represent the actual proportions but are intended to illustrate the principles of the various embodiments. Several embodiments are described below with reference to the following figures. Fig. Figure 1 shows a data processing device according to one embodiment. Fig. Figure 2 illustrates error correction using a product code. Fig. Figure 3 shows the correction of a data block by means of a column correction. Fig. 4 shows the column correction of Fig. 3 following line corrections. Fig. 5 shows the line correction of Fig. 4 following column corrections. Fig. 6 shows the column correction of Fig. 5 following line corrections. Fig. 7 shows the line correction of Fig. 6 following column corrections. Fig. 8 shows the column correction of Fig. 7 following line corrections. Fig. Figure 9 shows an example with a data block where the third column is incorrectly corrected during column correction. Fig. 10 shows the column correction of column 10 of the data block from Fig. 9 and the subsequent line correction of line 8. Fig. 11 shows the corrections to Fig. 10. The following column correction of column 14 and the following row correction of row 11 as well as the following column correction of column 11. Fig. Figure 12 shows an example of a "majority rating". Fig. Figure 13 shows another example of the “majority vote”. Fig. Figure 14 shows another example of the “majority vote”. Fig. Figure 15 shows a flowchart illustrating a procedure for correcting a block of data according to one embodiment.

[0009] The following detailed description refers to the accompanying figures, which show details and exemplary embodiments. These exemplary embodiments are described in sufficient detail to enable a person skilled in the art to carry out the invention. Other embodiments are also possible, and the exemplary embodiments can be modified in structural, logical, and electrical terms without deviating from the subject matter of the invention. The various exemplary embodiments are not necessarily mutually exclusive; rather, different embodiments can be combined to create new embodiments. Within the scope of this description, the terms "connected," "connected," and "coupled" are used to describe both direct and indirect connections, direct or indirect connections, and direct or indirect couplings.

[0010] Fig. Figure 1 shows a data processing device 100 according to one embodiment.

[0011] The data processing unit 100 has a data source 101 that provides a data block 102 (e.g., a sequence of data blocks). The data block 102 is first subjected to an error correction unit 103, which (ideally) corrects errors in the data block 102, i.e., produces a corrected data block 104, which is then subjected to (further) data processing 105.

[0012] The data processing device 100 can be any type of data processing device, such as a computer or a smartphone, a chip card (of any form factor) or a control device (e.g. with a microcontroller) that is used, for example, in a vehicle.

[0013] Accordingly, the data source 101 can be of a very different kind. It can be a (e.g., non-volatile) memory from which data blocks are read that may be faulty, such as flash memory; it can be a receiver through which the data processing unit 100 receives data blocks that may be affected by transmission errors; or it can also be a source of physical fingerprints such as POK (Physical Obfuscated Key) values ​​that need to be corrected for POK value reconstruction. The data block is accordingly a block of bits that represents received data, a memory content, e.g., one or more data words, or a POK value (or the value of a Physically Uncloneable Function). The data source 101 can also, for example, contain biometric data that needs to be corrected.Processing 105 can accordingly be the processing of received data, storage contents, biometric data and / or a cryptographic operation.

[0014] Error correction 103 and processing 105 can be performed by separate circuits or by the same processor. Error correction 103 is performed by an error correction device consisting of software and / or hardware, which, depending on the application, can also be considered a decoder.

[0015] Data block 102 is a potentially corrupted version A' of an original data block A. An efficient method for correcting a faulty data block A' is the use of a product code.

[0016] The data block A' is represented as a matrix: A'=(a11'a12'…a1n'a21'a22'…a2n'…………am1'am2'…amn') and it is assumed that in the original data block A=(a11a12…a1na21a22…a2n…………am1am2…amn) The rows are codewords of a first code C1 and the columns are codewords of a second code C2 (e.g., a transmitter or a memory controller has encoded original data accordingly), or, in the case that the rows and columns are not codewords, as is the case with POK values, auxiliary data for the rows and columns, specifically syndromes for all rows. HD1=[Z(A1),…,Z(Am)] and syndromes for all columns HD2=[S(a1),…,S(an)] are available.

[0017] In both cases, data block 102 can be corrected by first correcting the rows (according to C1) and then the columns (according to C2) (or vice versa), provided that data block 102 does not contain too many errors. This is referred to as error correction using a product code (from C1 and C2) or a product code (error correction) strategy. The following examples assume that the row vectors of data block 102, represented as a matrix, are always corrected first, followed by the column vectors. However, the roles of the rows and columns can also be reversed. Accordingly, the role of the respective code also changes (i.e., the roles of C1 and C2 are swapped).

[0018] Fig. Figure 2 illustrates error correction using a product code. With a faulty data block 201, designated A' above, the rows are corrected first. In this case, this results in a partially corrected data block 202, designated A'', in which all but one of the faulty rows (due to the high number of errors in it) could be corrected. This one row was even corrected so incorrectly that the number of bit errors in it (represented by dark boxes) increased. However, the subsequent column correction is successful for each column because there is at most one error in each column. The column correction therefore leads to an error-free output data block 203, designated A''', i.e., A''' = A.

[0019] In the following examples, the row code C1 and the column code C2 are linear codes. Each linear code can be assigned a triple (n, k, d), where n is the length of the code, k is the dimension of the code, and d is the minimum distance of the code.

[0020] If d is odd, d can be written as d = 2t + 1. If d is even, d can be written as d = 2t + 2. In both cases, the uniquely determined natural number t indicates the correction strength of the code, i.e., the maximum number of incorrect bits (i.e., bit errors) in a received message vector that the code can still correct (i.e., that can be corrected by a decoder operating according to the code).

[0021] If the received message vector contains more than t bit errors, two cases are possible: 1) In many cases (depending on the specific error), the error correction algorithm (i.e., the decoder) detects that bit errors are present (but too many to correct). This is indicated by an output of the type "Multi-bit error present". Hereinafter, it is assumed that the decoder indicates this by outputting the symbol "M". It is then known that the message is faulty (even if the decoder cannot correct it). 2) The second possibility is that the decoder outputs an incorrect error vector (i.e., it indicates at least one bit error for a position that is not faulty and / or no bit error for a position that is faulty). This is a decoding error. This case is more serious because the decoder appears to have corrected the bit errors, but in reality, the original error has been amplified. Without additional information from another source, the decoder is unable to avoid the decoding error. Occasional decoding errors are therefore typically unavoidable.

[0022] An example of the second case is the ninth line in the example of Fig. 2, where the row correction has worsened the error. However, it can still be corrected using the product code, since in the partially corrected data block 202 there is at most one bit error per column (assuming that the column correction code can correct one or more bit errors, i.e., the parameter t for the column code is at least 1).

[0023] In general, if the row code C1 is a linear (n1, k1, d1) code and the column code C2 is a linear (n2, k2, d2) code, correct correction can be achieved if the number α of rows marked M by the row code and the number of rows β incorrectly corrected by the row code satisfy the inequality α + 2β < d2 (assuming that the column code treats the rows marked M by the row code as erasures, i.e., error-and-erasure decoding is used).

[0024] The following describes approaches that make it possible to correct various error patterns, even though α + 2β ≥ d2.

[0025] According to one embodiment, an approach called "careful column correction" is used. It involves the following procedure: 1. The rows of the received matrix (i.e., the data in matrix form) are corrected with the row code C1. The numbers of the rows in which a multibit error was detected are stored in a set M={i1,i2,…,ir} In summary, the line entries of these lines are not deleted (as would be the case with error deletion decoding). 2. The column code C2 is then used to attempt to correct a column (e.g., the first column). If the column code detects an (uncorrectable) multi-bit error, no further action is taken, and the process continues with the next column. 3. If the decoder outputs an error vector for a column using column code C2 during correction, this vector will only be accepted if all error locations are elements of the set are. If not, then no further action is taken, and the process continues with the next column. 4. When the column correction reaches a column for which the decoder outputs an error vector containing only ones for rows that are in the set If the incorrect column entries are included, then they will be corrected. 5. Whenever a column entry is corrected, the corresponding row(s) (the row(s) containing the corrected entry(s)) is immediately subjected to a correction attempt using row code C1. (This is optional; the one or more row corrections can also be made only after several column corrections, possibly even after a complete pass through all columns. However, in product codes used in practice, row code C1 typically has a greater correction strength than column code C2, i.e., d1 > d2. In such a case, it is advantageous to perform a row correction directly after each column correction, since several bit errors are usually corrected during the row correction (directly after correcting a column bit).)

[0026] The following is an example of the procedure for "careful column correction" with reference to Fig. 3 to 8 described.

[0027] It is assumed that the row code can correct 3-bit errors and detect, but not correct, 4-bit and (at least some) 5-bit errors (d1 = 8), and the column code can correct 2-bit errors but not 3-bit errors (d2 = 5). For example, the row code is the (15, 4, 8) simplex code and the column code is the (15, 7, 5) BCH code. With the row code, all 1-, 2-, and 3-bit errors are corrected. All 4-bit errors are detected (and marked with M). Larger errors are either detected (and marked with M) or result in a decoding error. With the column code, all 1- and 2-bit errors are corrected. Larger errors are either detected (and marked with M) or result in a decoding error.

[0028] Furthermore, it is assumed that the column correction is performed from left to right.

[0029] Fig. Figure 3 shows the correction of a data block where line 2 was incorrectly corrected during line correction, and "M" was output for lines 5, 6, 7, 8, and 10. (i.e. M={5,6,7,8,10}). The correction shown is the correction of the fifth column. This is completely successful and is accepted because both errors (fifth and tenth rows in the set) are corrected. (lying). The column correction of columns 1 to 4 had no effect because, • Columns 2 and 4 contain too many errors for the column code to correct them (three each). • Columns 1 and 3 contain errors not only in rows of set M.

[0030] Fig. 4 shows the column correction of Fig. 3 following line corrections.

[0031] The line code can now correct the fifth line, but still not the tenth line (even though it has one less error). Therefore, the following now applies: M={6,7,8,10}.

[0032] Fig. 5 shows the line correction of Fig. Four column corrections follow. The first erroneous column from the left, which can be corrected by the column code and contains only errors in rows of set M, is the sixth column.

[0033] Fig. 6 shows the column correction of Fig. 5 following line corrections.

[0034] The line code can now correct the sixth line, but still not the seventh (even though it has one less error). Therefore, the following now applies: M={7,8,10}.

[0035] Fig. 7 shows the line correction of Fig. 6. The following column correction. The first erroneous column from the left, which can be corrected by the column code and contains only errors in rows of set M, is the second column.

[0036] Fig. 8 shows the column correction of Fig. 7 following line corrections.

[0037] The line code can now correct the seventh and tenth lines. Therefore, M now equals {8}.

[0038] Now the above procedure ends, because each correctable column (columns 4, 7, 12 and 13) has an error in the row marked with M by the row code, but also an error in row 2, which was not marked with M by the row code (because it was incorrectly corrected by it).

[0039] The column code now returns the error pattern {2}, {} , {2}, {2, 8}, {}, {}, {2,8}, {}, {}, {}, {2}, {2,8}, {2,8}, {2}, {} from left to right for the columns, where "{}" indicates error-free data and one or two digits indicate the respective erroneous row(s). The column code does not output a multi-error warning. Accordingly, the decoder can conclude that rows 2 and 8 are erroneous and correct this error "classically" (by deleting rows 2 and 8).

[0040] By using “careful column correction”, i.e., correction (until the last step) only when all bit errors are in rows marked with M in the column code, the risk of a decoding error during column correction is reduced.

[0041] Initially, the quantity M={i1,i2,…,ir}, This means that during the initial row correction with the row code C1, exactly r rows with a multibit error were identified. With classical error cancellation decoding (where the column correction treats the rows marked M by the row correction as cancellations), the column code can no longer correct the matrix once r ≥ d2. However, with the above approach, errors with certain bit error patterns can still be corrected, even if r > d2 (as in the example above). Fig. 3 to Fig. 8, where r = 5 > 4 = d2).

[0042] According to one embodiment, an approach called "correction return" is used. It involves the following procedure: When a column is corrected (e.g., when the "cautious column correction" is used, if all errors found during the column correction are in rows marked with M by the row correction - however, the "correction return" can also be used independently of the "cautious column correction"), a row correction is then performed for each row that has changed as a result of this column correction (as explained above in connection with step 5 of the "cautious column correction").

[0043] Now all those rows that were previously marked with M by the row correction and for which a row correction is now being performed are considered (if the "cautious column correction" is used, these are all rows for which a row correction is now being performed, because only then was the column correction performed, see step 3 of the "cautious column correction").

[0044] As explained above, t1 is the maximum number of bit errors that can be corrected with the line code C1.

[0045] If, during row correction, a multi-bit error is displayed again when attempting to correct a row (previously marked with M), this is noted without further action, and the row remains marked with M. The likely reason is that the original number of bit errors in the row decreased by one during column correction, but the row still contains too many errors, resulting in another multi-bit error message.

[0046] If the line correction reveals that there is a t1 bit error (i.e., the error vector output by the decoder contains exactly t1 ones), then the line is corrected accordingly (and is no longer marked as M).

[0047] However, if the decoder outputs an error vector with fewer than t1 ones during row correction, the row is not executed with correction. Furthermore, the column correction is reversed (and the row remains marked with M). The motivation for this approach is that if the decoder outputs an error vector with fewer than t1 ones during row correction, a decoding error occurred during column correction (the "cautious column correction" can reduce the probability of decoding errors but cannot eliminate them). This decoding error (i.e., a supposed but incorrect column correction) generates another bit error in the row under consideration: Originally, the row contained an error detected as a multibit error (i.e., an uncorrectable but detectable error, i.e., an error with more than t1 ones).Due to the decoding error during column correction, this (one-bit increased) error was no longer recognized as a multi-bit error, but instead led to a decoding error in the line code: A codeword of the line code C1 exists that is located near the (now even more erroneous) line. The line correction then corrects for this codeword, meaning the decoder outputs the "difference" between the line and the codeword as the supposed (small (with fewer than t1 ones) but incorrect) error vector. In reality, a "large" error vector with more than t1 + 1 ones is present.

[0048] The following is an example of the "correction return" procedure with reference to Fig. described in sections 9 to 11 (where the "cautious column correction" is also used in this example).

[0049] Fig. Figure 9 shows an example where the third column is incorrectly corrected during column correction.

[0050] This correction changes the 13th line. This line is originally already marked with M (because it has five errors and t1, as in the example of the Fig. 3 to Fig. (8 equals 3). When correcting the third column (which contains a 4-bit error), the column code (which has a minimum distance of 5) incorrectly corrects a 1-bit error, i.e., an additional error (diagonally hatched square) is introduced. Consequently, the 13th row contains a 6-bit error.

[0051] The line code (which has a minimum distance of 8) would now incorrectly correct the 13th line (decoding error): It would incorrectly correct two bits, resulting in two additional errors (cross-hatched squares).

[0052] This incorrect row correction is avoided by the "correction reverse" procedure: After the column correction, the row correction of the 13th row displays a two-bit error. However, this is not possible with a correct history: Since the 13th row was already marked with an "M" before the column correction of the third column, it must have had at least a four-bit error and therefore, after the column correction of the third column, should still have at least a three-bit error (which should be corrected, or, if four or more bits are still incorrect, an "M" should be displayed again). The fact that the row correction now displays a two-bit error is therefore an indication that a decoding error occurred during the column correction and a decoding error occurred during the column correction. Therefore, according to the "correction reverse" procedure, the row correction of the supposed two-bit error is not performed, and the column correction of the third column is reversed.

[0053] If the process continues in this manner (from left to right through the columns), only the column correction from column 10 will be accepted.

[0054] Fig. Figure 10 shows the column correction of column 10 and the subsequent row correction of row 8. Row 8 was previously marked with "M" and, according to the row correction, still has a 3-bit error after the column correction of column 10. This is plausible, and the row correction of row 8 is therefore accepted.

[0055] Fig. Figure 11 shows the column correction of column 14 and the subsequent row correction of row 11, as well as the subsequent column correction of column 11.

[0056] Only the 13th row remains, marked with M. The column correction produces the following errors: {2, 13}, {4, 13}, {2, 4}, {4, 13}, {2, 4}, {2}, {2}, {2, 13}, {4},{},{}, {2, 4},{4}, {}, {2, 4}, which are all rejected according to the "cautious column correction".

[0057] The union of all these 15 sets is {2, 4, 13} and because 3 < d2-1 = 4, a correction using classical error cancellation decoding is possible.

[0058] Another approach, which is used according to various embodiments, is called "majority evaluation" and is described below.

[0059] This approach is independent of the "cautious column correction" and the "correction return" and can be used in cases where these two approaches have been exhausted: By repeatedly applying the "cautious column correction" and subsequent row corrections (taking the "correction return" into account), the amount has been reduced. M={i1,i2,…,ir} (usually) greatly reduced or even becoming an empty quantity. When the quantity If the column cannot be reduced further (or is already empty), the "cautious column correction" with "correction return" is exhausted.

[0060] Then the "majority vote" can be used. This involves the following procedure: 1. In column code C2, correct all columns of the current matrix. All resulting error positions (i.e., row indices) are collected in a union V. Any multibit error messages that occur are ignored. 2. Determine the cardinality |V| of the set V, i.e., the number of elements of V. 3. If |V| < d2, i.e., if the set V contains fewer than d2 elements, then for each element i ∈ V, the i-th row of the data block is marked with M. The correction / reconstruction of the data block can now be completed using classic error deletion decoding. 4. If |V| ≥ d2, then select from V those elements that most frequently appear as erroneous during the column corrections. These elements are highly likely to index the actually erroneous rows. The elements that rarely appeared are discarded. These elements are highly likely to be the result of a decoding error during the column correction. If the resulting reduced set V' contains fewer than d2 elements, then the correction of the data block is completed using classic error deletion decoding.

[0061] Fig. Figure 12 shows an example of the “majority evaluation” with |V| < d2.

[0062] It is assumed that the column correction marks columns 2 and 14 with M. The set V here is {3, 4, 6} and therefore |V| = 3 < 5 = d². Thus, the data block can be corrected (according to step 3 of the "majority evaluation") using classic error deletion decoding (by treating rows 3, 4, and 6 as deletions). It can also be assumed that in the two columns where no column correction is possible (columns 2 and 14), there are three errors in rows 3, 4, and 6 (since errors otherwise only occur in these rows).

[0063] Fig. Figure 13 shows an example of the “majority evaluation” with |V| > d2.

[0064] It is now assumed that the column correction does not mark columns 2 and 14 with M but corrects them incorrectly (leading to additional bit errors, which are represented as hatched squares).

[0065] The set V is therefore {1, 3, 4, 5, 12} and thus |V| = 5 ≥ 5 = d2.

[0066] According to step 4 of the "majority vote," the frequencies with which rows are detected as containing errors during column correction are considered: Targets 3, 4, and 5 occur six times, while rows 1 and 12 each occur only twice. Based on the "majority vote," rows 3, 4, and 5 are accepted as containing errors, and rows 1 and 12 are ignored (in fact, rows 1 and 12 are displaying 2-bit errors that are incorrectly displayed due to 3-bit errors in columns 2 and 14). An error cancellation decoding is then performed, treating rows 3, 4, and 5 as cancellations.

[0067] Fig. Figure 14 shows another example of the “majority evaluation” with |V| > d2.

[0068] It is assumed that the column correction incorrectly corrects columns 1 and 5 (resulting in additional bit errors, represented as hatched squares), but marks columns 3 and 10 (which also have three bit errors) with M.

[0069] The column correction now displays ten erroneous rows: V = {1, 2, 4, 5, 6, 9, 11, 12, 13, 15}

[0070] Rows 2, 5, 9, and 13 each occur four times, while rows 1, 4, 6, 11, 12, and 15 each occur only once. According to step 4 of the "majority evaluation," only the values ​​2, 4, 9, and 13 are accepted. This leaves 4 < d2 rows. Therefore, error cancellation decoding can be performed, treating rows 2, 4, 9, and 13 as cancellations.

[0071] In summary, a method is provided according to various embodiments, as described in Fig. 15 is illustrated.

[0072] Fig. Figure 15 shows a flowchart 1500 illustrating a method for correcting a block of data according to one embodiment.

[0073] In 1501, a first error correction and error detection procedure is applied to the first set of vectors (e.g., rows) according to a predetermined first code, where the first code is a code that makes it possible to detect vectors with a number of errors that exceeds a maximum number as erroneous but uncorrectable vectors (as long as the number does not exceed the maximum number too much), but only to correct vectors with a number of errors that is at most equal to the maximum number of errors.

[0074] In 1502, a second error correction and error detection procedure is applied according to a predefined second code to at least a part of the second set of vectors (e.g., columns), whereby if it is found that an error correction of a vector of the second set of vectors causes the first error correction and error detection procedure (after this column correction) to indicate for a vector of the first set of vectors (e.g., row) which it has detected as an erroneous but uncorrectable vector that the error count is lower than the maximum count, the error correction of the vector of the second set of vectors is withdrawn.

[0075] In other words, according to various embodiments, a “correction reversal” is carried out in the sense that if a column correction reduces the number of errors in a row by more than one (which, if it is correct, cannot be the case), this column correction is reversed.

[0076] According to one embodiment, an error correction device is provided which is configured to detect the error with regard to Fig. 15 described procedures to be carried out. This error correction device implements, for example, error correction 103. Accordingly, block 103 can be used in Fig. 1 can also be regarded as an error correction device of the data processing device.

[0077] The components of the data processing device 100, in particular the error correction device 103, can be implemented by one or more circuits. In one embodiment, a "circuit" is understood to be any unit that implements logic and that can be hardware, software, firmware, or a combination thereof. Thus, in one embodiment, a "circuit" can be a hard-wired logic circuit or a programmable logic circuit, such as a programmable processor, e.g., a microprocessor (e.g., a CISC (Complex Instruction Set Computer) processor or a RISC (Reduced Instruction Set Computer) processor). A "circuit" can also be understood to be a processor that executes software, e.g., any type of computer program, such as a computer program in programming code for a virtual machine, such as a Java computer program.In one embodiment, the term "circuit" can refer to any type of implementation of the functions described herein.

[0078] That with reference to Fig. The method described in section 15 is applied according to various embodiments to relatively large data blocks (e.g., more than 32 bits) that contain data with high error rates (error-prone data transmission, POK values, biometric data, etc.).

[0079] The following are various examples of implementation.

[0080] Exemplary embodiment 1 is a method for correcting a data block, as described with reference to Fig. 15 described.

[0081] Exemplary embodiment 2 is the method according to exemplary embodiment 1, wherein after each error correction of a vector of the second set of vectors with the second error correction and error detection method, the first error correction and error detection method is applied to the vector(s) of the first set of vectors with the first error correction and error detection method that was changed by the error correction of the vector of the second set of vectors.

[0082] Embodiment 3 is the method according to embodiment 1 or 2, wherein, if it is found that the error correction of the vector of the second set of vectors does not result in the first error correction and error detection method indicating, for a vector of the first set of vectors which it has detected as an erroneous but uncorrectable vector, that the number of errors is lower than the maximum number, the error correction of the vector of the second set of vectors is not reversed and each vector of the first set of vectors which the first error correction and error detection method has detected as an erroneous but uncorrectable vector, and for which it indicates, after the error correction of the vector of the second set of vectors, that the number of errors is equal to the maximum number, is corrected.

[0083] Embodiment 4 is the method according to one of embodiments 1 to 3, wherein the data block is a data block that was created after reading and transferring an original data block, whereby errors may have occurred during reading and transferring.

[0084] Exemplary embodiment 5 is the method according to one of the exemplary embodiments 1 to 4, wherein the data block contains physical measurement data or measurement data from a circuit made of semiconductor technology or photonic technology or biometric data, and the first error correction and error detection method and the second error correction and error detection method use auxiliary data containing syndromes of an original data block to correct the error of the data block.

[0085] Exemplary embodiment 6 is an error correction device, configured to: • Receiving a data block to be corrected; • Representing the data block as a matrix with a first set of vectors and a second set of vectors, where the first set of vectors are the row vectors and the second set are the column vectors, or the first set of vectors are the column vectors and the second set are the row vectors of the matrix, such that each entry of the matrix is ​​contained in a vector of the first set as a component of the vector and in a vector of the second set as a component of the vector corresponding to the component of the vector of the first set; and • Applying a first error correction and error detection procedure according to a predetermined first code to the first set of vectors, wherein the first code is a code that makes it possible to detect vectors with a number of errors exceeding a maximum number as erroneous but uncorrectable vectors, but to correct only vectors with a number of errors equal to or less than the maximum number of errors; • Applying a second error correction and error detection procedure according to a predetermined second code to at least a part of the second set of vectors, wherein, if it is found that an error correction of a vector of the second set of vectors causes the first error correction and error detection procedure for a vector of the first set of vectors, which it has detected as an erroneous but uncorrectable vector, to indicate that the error count is lower than the maximum count, the error correction of the vector of the second set of vectors is withdrawn.

[0086] Further embodiments 7 to 13 are given below, which may be provided alternatively or in combination with the above embodiments 1 to 6 (i.e., in particular, an electronic data processing device or a method may be provided which has the features of one of the embodiments 1 to 6 and the features of one of the embodiments 7 to 13).

[0087] Exemplary embodiment 7 is a method for correcting a data block, comprising: • Representing the data block as a matrix with a first set of vectors and a second set of vectors, where the first set of vectors are the row vectors and the second set are the column vectors, or the first set of vectors are the column vectors and the second set are the row vectors of the matrix, such that each entry of the matrix is ​​contained in a vector of the first set as a component of the vector and in a vector of the second set as a component of the vector; and • Correcting the data block in one or more iterations, with each iteration having • Applying a first error correction and error detection procedure according to a predetermined first code to the first set of vectors, wherein entries of vectors of the first set of vectors of the matrix that can be corrected by the error correction according to the first code are corrected, and vectors of the first set of vectors that are detected to contain errors but that cannot be corrected by the error correction according to the first code are marked; and ◯ Applying a second error correction and error detection procedure according to a predetermined second code to at least a part of the second set of vectors, wherein, during error correction with the second error correction and error detection procedure, the correction of vectors of the second set of vectors that contain one or more errors that could be corrected according to the second code, but which concern entries that do not belong to vectors of the first set of vectors that have been marked, is skipped during error correction according to the second code.

[0088] Exemplary embodiment 8 is the method according to exemplary embodiment 7, wherein after each error correction of a vector of the second set of vectors with the second error correction and error detection method, the first error correction and error detection method is applied to the vector(s) of the first set of vectors with the first error correction and error detection method that was changed by the error correction of the vector of the second set of vectors.

[0089] Exemplary embodiment 9 is the method according to exemplary embodiment 7 or 8, wherein the correction strength of the first error correction and error detection method is higher than that of the second error correction and error detection method.

[0090] Exemplary embodiment 10 is the method according to one of the exemplary embodiments 7 to 9, wherein, if no more errors can be corrected by the iterations, error cancellation decoding is applied to terminate the error correction of the data block.

[0091] Embodiment 11 is the method according to one of embodiments 7 to 10, wherein the data block is a data block that was created after reading and transmitting an original data block, whereby errors may have occurred during reading and transmission.

[0092] Exemplary embodiment 12 is the method according to one of the exemplary embodiments 7 to 11, wherein the data block contains physical measurement data or measurement data from a circuit made of semiconductor technology or photonic technology or biometric data, and the first error correction and error detection method and the second error correction and error detection method use auxiliary data containing syndromes of an original data block to correct the error of the data block.

[0093] Exemplary embodiment 13 is an error correction device, configured to: receive a data block to be corrected; • Representing the data block as a matrix with a first set of vectors and a second set of vectors, where the first set of vectors are the row vectors and the second set are the column vectors, or the first set of vectors are the column vectors and the second set are the row vectors of the matrix, such that each entry of the matrix is ​​contained in a vector of the first set as a component of the vector and in a vector of the second set as a component of the vector corresponding to the component of the vector of the first set; and • Correcting the data block in one or more iterations, with each iteration having • Applying a first error correction and error detection procedure according to a predetermined first code to the first set of vectors, wherein entries of vectors of the first set of vectors of the matrix that can be corrected by the error correction according to the first code are corrected, and vectors of the first set of vectors that are detected to contain errors but that cannot be corrected by the error correction according to the first code are marked; and ◯ Applying a second error correction and error detection procedure according to a predetermined second code to at least a part of the second set of vectors, wherein, in the error correction, the correction of vectors of the second set of vectors that contain one or more errors that could be corrected according to the second code, but which concern entries that do not belong to vectors of the first set of vectors that have been marked, is skipped.

[0094] According to various embodiments, an error correction device is provided, comprising: • Representation means for representing the data block as a matrix with a first set of vectors and a second set of vectors, wherein the first set of vectors are the row vectors and the second set are the column vectors, or the first set of vectors are the column vectors and the second set are the row vectors of the matrix, such that each entry of the matrix is ​​contained in a vector of the first set as a component of the vector and in a vector of the second set as a component of the vector corresponding to the component of the vector of the first set; • First correction means for applying a first error correction and error detection procedure according to a given first code to the first set of vectors (e.g., rows), wherein the first code is a code that makes it possible to detect vectors with a number of errors exceeding a maximum number as erroneous but uncorrectable vectors (as long as the number does not exceed the maximum number too much), but to correct only vectors with a number of errors equal to or less than the maximum number of errors. • A second correction means for applying a second error correction and error detection procedure according to a predefined second code to at least a part of the second set of vectors (e.g., columns), wherein, if it is found that an error correction of a vector of the second set of vectors results in the first error correction and error detection procedure (after this column correction) indicating for a vector of the first set of vectors (e.g., row), which it has detected as an erroneous but uncorrectable vector, that the error count is lower than the maximum count, the error correction of the vector of the second set of vectors is withdrawn.

[0095] Although the invention has been shown and described primarily with reference to specific embodiments, those familiar with the field should understand that numerous modifications regarding its design and details can be made without departing from the essence and scope of the invention as defined by the following claims. The scope of the invention is therefore determined by the appended claims, and it is intended that all modifications falling within the literal or equivalent scope of the claims are included. Reference symbol list 100 data processing equipment 101 Data source 102 Data block 103 Error correction / error correction device 104 corrected data block 105 Processing / Data processing component 201 Faulty data block 202 Partially corrected data block 203 Corrected data block 1500 Flowchart 1501-1503 Error Correction Processing

Claims

[1] A method for correcting a data block, comprising: Representing the data block as a matrix with a first set of vectors and a second set of vectors, the first set of vectors being the row vectors and the second set being the column vectors, or the first set of vectors being the column vectors and the second set being the row vectors of the matrix, such that each entry of the matrix is ​​contained in a vector of the first set as a component of the vector and in a vector of the second set as a component of the vector; and Applying a first error correction and error detection method according to a predetermined first code to the first set of vectors, the first code being a code that allows vectors with a number of errors greater than a maximum number to be detected as erroneous but uncorrectable vectors, but only vectors with a number of errors that is at most equal to the maximum number of errors to be corrected; Applying a second error correction and error detection method according to a predetermined second code to at least a portion of the second set of vectors, wherein, if it is determined that an error correction of a vector of the second set of vectors results in the first error correction and error detection method indicating, for a vector of the first set of vectors that it has detected as an erroneous but uncorrectable vector, that the number of errors is lower than the maximum number, the error correction of the vector of the second set of vectors is withdrawn. [2] The method of claim 1, wherein after each error correction of a vector of the second set of vectors with the second error correction and error detection method, the first error correction and error detection method is applied to the vector(s) of the first set of vectors with the first error correction and error detection method that was or were changed by the error correction of the vector of the second set of vectors. [3] The method of claim 1 or 2, wherein, if it is determined that the error correction of the vector of the second set of vectors does not result in the first error correction and detection method indicating, for a vector of the first set of vectors which it has detected as an erroneous but uncorrectable vector, that the number of errors is lower than the maximum number, the error correction of the vector of the second set of vectors is not canceled and each vector of the first set of vectors which the first error correction and detection method has detected as an erroneous but uncorrectable vector and for which it indicates, after the error correction of the vector of the second set of vectors, that the number of errors is equal to the maximum number, is corrected. [4] Method according to one of claims 1 to 3, wherein the data block is a data block which was created after reading and transmitting an original data block, wherein errors may have occurred during reading and transmitting. [5] Method according to one of claims 1 to 4, wherein the data block contains physical measurement data or measurement data from a circuit made of semiconductor technology or photonic technology or biometric data and the first error correction and error detection method and the second error correction and error detection method use auxiliary data containing syndromes of an original data block for error correction of the data block. [6] Error correction device, designed to: Receiving a data block to be corrected; Representing the data block as a matrix with a first set of vectors and a second set of vectors, wherein the first set of vectors are the row vectors and the second set are the column vectors or the first set of vectors are the column vectors and the second set are the row vectors of the matrix, such that each entry of the matrix is ​​contained in a vector of the first set as a component of the vector and in a vector of the second set as a component of the vector corresponding to the component of the vector of the first set; and Applying a first error correction and error detection method according to a predetermined first code to the first set of vectors, the first code being a code that allows vectors with a number of errors greater than a maximum number to be detected as erroneous but uncorrectable vectors, but only vectors with a number of errors that is at most equal to the maximum number of errors to be corrected; Applying a second error correction and error detection method according to a predetermined second code to at least a part of the second set of vectors, wherein, if it is determined that an error correction of a vector of the second set of vectors results in the first error correction and error detection method indicating for a vector of the first set of vectors that it has detected as an erroneous but uncorrectable vector that the number of errors is lower than the maximum number, the error correction of the vector of the second set of vectors is canceled.

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