Method for mapping a logic quantum circuit onto a qubit array comprising a number of physical qubits, system and method for operating a quantum computer

Abstract

The invention relates to a method for mapping a logic quantum circuit onto a qubit arrangement comprising a number of physical qubits, which in particular comprises a step of determining (107) an executable quantum circuit (1002), comprising the following steps: • Check (1071) whether the logical qubits involved in the quantum operation of the section are mapped to physical qubits that are set up to interact with each other: ▪ If no (1073), the following steps are performed: 1) Defining (1075, 1076) a stationary qubit from the logic qubits involved in the quantum operation of the section and a sink qubit, 2) Applying (1077) a SWAP operation to the sink qubit, 3) Transferring (1074) the SWAP operation into the executable quantum circuit (1002); 4) Adapting the mapping of the logical qubits to the physical ones; - Providing the initial mapping of the logical qubits to the physical qubits of the qubit array and executable quantum circuit (1002).

Description

State of the art

[0001] In “On the Qubit Routing Problem,” (Cowtan et al., arXiv:1902.08091v2, 2019) the mapping problem of logical qubits to a physical qubit platform with restricted connectivity is described.

[0002] In “Tackling the Qubit Mapping Problem for NISQ-Era Quantum Devices” (Li et al.; ASPLOS'19, April 13-17, 2019, Providence, RI, USA), an approach to solving a qubit mapping problem is described, which includes a heuristic search. Core and advantages of the invention

[0003] When mapping a logical quantum circuit to a real physical quantum computer platform (hereinafter referred to as quantum computer), each logical qubit (quantum bit) of the quantum circuit is assigned a physical qubit of the real platform.

[0004] Currently, for example, noisy intermediate-scale quantum computers (NISQ) without error correction and with a moderate number of qubits (approximately 100) are available. A NISQ computer usually comprises a small number of qubits, for example, less than or equal to 1000 qubits, in particular 50 up to a few hundred qubits. Many currently available quantum computers, especially NISQ computers, have only limited connectivity of the physical qubits, i.e., not every physical qubit can interact with every other physical qubit. In other words, quantum operations, especially 2-qubit gates, can only be performed between specific physical qubits. To ensure the correct execution of the logical quantum circuit, it is therefore important to note that as soon as two logical qubits are expected to interact with each other, i.e., to be part of a common quantum operation (e.g.,a 2-qubit gate), these are also located on physical qubits that can interact. If, during the execution of a quantum circuit, after an initial mapping of the logical qubits, it turns out that an interaction should take place between two logical qubits that are not currently located on physical qubits that can interact, the states of physical qubits can be swapped using one or more SWAP operations until an interaction between the logical qubits is also possible on the physical platform.

[0005] Ultimately, the goal is to find a valid mapping of the logical quantum circuit to the physical platform (qubit array), possibly by augmenting the original circuit (logical circuit) with SWAP operations. Here, it is advantageous to keep the number of SWAP operations as low as possible, both to avoid slowing down the execution of the circuit and to minimize the probability of errors on noisy quantum computers.

[0006] In general, the goal of mapping the quantum logic circuit can be to add as few (or no) additional gate operations as possible. This can be achieved by using few or no SWAP operations, or by considering the orientation of the physically executable gate operations as much as possible, for example, on asymmetric platforms.

[0007] The invention comprises an improved solution to the problem of mapping quantum logic circuits to quantum computers with limited connectivity, in particular NISQ computers. In particular, the invention enables quantum logic circuits to be executed on quantum computers with limited connectivity.

[0008] The invention relates to a method for mapping a logical quantum circuit onto a qubit arrangement comprising a number of physical qubits, a system comprising a classical computer and a quantum computer, a computer program product, and a method for operating a quantum computer.

[0009] Algorithms and applications that utilize quantum mechanical resources can be easily and efficiently written in the language of quantum logic circuits. A quantum circuit is a computational routine constructed from coherent quantum operations. Each horizontal line or wire in a quantum circuit represents a qubit, with the left end of the wire representing the original quantum data and the right end representing the final quantum data generated by the quantum circuit's computation. Operations on qubits are represented by boxes placed on these wires. Quantum gates are the elementary operations that a quantum computer can perform on its qubits. They are comparable to electronic gates, which perform the elementary operations of a classical computer. However, a quantum gate operates on quantum mechanical systems such as spin.Quantum operations are mathematically realized by matrix multiplication with unitary matrices. Unitary matrices are always invertible, and thus the input values ​​of a circuit can be reconstructed from the output values. For quantum gates that operate on two qubits (2-qubit gates), an interaction between the physical qubits in question is required. For spin qubits, this can occur, among other things, through exchange interactions. Atoms in an ion trap, for example, can exchange photons. For qubits based on superconducting circuits, these qubits can be manipulated using, for example, the applied voltage, the magnetic field, or coupling to microwave resonators.

[0010] Quantum computers programmed using quantum circuits can, in principle, be constructed from any quantum technology capable of single- and multi-qubit gate operations. Architectures based on, for example, superconducting circuits, ion traps, semiconductor quantum dots, photons, and neutral atoms are currently being actively developed. A quantum computer comprises a qubit array, wherein the qubit array comprises multiple physical qubits, which can preferably be provided with devices or units adapted to the technology used to initialize (e.g., initializing the qubit in a basis state), manipulate (e.g., applying 1-qubit and / or 2-qubit gates), and / or read the physical qubits.

[0011] An advantage of the invention with the features of the independent patent claims is that the method for mapping a logical quantum circuit onto a qubit array is designed such that the method steps for calculating exact mapping solutions can utilize an answer set solver from the domain of answer set programming. This allows for improved scalability with increasing problem instances to be solved. By adapting the method to utilize answer set solvers, it is advantageously exploited that answer set programming, in contrast to pseudo-Boolean decidability, scales better for platforms that have high / dense connectivity in the connectivity graph (densely connected architectures). Common quantum computers, such asGoogle's Sycamore quantum computers exhibit dense connectivity due to their grid-based topology and can therefore benefit from the use of answer set programming. This method makes it possible to execute quantum logic circuits on quantum computers with limited connectivity, which would otherwise be impossible to execute on these quantum computers due to the limited connectivity. The method thus enables the utilization of hardware that was previously unusable.

[0012] This is achieved with a method according to claim 1 for mapping a logical quantum circuit onto a qubit array comprising a number of physical qubits. The method can be used in particular for solving problems in the field of materials development (Variational Hamiltonian Algorithm (VHA)) or binary optimization problems, for example, using the Quantum Approximate Optimization Algorithm (QAOA). The method can particularly benefit tasks involving logical quantum circuits in which there are many interactions between (almost all) qubits (e.g., each qubit with every other qubit and the hardware platform is still limited in connectivity). The method according to claim 1 comprises the following steps: - Providing a hardware-specific connectivity graph of the physical qubits, wherein the connectivity graph comprises, in particular, information about the number of physical qubits and their connectivity, in other words, which physical qubits can interact with which other physical qubits, and providing the logical quantum circuit. The provision of the hardware-specific connectivity graph of the physical qubits and the logical quantum circuit can be carried out, in particular, by input, by data transmission or wireless or wired data transmission, or by retrieval, for example, from a database, a storage device (cloud) internal and / or external to the device executing the method (e.g., a classical computer).By providing the hardware-specific connectivity graph of the physical qubits and the logical quantum circuit, the information required for the method regarding the physical qubits, their connectivity, and the quantum operations to be applied is made available. In particular, the physical qubits are represented as nodes in the hardware-specific connectivity graph, and nodes of physical qubits that are configured to interact with each other are connected in the hardware-specific connectivity graph, particularly by edges. - Dividing the logical quantum circuit into sections, where each section comprises a quantum operation, in particular one or more quantum operations. In particular, the sections are chosen so that each logical qubit participates in a maximum of one 2-qubit gate or a maximum of one multi-qubit gate. Single-qubit gates preferably play no role in the selection of sections, as they can be executed independently of the connectivity of the physical qubit to which the logical qubit is mapped in the respective section and can later be easily incorporated into the respective sections. - Initial mapping of the logical qubits of the logical quantum circuit to the physical qubits of the qubit array. In particular, the logical qubits can be assigned to the physical qubits in such a way that the quantum operation of the first section, i.e., the section containing the first quantum operation, in particular the 2-qubit gate (2-qubit interaction) encompassed by it, can be executed without swapping (i.e., applying additional SWAP operations not contained in the logical quantum circuit). In particular, they are placed as nearest neighbors in the connectivity graph.If there are multiple possibilities, the method according to claim 1 can be carried out for all of these possibilities, and an executable quantum circuit can be determined for each possibility, wherein preferably the executable quantum circuit with the fewest number of SWAP operations can be selected for execution on the quantum computer, comprising the qubit arrangement underlying the method. The first section is preferably selected such that each logical qubit of the logical quantum circuit is involved in one or no multi- or 2-gate operations. First, however, a mapping is selected, whereby the following criteria are taken into account when assigning the logical and physical qubits: • each logical qubit is assigned exactly one physical qubit and • Each physical qubit is assigned a maximum of one logical qubit; ie, in particular, a physical qubit may not be assigned two or more logical qubits. This last criterion includes, in particular, the case where the qubit arrangement comprises more physical qubits than logical qubits. In this case, not every physical qubit is assigned a logical qubit during the initial mapping, but in the further process, physical qubits to which no logical qubit was previously assigned can become part of a SWAP operation. In this case, it should be specified that the physical

[0013] Qubits that were not initially assigned a logical qubit also have a valid quantum mechanical state (e.g., initialized as |0>) before the execution of the final (executable) quantum circuit on the real platform (quantum computer). It is important that a record be kept of these physical qubits that are not assigned a logical qubit during the initial mapping, as they can also continue to be part of downstream / further SWAP operations. - Determining an executable quantum circuit. The executable quantum circuit takes into account, in particular by introducing SWAP operations (SWAP gates), that the hardware (quantum computer), comprising the qubit arrangement, may have limited connectivity between the physical qubits, which can be represented by the hardware-specific connectivity graph. In other words, not all qubits can interact with each other, which is to be taken into account when transferring the logical quantum circuit to the quantum circuit to be executed on the hardware using the present method. In particular, the operations for the individual physical qubits are represented in the executable quantum circuit (in particular, each horizontal line corresponds to a physical qubit, wherein in the logical quantum circuit, each horizontal line is preferably assigned to a logical qubit).A SWAP operation is designed to swap the states of the two qubits involved in the operation. This allows a logical qubit to be swapped between physical qubits and thus transported to a physical qubit that can interact with the other physical qubit involved in the quantum operation of the section. This makes the quantum circuit executable on the real platform. Determining the executable quantum circuit comprises the following steps 1) to 6), which are performed for each section of the logical quantum circuit, starting with the first section: ▪ Checking whether the logical qubits involved in the quantum operation of the section are mapped to physical qubits that are configured to interact with each other. In other words, this step involves checking whether the quantum operation is executable. If so, the quantum operation of the section is incorporated into the executable quantum circuit without modification. In particular, if an optimization criterion exists, it may be that one or more SWAP operations are nevertheless inserted, resulting in an adjustment of the mapping, especially if this allows for the elimination of SWAP operations in one of the subsequent sections. The mapping then forms the basis for the next check 1071. • If no, the following steps are carried out: 1) Specify a stationary qubit from among the logical qubits participating in the quantum operation of the section. In particular, the quantum state remains with the physical qubit associated with the logical qubit selected as the stationary qubit. In other words, the stationary qubit is characterized by not participating in any swap operation in this section. 2) Defining a sink qubit. This step can also be performed implicitly, analogous to step 1). This means: if one qubit in a 2-qubit gate is selected as stationary, the other is automatically the sink qubit; if one qubit in a 2-qubit gate is selected as sink, the other is automatically the stationary qubit. In particular, the sink qubit is the logical qubit involved in the quantum operation to be performed, which qubit is to be transported, in particular by applying at least one SWAP operation, to a physical qubit that is configured to interact with the physical qubit of the stationary qubit (i.e., to a physical qubit that is connected to the physical qubit of the stationary qubit by an edge in the connectivity graph). This qubit is the first sink.The start of the sequence of SWAP operations (SWAPing) begins from the sink, with the number of SWAP operations chosen such that this qubit is brought to a physical qubit that is configured to interact with the stationary qubit. 3) Applying a SWAP operation to the sink qubit, whereby the logical qubit of the sink qubit is transferred to a physical qubit involved in the SWAP operation, which then becomes the sink qubit; 4) Incorporating the SWAP operation into the executable quantum circuit; 5) If the stationary qubit and the sink qubit are not configured to interact with each other after applying the SWAP operation, steps 1) to 4), preferably steps 3) and 4), are repeated until the sink qubit is mapped to a physical qubit that is configured to interact with the stationary qubit. In particular, it is important to use an updated mapping between logical qubits and physical qubits for the verification step after the SWAP operations have been completed. This is because the logical quantum circuit only reveals on which logical qubits the quantum operation encompassed by the subsequent section of the logical quantum circuit is to be performed.The updated mapping, extended by the SWAP operations performed in the previous section, provides information about whether the logical qubits involved in the upcoming quantum operation are assigned to physical qubits that can interact with each other. This means that during the verification, the updated mapping is used to check whether further SWAP operations are necessary or whether the section can be incorporated into the executable quantum circuit without additional SWAP operations, and the verification of the subsequent section can continue. However, a valid solution only exists if the nearest neighbor of the stationary qubit is actually reached. This can be ensured by excluding solutions whose SWAPs do not reach the stationary qubit (in the modeling language of answer set programming, this is called an "integrity constraint"). 6) Adjusting the mapping of logical qubits to physical qubits; In other words, after calculating the swap route, the mapping is managed, taking into account any changes in the mapping of logical qubits and physical qubits at the section's output compared to its input due to swap operations. For example, this management could look like this: • The stationary qubit retains its assignment of the logical qubit • The SWAPing logical qubit (sink qubit) is mapped to a physical nearest neighbor of the stationary qubit according to the SWAP operations • Physical qubits not affected by SWAPs will “retain” their assigned logical qubits • For the qubits that are influenced by SWAP operations: Here, it is important to distinguish roughly two cases: a) a physical qubit to which a logical qubit is assigned is part of a SWAP operation b) a physical qubit is initially not assigned to a logical qubit, but is now part of a SWAP operation • Case (a): according to the calculated SWAP operations, the mapping of the involved logical qubits to the physical qubits is swapped and thus the mapping is adjusted. • Case (b): This is not an obstacle, but it should be ensured that the physical qubits that do not have a logical qubit assigned also have a valid quantum mechanical state (e.g., initialized as |0>) before the final circuit (executable circuit) is executed on the real platform. It is important that a record is kept of these qubits, as they can also be part of downstream / further SWAP operations. - Providing the initial mapping of the logical qubits of the logical quantum circuit to the physical qubits of the qubit array and the executable quantum circuit. In other words, an initial mapping of the logical qubits to the physical qubits is provided, as well as a circuit for the physical qubits supplemented by the added SWAP operations. In particular, the mapping is carried out by storing it on an internal data storage device and / or external data storage device (e.g., cloud), by data transmission, or wireless or wired data transmission, etc.

[0014] In particular, the connectivity graph can also contain information about an asymmetry of the quantum computing platform, i.e., the quantum computer. If necessary, an adjustment of the "final" mapping (result of the above procedure) may be useful to take the asymmetry into account. To do this, all quantum gates affected by the asymmetry are corrected, and if necessary, the quantum circuit is adjusted again based on the corrected quantum gates.

[0015] For example, IBM has quantum computers that exhibit asymmetry in CNOT operations: OP-CNOT(PQ1, PQ2), where PQ1 represents a first physical qubit of the quantum computer and PQ2 represents a second physical qubit of the quantum computer. In the CNOT operation, only PQ1 can be the source qubit and PQ2 the target qubit. This means that CNOT(PQ1,PQ2) is executable, but CNOT(PQ2,PQ1) is not. This means that CNOT(PQ2,PQ1) cannot be executed on this particular asymmetric quantum computing platform.

[0016] For the operation CNOT(LQ1,LQ2), where LQ1 represents a first logical qubit of the quantum computer and LQ2 represents a second logical qubit of the quantum computer, no further quantum operations need to be added when mapping LQ1 to PQ1 and when mapping LQ2 to PQ2.

[0017] When mapping LQ1 to PQ2 and LQ2 to PQ1, 4 additional Hadamard (H) gates must be added, since: CNOT(PQ2,PQ1) = H(PQ1) H(PQ2) CNOT(PQ1,PQ2) H(PQ1) H(PQ2).

[0018] Since a SWAP gate can be realized by three CNOT gates (CNOT(PQ1,PQ2) CNOT(PQ2,PQ1) CNOT(PQ1,PQ2)), all SWAP operations are corrected in a "final" mapping from the above procedure when dealing with an asymmetric quantum computing platform. In the case of an asymmetric quantum computing platform, the following steps can be added to the procedure: • Replacing each SWAP operation in the executable quantum circuit by the three aforementioned CNOT gates, i.e. CNOT(PQ1,PQ2), CNOT(PQ2,PQ1) and CNOT(PQ1,PQ2). • Check whether correction of the CNOTs is necessary. This can be done using information about the asymmetry from the hardware-specific connectivity graph, and correct the executable quantum circuit if necessary based on the information about the asymmetry from the hardware-specific connectivity graph. Ideally, only 4 Hadamard gates need to be added; otherwise, a total of 8 H (two of the CNOTs need to be corrected). • Providing the tested and, if necessary, corrected executable quantum circuit.

[0019] In principle, the goal is to minimize the number of gate operations required to run the logic circuit on the hardware platform. For symmetric platforms, the goal is to add as few SWAP operations as possible (and each added SWAP represents 3 additional CNOTs).

[0020] With asymmetric platforms, you want • Correct as little CNOT of the executable quantum circuit as possible after the mapping (i.e. insert 4 additional Hadamard operations) • Correct as few CNOT in the added SWAP operations as possible (each added SWAP requires at least an additional 4 H (in contrast to the symmetric platform), but in the worst case 8 Hadamard operations).

[0021] Therefore, in asymmetric platforms, the cost function changes from “I only count SWAPs” to “I look at how many CNOT I need to adjust as native operations in the logic circuit after the mapping and in the added CNOT of the added SWAPS” (i.e., additional Hadamard (H) operations).

[0022] In the following example, a mapping S from the set of all solutions for the symmetric quantum computing platform (with the same connectivity as the asymmetric case) is considered: The mapping S is adjusted to account for the asymmetry of the quantum computing platform (see above for the case of asymmetric CNOTs): Map S is augmented with gates (=solution A). Solution A is then evaluated based on the total number of added gates. From the set {A} of all corrected / adjusted mappings {S}, the optimal mapping A* is then selected.

[0023] It is often impractical or even impossible to examine and correct all correct but suboptimal mappings S. This means that in practice, even for asymmetric problems, the mapping problem is preferably formulated for the answer set solver in such a way that the answer set solver knows what a correct mapping is and is given the optimality criterion that the number of added gate operations should be minimal. The answer set solver then computes the optimal solution without enumerating all valid solutions.

[0024] According to one embodiment, the method comprises executing a response set solver, wherein • providing the hardware-specific connectivity graph of the physical qubits and the logical quantum circuit comprises providing the hardware-specific connectivity graph and the logical quantum circuit in a modeling language of an answer set solver, • the response set solver is provided with a coding of the description of the set of valid mappings in the modeling language of the response set solver, • the criterion according to which the logical qubits involved in the quantum operation of the section are mapped to physical qubits that are designed to interact with each other is provided as a reachability criterion in the modeling language of the answer set solver, • where the response set solver determines the mapping of the logical qubits of the logical quantum circuit to the physical qubits of the qubit array and the executable quantum circuit.

[0025] In particular, the input data, i.e., the quantum logic circuit and the connectivity graph of the quantum computing platform, are prepared in a manner suitable for the modeling language of an answer set solver and then passed to the answer set solver (e.g., the software clingo [5]) along with the encoding (in the modeling language) of a valid mapping solution. One advantage of using answer set programming is that properties such as reachability can be described directly in the modeling language. The formulation of reachability is used to compute the sequence of SWAP operations to bring two qubits together locally so that an interaction is possible.One advantage is that answer set programming, especially in contrast to pseudo-Boolean decidability, scales better for platforms that exhibit high / dense connectivity in the connectivity graph (densely connected architectures). Common quantum computing platforms, such as Google's Sycamore quantum computer, exhibit dense connectivity due to their lattice-based topology. In particular, this embodiment takes into account that when solving the mapping problem from logical to physical qubits, the free choice of the physical qubit is encoded, which is part of the following SWAP operations (colloquially speaking: "do I SWAP one qubit or the other"). Furthermore, the reachability encoding is created such that the nearest neighbor in the interaction graph of the physical target qubit is reached via SWAP operations.In addition, a new (intermediate) mapping of logical qubits is dynamically generated and managed as soon as SWAP operations are executed. A new mapping of more physical qubits than in the actual logical circuit can occur in this case. This regrouping is then further taken into account in subsequent SWAP operations. It should also be noted that the cost of a "permutation" of qubits (which corresponds to inserting SWAP operations after every 2-qubit gate operation (quantum operation)) is not statically pre-calculated. In our proposed solution, the calculation of the permutations or the sequence of SWAP operations is part of the method. This has the additional advantage that additional constraints can also be taken into account, e.g., that certain physical qubits may not be "swapped."Considering that one does not want to precompute this permutation and one wants to find and prove mappings that require no / few SWAPs, the solution we propose scales very well in contrast to solutions that statically precompute the costs.

[0026] According to one embodiment, the reachability criterion comprises an exclusion of solutions for which it is not possible to map the logical qubits involved in the quantum operation of the section, in particular not by applying SWAP operations, to physical qubits that are configured to interact with each other.

[0027] According to one embodiment, when determining the executable quantum circuit, an optimization based on the number of swap operations is performed. Without optimization instructions, the method or the answer set solver initially only determines one valid solution, which is correct but may have too many swap operations. One possibility is to output all possible valid solutions and then select the solution with the fewest swap operations overall.

[0028] According to one embodiment, when determining the executable quantum circuit, the number of SWAP operations per section is minimized. In particular, an optimization instruction can be added, for example, in the answer set solver, which reads as follows: • The first instruction is that the initial mapping of the logical qubits should be done in such a way that no SWAP operations are added to the executable quantum circuit. • However, it may be that no solution exists that does not require SWAP operations. Therefore, the second statement is: Try to minimize the total number of SWAP operations in the final circuit (executable quantum circuit) if no solution exists that does not require SWAP operations.

[0029] According to one embodiment, the method described above is carried out multiple times, wherein a plurality of valid solutions, each comprising the initial mapping of the logical qubits of the logical quantum circuit to the physical qubits of the qubit arrangement and the associated executable quantum circuit, are provided, and in a further method step, from the plurality of valid solutions, the solution whose more executable quantum circuit has the fewest number of SWAP operations is provided for execution on a quantum computer comprising the qubit arrangement and the hardware-specific connectivity of the physical qubits according to the hardware-specific connectivity graph.

[0030] According to one embodiment, during the initial mapping, the logical qubits involved in the quantum operation of the first section are mapped to physical qubits that are configured to interact with each other. This advantageously allows the number of swap operations to be reduced.

[0031] According to one embodiment, when defining the stationary qubit and the sink qubit, the variant that requires fewer swap operations to map the qubits involved in the quantum operation to physical qubits configured to interact with each other is chosen. In particular, it can advantageously be considered which qubits should be adjacent for subsequent quantum operations in order to save on swap operations.

[0032] A classical computer for executing the method described above for mapping a logical quantum circuit onto the qubit arrangement of a quantum computer, in particular an NISQ computer, comprising the qubit arrangement underlying the method with restricted connectivity of the physical qubits, which is described by the hardware-specific connectivity graph, has advantages that result from the advantages of the method implemented, in particular it enables a well-scaling, efficient way of providing a quantum computer with an initial mapping of the logical qubits of the logical quantum circuit onto the physical qubits of the qubit arrangement and the executable quantum circuit.

[0033] A system that encompasses • a classical computer for providing the initial mapping of the logical qubits of the logical quantum circuit to the physical qubits of the qubit array and the executable quantum circuit, according to the method described above, and • a quantum computer, in particular a NISQ computer, comprising the qubit arrangement and a hardware-specific connectivity of the physical qubits according to the hardware-specific connectivity graph used in the method, for executing the logical quantum circuit using the initial mapping of the logical qubits of the logical quantum circuit to the physical qubits of the qubit arrangement provided by the classical computer and the executable quantum circuit provided by the classical computer, has advantages that arise from the advantages of the method carried out, in particular the system enables a well-scaling, efficient way of providing a quantum computer with an initial mapping of the logical qubits of the logical quantum circuit to the physical qubits of the qubit arrangement and the executable quantum circuit and executing it on the quantum computer.In particular, an optimized executable quantum circuit is advantageously determined, which reduces the susceptibility to errors by avoiding the insertion of unnecessary SWAP operations and thus enables a more reliable and robust operation of the quantum computer.

[0034] A classical computer is understood in very general terms to be a device which can process data by means of programmable calculation instructions and which is suitable for carrying out the method described above, in particular for mapping a logical quantum circuit onto the qubit arrangement of a quantum computer.

[0035] The advantages of a computer program product comprising instructions, in particular instructions written in the modeling language of an answer set solver, which cause the classical computer of the system to carry out the method steps of the method described above.

[0036] A method for operating a quantum computer comprising a qubit arrangement having physical qubits and a hardware-specific connectivity of the physical qubits, in particular a quantum computer of the system described above, which comprises the following steps: • Providing the mapping of the logical qubits of the logical quantum circuit to the physical qubits of the qubit array and the executable quantum circuit, according to the method described above; • Initializing the quantum computer, comprising the initial mapping of the logical qubits of the logical quantum circuit to the physical qubits of the qubit array of the quantum computer; • Executing the executable quantum circuit on the quantum computer; this is advantageously particularly efficient because the mapping is based on a well-scaling, efficient method, as described above. Further advantages arise from the aforementioned advantages of the method. Short description of the drawings

[0037] Embodiments of the invention are illustrated in the drawings and explained in more detail in the following description. Identical reference numerals in the figures denote identical or equivalent elements.

[0038] It shows Fig. 1 a representation of a hardware-specific connectivity graph of a qubit arrangement comprising eight qubits according to an embodiment, Fig. 2 a representation of a logic quantum circuit comprising four logic qubits according to an embodiment, Fig. 3 is a flowchart of a method for mapping a quantum logic circuit to a qubit array comprising a number of physical qubits, according to one embodiment; Fig. 4 a flowchart of part of the process Fig. 3 for determining an executable quantum circuit according to an embodiment, Fig. 5 shows an initial mapping of the logical qubits to the physical qubits of the qubit array according to an embodiment, Fig. 6 is a diagram of an executable quantum circuit comprising four physical qubits according to an embodiment, Fig. 7 a schematic sketch of a system comprising a classical computer and a quantum computer according to an embodiment, and Fig. 8 a flowchart of a method for operating a quantum computer. Embodiments of the invention

[0039] In Fig. Figure 1 shows an example of a hardware-specific connectivity graph 102 of a quantum computer platform. The quantum computer comprises eight physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8, which are represented as nodes on a circle in the connectivity graph 102 and are connected to each other via ring-shaped edges 1020. An edge 1020 always connects two physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 and symbolizes a possible interaction between these physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8. In particular, the edge 1020 indicates that a 2-qubit gate quantum operation can be performed on the qubits connected by the edge 1020. Physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 that are not connected by an edge 1020 cannot interact, i.e., in particular, no 2-qubit gate quantum operation can be performed on them jointly.In the present example, the first physical qubit PQ1 can interact with the eighth physical qubit PQ8 and the second qubit PQ2, the second physical qubit PQ2 can additionally interact with the third physical qubit PQ3, the third physical qubit PQ3 can additionally interact with the fourth physical qubit PQ4, the fourth physical qubit PQ4 can additionally interact with the fifth physical qubit PQ6, the sixth physical qubit PQ6 can additionally interact with the seventh physical qubit, and the seventh physical qubit PQ7 can additionally interact with the eighth physical qubit PQ8. The connectivity graph 102 thus shows, in particular, the number and connectivity of the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 of the qubit arrangement of the quantum computer.

[0040] Fig. 2 shows an embodiment of a logic quantum circuit 101, which in the following refers to the qubit arrangement of the quantum computer, whose hardware-specific connectivity graph 102 is shown in Fig. 1. The first logical qubit LQ1 is represented by the top horizontal line. The quantum operations to be applied to the first logical qubit LQ1 are arranged along the top line, with the quantum operations being executed sequentially from left to right. Analogously, the horizontal lines arranged below represent the second logical qubit LQ2, the third logical qubit LQ3, and the fourth logical qubit LQ4 and their associated quantum operations. A controlled not (CNOT) operation Q1 is to be performed on the first LQ1 and the third logical qubit LQ3. Furthermore, a CNOT operation Q2 is to be performed on the second logical qubit LQ2 and the fourth logical qubit LQ4. These two 2-qubit gate operations can be combined in a first section 1010, since none of the logical qubits is involved in more than one 2-gate operation.

[0041] In particular, the two CNOT operations Q1, Q2 can also be executed simultaneously. This means that the first section 1010 is generally chosen such that each logical qubit LQ1, LQ2, LQ3, LQ4 is involved in one or no multi- or 2-gate operations. A Pauli-X gate Q4, i.e., a 1-qubit gate, is then implemented on the first logical qubit. This is not taken into account when selecting the sections for dividing the logical quantum circuit 101. Furthermore, a CNOT gate Q3 is implemented on the second LQ2 and third logical qubit LQ3. In the next time step, a CNOT gate Q5 is to be implemented on the first LQ1 and second logical qubit LQ2. If these quantum operations were combined into one section, the second logical qubit LQ2 would be involved in two 2-qubit gates.Therefore, the second section ends after the CNOT operation Q3 of the second LQ2 and third logical qubit LQ3, and the CNOT operation Q5 of the first LQ1 and second logical qubit LQ2 is included in a third section. Subsequently, a Hadamard gate (1-qubit gate) Q6, Q7 is applied to the second LQ2 and third logical qubit LQ3, respectively, which are thus not taken into account when dividing the sections. In the last time step, a CNOT operation is applied to the first LQ1 and the second logical qubit LQ2, and, in particular, simultaneously, a CNOT operation is applied to the third LQ3 and fourth logical qubit LQ4. These two CNOT operations can be combined into a common section, since here each qubit participates in only one 2-qubit operation.

[0042] Fig. 3 shows a flowchart of a method 100 for mapping a logical quantum circuit, for example the one shown in Fig. 2 to a qubit arrangement comprising a number of physical qubits PQ1, PQ, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8, wherein the qubit arrangement is, for example, represented by the Fig. 1. The method 100 comprises the following steps: - The hardware-specific connectivity graph 102 of the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 and the logical quantum circuit 101 are provided. For example, this information can be retrieved from an internal and / or external storage unit or received from a data transmission unit. In other words, this compiles the facts about the number of logical qubits LQ1, LQ2, LQ3, LQ4, physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8, and the connectivity graph 102. - If the logical quantum circuit 101 is present, it can be divided into sections, as shown in the example of Fig. 2, be divided 105. In particular, each section comprises a quantum operation Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, in particular a 2-qubit operation, whereby multiple 2-qubit operations can also be included, provided that each logical qubit is involved in a maximum of one of the 2-qubit operations. In other words, the logical circuit 101 is pre-structured into slices, with the requirement that each section contains only a maximum of one 2-qubit gate, in particular per logical qubit LQ1, LQ2, LQ3, LQ4. (1-qubit interactions can be left out for now; they can later be inserted at the correct location in the final executable quantum circuit 1002). - An initial mapping 106 of the logical qubits LQ1, LQ2, LQ3, LQ4 of the logical quantum circuit 101 to the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 of the qubit array takes place, which takes into account the following rules: • Each logical qubit LQ1, LQ2, LQ3, LQ4 is assigned exactly one physical qubit PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 and • each physical qubit PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 is assigned a maximum of one logical qubit LQ1, LQ2, LQ3, LQ4.

[0043] Considering the connectivity graph 102 from Fig. 1 and the logic quantum circuit 101 from Fig. 2 includes the initial Fig. following assignment, which in Fig. 5, where the arrows indicate the assignment: the first logical qubit LQ1 is assigned to the first physical qubit PQ1, the third logical qubit LQ3 is assigned to the second physical qubit PQ2, the second logical qubit LQ2 is assigned to the third physical qubit PQ3, and the fourth logical qubit LQ4 is assigned to the fourth physical qubit. This is a valid initial mapping that results in the quantum operations Q1, Q2, Q3, Q4, Q5, Q6, Q6, Q7, Q8 of the first section 1010 being executable without inserting a SWAP operation. Furthermore, the solution is also minimal with respect to the number of SWAP operations, as will become apparent after performing the method 100. There are other valid initial mappings that only require one SWAP operation, but there is no mapping that does not require a SWAP operation. There are also other mappings that require more than one SWAP operation to be valid.The solutions that will have a minimal number of SWAP operations are preferred and can be determined, for example, by introducing an optimization criterion and / or by repeatedly performing the method and subsequently selecting a solution with a minimal number of SWAP operations, either per section or globally, counted across the entire executable quantum circuit. - For each section of the logic circuit 101, starting with the first section 1010, the solutions shown in . Fig. 4 are executed to determine 107 the executable quantum circuit 1002. In other words, for each section, it is checked whether the included quantum operation (2-qubit gate) can be directly executed by the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 given their limited connectivity stored in the connectivity graph 102, or whether the logical qubits LQ1, LQ2, LQ3, LQ4 must first be assigned to another physical qubit PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 by inserting a SWAP operation. The exact process of determining 107 the executable quantum circuit 1002 according to an embodiment is shown in Fig. 4 as a flow chart. The method 100 provides the initial Fig. of the logical qubits LQ1, LQ2, LQ3, LQ4 to the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 of the qubit array and the executable quantum circuit 1002. As input data of the method 100, in particular the connectivity graph 102 and the logical quantum circuit can be prepared in a manner suitable for the modeling language of an answer set solver and then passed to the answer set solver (e.g., the software clingo [5]) together with the coding (in the modeling language) of a valid mapping solution. As output, the method 100 generates the initial Fig. the logical qubits LQ1, LQ2, LQ3, LQ4 from the logical quantum circuit 101 to the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 prior to the execution of the circuit (which is executed on the quantum computing platform) and new circuit (i.e., the executable quantum circuit 1002, based on the original logical circuit 101) that potentially contains SWAP operations. In particular, the method 100 may include implementing an optimization criterion for optimizing / minimizing the number of SWAP operations, as explained above.

[0044] Fig. 4 shows a flow chart for the process step from Fig. 3, in which a determination 107 of the executable circuit 1002 takes place. For each section, starting with the first section, the following steps are carried out: • A check 1071 is performed to determine whether the logical qubits LQ1, LQ2, LQ3, LQ4 involved in the quantum operation Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8 of the section are mapped to physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 that are configured to interact with each other. For the first section, this is done using the initial Fig. , which provides information about the assignment of logical to physical qubits. After determining a SWAP route for the first section, the assignment of logical and physical qubits is checked again and adjusted if necessary, provided it differs from the initial Fig. This adjusted figure will be used as the basis for the verification step 1071 for the following section, after which the figure will be adjusted again if necessary, and so on. ▪ If yes, ie if the logical qubits LQ1, LQ2, LQ3, LQ4 involved in the quantum operation Q1, Q2, Q3, Q4, Q5, Q6, Q6, Q7, Q8 of the section are mapped to physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 that are configured to interact with each other, then preferably no SWAP operation is inserted and the quantum operation Q1, Q2, Q3, Q4, Q5, Q6, Q6, Q7, Q8 can be adopted directly into the executable quantum circuit 1002. An adjustment of the assignment of the logical to the physical qubits does not have to be made in this case. In particular, if an optimization criterion exists, it may still be possible to insert one or more swap operations, resulting in an adjustment of the allocation, especially if this would save swap operations in one of the subsequent sections. The allocation will then be used as the basis for the next check 1071. ▪ If no 1073, ie if the logical qubits LQ1, LQ2, LQ3, LQ4 involved in the quantum operation Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8 of the section are mapped to physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8, which according to the connectivity graph 102 are not configured to interact with each other, the following steps are carried out: 1) Select the logical qubit LQ1, LQ2, LQ3, LQ4 that should remain physically connected to its physical qubit PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 (stationary qubit) or select the logical qubit LQ1, LQ2, LQ3, LQ4 that should be swapped (sink qubit). The qubit to be swapped is the first sink. 2) Start SWAPing from the sink, but ensure that in the final solution the last SWAP operation brings the qubit to be SWAPed as the nearest neighbor to the stationary qubit. 3) After a SWAP operation, a new sink is created, from which the next SWAP is to be calculated. Then, step 2) can again determine the next SWAP operation. In other words, in steps 2) and 3), a SWAP operation is applied 1077 to the sink qubit, whereby the logical qubit LQ1, LQ2, LQ3, LQ4 of the sink qubit is transferred to a physical qubit PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 involved in the SWAP operation, which then becomes the sink qubit. 4) Transfer 1074 the SWAP operation into the executable quantum circuit 1002; 5) We iteratively calculate the respective SWAPs using the above instructions (i.e., 2) and 3)). However, a valid solution is only obtained if we actually reach the nearest neighbor of the stationary qubit. We ensure this by specifically excluding solutions whose SWAPs do not reach the stationary qubit (in modeling language, this is called an "integrity constraint"). 6) With steps 2) to 5), a SWAP route should now be calculated. The next step is to manage whether the mapping of logical qubits to physical qubits has changed due to SWAP operations. • The stationary qubit retains its assignment of the logical qubit LQ1, LQ2, LQ3, LQ4. • The SWAPing logical qubit LQ1, LQ2, LQ3, LQ4 is mapped to a physical nearest neighbor PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 of the stationary qubit according to the SWAP operations. • Physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8, not affected by SWAPs, will “retain” their assigned logical qubits LQ1, LQ2, LQ3, LQ4. • For the qubits that are influenced by SWAP operations, two essential cases must be distinguished: (a) a physical qubit PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8, to which a logical qubit LQ1, LQ2, LQ3, LQ4 is assigned, is part of a SWAP operation (b) a physical qubit PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 is initially not assigned to a logical qubit LQ1, LQ2, LQ3, LQ4, but is now part of a SWAP operation • Case (a): according to the calculated SWAP operations, the mapping of the involved logical qubits LQ1, LQ2, LQ3, LQ4 to the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 is swapped • Case (b): This is not an obstacle, but it must be ensured that the physical qubits that do not have logical qubits LQ1, LQ2, LQ3, or LQ4 assigned to them also have a valid quantum mechanical state (e.g., initialized as |0>) before the final circuit is executed on the real platform. It is important that a record of these qubits is kept, as they may also be part of subsequent / further SWAP operations. As already mentioned, optimization criteria can be used: • Without optimization instructions, the answer-set solver initially produces only one valid solution, which is correct but may contain too many swap operations. You can also display all possible valid solutions and then select the one with the fewest swap operations. • Add optimization instructions ◯ The first instruction is that the mapping of the logical qubits is done in such a way that NO SWAP operations are necessary. ◯ However, it may be that no solution exists that does not require SWAPs. Therefore: Try to minimize the total number of SWAP operations in the final circuit 1002

[0045] Fig. 6 shows a valid solution for the executable quantum circuit 1002 resulting from the Fig. 3 and Fig. 4, if the method described in Fig. 1 and Fig. 2 are used for the method 100. In contrast to the Fig. In the logic circuit 101 shown in Figure 2, the horizontal lines in the executable quantum circuit 1002 represent physical qubits PQ1, PQ2, PQ3, PQ4. In this embodiment, the number of logical qubits LQ1, LQ2, LQ3, LQ4 and physical qubits PQ1, PQ2, PQ3, PQ4 is the same, but generally valid solutions can also be found that use more physical than logical qubits, for example, by assigning logical qubits to physical qubits that did not appear in the initial mapping using SWAP operations. In these cases, the executable quantum circuit 1002 can also have more horizontal lines (= number of physical qubits) than the logic circuit 101 (= number of logical qubits). Fig. 5 shown initial Fig. provides information about the mapping between the logical qubits and the physical qubits before the first section. The mapping changes after the second section, since a SWAP operation Q0 was inserted into the executable circuit 1002, which did not occur in the logical quantum circuit 1001. This SWAP operation is due to the fact that after the second section, i.e. in the third section, an interaction (application of a CNOT gate) between the first logical qubit LQ1 and the second logical qubit LQ2 is provided, but according to the connectivity graph 102 in Fig. 1 cannot interact with each other because, in the initial mapping, the third logical qubit LQ3 is mapped to the second physical qubit PQ2, and the second logical qubit LQ2 is mapped to the third physical qubit PQ3. However, there is no edge 1020 entered in the connectivity graph between the first PQ1 and third physical qubit PQ3, so that the second PQ2 and third physical qubit PQ3 must swap states after the second section using a SWAP operation, and thus the second logical qubit LQ2 is subsequently mapped to the second physical qubit PQ2, and the third logical qubit LQ3 is mapped to the third physical qubit. Since from the third section onwards the numbering of the logical qubits and the physical qubits matches (LQ1→PQ1, LQ2→PQ2, LQ3→PQ3, LQ4→PQ4), the executable quantum circuit 1002 and the logical quantum circuit 101 are identical from the third section onwards.

[0046] Fig. Figure 7 shows a schematic sketch of a system comprising a computing device, in particular a conventional computer 201, on which the method 100 described above is carried out and which carries out the initial Fig. and provides the executable quantum circuit 1003 for a quantum computer 202, which comprises a qubit arrangement which, at least with regard to the number of physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 and their connectivity, is such as defined by the hardware-specific connectivity graph 102 used in the classical computer 201 in the method 100. As a result, the logical quantum circuit 101 can be executed on the quantum computer 202, or the logical quantum circuit is executable on the quantum computer 202.

[0047] Fig. 8 shows a flowchart of a method 300 for operating a quantum computer 202, for example the quantum computer 202 of the Fig. 7 shown system 200. The method comprises the following steps: - Providing the Fig. of the logical qubits LQ1, LQ2, LQ3, LQ4 of the logical quantum circuit 101 to the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 of the qubit array and the executable quantum circuit 1002, according to the Fig. 3 and Fig. 4 shown procedures; - Initializing 301 the quantum computer 202, comprising the initial mapping of the logical qubits LQ1, LQ2, LQ3, LQ4 of the logical quantum circuit 101 to the physical qubits PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8 of the qubit arrangement of the quantum computer 202; - Executing 302 the executable quantum circuit (1002) on the quantum computer (201).

[0048] As output 303, a result determined by the quantum computer 202 on the basis of the logic quantum circuit 101 can be provided, in particular output, stored, transmitted or displayed. QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited non-patent literature

[0000] On the Qubit Routing Problem,” (Cowtan et al., arXiv:1902.08091v2, 2019

[0001] Tackling the Qubit Mapping Problem for NISQ-Era Quantum Devices” (Li et al.; ASPLOS'19, April 13-17, 2019, Providence, RI, USA

[0002]

Claims

[1] Method (100) for mapping a logical quantum circuit (101) onto a qubit array comprising a number of physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8), comprising the following steps: - Providing a hardware-specific connectivity graph (102) of the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8); - providing the logic quantum circuit (101); - dividing (105) the logic quantum circuit (101) into sections, each section comprising a quantum operation (Q1, Q2, Q3, Q4, Q5, Q6, Q6, Q7, Q8); - Initial mapping (106) of the logical qubits (LQ1, LQ2, LQ3, LQ4) of the logical quantum circuit (101) to the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) of the qubit array, • where each logical qubit (LQ1, LQ2, LQ3, LQ4) is assigned exactly one physical qubit (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) and • where each physical qubit (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) is assigned a maximum of one logical qubit (LQ1, LQ2, LQ3, LQ4); - Determining (107) an executable quantum circuit (1002), comprising the following steps, which are carried out for each section of the logic quantum circuit (101): • Check (1071) whether the logical qubits (LQ1, LQ2, LQ3, LQ4) involved in the quantum operation (Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8) of the section are mapped to physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) that are configured to interact with each other: ▪ If no (1073), the following steps are carried out: 1) Determining (1075) a stationary qubit from the logical qubits (LQ1, LQ2, LQ3, LQ4) involved in the quantum operation (Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8) of the section, 2) Specifying (1076) a sink qubit, 3) applying (1077) a SWAP operation to the sink qubit, wherein the logical qubit (LQ1, LQ2, LQ3, LQ4) of the sink qubit is transferred to a physical qubit (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) involved in the SWAP operation, which then becomes the sink qubit; 4) Transferring (1074) the SWAP operation to the executable quantum circuit (1002); 5) If the stationary qubit and the sink qubit are not configured to interact with each other after applying (1077) the SWAP operation: ▪ Repeating steps 1) to 4) until the sink qubit is mapped to a physical qubit (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) that is configured to interact with the stationary qubit; 6) Adaptation of the mapping of the logical qubits (LQ1, LQ2, LQ3, LQ4) to the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8); - Providing the initial mapping (1001) of the logical qubits (LQ1, LQ2, LQ3, LQ4) to the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) of the qubit array and the executable quantum circuit (1002). [2] The method (100) of claim 1, wherein the method (100) comprises executing a response set solver, wherein ▪ providing the hardware-specific connectivity graph (102) of the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) and the logical quantum circuit (101) comprises providing the hardware-specific connectivity graph (101) and the logical quantum circuit (101) in a modeling language of an answer set solver, ▪ the response set solver is provided with an encoding of the description of the set of valid mappings in the modeling language of the response set solver, ▪ the criterion according to which the logical qubits (LQ1, LQ2, LQ3, LQ4) involved in the quantum operation (Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8) of the section are mapped to physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) that are designed to interact with each other is provided as a reachability criterion in the modeling language of the answer set solver, ▪ where the response set solver determines the initial mapping (1001) of the logical qubits (LQ1, LQ2, LQ3, LQ4) of the logical quantum circuit to the physical qubits (PQ1, PQ2, PQ3, PQ4) of the qubit array and the executable quantum circuit (1002). [3] Method (100) according to claim 2, wherein the reachability criterion comprises an exclusion of solutions for which it is not possible to map the logical qubits (LQ1, LQ2, LQ3, LQ4) involved in the quantum operation (Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8) of the section, in particular not by applying (1077) SWAP operations, to physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) that are configured to interact with each other. [4] Method (100) according to one of the preceding claims, wherein in the case that the stationary qubit and the sink qubit are not configured to interact with each other after applying (1077) the SWAP operation, instead of repeating steps 1) to 4), steps 3) to 4) are repeated until the sink qubit is mapped to a physical qubit (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) which is configured to interact with the stationary qubit. [5] Method (100) according to one of the preceding claims, wherein the hardware-specific connectivity graph (102) comprises nodes and edges (1020), wherein the nodes represent physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) and nodes of physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) which are configured to interact with each other are connected to each other in the hardware-specific connectivity graph (102) by edges (1020). [6] Method (100) according to one of the preceding claims, wherein an optimization according to the number of SWAP operations is carried out when determining (107) the executable quantum circuit (1002). [7] Method (100) according to one of the preceding claims, wherein the number of SWAP operations per section is minimized when determining (107) the executable quantum circuit (1002). [8] Method (100) according to one of the preceding claims, wherein the method (100) according to one of the preceding claims is executed multiple times, wherein a plurality of valid solutions, comprising the initial mapping (1001) of the logical qubits (LQ1, LQ2, LQ3, LQ4) of the logical quantum circuit (101) to the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) of the qubit arrangement and the associated executable quantum circuit (1002), are provided, and in a further method step, from the plurality of valid solutions, the solution whose more executable quantum circuit (1002) has the fewest number of SWAP operations is provided for execution on a quantum computer (202), comprising the qubit arrangement and the hardware-specific connectivity of the physical qubits according to the hardware-specific connectivity graph (102). becomes. [9] Method (100) according to one of the preceding claims, wherein in the initial mapping the logical qubits (LQ1, LQ2, LQ3, LQ4) involved in the quantum operation (Q1) of the first section (1010) are mapped to physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) which are configured to interact with each other. [10] Method (100) according to one of the preceding claims, wherein in the determination (1075, 1076) of the stationary qubit and the sink qubit, the variant is selected which requires the smaller number of SWAP operations for mapping the qubits involved in the quantum operation (Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8) to physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) which are configured to interact with one another. [11] Method (100) according to one of the preceding claims, wherein the hardware-specific connectivity graph (102) comprises information about an asymmetry of the qubit arrangement, which is taken into account in the method (100) by means of the following steps: • Replacing each SWAP operation in the executable quantum circuit with three CNOT operations that realize the SWAP operation; • Using the asymmetry information from the hardware-specific connectivity graph, check whether correction of the CNOT operations is necessary; • Correction of the executable quantum circuit, if required according to the asymmetry information from the hardware-specific connectivity graph; • Providing the tested and / or corrected executable quantum circuit. [12] System (200), comprising ▪ a classical computer (201) for carrying out the method (100) according to one of claims 1 to 11 for mapping a logic quantum circuit (101) onto the qubit arrangement of a quantum computer (202) and ▪ a quantum computer (202) comprising the qubit arrangement and a hardware-specific connectivity of the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) according to the hardware-specific connectivity graph (102), for executing the logical quantum circuit (101) using the initial mapping (1001) of the logical qubits (LQ1, LQ2, LQ3, LQ4) of the logical quantum circuit (101) to the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) of the qubit arrangement and the executable quantum circuit (1002) provided by the classical computer (201). [13] Computer program product comprising instructions, in particular instructions written in the modeling language of an answer set solver, which cause the classical computer (201) of the system (200) according to claim 12 to carry out the method steps according to one of claims 1 to 11. [14] Method (300) for operating a quantum computer (202) comprising a qubit arrangement having physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) and a hardware-specific connectivity of the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8), in particular a quantum computer of a system according to claim 12, which comprises the following steps: - providing the mapping (1001) of the logical qubits (LQ1, LQ2, LQ3, LQ4) of the logical quantum circuit (101) to the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) of the qubit arrangement and the executable quantum circuit (1002), according to the method of one of claims 1 to 11; - Initializing (301) the quantum computer (202), comprising the initial mapping of the logical qubits (LQ1, LQ2, LQ3, LQ4) of the logical quantum circuit (101) to the physical qubits (PQ1, PQ2, PQ3, PQ4, PQ5, PQ6, PQ7, PQ8) of the qubit arrangement of the quantum computer (202); - executing (302) the executable quantum circuit (1002) on the quantum computer (201).

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