Method for shaping a noise profile in a phase-locked loop for a technical system

Abstract

The invention relates to a method (100) for forming a noise profile in a phase-locked loop (2) for a technical system (1), comprising the following steps: - providing (101) a resonator (3) in the phase-locked loop (2), wherein the resonator (3) is designed to change a control variable of the phase-locked loop (2) in a temporal sequence, - defining (102) a center frequency and a bandwidth for the resonator (3) in order to determine the control variable of the phase-locked loop (2) to be changed by the resonator (3) on the basis of the defined center frequency and the defined bandwidth, - shaping (103) the noise profile in the phase-locked loop (2) by the resonator (3) with the defined center frequency and the defined bandwidth. Furthermore, the invention relates to a computer program, a device and a storage medium for this purpose.

Description

[0001] The invention relates to a method for shaping a noise profile in a phase-locked loop for a technical system. Furthermore, the invention relates to a computer program, a device, and a storage medium for this purpose. State of the art

[0002] A phase-locked loop (PLL) is a control loop with a controlled oscillator whose phase is adjusted to that of an external signal. In phase-locked loops, the dependence of the manipulated variable on the control deviation—the phase shift—is periodic. The control can lock to various relative phase positions that differ by whole multiples of 2π (360°). When locked, the oscillator frequency corresponds to an integer or fractional multiple of the reference signal.

[0003] The PLL is used in communications, control and measurement technology, for example for the implementation of filters, for modulation and demodulation, and in digital communication systems for clock recovery and synchronization.

[0004] The problem of coarse quantization steps is typically addressed by applying a fixed-order delta-sigma modulator. To date, high-pass characteristics have been used almost exclusively, which naturally means that the quantization degradation is most pronounced at the upper end of the useful band. Disclosure of the invention

[0005] The subject matter of the invention is a method having the features of claim 1, a computer program having the features of claim 9, a device having the features of claim 10, and a computer-readable storage medium having the features of claim 11. Further features and details of the invention emerge from the respective subclaims, the description, and the drawings. Features and details described in connection with the method according to the invention naturally also apply in connection with the computer program according to the invention, the device according to the invention, and the computer-readable storage medium according to the invention, and vice versa, so that with regard to the disclosure of the individual aspects of the invention, reference is or can always be made to each other.

[0006] The invention particularly relates to a method for shaping a noise profile in a phase-locked loop for a technical system, comprising the following steps, wherein the steps can be performed repeatedly and / or sequentially. The phase-locked loop (PLL) can also be referred to and understood as a phase-locked loop and is, in particular, a control loop with a controlled oscillator whose phase is adjusted to that of an external signal. In phase-locked loops, the dependence of the manipulated variable on the control deviation, or phase shift, can be periodic.

[0007] In a first step, a resonator is preferably provided in the phase-locked loop, wherein the resonator is configured to change a control variable of the phase-locked loop over time. The control variable is preferably a frequency or a frequency range. Changing over time can also be an attenuation of the control variable, in particular the frequency or the frequency range. The resonator is, in particular, a filter element and can be configured as a notch filter.

[0008] In a further step, a center frequency and a bandwidth for the resonator are preferably defined in order to determine the control variable of the phase-locked loop to be changed by the resonator on the basis of the defined center frequency and the defined bandwidth.

[0009] In a further step, the noise profile in the phase-locked loop is preferably shaped by the resonator with the defined center frequency and bandwidth. This advantageously allows the noise profile to be individually shaped for specific applications, for example, to meet safety requirements.

[0010] It is also conceivable for the resonator to be provided in a modulator of the phase-locked loop. A modulator is used, in particular, to add or modify a control signal in order to adapt the properties of the oscillator signal. In the context of PLLs, a modulator can be used in the following ways: The modulator can effect frequency modulation by modifying the control signal of the controlled oscillator (voltage-controlled oscillator, VCO or digital-controlled oscillator, DCO), which leads to a change in the output frequency. In a PLL, this can be used for communication applications in which information is transmitted by changing the carrier frequency. Furthermore, the control signal can be modified so that the phase of the output signal of the controlled oscillator changes without primarily influencing the frequency. This is another method of encoding information.The modulator can also be used to inject a correction signal into the control loop, compensating for external noise or systematic errors in the PLL. In digital PLLs (DPLLs), the modulator can be part of a digital signal processing path that can perform various modulation tasks and can be implemented at least partially or entirely in software. In an analog context, it can be simple analog circuits that modulate the control signal.

[0011] Advantageously, the invention can provide for the modulator to be a delta-sigma modulator and / or for the resonator to be used in a sub-path for quantizing the delta-sigma modulator. In a phase-locked loop (PLL) with an analog-controlled oscillator (VCO), a delta-sigma modulator is used in particular to generate the control signal for the oscillator with high precision, especially when a digital-to-analog converter is part of the VCO control. The delta-sigma modulator can make fine frequency adjustments to the controlled oscillator by generating a high-resolution digital control signal. The resolution of this signal advantageously exceeds, in particular, a resolution that could be achieved with a conventional digital-to-analog converter.Delta-sigma modulators preferably also use noise shaping to shift the quantization noise to higher frequency ranges where it has less influence on the desired signal and can be more easily removed by a low-pass filter. By oversampling the signal, the delta-sigma modulator can advantageously generate a higher-frequency, digital bitstream signal that effectively represents the analog input signal. This enables more precise control of the controlled oscillator. In the context of a delta-sigma modulator, the quantization sub-path is a central component of the overall system, converting the continuous signal into a discrete signal. The process that takes place in this path can be divided into the following two functions: During quantization, the analog input signal, which is obtained by subtracting and, if necessary, by multiplying the bitstream, is quantized.processed by integration, into a discrete signal. This is done, for example, in a quantizer, which is implemented, for example, as a 1-bit quantizer in a delta-sigma architecture. The quantizer effectively preferentially cuts all values ​​to a fixed level or to two levels (high and low) that represent a binary signal. In particular, the delta-sigma modulator reshapes the noise introduced by quantization by favoring higher frequencies for the noise. This can be achieved, for example, by a filter, which can be an integral part of the modulator. The combination of these two processes can enable the delta-sigma modulator to produce signals with an effective resolution that is significantly higher than the actual bit rate of the quantizer.

[0012] A further advantage can be achieved within the scope of the invention if at least two resonators are provided to attenuate at least two frequencies or at least two frequency ranges of the phase-locked loop. This advantageously provides noise attenuation at two or, if necessary, even more frequencies or frequency ranges.

[0013] According to a further advantage, it can be provided that the definition is carried out based on a predefined noise mask, wherein the predefined noise mask specifies a range according to a safety requirement for the noise profile of the phase-locked loop. This advantageously allows the noise profile to be specifically shaped for a specific application. For example, the safety requirement can specify the range for the noise profile as the noise mask for an application such as a vehicle context.

[0014] Optionally, the phase-locked loop can be a digital phase-locked loop. A digital phase-locked loop (DPLL) typically comprises digital components that perform similar functions to an analog PLL, but are specialized for digital signals. Digital phase-locked loops can offer several advantages over their analog counterparts, including improved precision, programmability, and the ability to work with digital signal processing techniques. They can be particularly useful in technical systems that process digital signals, such as digital communications, digital circuits, and digital signal processing.

[0015] Furthermore, within the scope of the invention, it can be provided that the technical system is a radar system. Shaping the noise profile can be particularly advantageous in a radar system, since specific requirements for the noise profile can be specified.

[0016] It is possible for the method according to the invention to be used in a vehicle. The vehicle can be designed, for example, as a motor vehicle and / or passenger vehicle and / or an autonomous vehicle. The vehicle can have a vehicle device, for example, for providing an autonomous driving function and / or a driver assistance system. The vehicle device can be designed to control and / or accelerate and / or decelerate and / or steer the vehicle at least partially automatically.

[0017] The invention also relates to a computer program, in particular a computer program product, comprising instructions that, when executed by a computer, cause the computer to carry out the method according to the invention. Thus, the computer program according to the invention provides the same advantages as those described in detail with reference to a method according to the invention.

[0018] The invention also relates to a data processing device configured to carry out the method according to the invention. The device can be, for example, a computer that executes the computer program according to the invention. The computer can have at least one processor for executing the computer program. A non-volatile data memory can also be provided, in which the computer program is stored and from which the computer program can be read by the processor for execution.

[0019] The invention may also provide a computer-readable storage medium that contains the computer program according to the invention and / or includes instructions that, when executed by a computer, cause the computer to carry out the method according to the invention. The storage medium is designed, for example, as a data storage device such as a hard disk and / or a non-volatile memory and / or a memory card. The storage medium can, for example, be integrated into the computer.

[0020] Furthermore, the method according to the invention can also be implemented as a computer-implemented method.

[0021] Further advantages, features, and details of the invention will become apparent from the following description, which describes embodiments of the invention in detail with reference to the drawings. The features mentioned in the claims and in the description may be essential to the invention individually or in any combination. They show: Fig. 1 a schematic visualization of a method, a technical system with a phase-locked loop, a device, a storage medium and a computer program according to embodiments of the invention, Fig. 2 a schematic representation of a modulator with a resonator according to embodiments of the invention.

[0022] In Fig. 1, a method 100, a technical system 1 with a phase-locked loop 2, a device 10, a storage medium 15 and a computer program 20 according to embodiments of the invention are schematically shown.

[0023] Fig. 1 shows in particular an embodiment of a method 100 for shaping a noise profile in a phase-locked loop 2 for a technical system 1.

[0024] In a first step 101, a resonator 3 is provided in the phase-locked loop 2, wherein the resonator 3 is configured to change a control variable of the phase-locked loop 2 over time. In a second step 102, a center frequency and a bandwidth are defined for the resonator 3 in order to determine the control variable of the phase-locked loop 2 to be changed by the resonator 3 based on the defined center frequency and the defined bandwidth. In a third step 103, the noise profile in the phase-locked loop 2 is shaped by the resonator 3 with the defined center frequency and the defined bandwidth.

[0025] One aspect of the present invention, according to exemplary embodiments, is in particular that one or more programmable digital resonators (programmable center frequency, quality factor) are used within a sub-path for quantizing a delta-sigma modulator (DSM) to specifically shape the resulting quantization noise of a phase-locked loop (PLL). This method can reduce the quantization noise in a range where the PLL performance is sensitive (small deviation from the specification).

[0026] DSMs are widely used in electronic components. In mixed-signal PLLs with feedback dividers, the use of a DSM allows control of the instantaneous division ratio, allowing the synthesizer's multiplier to provide a fine-grained output frequency range (sigma-delta modulated fractional synthesizer). In dividerless digital PLLs, a DSM can be used to interpolate between the oscillator's discrete tuning states. In all PLL applications, it is preferable to shape the quantization noise according to the signal path requirements. For chirped PLLs, a wide range with low total noise is desirable to enable precise resolution with high chirp BW. If the available clock frequency is fixed, this can lead to conflicts, as quantization noise is inherently related to the modulator order and the clock frequency.Therefore, the use of notching resonators in PLLs can be advantageous to enable a wider bandwidth below a certain desired noise threshold. The flexibility of programming different notch resonators for different operating modes (e.g., long-range radar, corner radar) is particularly useful for system design.

[0027] Fig. 2 shows a possible extension of a first-order modulator 4 with a resonator 3. On the left, the modulator receives an input I and on the right, outputs an output O.

[0028] The two gain coefficients G1 and G2 preferably jointly determine the center frequency f ctr and quality factor Q of the resonator. Z -1 stands in particular for a delay of one clock cycle of frequency f clk .

[0029] For this resonator, for example, the following relationship approximately applies: ω0=2×π×fctr / fclk and G1=e−ω02Q⋅cos(ω0) |G2|=e−ω02Q⋅sin(ω0)

[0030] In principle, any number of resonators with any number of loops and loop orders can be supported.

[0031] The above explanation of the embodiments describes the present invention exclusively by way of examples. Of course, individual features of the embodiments can be freely combined with one another, provided they are technically feasible, without departing from the scope of the present invention.

Claims

[1] Method (100) for forming a noise profile in a phase-locked loop (2) for a technical system (1), comprising the following steps: - providing (101) a resonator (3) in the phase-locked loop (2), wherein the resonator (3) is designed to change a control variable of the phase-locked loop (2) in a temporal sequence, - defining (102) a center frequency and a bandwidth for the resonator (3) in order to determine the control variable of the phase-locked loop (2) to be changed by the resonator (3) on the basis of the defined center frequency and the defined bandwidth, - shaping (103) the noise profile in the phase-locked loop (2) by the resonator (3) with the defined center frequency and the defined bandwidth. [2] Method (100) according to claim 1, characterized by that the resonator (3) is provided in a modulator (4) of the phase-locked loop (2). [3] Method (100) according to claim 2, characterized by that the modulator (4) is a delta-sigma modulator and / or the resonator (3) is used in a partial path for quantizing the delta-sigma modulator. [4] Method (100) according to one of the preceding claims, characterized by that the control variable is a frequency or a frequency range of the phase-locked loop (2) and the frequency or the frequency range is changed by damping in the temporal sequence. [5] Method (100) according to claim 4, characterized by that at least two resonators (3) are provided to attenuate at least two frequencies or at least two frequency ranges of the phase-locked loop (2). [6] Method (100) according to one of the preceding claims, characterized by that the defining (102) is carried out on the basis of a predetermined noise mask, wherein the predetermined noise mask specifies a range according to a safety requirement for the noise profile of the phase-locked loop (2). [7] Method (100) according to one of the preceding claims, characterized by that the phase-locked loop (2) is a digital phase-locked loop (2). [8] Method (100) according to one of the preceding claims, characterized by that the technical system (1) is a radar system. [9] Computer program (20) comprising instructions which, when the computer program (20) is executed by a computer (10), cause the computer (10) to carry out the method (100) according to one of the preceding claims. [10] Device (10) for data processing, which is arranged to carry out the method (100) according to one of claims 1 to 8. [11] A computer-readable storage medium (15) comprising instructions which, when executed by a computer (10), cause the computer (10) to carry out the steps of the method (100) according to any one of claims 1 to 8.

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