Integrated circuit and method for adjusting a parameter of an integrated circuit

Abstract

The invention relates to an application-specific integrated circuit comprising a circuit part (2) to be characterized and a test structure (3) that forms a copy of the circuit part (2) to be characterized, wherein the application-specific integrated circuit (1) has at least one external contact point (4, 4') and at least one test structure multiplexer (5, 5'), wherein the at least one test structure multiplexer (5, 5') is switchable to a first state in which an electrical connection between the external contact point (4, 4') and the test structure (3) can be established via the test structure multiplexer (5, 5') and thus a measurement on the test structure (3) can be carried out, wherein the at least one test structure multiplexer (5, 5') is switchable to at least a second state in which the electrical properties of the connection circuit section (6) located between the test structure (3) and the external contact point (4, 4') can be determined.and wherein the application-specific integrated circuit (1) is configured to adapt at least one parameter of the integrated circuit (1) depending on the results of the measurement on the test structure (3) and depending on the results of the electrical properties of the interconnection circuit section (6).

Description

[0001] The invention relates generally to the field of application-specific integrated circuits (ASICs). In particular, the present invention relates to an ASIC with a test structure and a method for adjusting at least one parameter of an integrated circuit based on measurements on the test structure.

[0002] It is generally known that application-specific integrated circuits, hereinafter also referred to as ASICs, have a test bus. This test bus allows, among other things, circuit components to be electrically contacted and measured via external contact points. This is necessary, for example, to verify the ASIC's functionalities during development, to test the ASIC after production, and also to trim circuit components or adjust other ASIC parameters.

[0003] For the most accurate trimming or parameter adjustment of the ASIC, it is necessary to determine the properties of the circuit section being characterized very precisely. The problem here is that the circuit section being characterized cannot be measured separately via the test bus, and / or high inaccuracies can occur when measuring the circuit section via the test bus. Because of these inaccuracies, it is necessary, for example, to build in a large safety margin in safety-critical applications so that even if the parameter of the circuit section being characterized exhibits a very high degree of inaccuracy, no safety-critical incidents can occur.

[0004] From DE 10 2022 205 262 A1, an integrated circuit with a measuring function and a circuit arrangement with such an integrated circuit are disclosed, wherein in the integrated circuit a function circuit, an impedance and a measuring circuit are encapsulated by a housing and at least some of the connections of the integrated circuit are provided for electrical contacting of the function circuit and the measuring circuit from outside the integrated circuit, wherein an oscillator circuit of the measuring circuit is configured to be alternately connected to the impedance and to a reference impedance by means of a switching unit, to generate a first signal with a first frequency influenced by the impedance when the oscillator circuit is connected to the impedance and to generate a second signal with a second frequency influenced by the reference impedance when the oscillator circuit is connected to the reference impedance.wherein the integrated circuit is configured to output the first and second signals generated by the measuring circuit and / or information about the state of the impedance determined on the basis of the first and second signals via predefined connections of the plurality of connections to the outside.

[0005] Furthermore, US 2023 / 0258709A1 describes an integrated circuit comprising a subsystem and a reference subsystem. The reference subsystem is essentially identical to the subsystem but is not operational by default. The integrated circuit includes a test circuit that retrieves a parameter value from the subsystem and a reference parameter from the reference subsystem. The integrated circuit detects deterioration of the subsystem based on the parameter value and the reference parameter. The integrated circuit then disables the subsystem and enables the reference subsystem, which responds to the detection of subsystem deterioration.

[0006] Based on this, the object of the invention is to provide an application-specific integrated circuit in which a parameter of a circuit part of the ASIC to be characterized can be determined very precisely and thus adapted as accurately as possible.

[0007] The problem is solved by an application-specific integrated circuit with the features of independent claim 1. Preferred embodiments are the subject of the dependent claims. A method for determining at least one feature of a circuit part to be characterized of an application-specific integrated circuit and for adjusting at least one parameter of the application-specific integrated circuit based on the feature of the circuit part to be characterized is the subject of dependent claim 9.

[0008] According to a first aspect, an application-specific integrated circuit is disclosed. The application-specific integrated circuit comprises a circuit section to be characterized and a test structure. The test structure is a circuit section that is separate from the circuit section to be characterized. It forms a copy of the circuit section to be characterized. This means, in particular, that the test structure is formed from the same electrical components, has the same size, geometry, and shape, is integrated into the same circuit environment, and / or has the same orientation on the substrate as the circuit section to be characterized.

[0009] The application-specific integrated circuit has at least one external contact point and at least one test structure multiplexer. The test structure multiplexer can be switched to a first state in which an electrical connection between the external contact point and the test structure can be established via the test structure multiplexer, thus enabling a measurement on the test structure from the external contact point. The test structure multiplexer can be switched to at least a second state in which the electrical properties of the interconnection circuit section between the test structure and the external contact point can be determined.The application-specific integrated circuit is designed to adjust at least one parameter of the integrated circuit depending on the results of the measurement on the test structure and depending on the results of the electrical properties of the interconnection circuit section.

[0010] The technical advantage of the application-specific integrated circuit lies in the fact that the test structure forms an electrical twin of the circuit section to be characterized and can be contacted via a short interconnection circuit segment that excludes the ASIC's test bus and its multiplexer. This reduces parasitic measurement effects. Furthermore, the two-stage measurement process—in which an initial measurement gathers information about the test structure including the interconnection circuit segment, and a second measurement gathers information about the interconnection circuit segment alone—eliminates the parasitic effects caused by the interconnection circuit segment. This allows for the precise determination and, if necessary, adjustment of a parameter of the ASIC's circuit segment in a technically simple manner.

[0011] According to one embodiment, at least one input of the at least one test structure multiplexer is: - an open entrance; and / or - directly connected to ground; and / or - connected to ground via an electrical resistor with a defined resistance value.

[0012] Due to the different wiring of the inputs of the test structure multiplexer, the connection circuit section on the side facing away from the external contact point can be terminated in different ways, so that the electrical properties of the connection circuit section can be determined better and more comprehensively.

[0013] According to one embodiment, at least two external contact points are provided, with each external contact point being assigned a separate test structure multiplexer. One input of each of the at least two test structure multiplexers is electrically connected to the test structure. This allows the test structure to be contacted from the external contact points via two separate paths.

[0014] According to one embodiment, an input of a first test structure multiplexer and an input of a second test structure multiplexer are short-circuited. The line through which the short circuit is established preferably runs in close proximity to the lines by which the test structure is contacted and / or extends almost to the test structure without making electrical contact with it. This allows the parasitic properties of the lines by which the test structure is contacted to be determined when ascertaining the electrical properties of the interconnection circuit section.

[0015] According to one embodiment, the integrated circuit has a test bus, and the at least one test structure multiplexer is a multiplexer independent of the test bus; that is, the test structure multiplexer is not directly electrically coupled to the test bus. In particular, the at least one test structure multiplexer is independent of the multiplexers directly connected to the test bus. This allows the test structure to be contacted independently of the test bus, thereby minimizing the parasitic effects that occur in the electrical connection between the at least one external contact point and the test structure.

[0016] According to one embodiment, the test structure has the same components, circuit structure, parameters, and / or orientation on the integrated circuit as the circuit section being characterized. Furthermore, the test structure is preferably integrated into the same circuit environment as the circuit section being characterized. This ensures that the test structure has the same or substantially the same electrical properties as the circuit section being characterized. It is understood that the circuit section being characterized may have one or more electrical components, and the test structure may also include one or more electrical components, depending on this.

[0017] According to one embodiment, the test structure comprises a temperature sensor and / or an electrical filter. In the case of a temperature sensor, after compensating for the influences of the interconnection circuit section, a lookup table can be created, which can then be used to correct the temperature sensor readings. It is understood that other forms of measurement correction are also possible, for example, adjustment using a correction function. In the case of the temperature sensor, adjusting at least one parameter of the integrated circuit includes measurement adjustment, which can be performed, for example, using a lookup table or a correction function.In the case of an electrical filter, adjusting at least one parameter of the integrated circuit can consist of correcting a component value by switching on or off discrete component values ​​(for example, switching on discrete resistance or capacitor values ​​by means of a switching device).

[0018] According to one embodiment, the test structure can be contacted via two separate conductors using at least two external contact points and at least two test structure multiplexers, thus enabling force-sense measurement. In a force-sense measurement (also known as a four-wire measurement), a constant current can be applied to the first external contact point, and the voltage applied to the second external contact point can be measured. This allows for a very precise characterization of the test structure.

[0019] According to a further aspect, a method for determining at least one feature of a circuit part to be characterized of an integrated circuit and for adjusting at least one parameter of the integrated circuit based on the feature of the circuit part to be characterized is disclosed. The integrated circuit has a test structure that is a copy of the circuit part to be characterized. The integrated circuit has at least one test structure multiplexer through which an electrical connection between an external contact point and the test structure can be established. The method comprises the following steps: - Establishing a first switching state of the at least one test structure multiplexer in which an electrical connection exists between the external contact point and the test structure, and performing a measurement at the external contact point to determine at least one first piece of information that specifies the electrical properties of the test structure and a connecting circuit section located between the test structure and the external contact point; - Establishing a second switching state of the at least one test structure multiplexer in which there is no electrical connection between an external contact point and the test structure, and determining at least one second piece of information relating solely to the electrical properties of the interconnection circuit section; - Differentiation between the first and second pieces of information yields a third piece of information that specifies the electrical properties of the test structure; - Adjusting at least one parameter of the integrated circuit based on the third piece of information.

[0020] The method offers the advantage that the second piece of information makes it possible to know and eliminate the parasitic effects caused by the interconnection circuit section, thus enabling a parameter of a circuit part of the ASIC to be characterized to be adjusted very precisely in a technically simple way.

[0021] According to one embodiment of the method, in the second switching state: - at least one input of the at least one test structure multiplexer is an open input; and / or - at least one input of the at least one test structure multiplexer is directly connected to ground; and / or - at least one input of the at least one test structure multiplexer is connected to ground via an electrical resistor with a defined resistance value.

[0022] This allows the connection circuit section to be terminated in different ways on the side facing away from the external contact point, enabling a more comprehensive determination of the electrical properties of the connection circuit section.

[0023] According to one embodiment, the integrated circuit has at least two external contact points, each with a separate test structure multiplexer. One input of each of the at least two test structure multiplexers is electrically connected to the test structure. In a second switching state, one input of a first test structure multiplexer and one input of a second test structure multiplexer are short-circuited. Preferably, the short-circuit line runs in close proximity to the lines by which the test structure is contacted and / or extends almost to the test structure. This allows the electrical properties of the interconnection circuit section, including the lines by which the test structure is contacted, to be determined in the second switching state, in which the two external contact points are electrically short-circuited.

[0024] According to one embodiment, parasitic electrical properties of the interconnection circuit section and / or an equivalent circuit of the interconnection circuit section are determined based on at least one second piece of information obtained in the second switching state of the at least one test structure multiplexer. Parasitic electrical properties can include, for example, parasitic resistances to ground and the supply voltage line, parasitic capacitances to ground, the supply voltage line or other conductor structures, the parasitic resistance from the input to the output of the test structure multiplexer, and / or parasitic inductances.

[0025] According to one embodiment, adjusting at least one parameter of the integrated circuit based on the third piece of information includes adjusting at least one component value (e.g., changing the resistance value of an electrical resistor), adjusting an operating parameter (e.g., changing a voltage level), calibrating a sensor (e.g., by a lookup table or a correction function that modifies the output values ​​of a sensor), and / or adjusting a frequency response of an electrical filter (e.g., by adjusting a resistance or capacitance that affects the frequency response).

[0026] According to one embodiment, a correction table or correction function is created based on the third piece of information, which allows the measured values ​​of a sensor provided in the circuit section to be characterized to be adjusted. This makes it possible to calibrate the output information of a sensor, in particular a temperature sensor, so that it delivers very accurate measured values.

[0027] According to one embodiment, an adjustment signal is generated based on the third piece of information. This signal is then used to adjust one or more component values ​​by switching discrete components in the circuit section being characterized on or off. This allows, for example, deviations in the component values ​​of an electrical filter to be corrected so that the frequency response of this electrical filter exhibits the desired frequency response.

[0028] The terms “approximately”, “essentially” or “about” mean, within the meaning of the invention, deviations from the respective exact value by + / - 10%, preferably by + / - 5% and / or deviations in the form of changes that are insignificant for the function.

[0029] Further developments, advantages, and possible applications of the invention will also become apparent from the following description of exemplary embodiments and from the figures. All features described and / or illustrated are, individually or in any combination, fundamentally the subject matter of the invention, irrespective of their compilation in the claims or their cross-reference. The content of the claims is also incorporated into the description.

[0030] The invention will be explained in more detail below with reference to exemplary embodiments shown in the figures. The figures show: Fig. 1. An example is a schematic representation of an ASIC that includes a circuit section to be characterized and connected to the test bus, and a test structure; Fig. 2. An example of a detailed representation of the structure of the test structure and the connecting circuit section that connects the test structure to the external contact point; Fig. 3. An exemplary first embodiment of a temperature sensor; Fig. 4. An example of a second embodiment of a temperature sensor; Fig. 5. An exemplary embodiment of an RC low-pass filter; and Fig. Figure 6 shows an example block diagram illustrating the steps of a procedure for adjusting at least one parameter of the ASIC.

[0031] Fig. Figure 1 schematically shows a section of an embodiment of an ASIC 1. The ASIC 1 has a circuit section 2 to be characterized. This circuit section to be characterized can, for example, include at least one passive circuit component, in particular a resistor or a capacitor, whose component values ​​are to be determined as precisely as possible and can be corrected, if necessary, by adding compensating components, which are, for example, additional resistors or capacitors. The passive circuit component can also be formed by several interacting passive components, for example, a passive RC filter composed of at least one resistor and at least one capacitor. Alternatively or additionally, the circuit section to be characterized can include an active circuit component, for example, an operational amplifier.Alternatively or additionally, the circuit component to be characterized can include a sensor, in particular a temperature sensor. In the case of a sensor, the characterization process consists of determining the accuracy of the sensor's measured values ​​and correcting them if necessary, for example, using a lookup table to adjust the sensor readings.

[0032] ASIC 1 also features a test bus 7. Test bus 7 is designed to be used both during ASIC development for characterization and debugging, and during production for tasks such as quality control testing. The circuit section 2 to be characterized can be contacted via test bus 7 from at least one external contact point 4, 4'.

[0033] Test bus 7 comprises a variety of components, such as switches, multiplexers 7.1 and 7.2, transmission gates, and / or other basic components. Therefore, test bus 7 itself exhibits certain parasitic effects that complicate or distort the characterization of circuit section 2. Examples of parasitic effects include unwanted coupling to ground or the supply voltage, series resistances, leakage currents, parasitic capacitances, etc.

[0034] Therefore, ASIC 1 has a test structure 3 that is as exact a copy as possible of the circuit section 2 to be characterized. "As exact a copy as possible" means, in particular, that the test structure 3 has as many of the same circuit components as the circuit section 2 to be characterized. Furthermore, the test structure 3 should have as similar a shape, geometry, and parameters as possible to the circuit section 2 to be characterized (e.g., in the case of a resistor, the same width and length on the substrate, the same number of parallel and series strips, and the same number of contacts). In addition, the test structure 3 should be integrated into the same environment as the circuit section 2 to be characterized. This means that the test structure 3 is placed in the vicinity of the same components as the circuit section 2 to be characterized. Finally, the test structure 3 should have the same orientation on the substrate (i.e.,(have the same angular position in the xy-plane of the substrate) as the circuit part 2 to be characterized. This ensures that the test structure 3 has the same electrical properties as the circuit part 2 to be characterized, as precisely as possible.

[0035] The test structure 3 is coupled to the at least one external contact point 4, 4' via a connection circuit section 6 that is independent of the test bus 7 and preferably completely separate. Preferably, the test structure 3 can be contacted via at least one pair of external contact points 4, 4'. This allows the electrical properties of the test structure 3 to be characterized using a force-sense measurement method.

[0036] The connecting circuit section 6 is designed such that the test structure 3 can be contacted via the shortest possible path and with as few intermediate elements as possible. This ensures that the connecting circuit section 6 has the least possible influence on the measurement of the electrical properties of the test structure.

[0037] The interconnection circuit section 6 has at least one first test structure multiplexer 5, or, in the case of dual contacting of the test structure 3 via a pair of external contact points 4, 4', one first and one second test structure multiplexer 5, 5'. This at least one test structure multiplexer 5, 5' is designed to have the lowest possible resistance in the conducting state and the highest possible resistance in the off state. Furthermore, the at least one test structure multiplexer 5, 5' is designed to have the lowest possible leakage current and the lowest possible coupling to other nodes of the ASIC 1, and in particular to the test bus 7 and its components. This makes it possible to perform a very precise measurement of the electrical properties of the test structure 3.

[0038] Fig. Figure 2 shows the test structure 3 and the connection circuit section 6, which connects the test structure 3 to the external contact points 4, 4', in more detail. The test structure 3 comprises several test objects 3.1, 3.2, which are preferably configured differently. For example, a first test object 3.1 can comprise an electrical filter, and a second test object 3.2 can comprise a sensor, in particular a temperature sensor.

[0039] As in Fig. As can be seen in Figure 2, the test structure multiplexers 5, 5' each have several inputs and one output. The output of each test structure multiplexer 5, 5' is preferably directly (i.e., without any further intermediate components) electrically connected to an external contact point 4, 4'.

[0040] Each input of the test structure multiplexers 5, 5' is connected to a test object 3.1, 3.2. For example, the first input of the first test structure multiplexer 5 is connected to the first test object 3.1, the second input of the first test structure multiplexer 5 to the second test object 3.2, and so on. Similarly, the first input of the second test structure multiplexer 5' is connected to the first test object 3.1, the second input of the second test structure multiplexer 5' to the second test object 3.2, and so on. This allows force-sense measurements to be performed on the test objects 3.1, 3.2 from the external contact points 4, 4' via the test structure multiplexers 5, 5'.

[0041] Furthermore, the test structure multiplexers 5, 5' have additional circuitry on the input side, via which the electrical properties of the interconnection circuit section 6 can be determined. After the electrical properties have been determined, they can then be taken into account, in particular compensated for. Another input of at least one test structure multiplexer 5, 5' is directly coupled to ground. If the test structure multiplexer 5, 5' is configured such that the external contact point 4, 4' is directly coupled to ground, the resistance of the test structure multiplexer 5, 5' in the conducting state can, for example, be determined.

[0042] Another input of the at least one test structure multiplexer 5, 5' is unconnected, i.e., it has an open configuration. If the test structure multiplexer 5, 5' is connected such that the external contact point 4, 4' is directly coupled to this unconnected input, the resistance of the test structure multiplexer 5, 5' in the open state, as well as the parasitic capacitances to the power supply, ground, and other conductor structures, can be determined.

[0043] Furthermore, preferably an input of the first test structure multiplexer 5 is directly short-circuited to an input of the second test structure multiplexer 5' via a connecting line 10. Preferably, the connecting line 10 extends as close as possible to the test structure 3, in particular the test objects 3.1, 3.2, without contacting them, in order to obtain the most comprehensive information possible regarding the on-resistance and the parasitic effects of the conductor paths up to the test structure 3 and the switching elements of the test structure multiplexers 5, 5'.

[0044] A further input of at least one test structure multiplexer 5, 5' can be terminated with a defined resistor R, as shown in Fig. Figure 2 shows that the resistor R can, for example, be a 50-ohm resistor to ensure a suitable termination of the input of the test structure multiplexer 5, 5'. This is particularly advantageous for determining the frequency response of the interconnection circuit section 6. For example, the transfer function, S-parameters, and / or other network parameters can be determined in this way.

[0045] The previously described additional coupling of the inputs to ground, the open configuration, and the short circuit between two inputs of the test structure multiplexer 5, 5' allow for the determination of parasitic properties of the interconnection circuit section 6. In particular, based on the determined parasitic properties, an equivalent circuit can also be derived that represents the electrical properties of the interconnection circuit section between the at least one external contact point 4, 4' and the test structure 3. The equivalent circuit can, in particular, include at least one resistor and two capacitors (CRC equivalent circuit) or two resistors and one capacitor (RCR equivalent circuit). The equivalent circuit forms a model that describes, for example, the influence of the gates, pads, electrostatic discharge components, and / or the transmission lines.

[0046] Preferably, the parasitic properties of the interconnection circuit section 6 are also determined for different frequencies, for example, for a frequency range defined by a lower and an upper limit. In particular, a measurement of the gain and phase can be performed to determine the frequency response of the interconnection circuit section 6. This allows its influence on an electrical filter provided in the test structure 3 to be modeled. Furthermore, the DC common-mode voltage on the lines can also be determined. This voltage can be set or swept (i.e., changed within a predefined range) depending on the operating point of the test structure 3, which is known from the circuit section 2 to be characterized.

[0047] Fig. 3, Fig. 4 to Fig. Figure 5 shows examples and schematics of possible test objects that may be included in test structure 3.

[0048] The Fig. 3 and Fig. Figure 4 shows exemplary circuits for a bipolar transistor to be used as a temperature sensor. The transistor is bridged between the collector and the base, so that only a pn junction is effective. Such temperature sensors can also be stacked, i.e., several of these temperature sensors are connected in series. It goes without saying that other types of temperature sensors can also be used, for example, resistors with a known temperature characteristic.

[0049] To characterize a temperature sensor, it is necessary to know its current-voltage characteristic as accurately as possible, without interference, especially when compensating for possible leakage currents.

[0050] As in Fig. 3 and Fig. As can be seen from diagram 4, the temperature sensor has two contacts. A first contact is coupled to the first external contact point 4 via the first test structure multiplexer 5. A second contact is coupled to the second external contact point 4' via the second test structure multiplexer 5'. A force-sense measurement can be performed via the two contacts, for example, by applying an electric current via the first contact and measuring the voltage resulting from the applied current via the second contact.

[0051] Fig. Figure 6 shows an example of an RC low-pass filter that can be included in test structure 3. It is understood that an RC high-pass filter can be formed by an inverse arrangement of the components and can also be part of test structure 3.

[0052] Such RC filters are strongly affected by parasitic effects and manufacturing tolerances, so they usually need to be adjusted to achieve a specific frequency response (for example, a predetermined 6dB frequency).

[0053] The RC filter has multiple contacts. A first contact is coupled to the first external contact point 4 via the first test structure multiplexer 5. A second contact is coupled to the second external contact point 4' via the second test structure multiplexer 5'. A force-sense measurement can be performed via the two contacts, for example, by applying an electrical signal with a changing frequency via the first contact and measuring the voltage resulting from the applied electrical signal via the second contact.

[0054] The following is based on the block diagram of the Fig. 6 a method is described as how to, based on an ASIC 1 according to Fig. 1 with a test structure 3 a very precise determination of characteristics, in particular the electrical properties of a circuit part 2 to be characterized and an adjustment of at least one parameter of the ASIC 1 is made possible.

[0055] First, a first switching state is established at the at least one test structure multiplexer 5, 5' (S10). In this first switching state, an electrical connection is established between the test structure 3 and the at least one external contact point 4, 4'. In this first switching state, at least one first measurement is then performed to determine initial information. In other words, at least one initial measurement of the complete electrical path, including the test structure 3, is performed in the first switching state. Preferably, the test structure 3 is contacted from a pair of external contact points 4, 4' via the connection circuit section 6, which contains a pair of test structure multiplexers 5, 5', in order to perform force-sense measurements.

[0056] Subsequently, a second switching state is established at the at least one test structure multiplexer 5, 5' (S11). In this second switching state, there is no electrical connection between the test structure 3 and the at least one external contact point 4, 4'. In this second switching state, at least a second measurement is taken to determine a second piece of information. In other words, in the second switching state, at least a second measurement is taken to determine properties of the connection circuit section 6 without the test structure 3.

[0057] It should be noted that the first and second measurements are of the same type, meaning the same measurement procedures are performed. These procedures can include, for example, determining the current-voltage ratio, the frequency response, a gain-phase measurement versus frequency, etc.

[0058] The first and second measurements are performed in the linear region, i.e., in such a way that no saturation effects, clipping, nonlinear distortions, etc., occur. Furthermore, it is assumed that the initial information obtained in the first measurement results from a linear superposition of the electrical properties of test structure 3 alone and the electrical properties of the interconnection circuit section 6 alone.

[0059] Assuming these assumptions are met, a third piece of information can be determined based on the first and second pieces of information. This third piece of information characterizes test structure 3 on its own, i.e., without the influence of the connecting circuit section 6. To do this, the difference between the first and second pieces of information is calculated. The result of this difference calculation constitutes the third piece of information (S12).

[0060] Based on the third piece of information, at least one parameter of the ASIC is then adjusted (S13). Adjusting an ASIC parameter refers specifically to tuning, trimming, or adapting the circuit section being characterized. For example, based on the third piece of information, the deviation of the measured values ​​of a sensor, particularly a temperature sensor, can be determined, and a lookup table can be created to correct the sensor's readings. Alternatively or additionally, it is possible to generate a trim word that is used to correct components in the circuit 2 being characterized. For example, based on the trim word, small component values ​​(e.g., resistors or capacitors) can be incrementally added or removed so that the component value reaches a desired level.This allows, for example, an electrical filter, where component sizes deviate from target sizes due to production inaccuracies or similar factors, to be trimmed so that the filter has the desired frequency response.

[0061] ASIC 1 can, for example, be a mixed-signal ASIC, particularly one for safety-critical applications. Application areas include ASICs used in the automotive sector or medical technology. Specifically, the ASIC can be an ASIC used in the automotive sector to operate a radar sensor, also known as a radar ASIC. Reference symbol list 1 Application-Specific Integrated Circuit (ASIC) 2. Circuit section to be characterized 3 Test structure 3.1 Test object 3.2 Test object 4. First external contact point 4' second external contact point 5 first test structure multiplexer 5' second test structure multiplexer 6 Connection circuit section 7 test buses 7.1, 7.2 Multiplexer 8 Temperature sensor 9 electrical filter 10 connecting line R electrical resistance

Claims

[1] Application-specific integrated circuit comprising a circuit part (2) to be characterized and a test structure (3) which forms a copy of the circuit part (2) to be characterized, wherein the application-specific integrated circuit (1) has at least one external contact point (4, 4') and at least one test structure multiplexer (5, 5'), wherein the at least one test structure multiplexer (5, 5') is switchable to a first state in which an electrical connection between the external contact point (4, 4') and the test structure (3) can be established via the test structure multiplexer (5, 5') and thus a measurement on the test structure (3) can be carried out, wherein the at least one test structure multiplexer (5, 5') is switchable to at least a second state in which the electrical properties of the interconnection circuit section (6) located between the test structure (3) and the external contact point (4, 4') can be determined,and wherein the application-specific integrated circuit (1) is configured to adapt at least one parameter of the application-specific integrated circuit (1) depending on the results of the measurement on the test structure (3) and depending on the results of the electrical properties of the interconnection circuit section (6). [2] Application-specific integrated circuit according to claim 1, characterized by , that: - at least one input of at least one test structure multiplexer (5, 5') is an open input; and / or - at least one input of at least one test structure multiplexer (5, 5') is directly connected to ground; and / or - at least one input of the at least one test structure multiplexer (5, 5') is connected to ground via an electrical resistor (R) with a defined resistance value. [3] Application-specific integrated circuit according to claim 1 or 2, characterized by , that at least two external contact points (4, 4') are provided, wherein each external contact point (4, 4') is assigned a separate test structure multiplexer (5, 5') and that each input of the at least two test structure multiplexers (5, 5') is electrically connected to the test structure (3). [4] Application-specific integrated circuit according to claim 3, characterized by , that an input of a first test structure multiplexer (5) and an input of a second test structure multiplexer (5') are short-circuited. [5] Application-specific integrated circuit according to any one of the preceding claims, characterized by , that the application-specific integrated circuit (1) has a test bus (7) and the at least one test structure multiplexer (5, 5') is a multiplexer independent of the test bus (7), i.e. the test structure multiplexer (5, 5') is not directly electrically coupled to the test bus (7). [6] Application-specific integrated circuit according to claim 5, characterized by , that the test structure (3) has the same component, circuit structure, parameters and / or orientation on the application-specific integrated circuit (1) compared to the circuit part (2) to be characterized and / or is integrated into the same circuit environment. [7] Application-specific integrated circuit according to claim 5 or 6, characterized by , that the test structure (3) includes a temperature sensor (8) and / or an electrical filter (9). [8] Application-specific integrated circuit according to any one of claims 3 to 7, characterized by , that by means of the at least two external contact points (4, 4') and the at least two test structure multiplexers (5, 5') the test structure (3) can be contacted via two separate conductors, so that a force-sense measurement can be carried out. [9] Method for determining at least one feature of a circuit part (2) to be characterized of an application-specific integrated circuit (1) and for adjusting at least one parameter of the application-specific integrated circuit (1) based on the feature of the circuit part (2) to be characterized, wherein the application-specific integrated circuit (1) comprises a test structure (3) which is a copy of the circuit part (2) to be characterized, wherein the application-specific integrated circuit (1) comprises at least one test structure multiplexer (5, 5') through which an electrical connection can be established between an external contact point (4, 4') and the test structure (3), wherein the method comprises the following steps: - Establishing a first switching state of the at least one test structure multiplexer (5, 5') in which an electrical connection exists between the external contact point (4, 4') and the test structure (3), and performing a measurement at the external contact point (4, 4') to determine at least one first piece of information that specifies the electrical properties of the test structure (3) and a connecting circuit section (6) located between the test structure (3) and the external contact point (4, 4') (S10); - Establishing a second switching state of the at least one test structure multiplexer (5, 5') in which there is no electrical connection between an external contact point (4, 4') and the test structure (3) and determining at least one second piece of information relating to the electrical properties of the interconnection circuit section (6) alone (S11); - Differentiation between the first and second information, which yields a third piece of information that specifies the electrical properties of the test structure (3) (S12); - Adjusting at least one parameter of the application-specific integrated circuit (1) based on the third piece of information (S13). [10] Method according to claim 9, characterized by , that in the second switching state: - at least one input of at least one test structure multiplexer (5, 5') is an open input; and / or - at least one input of at least one test structure multiplexer (5, 5') is directly connected to ground; and / or - at least one input of the at least one test structure multiplexer is connected to ground via an electrical resistor (R) with a defined resistance value; [11] Method according to claim 9 or 10, characterized by, that the application-specific integrated circuit (1) has at least two external contact points (4, 4'), wherein each external contact point (4, 4') is assigned a separate test structure multiplexer (5, 5'), wherein one input of each of the at least two test structure multiplexers (5, 5') is electrically connected to the test structure (3), and wherein in the second switching state an input of a first test structure multiplexer (5) and an input of a second test structure multiplexer (5') are short-circuited. [12] Method according to any one of claims 9 to 11, characterized by , that based on the at least one second piece of information obtained in the second switching state of the at least one test structure multiplexer (5, 5'), parasitic electrical properties of the interconnection circuit section (6) and / or an equivalent circuit of the interconnection circuit section (6) are determined. [13] Method according to any one of claims 9 to 12, characterized by , that the adjustment of at least one parameter of the application-specific integrated circuit (1) based on the third piece of information includes an adjustment of at least one component value, an adjustment of an operating parameter, a calibration of a sensor and / or an adjustment of a frequency response of an electrical filter. [14] Method according to any one of claims 9 to 13, characterized by , that based on the third piece of information a correction table is created, based on which the measured values ​​of a sensor provided in the circuit part (2) to be characterized can be adjusted. [15] Method according to any one of claims 9 to 14, characterized by , that based on the third piece of information an adjustment information is created, based on which an adjustment of one or more component values ​​is carried out by switching on or off discrete components in the circuit part (2) to be characterized.

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