SILICON-DOTED, OXIDE-BASED MATERIAL FOR ADVANCED GATE ELECTRODE APPLICATIONS

Abstract

A method comprises the following: fabricating a semiconductor region; fabricating a gate spacer over the semiconductor region; fabricating a source / drain region adjacent to the semiconductor region, wherein the source / drain region is a p-source / drain region; and fabricating a gate dielectric over the semiconductor region. The gate dielectric is fabricated in a space between opposing sections of the gate spacer. A ruthenium oxide layer is fabricated over the gate dielectric and serves as part of a gate electrode exit layer. The method further comprises incorporating silicon into the ruthenium oxide layer.