Semiconductor pressure gauge and methods for its manufacture

Abstract

Semiconductor pressure sensor featuring the following: a semiconductor substrate (1) which is provided with a through-hole (1a) extending in the thickness direction of the semiconductor substrate (1); a thin semiconductor plate (3) arranged on the semiconductor substrate (1); and an insulating layer (2) which gradually thins from the peripheral region towards the central region of a membrane (23), which is arranged between the semiconductor support substrate (1) and the thin semiconductor plate (3) and which has a depression (2a) on the side facing the through-hole (1a), wherein the insulating layer (2) becomes thinner from the edge of the through-hole (1a) towards the central region of the membrane (23) and the insulating layer (2) has a constant thickness in the remaining region, where A / Tmax is at least 5, where A is the distance between an end (2b) of a region where the thickness of the insulating layer (2) is Tmax, and represents a position (2c) where the thickness of the insulating layer (2) reaches the value (Tmax + Tmin) / 2, where Tmax represents the maximum value of the thickness of the insulating layer (2) and Tmin represents the minimum value of the thickness of the insulating layer (2).

Description

TECHNICAL AREA

[0001] The present invention relates to a semiconductor pressure sensor and a method for its manufacture. STATE OF THE ART

[0002] Generally, a semiconductor pressure sensor is manufactured with a diaphragm formed by a thin semiconductor wafer. For example, Japanese patent application JP H04-9770A discloses a semiconductor pressure sensor consisting of three layers: a thin silicon wafer, an insulating layer, and a silicon substrate. In such a semiconductor pressure sensor, a through-hole is formed in the silicon substrate, and another through-hole, continuous with this through-hole, is formed in the insulating layer.

[0003] In contrast, Japanese patent application JP 2002 - 350 259 A discloses a semiconductor pressure sensor in which a silicon support substrate is formed with a through-hole, while an insulating layer is not formed with a through-hole, but remains in a state at the time of the production of an SOI (Silicon on Insulator or Silicon on Insulator) substrate.

[0004] In each of the aforementioned semiconductor pressure sensors, the thin silicon plate, which is arranged on an extension of the through-hole provided in the silicon substrate, functions as a membrane that is deformed by pressure.

[0005] The publication DE 198 24 401 A1 further relates to a method for producing a sensor membrane substrate which has on its front side a membrane which is clamped at the edge of an opening etched from the back and has a thickened area, wherein the edge lies below the thickened area of ​​the membrane.

[0006] Publication JP 2001 - 358 345 A also relates to a method for manufacturing a semiconductor pressure sensor, wherein a semiconductor substrate is formed from two silicon substrates which are connected to each other via a silicon oxide layer, and wherein a membrane is formed from the other silicon substrate and the silicon oxide layer through an opening formed in one of the silicon substrates. Patent document 1: Japanese patent application disclosure JP H04 - 9 770 A Patent document 2: Japanese patent application disclosure JP 2002 - 350 259 A REVELATION OF THE INVENTION PROBLEMS TO BE SOLVED WITH THE INVENTION

[0007] The semiconductor pressure sensor disclosed in the aforementioned Japanese patent application publication JP H04 - 9 770 A has a structure in which the insulating layer is not present in one area under the membrane, but is present in the remaining area.

[0008] In this structure, the area with and without the insulating layer are mixed together, which can lead to residual stresses in the membrane. When the ambient temperature of the semiconductor pressure sensor changes, stresses arise due to the difference between the coefficients of thermal expansion of the insulating layer and the silicon in the membrane. This results in a measurement error due to the temperature change in the environment.

[0009] On the other hand, the semiconductor pressure sensor disclosed in Japanese patent application JP 2002-350259A has a structure in which the insulating layer maintains a uniform thickness in the area beneath the diaphragm. This structure suppresses pressure measurement errors resulting from the difference between the coefficients of thermal expansion of the insulating layer and the silicon. However, the diaphragm is stretched due to the stress exerted on the insulating layer.

[0010] In other words, the membrane deforms due to a factor other than externally applied pressure. Therefore, the voltage output by the semiconductor pressure sensor does not reach zero even when no pressure is applied to the membrane. In other words, there is an offset in the output voltage. This offset voltage results in a measurement error.

[0011] The present invention has been proposed in view of the problems described above, and one object of the present invention is to provide a semiconductor pressure sensor in which both a measurement error due to an offset voltage and a measurement error due to a temperature change in the environment can be suppressed; a further object of the invention is to provide a corresponding method for manufacturing such a semiconductor pressure sensor. MEANS TO SOLVE THE PROBLEMS

[0012] The present invention relates to a semiconductor pressure sensor with the features of independent claim 1, wherein advantageous embodiments of the semiconductor pressure sensor according to the invention are specified in the corresponding dependent claims.

[0013] The present invention further relates to a method for manufacturing a semiconductor pressure sensor with the features of dependent claim 4, wherein an advantageous further development of the method according to the invention is specified in the corresponding dependent claim. EFFECTS OF THE INVENTION

[0014] According to the present invention, a semiconductor pressure sensor can be specified in which both a measurement error due to an offset voltage and a measurement error due to a temperature change in the environment are suppressed.

[0015] The foregoing and further objectives, features, aspects and advantages of the present invention will become even clearer with reference to the following detailed description of the present invention in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings show: Fig. 1 a schematic sectional view of a semiconductor pressure sensor according to an exemplary embodiment; Fig. 2 a graphical representation for comparing the properties of the semiconductor pressure sensor according to the exemplary embodiment with the properties of conventional semiconductor pressure sensors; Fig. 3 a schematic sectional view to illustrate a method for manufacturing the semiconductor pressure sensor according to the exemplary embodiment; Fig. 4 a schematic sectional view to illustrate the method for manufacturing the semiconductor pressure sensor according to the exemplary embodiment; Fig. 5 a schematic sectional view to illustrate the method for manufacturing the semiconductor pressure sensor according to the exemplary embodiment; Fig. 6 a schematic sectional view to illustrate the method for manufacturing the semiconductor pressure sensor according to the exemplary embodiment; Fig. 7 a schematic sectional view to illustrate the method for manufacturing the semiconductor pressure sensor according to the exemplary embodiment; Fig. 8 a schematic sectional view to illustrate the method for manufacturing the semiconductor pressure sensor according to the exemplary embodiment; Fig. 9 a schematic cross-sectional view of a silicon oxide layer formed by wet etching; Fig. 10 a graphical representation to explain the relationship between an etching time for the silicon oxide layer and a measurement error in the semiconductor pressure sensor; Fig. 11 a schematic cross-sectional view to illustrate the distribution of the thickness of the silicon oxide layer; Fig. 12 a graphical representation to explain the relationship between the shape distribution of the thickness of the silicon oxide layer and the measurement error of the semiconductor pressure sensor; Fig. 13 a schematic sectional view of another exemplary semiconductor pressure sensor according to the embodiment; and Fig. 14 a graphical representation to explain the relationship between the dielectric breakdown voltage and an undercut amount. BEST METHODS FOR IMPLEMENTING THE INVENTION

[0017] A semiconductor pressure sensor according to an embodiment of the present invention and a method for manufacturing it are described below with reference to the drawings.

[0018] Fig. Figure 1 shows a cross-sectional view of the semiconductor pressure sensor according to an exemplary embodiment. The semiconductor pressure sensor comprises a glass substrate 8, which serves as a substrate for dense encapsulation, a silicon support substrate 1 formed on the glass substrate 8, which serves as a semiconductor support substrate, a silicon oxide layer 2 formed on the silicon support substrate 1, which serves as an insulating layer, and a thin silicon plate 3 formed on the silicon oxide layer 2, which serves as a thin semiconductor plate (active layer). The three-layer structure formed from the silicon support substrate 1, the insulating layer 2, and the thin silicon plate 3 is generally referred to as a SOI (silicon on insulator) structure.

[0019] When the semiconductor pressure sensor is provided with a glass substrate 8, as described above, a space formed by the glass substrate 8, the inner surface of a through-hole in the silicon support substrate 1, and the thin silicon plate 3 functions as a pressure reference chamber, allowing absolute pressure measurement. Conversely, when the glass substrate 8 is absent, the semiconductor pressure sensor is used as a differential pressure sensor, detecting the difference between the pressure values ​​on the two surfaces of a membrane 23.

[0020] Instead of the SOI substrate, an SOS substrate (silicon on sapphire) can also be used, which features a sapphire sandwiched between a silicon support substrate and a thin silicon plate. In this case, the sapphire serves as the insulating layer instead of a silicon oxide layer. While the thin silicon plate, the silicon oxide layer, and the silicon support substrate are used as the thin semiconductor plate, insulating layer, and semiconductor support substrate of the present invention, a thin silicon carbide plate, a silicon carbide insulating layer, and a silicon carbide support substrate can also be used instead. In other words, a semiconductor other than silicon can also be used as the semiconductor material for forming the semiconductor pressure sensor.

[0021] As in Fig. As shown in Figure 1, a through-opening 1a, reaching the silicon oxide layer 2, is formed in the silicon support substrate 1. The silicon oxide layer 2 is thus arranged opposite a chamber 10 in the through-opening 1a. The thin silicon plate 3 and the silicon oxide layer 2, which are located on an extension of the through-opening 1a, are in the form of a thin plate.

[0022] This thin plate area functions as a membrane 23, which is stressed or stretched due to the difference between the pressure of the space above the thin silicon plate 3 and the pressure of the space 10 in the through-opening 1a. A strain gauge 4 is provided on the thin silicon plate 3 to detect the stretching of the membrane 23.

[0023] The strain gauge 4 is stretched proportionally to the deformation of the diaphragm when pressure is applied to the diaphragm 23 and the diaphragm 23 is deformed. When the strain gauge 4 is stretched, its resistance changes. The resistance of the strain gauge 4 changes proportionally to its own stretching.

[0024] If a voltage is applied to both ends of the extensometer 4, the voltage applied to both ends of the extensometer 4 changes proportionally to the strain of the extensometer 4. If the change in voltage at Since the pressure exerted on the membrane 23 is detected at both ends of the strain gauge 4, it is also detected.

[0025] An insulating protective layer 5 is formed on the thin silicon plate 3. An opening 5a is formed in the insulating protective layer 5, the bottom surface of which is formed by the upper surface of the strain gauge 4. An aluminum wire 6 is embedded in the opening 5a. The aluminum wire 6 runs along the insulating protective layer 5. One end of the aluminum wire 6 serves as a contact surface for connection to an external electrode.

[0026] As in Fig. As shown in Figure 1, the space 10 enclosed by the upper surface of the glass substrate 8, the inner peripheral surface of the through-hole 1a, and the lower surface of the insulating layer 2 functions as a pressure reference chamber in the semiconductor pressure sensor according to the present embodiment. In other words, this embodiment is an absolute pressure sensor, wherein the space 10 acting as the pressure reference chamber is a closed space and the pressure in the space 10 is maintained at a predetermined reference pressure. On the other hand, even when the semiconductor pressure sensor is not provided with the glass substrate 8 but is used as a differential pressure sensor to detect the difference between the pressure values ​​at the two surfaces of the membrane 23, it has the mode of operation described below.

[0027] In the aforementioned semiconductor pressure sensor, it is generally ideal that the strain gauge 4 detects only the strain of the diaphragm 23 resulting from the difference between the pressure on the outside of the diaphragm 23 and the pressure of the chamber 10 on the inside of the diaphragm 23. However, the diaphragm 23 can also experience strain due to another factor. The strain caused by this other factor leads to a measurement error of the semiconductor pressure sensor. In the conventional semiconductor pressure sensor, the silicon oxide layer beneath the thin silicon layer remains with a uniform thickness, or the silicon oxide layer beneath the diaphragm is completely removed, resulting in the measurement error described above.

[0028] To suppress the aforementioned measurement error, the silicon oxide layer 2 therefore remains over the entire surface at one end of the through-hole 1a on the underside of the membrane 23, while the underside area of ​​the silicon oxide layer 2 is worn away in such a way that the thickness of the silicon oxide layer 2 in the semiconductor pressure sensor according to the present embodiment gradually decreases from the peripheral area towards the central area.

[0029] In this way, both measurement errors resulting from an offset voltage and measurement errors resulting from a temperature change can be suppressed. The effect described above, which is obtained by the semiconductor pressure sensor according to the present embodiment, is described below with reference to measurement results.

[0030] Fig. Figure 2 illustrates the relationship between the respective offset voltages and fluctuations in the output voltage resulting from temperature changes for the two aforementioned types of conventional semiconductor pressure sensors, as well as the offset voltage and fluctuations in the output voltage resulting from a temperature change for the semiconductor pressure sensor according to the present embodiment.

[0031] The offset voltages and fluctuations in output voltages resulting from temperature changes are described in the Fig. The measurement results shown in Figure 2 are presented in the form of values ​​that are normalized on the basis of the offset voltages and fluctuations in the output voltages resulting from temperature changes in the respective conventional semiconductor pressure sensors.

[0032] A conventional semiconductor pressure sensor A has the structure of the semiconductor pressure sensor disclosed in Japanese patent application publication JP H04 - 9 770 A, and a conventional semiconductor pressure sensor B has the structure of the semiconductor pressure sensor disclosed in Japanese patent application publication JP 2002 - 350 259 A.

[0033] From the in Fig. The measurement results shown in Figure 2 demonstrate that both the offset voltage and the fluctuation in the output voltage resulting from a temperature change can be suppressed in the semiconductor pressure sensor of the present embodiment compared to the conventional semiconductor pressure sensors A and B.

[0034] The method for manufacturing the semiconductor pressure sensor according to the exemplary embodiment is described below with reference to the Fig. 3 to 8 described.

[0035] First, an SOI substrate is formed, consisting of the thin silicon plate 3, the silicon oxide layer 2, and the silicon support substrate 1, as shown in Fig. 3 is shown. Subsequently, the strain gauge 4 is formed in the thin silicon plate 3 of the SOI substrate, as shown in Fig. Figure 4 shows the strain gauge 4. This strain gauge is formed by a foreign material region that diffuses from the main surface of the thin silicon plate 3 to a predetermined depth. For example, boron is used as the foreign material to form the strain gauge 4. This foreign material is introduced into the thin silicon plate 3 by thermal diffusion and ion implantation.

[0036] The insulating protective layer 5 is then formed on the main surface of the thin silicon plate 3 by plasma-CVD (chemical deposition from the vapor phase). The insulating protective layer 5 is preferably, for example, a silicon nitride layer. Subsequently, the area of ​​the insulating protective layer 5 located on the extensometer 4 is removed by etching. Thus, the extensometer 4 is exposed at the bottom surface of an opening 5a formed in the insulating protective layer 5.

[0037] The aluminum wire 6 is then formed by filling the opening 5a and partially covering the upper surface of the insulating protective layer 5. The aluminum wire 6 and the strain gauge 4 are thus electrically connected. Fig. Figure 5 shows the structure obtained by the procedure described above. Finally, the aluminum wire 6 is etched into a predetermined pattern, and the front end of the aluminum wire 6 forms an electrode connection surface (not shown). Thus, the semiconductor pressure sensor can be electrically connected to an external voltage application device via the electrode connection surface.

[0038] Subsequently, a silicon nitride layer 7 is formed on the main surface of the silicon support substrate 1 by CVD. Then, an opening 7a is formed in the silicon nitride layer 7 by plasma etching with a reactive gas, such as CF4 or CHF3. Fig. Figure 6 shows the resulting structure.

[0039] The silicon support substrate 1 is then etched through the silicon nitride layer 7, which serves as a mask. In this way, the through-hole 1a is formed in the silicon substrate 1, and the underside surface of the silicon oxide layer 2 is exposed. Fig. Figure 7 shows the resulting structure. The cross-sectional area of ​​the through-hole 1a parallel to the main surface of the silicon substrate 1 can be either square or circular. The through-hole 1a gradually narrows from the silicon nitride layer 7 to the insulating layer 2.

[0040] A wet etching process using a TMAH (tetramethylammonium hydroxide) solution and a dry etching process using gas consisting primarily of SF6 gas are suitable methods for etching the silicon support substrate 1. In each process, an etchant with a high selectivity ratio of the silicon support substrate 1 to the silicon nitride layer 7 and the silicon oxide layer 2 is used. In other words, an etchant is used that exhibits a very high etch rate for the silicon substrate 1 compared to the etch rates for the silicon nitride layer 7 and the silicon oxide layer 2.

[0041] Then, the silicon oxide layer 2 is dry-etched in such a way that a depression 2a is formed in the silicon oxide layer 2, as shown in Fig. Figure 8 shows that reactive ion etching using a reactive gas, such as CH4 or CHF3, or ion milling using argon is suitable for this dry etching process.

[0042] While the cross-sectional shape of the silicon oxide layer 2 obtained by dry etching varies depending on the gas pressure and substrate preload during etching as well as on the substrate inclination, the silicon oxide layer 2 is generally in the Fig. The cross-sectional shape shown in Figure 1 is formed. In other words, the silicon oxide layer 2 gradually becomes thinner from the peripheral region towards the central region of the membrane 23, so that the depression formed in the silicon oxide layer 2 is part of an essentially spherical surface.

[0043] If, on the other hand, the silicon oxide layer 2 is subjected to a wet etching process with hydrofluoric acid, the silicon oxide layer 2 is formed with a cross-sectional shape as shown in Fig. 9 is shown. In other words, the silicon oxide layer 2 extends essentially with a constant thickness parallel to the thin silicon plate 3. In this case, the effect of suppressing the measurement error resulting from the offset voltage and the measurement error resulting from a temperature change is more difficult to achieve than in the case where the depression 2a is formed by dry etching.

[0044] The silicon nitride layer 7 is then removed, and the glass substrate 8 is attached to the lower surface of the silicon support substrate 1 by anodic bonding to produce the absolute pressure sensor. In this way, the following is obtained: Fig. The structure is shown in Figure 1. While the silicon nitride layer 7 does not necessarily need to be removed, the reliability of the bond between the silicon support substrate 1 and the glass substrate 8 is improved if the silicon nitride layer 7 is not present in the anodic bond between the silicon support substrate 1 and the glass substrate 8. A wet etching process using a hot phosphoric acid solution is a suitable method for removing the silicon nitride layer 7.

[0045] The relationship between the sum of the offset voltage and the fluctuation in the output voltage resulting from a temperature change, and the etching time for the silicon oxide layer are in Fig. 10 illustrated. In the graphical representation of the Fig. 10. The conventional semiconductor pressure sensor with the absolutely unetched silicon oxide layer, i.e. the semiconductor pressure sensor disclosed in the Japanese patent application publication JP 2002 - 350 259 A, is used for reference purposes.

[0046] In particular, the offset voltage, which is normalized to the offset voltage of the semiconductor pressure sensor disclosed in Japanese patent application publication JP 2002 - 350 259 A, and the fluctuation of the output voltage resulting from a temperature change, which is normalized to the fluctuation of the output voltage resulting from a temperature change of the semiconductor pressure sensor disclosed in Japanese patent application publication vJP 2002 - 350 259 A, are used.

[0047] As described above, the measurement error of the semiconductor pressure sensor is suppressed to the extent that the offset voltage and the fluctuations in the output voltage resulting from a temperature change become smaller. When evaluating using the aforementioned graphical representation of the Fig. 10, the measurement error of the semiconductor pressure sensor is thus suppressed to the extent that the sum of the normalized offset voltage and the normalized fluctuation of the output voltage resulting from a temperature change becomes smaller.

[0048] Out of Fig. It is evident from Figure 10 that the measurement error of the semiconductor pressure sensor tends to increase when the etching time for the silicon oxide layer 2 becomes excessively long. This tendency occurs because the silicon oxide layer 2 is completely removed from the central area of ​​the membrane 23, and the lower surface of the thin silicon plate 3 is exposed when the etching time is excessively long. The for the in Fig. The evaluation shown in Figure 10 uses silicon oxide layer 2, which has a thickness of 0.5 µm in the unetched state.

[0049] Out of Fig. It is also evident from Figure 10 that the effect of suppressing the measurement error in the semiconductor pressure sensor is achieved when the silicon oxide layer 2 remains along the lower surface of the membrane 23, although the etching time for the silicon oxide layer 2 until the thin silicon plate 3 is exposed varies when the thickness of the silicon oxide layer 2 changes in the central region of the membrane 23. To achieve the effect described above, the silicon oxide layer 2 can therefore remain over the entire lower surface of the membrane 23.

[0050] Also, from Fig. 10. It is evident that the effect of suppressing the measurement error in the semiconductor pressure sensor is not achieved when the etching time approaches zero, i.e., when the silicon oxide layer 2 is hardly etched but remains in the state in which it is formed as a component of the SOI substrate.

[0051] Subsequently, a quantitative evaluation was performed regarding the thickness distribution of the silicon oxide layer 2. In relation to the thickness of the silicon oxide layer 2, it is assumed that Tmax represents the maximum thickness and Tmin represents the minimum thickness.

[0052] Furthermore, it is assumed that A is the distance between an end 2b of the region where the thickness of the silicon oxide layer 2 has the maximum value Tmax, and a point 2c where the thickness of the silicon oxide layer 2 has the value (Tmax + Tmin) / 2, as described in Fig. 11 is shown.

[0053] Fig. Figure 12 illustrates the relationship between the A / Tmax ratio of the distance A with respect to the maximum value Tmax and the sum of the offset voltage and the fluctuation of the output voltage resulting from a temperature change. During the measurement to determine the in Fig. In the results shown in 12, the amount of removed silicon oxide layer 2 is determined to a silicon oxide layer removal rate that is in Fig. 10 corresponds to an etching time of 4 minutes, and only the shape of the thickness distribution of the silicon oxide layer 2 is changed.

[0054] When evaluating using the graphical representation of the Fig. 12 A semiconductor pressure sensor with the structure before etching the silicon oxide layer 2 of the semiconductor pressure sensor according to the present embodiment, i.e. the structure disclosed in the Japanese patent application publication JP 2002 - 350 259 A, is used as a reference.

[0055] In particular, the sum of the offset voltage, normalized to the offset voltage of the semiconductor pressure sensor with the structure disclosed in Japanese patent application JP 2002 - 350 259 A, and the fluctuation in the output voltage resulting from a temperature change, normalized to the fluctuation in the output voltage of the semiconductor pressure sensor with the structure disclosed in Japanese patent application JP 2002 - 350 259 A, is used as an index that indicates the characteristic of the semiconductor pressure sensor.

[0056] Out of Fig. 12 It is evident that the aforementioned effect of suppressing the measurement error is sufficiently achieved if such conditions are met that the silicon oxide layer 2 remains along the entire area of ​​the underside of the membrane 23 and A / Tmax is at least 5. It is also evident from Fig. 12 to see that the aforementioned effect of suppressing the measurement error is essentially reduced linearly when A / Tmax is less than 5.

[0057] In the aforementioned semiconductor pressure sensor with the silicon oxide layer 2 with the in Fig. In the cross-sectional shape shown in Figure 9, i.e., in the semiconductor pressure sensor with the depression 2a formed by wet etching in the silicon oxide layer 2, A / Tmax is reduced to less than 5. The aforementioned effect of suppressing the measurement error in the semiconductor pressure sensor is therefore difficult to achieve.

[0058] According to the semiconductor pressure sensor of the present embodiment, as described above, the silicon oxide layer 2, in which the thickness distribution decreases continuously from the peripheral region towards the central region of the membrane 23, is formed along the membrane 23, while the silicon oxide layer 2 remains over the entire area of ​​the underside of the membrane 23, so that both the offset voltage and the fluctuation of the output voltage resulting from a temperature change can be suppressed.

[0059] While the measurement error of the semiconductor pressure sensor is suppressed even in the case described above, where the maximum value Tmax of the thickness of the silicon oxide layer 2 is greater than 2 µm, the absolute value of the offset voltage before etching the silicon oxide layer 2 increases compared to the case where the maximum value Tmax of the thickness of the silicon oxide layer 2 is no more than 2 µm.

[0060] In this case, it is difficult to match the absolute value of the offset voltage to the absolute value of the offset voltage of the semiconductor pressure sensor, which is provided with a thin silicon oxide layer 2. For this reason, the maximum value Tmax of the thickness of the silicon oxide layer 2 should preferably not exceed 2 µm.

[0061] As in Fig. As shown in Figure 13, the width of the recess 2a is preferably larger than the width of the through-opening 1a in the cross-sectional shape. In other words, the peripheral region of the recess 2a is preferably arranged outside beyond the peripheral region of the through-opening 1a. In particular, the semiconductor pressure sensor preferably has an undercut region UC that extends outwards from the periphery of the through-opening 1a between the silicon support substrate 1 and the insulating layer 2, as shown in Figure 13. Fig. 13 is shown.

[0062] At the in Fig. The undercut amount UCA shown in Figure 13 represents the distance between the periphery of the through-hole 1a and the periphery of the recess 2a. Accordingly, the result is that the dielectric breakdown voltage of the membrane is improved, as shown in Figure 13. Fig. 14 is shown.

[0063] Although it is not yet clear at the current point of view why such a result is obtained, it is thought that this is due to the fact that the stress concentration caused in the silicon oxide layer 2 is weakened.

[0064] Considering the wet or dry etching process used to etch the silicon oxide layer at this stage, the maximum undercut amount UCA is preferably approximately 10 µm. It has been confirmed that the dielectric breakdown voltage is improved when the undercut amount UCA is no more than 10 µm, as shown in Fig. 14 is illustrated. REFERENCE MARK LIST 1 Semiconductor substrate 1a Through opening 2 Silicon oxide layer or insulating layer 2a Advanced 3 thin silicon plates 4 strain gauges 5 insulating protective layer 5a Opening 6 aluminum wire 7 Silicon nitride layer 7a Opening 8 Glass substrate Room 10 23 Membran

Claims

[1] Semiconductor pressure sensor comprising: a semiconductor carrier substrate (1) provided with a through-hole (1a) extending in the thickness direction of the semiconductor carrier substrate (1); a thin semiconductor plate (3) arranged on the semiconductor carrier substrate (1); and an insulating layer (2) which gradually becomes thinner from the peripheral region towards the central region of a membrane (23), which is arranged between the semiconductor carrier substrate (1) and the thin semiconductor plate (3) and which has a recess (2a) on the side facing the through-opening (1a), wherein the insulating layer (2) becomes thinner from the edge of the through-opening (1a) towards the central region of the membrane (23) and the insulating layer (2) has a constant thickness in the remaining region, where A / Tmax is at least 5, where A is the distance between one end (2b) of a region in which the thickness of the insulating layer (2) is Tmax, and a position (2c) at which the thickness of the insulating layer (2) reaches the value (Tmax + Tmin) / 2, where Tmax represents the maximum value of the thickness of the insulating layer (2) and Tmin represents the minimum value of the thickness of the insulating layer (2). [2] A semiconductor pressure sensor according to claim 1, wherein the maximum value Tmax of the thickness of the insulating layer (2) is not more than 2 µm. [3] A semiconductor pressure sensor according to claim 1, wherein the peripheral portion of the recess (2a) is located outwardly beyond the peripheral portion of the through hole (1a). [4] A method for manufacturing a semiconductor pressure sensor, the method comprising the following steps: - producing an intermediate structure comprising a semiconductor carrier substrate (1), an insulating layer (2) provided on the semiconductor carrier substrate (1) and a thin semiconductor plate (3) formed on the insulating layer (2); - producing a through-opening (1a) extending in the thickness direction of the semiconductor carrier substrate (1) in the semiconductor carrier substrate (1); and - producing a recess (2a) by one-sided dry etching of the insulating layer (2) to form an insulating layer (2) which becomes thinner from the edge of the through-opening (1a) towards the central region of a membrane (23), while the insulating layer (2) retains a constant thickness in the remaining region, wherein A / Tmax is at least 5, wherein A represents the distance between an end (2b) of a region in which the thickness of the insulating layer (2) is Tmax and a position (2c) at which the thickness of the insulating layer (2) reaches the value (Tmax + Tmin) / 2, wherein Tmax represents the maximum value of the thickness of the insulating layer (2) and Tmin represents the minimum value of the thickness of the insulating layer (2). [5] The method according to claim 4, wherein the peripheral portion of the recess (2a) is arranged in a step of forming the recess (2a) in the insulating layer (2) so as to be located outwardly beyond the peripheral portion of the through-hole (1a).

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