Method and device for differential communication

Abstract

Device for differential communication (12), comprising: central logic (20); a differential transmitter (16, 24, 28) coupled to the central logic (20); and a differential receiver (18, 22, 26) coupled to the central logic (20), the differential receiver (18, 22, 26) comprising: (a) a comparator (52) having a differential input (58) for a waveform and operable to derive waveform domain information; (b) a filter (54) adapted to remove noise from the waveform using the waveform range information, wherein the filter (54) is implemented as a state machine comprising an idle state, a strong high state, a falling state, a falling state, a strong low state, a rising state, and a rising state; and (c) an adaptive sampler (56) adapted to adjust a sampling point of the signal waveform after it has been filtered.

Description

Field of InterestThis invention relates generally to differential communication devices, such as UARTS, and more particularly to differential communication devices used in spurious and / or high voltage environments.BackgroundA battery-electric vehicle, or a BEV (Engl. Battery Electric Vehicle) is a type of electric vehicle (EV) that uses chemical energy stored in rechargeable electric car batteries (EVBs), also known as "battery packs" and "traction batteries.". Instead of (or in addition to) internal combustion engines, BEVs use electric motors and drive controls for the drive. An electric vehicle that is exclusively battery-powered, or pure electric vehicle, draws all of its energy from its battery packs, while a hybrid electric vehicle that can be charged to a power outlet draws a portion of its energy from its battery packs and a portion of its energy from an internal combustion engine.Battery pack designs for electric vehicles (EVs) are complex and vary greatly depending on the manufacturer and specific application. However, all include a combination of several mechanical and electrical component systems that perform the necessary basic functions of the pack. Furthermore, battery packs include many individual cells connected in series and in parallel to meet the pack's requirements for total voltage and current. Battery packs may contain several hundred individual cells.To facilitate manufacture and assembly, the large stack of cells is typically divided into smaller stacks called modules. Several of these modules are arranged in a single pack. Within each module, the cells are welded together to complete the electrical path for current flow. Modules may also include coolers, temperature monitors, and other devices. Using a battery management system, or "BMS", in most cases modules also allow monitoring of the voltage generated by each battery cell in the stack. The battery pack also includes a variety of other sensors, such as temperature and current sensors, monitored by the BMS. The BMS may also be responsible for communicating with the world outside the battery pack.Generally, a plurality of battery management systems are located in a battery electric vehicle. These systems may include a printed circuit board with discrete and / or integrated circuits and provide a number of sensor and communication protocols. In particular, battery management systems typically digitally communicate with a master battery controller and may communicate with other battery management systems.Digital communication in the harsh environment of a battery electric vehicle may be problematic. For example, common mode voltages of a few tens of volts may be present between different parts of the system. Since digital communication typically uses much lower voltages, the common mode voltages may pose a problem. In addition, the environment of the battery electric vehicle may generate very high frequency noise, e.g., 100 MHz and higher, which may interfere with the logic of a BMS.Due to the problems of differential communication in interfering environments, Manchester encoding is sometimes used. However, prior art methods for decoding Manchester encoded data are themselves susceptible to errors due to a number of factors including oscillator mismatches between transmitting and receiving devices. Disclosures relevant for the present invention can be found, for example, in the documents US 2010 / 0 246 657 A1, US 2006 / 0 071 691 A1, US 2011 / 0 310 947 A1, U.S. Pat. No. 6,650,149 B1, U.S. Pat. No. 5,136,580 A, US 2009 / 0 052 559 A1 and U.S. Pat. No. 5,659,273 A. US 2010 / 0 246 657 A1 discloses circuits and methods for adaptive frequency compensation in a serial receiver having a differential signal connection channel. A receiver includes a linear equalization function. A data recovery circuit receives frequency compensated analog signals. A digital feedback control circuit monitors the digital outputs. A digital filter generates control signals for modifying the equalization in a feedback loop. Receiver and equalization function are automatically and adaptively adjusted. US 2006 / 0071 691 A1 discloses methods for guiding buffered reference clock signals to a plurality of input / output cells (I / O) of an integrated circuit. Some or all of the I / O cells include optimized clock distribution resources for high frequency, low jitter clock signals. Spatially adjacent I / O cells are automatically connected and form an optimized clock distribution infrastructure. This modular approach facilitates the combination of I / O cells with other I / O cells and other circuit types. US 2011 / 0 310 947 A1 discloses systems and methods for adapting and optimizing an equalizer in a receiver. The adjustment is made by modifying equalizer parameters. Initially, robust initial values are determined. An iterative adjustment further optimizes the parameters. A clock and data recovery circuit detects early and late data transitions. The parameters are adjusted so that the ratio of these transitions corresponds to a desired value. U.S. Pat. No. 6,650,149 B1 discloses a fail-safe circuit for a differential receiver which can tolerate interference signals. A latch is activated when both differential inputs are above a reference voltage. An offset amplifier sets the latch and signals the fail safe state. Pull-up resistors pull the inputs to Vcc in the event of an open fault. The latch remains set even in common mode noise to prevent premature deactivation. US 5 136 580 A discloses an apparatus and method for detecting and filtering source and destination addresses in a local area network (LAN). A LAN bridge connects remote LANs and includes a LAN controller interface, a microprocessor, a state machine, and content addressable memories. Received packets are analyzed and the source address is compared to a dynamic address table. Packets with known destination addresses remain on the local LAN, others are forwarded. US 2009 / 0 052 559 A1 discloses a signal transmitter for reducing the energy consumption. A differential transmitter block outputs fixed logic signals and disconnects terminating resistors in the open circuit state. A differential receiver block includes a comparator that outputs a logic signal based on the input signals. An operating state detector detects the open state when a predetermined time period is reached, and controls switches for disconnecting the terminating resistors at the receiving side. US 5 659 273 A discloses a termination device for differential transmission lines, such as unshielded twisted pair cables (UTP). It serves to isolate a connected device from electromagnetic interference in the form of common mode and differential mode noise. An electromagnetic interference isolator includes a common mode and differential mode termination device, a common mode choke with constant impedance over a wide bandwidth, and a center tapped isolation transformer.SummaryVarious examples are set forth herein for purposes of illustrating various combinations of elements and flows within the scope of the disclosures of the specification and the drawings. In addition, other combinations of elements and sequences, as well as variations thereof, are supported herein, as will be apparent to those skilled in the art.An example and not limitation differential communication device includes central logic, a differential transmitter coupled to the central logic, and a differential receiver coupled to the central logic. Preferably, the differential receiver comprises a comparator having a differential input for a waveform and operable to derive waveform range information, a filter operable to remove noise from the waveform using the waveform range information, and an adaptive sampler operable to adjust a sampling point of the waveform after it has been filtered. The differential communication apparatus may further include a second differential transmitter coupled to the central logic and a second differential receiver coupled to the central logic: and a comparator having a differential input for a waveform and operable to derive waveform range information, a filter operable to remove noise from the waveform using the waveform range information, and an adaptive sampler operable to adjust a sampling point of the waveform after being filtered.A differential communication system, by way of example and not limitation, includes a first differential communication device including a differential transmitter, a differential isolator physically separated from the first differential communication device and having a differential input coupled to a differential output of the first differential transmitter, and a second differential communication device physically separated from the first differential communication device and the differential isolator. In one embodiment, the second differential communication device includes a differential receiver including a differential input coupled to a differential output of the differential isolator and receptive to a received waveform, a comparator operable to derive waveform range information from the received waveform, a filter operable to remove noise from the received waveform using the waveform range information, and an adaptive sampler operable to adjust a sampling point of the received waveform after being filtered.An example, and not by way of limitation, of a differential communication method includes transmitting a digital waveform from a first differential communication device to a physically separate second differential communication device via an isolator that is physically separate from both the first differential communication device and the second differential communication device, obtaining waveform range information regarding the digital waveform in the second communication device, filtering to remove noise from the digital waveform using the waveform range information, adjusting a sampling point of the digital waveform after the digital waveform has been filtered. In one embodiment, the digital waveform includes a preamble sequence that is not Manchester encoded, a Manchester encoded portion, and a non-Manchester encoded stop sequence.An advantage of embodiments is that a differential communication method and apparatus providing common mode voltage isolation between communication devices is provided.Another advantage of embodiments is that a differential communication method and apparatus are provided that work well in applications where electrical noise is widely used.Another advantage of embodiments is that a differential communication method and apparatus are provided that improve the decoding of Manchester encoded waveforms.These and other examples of combinations of elements and sequences supported herein, as well as their advantages, will be apparent to those skilled in the art upon reading the following descriptions and analyzing the various figures of the drawing.Brief Description of the DrawingsSeveral examples will now be described with reference to the drawings, wherein like elements and / or operations are provided with like reference numerals. The examples are intended to be illustrative and not limiting of the concepts disclosed herein. The following are shown: FIG. 1 is a block diagram of an example of a differential communication system; FIG. 2 is a circuit diagram of an example of a differential isolator of the differential communication system of FIG. 1 ; FIG. 3 is a block diagram of an example of a differential receiver of FIG. 1 ; FIG. 4 is a circuit diagram of an example of a comparator of FIG. 3 ; FIG. 5 is a diagram showing an example of a digital waveform received from the comparator of FIG. 4; FIG. 6 is a state diagram of an example of a filter of FIG. 3 ; FIG. 7 is a diagram of examples of Manchester encoded waveforms; FIG. 8 is a state diagram of an example of an adaptive filter of FIG. 3 ; FIG. 9 is a table illustrating an operation of the adaptive filter of FIG. 8; and FIG. 10 is a diagram of a non-Manchester encoded preamble sequence and a non-Manchester encoded stop sequence.DESCRIPTION OF EMBODIMENTSThis application claims the benefit of priority to U.S. Patent Nos. 61 / 587,108, 61 / 587,113, and 61 / 587,122, filed January 16, 2012, which are incorporated herein by reference.FIG. 1 is a block diagram of an example, and not limitation, differential communication system 10 that includes a plurality of physically separate differential communication devices 12A, 12B, 12C, and 12D. In this illustration, differential communication device 12A is a host device that includes a processor 14, a differential transmitter Tx 16, and a differential receiver Rx 18. Differential communication devices 12B and 12C are configured as intermediate devices, and differential communication device 12D is configured as a terminal device. The host device 12A communicates with the digital communication devices 12B, 12C, and 12D in both the upstream direction (from the host) and the downstream direction (toward the host). For example, the differential communication system 10 may be for a battery monitoring system in which the digital communication devices 12B, 12C, and 12D are associated with physically separate battery monitoring devices disposed around the battery pack. The number of differential communication devices may vary depending on the application, but it will always comprise at least two devices.In this non-limiting example, each of the differential communication devices 12B, 12C, and 12D includes logic 20, a first receiver RXL 22 coupled to the logic 20, a first transmitter TXU 24 coupled to the logic 20, a second receiver RXU 26 coupled to the logic 20, and a second transmitter TXL 28 coupled to the logic 20. As discussed below, the second receiver 26 may or may not be used to receive downstream communication traffic.With continued reference to FIG. 1, differential isolators 30 may be provided between a transmitter of a differential communication device and a receiver of an adjacent differential communication device in a non-limiting example. In this embodiment, the differential isolators are physically separated from the differential communication devices and provide protection against coupling of high common mode voltages and transients from one differential communication device to another. As explained in this figure, the differential isolators 30 are provided between the transmitters and receivers of adjacent digital communication apparatuses in the upstream data path. When the transmitter and receivers of adjacent devices are used for digital communication for downstream communication traffic, differential isolators 30' are used.The differential communication system 10 illustrates multiple downstream paths for communication traffic returning to the host device 12A. For example, the differential communication terminal device 12D may be configured with an internal return path 32A or an external return path 32B between a transmitter TXU 24 and a receiver RXU 26. In these examples, differential isolators 30' are preferably included on the downstream data path to provide downstream isolation between adjacent differential communication devices. Alternatively, an external return path 32C may be used as a downstream data path between the transmitter TXU 24 of the differential communication device 12D and the receiver RX 18 of the (host) differential communication device 12A, preferably via an isolator 30". In this embodiment, insulators 30' may be omitted.FIG. 2 is an example and not limitation circuit diagram of isolator 30 of the differential communication system of FIG. 1 In this example, isolator 30 includes differential input 33 that includes a pair of inputs V p and V N. A first node of a DC blocking capacitor 34 is coupled to the differential input V p and a first node of a second DC blocking capacitor 36 is coupled to the differential input V N. Second nodes of the blocking capacitors 34 and 36 are coupled together via the series connection of resistors 38 and 40 having a common node connected to ground. Second nodes of blocking capacitors 34 and 36 are also connected to first nodes of resistors 42 and 44, whose second nodes are coupled together via the series connection of capacitors 46 and 48 having a common node connected to ground. A differential output 50 is provided which is isolated from the common mode voltages and transients of the differential inputs V P and V N. It will be appreciated that the isolator 30 blocks DC components of the differential input signal and its R / C network helps attenuate the very high frequency components ("high frequency noise").FIG. 3 is an example and not limitation block diagram of a differential receiver 22 of FIG. 1. in this example, the differential receiver 22 includes a comparator 52, a filter 54, and an adaptive sampler 56. in this example, the comparator 52 is coupled to the differential output 50 of the isolator 30 and serves to provide reference voltages used in filtering an incoming waveform. Filter 54 is used to remove noise from the waveform and adaptive sampler 56 samples the waveform to detect transitions.FIG. 4 is an example and not limitation block diagram of a comparator 52 of FIG. 3 In this example, the comparator 52 includes a differential input 58 having a pair of differential input nodes 60 and 62 coupled to the differential output 50 of the isolator 30 (see FIG. 2 ). A first node of a resistor 64 is coupled to the differential input node 60 and a first node of a resistor 66 is coupled to the differential input node 62. Second nodes of the resistors 64 and 66 are coupled to each other via the series connection of a capacitor 68 and a capacitor 70. A node between capacitors 68 and 70 is coupled to ground. The second nodes of resistors 64 and 66 are coupled to first nodes of resistors 72 and 74, respectively. Second nodes of the resistors 72 and 74 are coupled to each other via the series connection of resistors 76 and 78. An internal positive voltage (VIP) and an internal negative voltage (VIN) are respectively produced at the second node of the resistors 72 and 74, and an internal common mode voltage (VCMI) is produced at a node between the resistors 76 and 78. It is therefore apparent that the resistors and capacitors of comparator 52 provide an R / C network that attenuates both large common mode noise and smaller differential noise to enable the use of low voltage comparators to sample the differential signal (VIP-VIN). An essential purpose of this R / C network is to prevent high common mode voltages from clipping (clip) the low voltage comparators discussed below.The comparator example 58 of FIG. 4 further includes a number of low voltage comparators, including a positive comparator 80, a middle comparator 82, and a negative comparator 84. In this non-limiting example, a positive input of positive comparator 80 and a positive input of middle comparator 82 are coupled to VIP. Also, in this example, a negative input of the negative comparator 84 and a negative input of the middle comparator 82 are coupled to VIN. As still further examples, a negative input of positive comparator 80 is coupled to VINvia a first offset voltage source Voff 86, and a positive input of negative comparator 84 is coupled to VIPvia a second offset voltage source Voff 88. Positive comparator 80 has an output OPOS, middle comparator 82 has an output OMID, and negative comparator has an output ONEG.FIG. 5 is a diagram of an example of a digital waveform 90 received from the comparator of FIG. 4; in this example, the digital waveform 90 moves in amplitude from +Vdd to -Vdd with a rest position (idle state) being approximately zero (0) volts. The comparator outputs OPOS, OMID and ONEG subdivide the diagram into 4 regions which are marked A, B, C and D.In this embodiment it is obvious that VIP = VIN =VCMI when no signal is present and that when a signal is present the comparators "respond" as follows:Voffmay be about 140 mV (based on a 3.3 V / 24 attenuation network) in this non-limiting example.Using these four regions, it is possible to obtain seven (7) valid states from a waveform. Seven states are advantageous in that it is helpful in detecting 0 / 1 and 1 / 0 changes and in detecting errors (e.g., detecting 2 states that may not be present simultaneously). In this non-limiting example, OPOS is set to approximately Vdd / 2 by the first offset voltage source 86 and ONEEG is set to approximately -Vdd / 2 by the second offset voltage source 88.It should be noted that the signal waveform 90 has a noise N. This noise could possibly cause an error in determining the voltage level of waveform 90. By providing the four regions A, B, C and D, what is the actual value of the waveform at a particular sampling point can be determined more accurately.The filter 54 of a differential receiver 22 operates to filter the waveform and remove, for example, the noise N shown in Fig. 5. The filter 54 may be implemented by a state machine in this non-limiting example, as will be appreciated by those skilled in the art. Other forms of filters are also suitable.FIG. 6 is an example, and not limitation, state diagram 92 of a state machine implementation of the filter 54 (see FIG. 3 ). In this example, there are seven different states labeled IDLE, STRONG HIGH, FALLING, FELL, STRONG LOW, RISING, and ROSE. The labels A, B, C, and D correspond to the regions A, B, C, and D of FIG. 5. each of the states has been assigned a four-bit arbitrary code, although in other embodiments a three-bit code may suffice (for seven states).Referring to both Figs. 5 and 6, the waveform example 90 starts in an idle state and remains in this state as long as the signal is in the B or C region. When the signal moves into the region D, the waveform is in the STRONG HIGH state.When the signal moves to the region C, the state changes to FALLING. Next, when the signal moves to the region B, it moves to the FIELD state, and when the signal moves to the region A, it reaches the STRONG-LOW state. The state machine of filter 54 continues this process to generate a clean, substantially noise-free variant of the waveform.The conveyed waveform (e.g., waveform 90 of FIG. 5 ) encodes data and other information in digital form. For example, Manchester encoding may be used. As known to those skilled in the art, Manchester encoding (also known as "phase encoding" or "PE") is a line code in which the encoding of each data bit comprises at least one transition and takes the same time. Therefore, it does not have a DC component and is clock-recovering, which means that it can be inductively or capacitively coupled and that a clock signal can be recovered from the encoded data. However, other forms of coding may also be used if the characteristic waveform does not contain a DC component, as is known to those skilled in the art.FIG. 7 is a diagram of examples of Manchester encoded waveforms. To decode the waveforms, the differential receiver 22 takes a number of samples when it awaits the presence of a particular state or "bit". If the differential receiver 22 takes the samples at incorrect time, an error may occur. For example, three waveforms 94, 96 and 98 in Figure 7 illustrate normal, slow and fast transmitted versions of the same Manchester encoded signals. As mentioned, sampling errors may occur in the SLOW TX waveform 96 and the FAST TX waveform 98.FIG. 8 is an exemplary, and not limiting, state diagram 100 of a state machine for the adaptive sampler 56 that uses the safe transition between even and odd bits of a Manchester encoded waveform to continuously synchronize the UART byte again, thereby enabling increased oscillator mismatch tolerance. The state machine starts in the NORMAL state. When adaptive sampler 56 detects an early edge, it transitions to state MINUS_1. If another early edge is detected, it transitions to the MINUS_2 state and so on. Detecting a late edge in the MINUS_1 state causes it to transition back to the STATE NORMAL state. Similarly, the process transitions to a PLUS_1 state when a late edge is detected in the STATE NORMAL state, and so on. The state machine of the adaptive sampler 100 can therefore adjust the sampling point of the received Manchester encoded waveform by ±3 sampling clock cycles to provide adaptive sampling of the waveform.The non-limiting method example of the adaptive sampler 56 may also be explained as follows with reference to both Figs. 7 and 8. The central sampling of bit n is 4 + 8*n clock cycles after the start edge in a conventional sampling method in a system with an 8-fold sampling clock (e.g. 2 Mbps system clock & 16 MHz sampling clock). Scanning the adaptive scanner 56 adjusts the center scan by a maximum of 4 + 8*n + / - 3. In the case of a slow transmitter oscillator, the sampling of the last stop bit (@ clock 84) is typically the error location that results in sampling of the parity bit during the stop time. The adaptive sampling can be adjusted even until clock 87, which provides a better way to sample the received stop bit correctly. In the case of a fast transmitter oscillator, the sampling of the last parity bit (@ clock 76) is typically the error location that results in a sampling of the stop bit during the parity time. The adaptive sampling can be adjusted even until clock 73, which provides a better way to sample the received parity bit correctly.FIG. 9 is a table illustrating a function of the adaptive filter of FIG. 8 and showing a comparison of an oscillator mismatch tolerance of conventional left side sampling versus adaptive sampling described above. It will be appreciated that adaptive sampling is a substantial improvement over conventional sampling methods.FIG. 10 is a diagram of a non-Manchester encoded preamble sequence 102 and a non-Manchester encoded stop sequence 104, according to a non-limiting example. As explained above, Manchester encoding has certain advantages in, for example, disruptive electrical environments. These individual non-Manchester encoded bytes function as delimiters between packet instruction sequences that eliminate the need for idle phase, or as other signal restrictions for initializing and ending instructions. This allows the host to transmit continuous streams of data that may contain an unlimited number of commands, or alternatively allows the host to transmit arbitrary idle phases within a single command.Preamble sequence 102 includes a series of pulses, each high / low time lasting 1 bit, followed by a 3-bit low phase and a 3-bit high phase. An independent state machine may be ordered to monitor all incoming data for this sequence and resynchronize a UART byte on this sequence. In this way, the host can send a continuous stream of data and recover from any synchronization errors in the UART bytes. This pattern can also be used to determine the baud rate (in powers of 2 of a base baud rate) of the incoming waveform after receiving only a single byte.Stop sequence 104 is a Manchester "error" between bits 0 & 1 of a UART byte. By placing the Manchester error as early as possible in the byte, the device can switch from read mode to write mode with the minimum receiver-to-transmitter latency (2 bits). In one embodiment, Manchester encoded data is combined with even parity bits and 2 stop bits to produce a byte (waveform) of 6 high bits + 6 low bits. This DC balanced waveform allows capacitive coupling transmission without the need for a DC recovery phase.Although various examples have been described using specific terms and devices, such description is for illustrative purposes only. The words used are words of description rather than limitation. It should be understood that changes and modifications may be made by those skilled in the art without departing from the spirit and scope of any examples described herein. It will also be appreciated that aspects of various other examples may be interchanged, either fully or partially. It is therefore intended that the claims presented herein and below be interpreted in accordance with their true spirit and scope and without limitation or limitation.

Claims

A differential communication apparatus (12) comprising: central logic (20); a differential transmitter (16, 24, 28) coupled to the central logic (20); and a differential receiver (18, 22, 26) coupled to the central logic (20), the differential receiver (18, 22, 26) having: (a) a comparator (52) having a differential input (58) for a waveform and operable to derive waveform domain information; (b) a filter (54) capable of removing noise from the waveform using the waveform range information, the filter (54) being implemented as a state machine including an idle state, a strong high state, a falling state, a fell state, a strong low state, a rising state, and a rising state; and (c) an adaptive sampler (56) capable of adjusting a sampling point of the waveform after being filtered.The differential communication device (12) of claim 1, wherein the comparator (52) includes a resistive divider that includes a positive input voltage (VIP), a negative input voltage (VIN), and a common mode input voltage (VCMI).The differential communication device (12) of claim 2, wherein the comparator (52) comprises a positive comparator (80), a middle comparator (82), and a negative comparator (84).The differential communication device (12) of claim 3, wherein a positive input of the positive comparator (80) and a positive input of the middle comparator (82) are coupled to VIP.The differential communication device (12) of claim 4, wherein a negative input of the negative comparator (84) and a negative input of the middle comparator (82) are coupled to VIN.The differential communication device (12) of claim 5, wherein a negative input of the positive comparator (80) is coupled to VIN via a first offset voltage source (86).The differential communication device (12) of claim 6, wherein a positive input of the negative comparator (84) is coupled to VIP via a second voltage source (88).The differential communication device (12) of claim 1, wherein the waveform comprises a Manchester encoded portion.The differential communication apparatus (12) of claim 8, wherein the waveform further comprises a preamble sequence that is not Manchester encoded and a stop sequence that is not Manchester encoded.The differential communication apparatus (12) of claim 1, wherein the differential transmitter (16, 24, 28) is a first differential transmitter (16, 24, 28) and the differential receiver (18, 22, 26) is a first differential receiver, the apparatus further comprising: a second differential transmitter (16, 24, 28) coupled to the central logic (20); and a second differential receiver (18, 22, 26) coupled to the central logic (20), the second differential receiver (18, 22, 26) comprising: (a) a comparator (52) having a differential input (58) for a waveform and operable to derive waveform range information; (b) a filter (54) operable to remove noise from the waveform using the waveform range information; and (c) an adaptive sampler (56) operable to adjust a sampling point of the waveform after being filtered.A differential communication system (10) comprising: a first differential communication device (12) comprising a differential transmitter (16, 24, 28); a differential isolator (30) physically separated from the first differential communication device (12) and having a differential input coupled to a differential output of the first differential transmitter; and a second differential communication device (12) physically separated from the first differential communication device (12) and the differential isolator (30), wherein the second differential communication device (12) comprises a differential receiver (18, 22, 26) having: (a) a differential input (58) coupled to a differential output of the differential isolator (30) and receptive of a received waveform; (b) a comparator (52) operable to derive waveform range information from the received waveform; (c) a filter (54) capable of removing noise from the received waveform using the waveform range information, wherein the filter (54) is implemented as a state machine including an idle state, a strong high state, a falling state, a fell state, a strong low state, a rising state, and a rising state; and (d) an adaptive sampler (56) capable of adjusting a sampling point of the received waveform after being filtered.A differential communication method comprising: transmitting a digital waveform from a first differential communication device (12) to a physically separate second differential communication device (12) via an isolator (30) physically separate from both the first differential communication device (12) and the second differential communication device (12); detecting waveform domain information regarding the digital waveform in the second communication device (12); Filtering by a filter (54) to remove noise from the digital waveform using the waveform range information, wherein the filter (54) is implemented as a state machine comprising an idle state, a strong high state, a falling state, a fell state, a strong low state, a rising state, and a rising state; and setting a sampling point of the digital waveform after the digital waveform has been filtered.The differential communication method of claim 12, wherein the digital waveform comprises a preamble sequence that is not Manchester encoded, a Manchester encoded portion, and a stop sequence that is not Manchester encoded.

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