Optoelectronic component and method for manufacturing optoelectronic semiconductor components

Abstract

Optoelectronic semiconductor device (1) with a support (5) and a semiconductor body (2) attached to the support and comprising a sequence of semiconductor layers with an active region (20) for generating and / or receiving radiation, a first semiconductor layer (21) and a second semiconductor layer (22), wherein - the active area is located between the first semiconductor layer and the second semiconductor layer; - the support is electrically conductive and is divided into a first support body (51) and a second support body (52), wherein the first support body and the second support body are electrically insulated from each other; - the first support body has a first external contact (61) of the semiconductor device on the side facing away from the semiconductor body, wherein the first contact is electrically connected to the first semiconductor layer via the first support body; and - the second support body has a second external contact (62) of the semiconductor device on the side facing away from the semiconductor body, wherein the second contact is electrically connected to the second semiconductor layer via the second support body; - the second semiconductor layer (22) is connected to the second support body (52) via a second connection layer (32); - the second connection layer has a plurality of recesses (325) in which the first semiconductor layer is connected to the first support body (51) via a first connection layer (31); and - in a top view of the semiconductor component, all recesses run within the first carrier body.

Description

[0001] The present application relates to an optoelectronic semiconductor device and a method for manufacturing optoelectronic semiconductor devices.

[0002] For optoelectronic semiconductor devices such as diodes, miniature form factors are desired for various applications, which can be easily connected and, in particular, without bond wires. Semiconductor devices with vias on their substrates can be used for this purpose. However, this approach is associated with high manufacturing costs and often low mechanical stability.

[0003] Document US 2012 / 0 074 441 A1 describes a light-emitting diode with a wafer-level package.

[0004] The publication EP 2 533 313 A2 describes a light-emitting diode of the flip-chip type.

[0005] Publication DE 10 2014 100 773 A1 concerns a semiconductor component.

[0006] The publication DE 10 2011 103 412 A1 describes a semiconductor device.

[0007] Document DE 10 2012 217 533 A1 describes a method for manufacturing an optoelectronic component.

[0008] One task is to specify an optoelectronic semiconductor device that is easy and reliable to manufacture and is characterized by high mechanical stability. Furthermore, a method for the efficient and cost-effective production of optoelectronic semiconductor devices should be specified.

[0009] These tasks are solved by a semiconductor device or a method according to the independent patent claims. Further embodiments and advantages are the subject of the dependent patent claims.

[0010] According to at least one embodiment, an optoelectronic component comprises a semiconductor body. The semiconductor body has a sequence of semiconductor layers, particularly epitaxial ones, which are produced, for example, by MOCVD or MBE.

[0011] For example, the semiconductor layer sequence includes an active region designed for generating and / or receiving radiation. This active region is located, for instance, between a first and a second semiconductor layer. The first and second semiconductor layers differ, at least in some areas, in their conduction type, such that the active region is situated within a pn junction. The first semiconductor layer, the second semiconductor layer, and the active region can each be multilayered.

[0012] According to at least one embodiment of the optoelectronic semiconductor device, the semiconductor device has a support to which the semiconductor body is attached. The support is, in particular, electrically conductive. Specifically, the support can be made of an electrically conductive material.

[0013] According to at least one embodiment of the semiconductor device, the substrate is divided into a first substrate and a second substrate. The first substrate and the second substrate are thus parts of the substrate. In particular, the first substrate and the second substrate are made of the same material. The first substrate and the second substrate are electrically isolated from each other. For example, the first substrate and the second substrate are spaced apart laterally, i.e., in a direction extending along the principal plane of the semiconductor layers of the semiconductor layer sequence.

[0014] According to at least one embodiment of the semiconductor device, the first support body has a first external contact of the semiconductor device on the side facing away from the semiconductor body. For example, the first contact is electrically connected to the first semiconductor layer via the first support body.

[0015] According to at least one embodiment of the semiconductor device, the second support body has a second external contact of the semiconductor device on the side facing away from the semiconductor body. For example, the second contact is electrically connected to the second semiconductor layer via the second support body.

[0016] The first and second contacts are provided for external electrical contacting of the semiconductor device. Specifically, both the first and second contacts are accessible for external electrical contacting from the side of the substrate facing away from the semiconductor body. The semiconductor device is specifically designed as a surface-mount device (SMD).

[0017] Both the first and second substrates are electrically conductive, allowing electrical contact of the semiconductor body for both polarities through the substrate material. Through-hole vias are therefore unnecessary.

[0018] In a top view of the semiconductor device, preferably both the first and second support bodies project beyond the semiconductor body, at least in certain areas. In particular, the first and second support bodies form, at least in certain areas, the side surface that bounds the semiconductor device in the lateral direction.

[0019] In at least one embodiment, the optoelectronic semiconductor device comprises a substrate and a semiconductor body, wherein the semiconductor body is attached to the substrate and includes a sequence of semiconductor layers with an active region for generating and / or receiving radiation, a first semiconductor layer, and a second semiconductor layer. The active region is located between the first and second semiconductor layers. The substrate is electrically conductive and is divided into a first substrate and a second substrate, the first and second substrate being electrically insulated from each other. The first substrate has a first external contact of the semiconductor device on the side facing away from the semiconductor body, the first contact being electrically connected to the first semiconductor layer via the first substrate.The second support body has a second external contact of the semiconductor device on the side facing away from the semiconductor body, wherein the second contact is electrically connected to the second semiconductor layer via the second support body.

[0020] The first contact and the second contact can each be formed as a coating on the first and second substrates, respectively. Alternatively, the first contact and the second contact can also each be areas of the first and second substrates on the side of the substrate facing away from the semiconductor body.

[0021] For example, the semiconductor body is connected to the substrate via a bonding layer, such as a solder layer or an electrically conductive adhesive layer.

[0022] According to at least one embodiment of the semiconductor device, the first support body and the second support body together cover at least 80%, preferably at least 90%, of the semiconductor device's base area in a top view. Thus, the majority of the semiconductor device's base area is formed by the electrically conductive material of the support.

[0023] According to at least one embodiment of the semiconductor device, the first support body and the second support body together cover at least 80%, preferably at least 90%, of the semiconductor body in a rear view of the semiconductor device. The higher the coverage of the semiconductor body, the more efficiently waste heat generated during operation of the semiconductor device can be dissipated from the semiconductor device.

[0024] According to at least one embodiment of the semiconductor device, the first semiconductor layer is arranged on the side of the active area facing away from the substrate. The semiconductor body has at least one recess that extends through the second semiconductor layer and the active area into the first semiconductor layer. A first contact layer is arranged in the recess and is electrically connected to the first semiconductor layer. The recess is, in particular, completely surrounded laterally by material of the semiconductor body. In other embodiments, the recess does not extend along the edge of the semiconductor body. Furthermore, the semiconductor body can also have a plurality of recesses. The first semiconductor layer, located on the side of the active area facing away from the substrate, can be electrically contacted by means of the recess.Therefore, contact elements applied to the side of the semiconductor body facing away from the support for electrical contacting the first semiconductor layer can be dispensed with.

[0025] According to at least one embodiment of the semiconductor device, the semiconductor device has a second connection layer that is electrically connected to the second semiconductor layer. In particular, the second connection layer has at least one recess in which the first semiconductor layer is connected to the first substrate via the first connection layer. For example, the recess overlaps the recess in the semiconductor substrate when viewed from above.

[0026] In particular, the second connection layer has a plurality of recesses in which the first semiconductor layer is connected to the first support body of the substrate via the first connection layer, with all recesses located within the first support body when viewed from above. The recesses are therefore arranged without overlap with the second support body.

[0027] According to at least one embodiment of the semiconductor device, the first and second support bodies are separated from each other by a dividing groove. In the vertical direction, the dividing groove extends completely through the support. Thus, the first and second support bodies do not directly abut each other at any point. For example, the dividing groove runs between two opposite faces of the support 5, in particular continuously from one face to the opposite face.

[0028] According to at least one embodiment of the semiconductor device, the separating groove is filled with an electrically insulating material. For example, the electrically insulating material contains a polymer, such as an epoxy. To adjust the coefficient of linear expansion, the electrically insulating material can be mixed with fillers. Alternatively, the separating groove can be free of solid material.

[0029] According to at least one embodiment of the semiconductor device, the substrate, in particular the first and second substrates, is metallic. For example, the substrate contains a metal or a metallic alloy or a compound with at least one metal, or consists of such a material. For example, the substrate can contain molybdenum, tungsten, copper, steel, aluminum, or iron. The substrate can also be single-layered or multi-layered. In addition to their electrical conductivity, the aforementioned materials are also characterized by high thermal conductivity, so that waste heat generated in the semiconductor body during operation can be efficiently dissipated via the substrate.

[0030] According to at least one embodiment, the substrate is matched to the semiconductor body with respect to its coefficient of thermal expansion. In particular, the coefficient of thermal expansion of the substrate deviates from that of the semiconductor body by no more than 50%. This reduces the risk of mechanical stresses due to temperature changes.

[0031] According to at least one embodiment of the semiconductor device, the semiconductor device includes a radiation conversion element. The radiation conversion element is specifically designed to at least partially convert the primary radiation generated in the active region during operation into secondary radiation with a peak wavelength that differs from the peak wavelength of the primary radiation. For example, the semiconductor device can be configured as a device that emits mixed light that appears white to the human eye during operation.

[0032] The described semiconductor device can achieve, in particular, the following effects.

[0033] The semiconductor component is characterized by high mechanical stability on the side of the semiconductor body to which the substrate is attached.

[0034] The specific arrangement of the first and second contacts on the back of the semiconductor device can be freely designed within wide limits. Customer-specific requirements can thus be easily implemented.

[0035] The electrically conductive substrate also features good thermal properties, allowing waste heat to be efficiently and over a large area.

[0036] Furthermore, the substrate can optionally be coated with a reflective layer, which efficiently deflects radiation emitted towards the substrate during operation. This reduces absorption losses at the substrate.

[0037] Due to its high mechanical stability, the support structure can also mechanically stabilize the radiation conversion element. The radiation conversion element itself therefore does not need to be mechanically stable.

[0038] Furthermore, a growth substrate is not required for the epitaxial deposition of the semiconductor layers in the semiconductor layer sequence and can be removed. A semiconductor device in which the growth substrate has been removed is also referred to as a thin-film semiconductor device. Alternatively, the growth substrate can also remain in the semiconductor device. The manufacturing step for removing the growth substrate can therefore be omitted.

[0039] According to at least one embodiment, a method for manufacturing a plurality of semiconductor devices comprises a step in which a substrate assembly with a plurality of semiconductor body mounting areas is provided. Each semiconductor body mounting area has at least one first contact surface and one second contact surface, and in each semiconductor body mounting area, a separation groove is formed in the substrate assembly between the first contact surface and the second contact surface. The semiconductor body mounting area can also have a plurality of first contact surfaces and / or a plurality of second contact surfaces. For example, the first contact surfaces and / or the second contact surfaces can be arranged in a matrix-like pattern on the substrate assembly.

[0040] The separation trench extends vertically, i.e., perpendicular to the main plane of extension of the girder assembly, completely through the girder assembly. Laterally, the separation trenches extend only partially across the girder assembly, so that they do not sever the girder assembly as a whole. In other words, the girder assembly with the separation trenches is continuous.

[0041] The carrier assembly is specifically free of electrically insulating material for electrical isolation between the first and second contact surfaces. Furthermore, the first and second contact surfaces are electrically connected to the carrier assembly.

[0042] According to at least one embodiment of the method, the method comprises a step in which a plurality of semiconductor bodies are mounted on the semiconductor body mounting areas. A first terminal surface of the semiconductor body is electrically connected to the first contact surface, and a second terminal surface of the semiconductor body is electrically connected to the second contact surface. The semiconductor body may also have a plurality of first terminal surfaces and / or a plurality of second terminal surfaces.

[0043] For example, the number of first connection surfaces equals the number of first contact surfaces, and the number of second connection surfaces equals the number of second contact surfaces.

[0044] To secure the semiconductor bodies, they are positioned relative to the semiconductor body mounting areas in such a way that, in top view, the semiconductor bodies at least partially cover the separation trench of the associated semiconductor body mounting area.

[0045] The electrically conductive connection between the contact surfaces and the connection surfaces is achieved, for example, by means of a connecting layer, such as a solder layer or an electrically conductive adhesive layer.

[0046] According to at least one embodiment of the method, the method includes a step in which the carrier assembly is separated into the semiconductor devices, each semiconductor device comprising at least one semiconductor body and a carrier with a first carrier body and a second carrier body. The first carrier body and the second carrier body are electrically isolated from each other, in particular by the separating groove. The separation of the carrier assembly thus only takes place after the semiconductor bodies have already been attached to the semiconductor body mounting areas.

[0047] The lateral surfaces that bound the beam are created, at least partially or along the entire circumference of the beam, only during the singulation of the beam assembly. Accordingly, the beams singulated from the beam assembly, in particular the first and second beams, exhibit singulation marks on their lateral surfaces, for example, due to a mechanical singulation process, a chemical singulation process, or a singulation process using coherent radiation.

[0048] According to at least one embodiment of the method, the first and second contact surfaces of the substrate are short-circuited across the substrate during the mounting of the semiconductor bodies and are electrically isolated from each other during singulation. In other words, the semiconductor bodies are mounted in such a way that the first and second contact surfaces of the semiconductor body are short-circuited. Only after singulation can the contact surfaces of the semiconductor body be electrically connected separately.

[0049] In at least one embodiment of the method, a carrier assembly with a plurality of semiconductor body mounting areas is provided, wherein each semiconductor body mounting area has at least a first contact surface and a second contact surface, and a separation groove is formed in the carrier assembly between the first contact surface and the second contact surface in each semiconductor body mounting area. A plurality of semiconductor bodies are attached to the semiconductor body mounting areas, wherein a first contact surface of the semiconductor body is electrically connected to the first contact surface and a second contact surface of the semiconductor body is electrically connected to the second contact surface.The carrier assembly is isolated into the semiconductor devices, each semiconductor device having at least one semiconductor body and a carrier with a first carrier body and a second carrier body, in which the first carrier body and the second carrier body are electrically isolated from each other by the separating trench.

[0050] The process is expediently carried out in the order of the specified manufacturing steps.

[0051] According to at least one embodiment of the method, singulation is carried out using a laser, in particular a pulsed laser. For example, a laser with a pulse duration in the picosecond range, in particular between 1 ps and 100 ps, ​​can be used.

[0052] According to at least one embodiment of the method, the semiconductor bodies are provided in a wafer array when they are attached to the semiconductor device mounting areas. A large number of semiconductor bodies can thus be simultaneously connected to their respective semiconductor mounting areas within the substrate array. The separation of the semiconductor bodies from the wafer array can only take place after the semiconductor bodies have been attached to the substrate array, and in particular simultaneously with the separation of the substrate array itself.

[0053] According to at least one embodiment of the method, the semiconductor bodies are attached to the substrate assembly separately from one another when being mounted at the semiconductor body mounting areas. Thus, the semiconductor bodies are already present in individualized form at this manufacturing step.

[0054] The described process is particularly suitable for manufacturing a semiconductor device as described above. Features described in connection with the semiconductor device can therefore also be applied to the process, and vice versa.

[0055] Further features, designs and advantages will become apparent from the following description of the exemplary embodiments in conjunction with the figures.

[0056] They show: the Fig. 1A and Fig. 1B a first embodiment of an optoelectronic semiconductor device in top view ( Fig. 1B) and associated section view ( Fig. 1A); Fig. 2 a second embodiment of an optoelectronic semiconductor device in schematic sectional view; and the Fig. 3A to 3G an embodiment of a method for the manufacture of optoelectronic semiconductor devices based on schematically depicted intermediate steps in sectional view ( Fig. 3A to 3E and 3G) and in top view ( Fig. 3F).

[0057] Identical, similar, or similarly effective elements in the figures are provided with the same reference symbols.

[0058] The figures and the relative sizes of the elements depicted within them are not to be considered to scale. Rather, individual elements, and in particular layer thicknesses, may be exaggerated for clarity and / or better understanding.

[0059] The semiconductor device 1 according to the one described in the Fig. 1A and Fig. The embodiment shown in Figure 1B comprises a semiconductor body 2 with a sequence of semiconductor layers. The sequence of semiconductor layers includes an active region 20, which is arranged between a first semiconductor layer 21 and a second semiconductor layer 22. The first semiconductor layer and the second semiconductor layer differ in their conductivity. For example, the first semiconductor layer is n-type and the second semiconductor layer is p-type, or vice versa. The first semiconductor layer, the second semiconductor layer, and the active region can each be single-layered or multi-layered. The semiconductor device is exemplified as a luminescent diode, in particular a light-emitting diode, in which the active region is designed to generate radiation. However, the semiconductor device can also be another optoelectronic device, for example, a radiation receiver.

[0060] The semiconductor body 2 is attached to a substrate 5 by means of a bonding layer 55, for example a solder layer or an electrically conductive adhesive layer. A gold-tin solder is suitable for the bonding layer.

[0061] The semiconductor body, in particular the active region, is based, for example, on a III-V compound semiconductor material, in particular a nitride compound semiconductor material.

[0062] In the present context, "based on nitride compound semiconductor material" means that the semiconductor layer sequence or at least a part thereof, particularly preferably at least the active region and / or the growth substrate, is a nitride compound semiconductor material, preferably Al x In y Ga 1-x-y N has or consists of it, where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1 and x+y ≤ 1.

[0063] This material does not necessarily have to have a mathematically exact composition according to the formula above. Rather, it may, for example, contain one or more dopants as well as additional components. For the sake of simplicity, however, the formula above only includes the essential components of the crystal lattice (Al, Ga, In, N), even though these may be partially replaced and / or supplemented by small amounts of other substances.

[0064] The support 5 is divided into a first support body 51 and a second support body 52. ​​In a top view of the semiconductor device, the first support body 51 and the second support body 52 run parallel to each other without overlapping. The first support body and the second support body are electrically isolated from each other by means of a separating groove 59. In a top view, the separating groove projects beyond the semiconductor body on two opposite side faces 23. The separating groove can be unfilled or at least partially filled with an electrically insulating filler material 590, for example, a polymer material such as an epoxy. To adjust the coefficient of linear expansion, the material used to fill the separating groove can be mixed with a filler.

[0065] The semiconductor device 1 is designed as a surface-mountable semiconductor device in which a first contact 61 and a second contact 62 for external electrical contacting of the semiconductor device are arranged on the back side 58 of the carrier 5, facing away from the semiconductor body 2. The contacting of the semiconductor device can therefore be achieved without bond wires. Furthermore, the semiconductor device itself also has no bond wire.

[0066] In a top view of the semiconductor device 1, the first support body and the second support body together cover at least 80%, preferably at least 90%, of a base area of ​​the semiconductor device.

[0067] Furthermore, in a rear view of the semiconductor device, the first and second support bodies together cover at least 80%, preferably at least 90%, of the semiconductor body. The higher the degree of coverage, the more efficiently the heat generated during operation of the semiconductor device can be dissipated via the support 5.

[0068] The carrier 5, in particular the first carrier body 51 and the second carrier body 52, are electrically conductive, in particular metallic. By applying an external electrical voltage between the first contact 61 and the second contact 62, the charge carriers can be injected through the first carrier body 51 or the second carrier body 52 into the semiconductor body 2, so that the charge carriers enter the active region 20 from different sides and recombine there by emitting radiation.

[0069] The support 5 is preferably matched to the coefficient of thermal expansion of the semiconductor body 2. Preferably, the coefficient of thermal expansion of the support deviates from the coefficient of thermal expansion of the semiconductor body by no more than 50%. Epitaxially grown nitride compound semiconductor material typically exhibits a coefficient of thermal expansion of approximately 5.59 x 10⁻⁶. -6 K -1 on.

[0070] For example, the carrier contains molybdenum.Suitable compounds include, for example, molybdenum lanthanum oxide, for example with 0.3% La₂O₃, recrystallized molybdenum lanthanum oxide (MLR), for example with 0.7% La₂O₃, stress-free lanthanum oxide (MLS), for example with 0.7% La₂O₃, incandescent lamp-grade molybdenum lanthanum oxide (MoILQ), for example with 0.03% La₂O₃, molybdenum yttrium oxide (MY), for example with 0.47% Y₂O₃ and 0.08% Ce₂O₃, molybdenum rhenium (MoRe), for example with 5% rhenium (MoRe5) or with 41% rhenium (MoRe41), and molybdenum tungsten (MoW), for example with 20% tungsten (MW20), 30% tungsten (MW30), or 50% tungsten (MW50). Molybdenum copper (MoCu), for example with 30% copper (MoCu30) or 15% copper (MoCu15), molybdenum zirconium dioxide (MoZrO2), for example with 1.7% zirconium dioxide (MZ17), molybdenum tantalum (MoTa), for example with 11% tantalum (MT11), titanium zirconium molybdenum (TZM), molybdenum hafnium carbon (MHC), molybdenum lanthanum oxide (ML), molybdenum yttrium cerium oxide (MY).

[0071] Alternatively, the substrate can contain a tungsten alloy or a copper alloy. Furthermore, the substrate can alternatively contain, for example, copper, steel, aluminum, or iron. Such a substrate can be coated, for example, with aluminum, silver, or nickel. A copper-nickel coating is particularly suitable.

[0072] Furthermore, ductile, plastically deformable metals or coatings are suitable for the substrate. Alternatively, a structured metal-plastic laminate can be used for the substrate.

[0073] In the illustrated embodiment, the carrier 5 has a coating 53 on the side facing the semiconductor body 2. The coating can, in particular, serve as a reflective layer for the radiation generated in the active region. For example, silver, nickel, and aluminum are characterized by high reflectivity in the visible spectral range. However, such a coating can also be omitted.

[0074] On the first carrier body 51, a plurality of first contact surfaces 65 are arranged on the side facing the semiconductor body 2. The first contact surfaces are spaced apart from each other in the later direction, for example in a matrix arrangement. The contact surfaces 65 are electrically connected to each other and to the first contact 61 via the first carrier body 51.

[0075] The second support body 52 has, analogously, a plurality of second contact surfaces 66 on the side facing the semiconductor body 2. In a top view of the semiconductor device 1, the first contact surfaces 65 and the second contact surfaces 66 are separated from each other by the separating groove 59. The first support body 51 and the second support body 52 each form a side surface 57 that bounds the semiconductor device 1 in a lateral direction.

[0076] The semiconductor body 2 has a plurality of first contact pads 35 on the side facing the support 5. The first contact pads 35 are electrically connected to the first semiconductor layer 21. The first contact pads 35 are spaced apart from each other in the later direction and are further arranged such that each first contact pad 35 overlaps with a first contact surface 65. Advantageously, the number of first contact pads 35 is greater than or equal to the number of contact surfaces 65 on the support 5.

[0077] The semiconductor body 2 has a plurality of recesses 27 that extend through the second semiconductor layer 22 and the active region 20 into the first semiconductor layer 21. In each recess, the first semiconductor layer 21 is connected to one of the first contact surfaces 35 via a first contact layer 31. The first contact layer 31 is thus divided into spaced-apart sub-regions, each of which is only provided in the area of ​​the recesses 27. Alternatively, the first contact layer can also be configured such that, on the side of the semiconductor body 2 facing the support 5, the first contact layer connects the parts of the first contact layer arranged in the recesses 27 to each other (compare Fig. 3D).

[0078] The side surfaces of the recesses 27 are covered with an insulating layer 4. This prevents an electrical short circuit between the first connection layer 31 and the active area 20.

[0079] The second contact surface 36 is electrically connected to the second semiconductor layer 22 via a second contact layer 32. In the illustrated embodiment, the second contact layer 32 has a sublayer 321.

[0080] In a top view of the semiconductor device, the sublayer 321 overlaps the first support body 51. The sublayer 321 covers the second semiconductor layer 22, apart from the recesses 27, over a large area, for example with a coverage of at least 60%, preferably at least 80%. The higher the coverage of the second semiconductor layer 22, the better a laterally homogeneous charge carrier injection into the second semiconductor layer can be achieved.

[0081] The sublayer 321 is designed as a reflective layer for the radiation generated in the active region. Preferably, the reflectivity of the reflective layer is at least 60%, more preferably at least 80%, for the radiation generated in the active region. In particular, the large-area coverage by the sublayer 321 allows radiation emitted by the semiconductor device towards the support 5 to be efficiently reflected back.

[0082] Deviating from a reflective configuration, the sublayer 321 can also be transparent to the generated radiation. For example, the sublayer can have a transparent conductive oxide (TCO).

[0083] The second connection layer 32, in particular the sublayer 321 of the second connection layer, has a plurality of recesses 325 in which the first semiconductor layer 21 is connected to the first support body 51 of the substrate via the first connection layer 31. The first connection layer thus extends vertically through the recesses of the second connection layer. In a top view of the semiconductor device, the recesses 325 overlap with the first support body. In particular, all recesses in a top view extend within the first support body. In the sectional view of the Fig. 1A The recesses 325 are thus arranged in a vertical direction above the first support body, in particular above the respective first contact surface 65. The recesses 325 each overlap with the first contact surfaces 65 and are in Fig. 1B is not explicitly shown for the sake of simplicity.

[0084] The second connection surfaces 36 are electrically connected to the second contact surfaces 66.

[0085] On the side facing away from the support 5, the semiconductor body 2 is free of metallic elements for electrical contact. This prevents the risk of shadowing the radiation generated in the semiconductor device. A further insulating layer 41 is arranged between the first contact surfaces 35 and the second contact surfaces 36. A plastic, for example, is suitable for this additional insulating layer.

[0086] In the illustrated embodiment, the semiconductor device 1 is designed as a thin-film semiconductor device in which a growth substrate for the semiconductor layer sequence of the semiconductor body 2 has been removed. A radiation conversion element 81 is arranged on the side of the semiconductor body 2 facing away from the support 5. The radiation conversion element is designed to convert primary radiation of a first peak wavelength generated in the active region 20, at least partially, into secondary radiation with a second peak wavelength different from the first peak wavelength. In particular, the semiconductor device 1 is designed to generate mixed light, such as light that appears white to the human eye.

[0087] In the illustrated embodiment, the radiation conversion element 81 is attached to the semiconductor body 2 by means of a mounting layer 82. For example, a ceramic radiation conversion element, which is available in the form of a prefabricated plate, is suitable for the radiation conversion element.

[0088] Alternatively, the radiation conversion element can also be formed by a matrix material in which a phosphor is embedded for radiation conversion. Suitable matrix materials include, for example, a silicone, an epoxy, or a hybrid material containing at least one silicone and one epoxy.

[0089] In addition to the described embodiment, the radiation conversion element can also completely or at least partially cover the side surfaces of the semiconductor body.

[0090] On the side facing away from the support 5, the semiconductor body 2 has a structure 25. The structure is intended to increase the coupling efficiency of the radiation generated during operation. For example, roughening is suitable as a structure.

[0091] The first support body 51 and the second support body 52 each project laterally beyond the semiconductor body 2. This configuration resembles the arrangement of metal strips in a conductor frame. However, the specific design of the support 5 can be varied within wide limits.

[0092] During manufacturing, the side surfaces 57 can result from the singulation of the carrier 5 from a carrier composite. Accordingly, the side surfaces 57 can exhibit traces of a singulation step, for example, traces of a mechanical process, a chemical process, or material removal by means of coherent radiation.

[0093] The semiconductor device is characterized by high mechanical stability and simple manufacturability due to its primarily metallic substrate. Electrical contact between the semiconductor body 2 and the first substrate 51 and the second substrate 52, which is electrically insulated from the first substrate 51, can be achieved through the substrate 51. This eliminates the need for complex vias through the substrate 5. Instead, electrical contact is established through the material of the separated substrates.

[0094] Furthermore, a support, especially a metallic one, is characterized by high thermal conductivity, so that waste heat generated during operation can be efficiently dissipated via the support 5.

[0095] The in Fig. The second embodiment shown in section 2 essentially corresponds to the one described in connection with the Fig. 1A and Fig. 1B first embodiment. In contrast, the semiconductor device 1 has a growth substrate 29 of the semiconductor layer sequence of the semiconductor body 2. In contrast to the one described in Fig. In the thin-film semiconductor device shown in Figure 1A, the growth substrate is therefore not removed. Sapphire, for example, is suitable as a growth substrate, particularly a sapphire substrate with a structured interface to the semiconductor body. This increases the light extraction from the semiconductor device. In this case, the coefficient of thermal expansion of the support 5 is preferably matched to the coefficient of expansion of the growth substrate. A sapphire growth substrate, for example, typically has a coefficient of thermal expansion between 6.5 and 7.5 x 10⁻⁶. -6 K -1 on.

[0096] An exemplary embodiment of a method for manufacturing semiconductor devices is shown by reference to the Fig. 3A to 3G are shown, with an exemplary semiconductor component being manufactured, which, as in connection with the Fig. 1A and Fig. 1B is described as being trained.

[0097] As in Fig. Figure 3A shows a semiconductor layer sequence 200 being provided on a growth substrate 29. Viewed from the growth substrate, the semiconductor layer sequence 200 comprises a first semiconductor layer 21, an active region 20, and a second semiconductor layer 22.

[0098] From the side facing away from the growth substrate 29, a plurality of recesses 27 are formed, the recesses extending through the active region 20 and the second semiconductor layer 22. Furthermore, semiconductor bodies 2 are formed from the semiconductor layer sequence 200, which are separated from each other by mesa trenches 201. The mesa trenches sever at least the active regions of the adjacent semiconductor bodies from each other.

[0099] In the Fig. 3C and Fig. Two different variants for the electrical contacting of the first semiconductor layer 21 and the second semiconductor layer 22 are shown in 3D. In the Fig. In the variant shown in Figure 3C, a first connection layer 31 is formed such that it has individual sub-areas, each arranged in the recesses 27. The sub-areas are spaced apart from one another and are electrically connected to each other only via the first semiconductor layer. Furthermore, a second connection layer 32 is formed, which is electrically connected to the second semiconductor layer 22. The first connection layer 31 and the second connection layer 32 form an accessible first connection surface 35 and a second connection surface 36, respectively, on the side facing away from the growth substrate.

[0100] In contrast, in the case of the Fig. In the 3D representation, the first connection layer 31 is designed such that it runs continuously on the side of the semiconductor bodies 2 facing away from the growth substrate 29 and electrically connects the sub-areas arranged in the recesses 27. In both variants, the semiconductor bodies 2 each provide two contact surfaces of different polarities for electrical contact on one side.

[0101] The following is how it will be done, as in Fig. Figure 3E shows a singulation step in which the semiconductor bodies 2 are completely separated from each other.

[0102] The singulation from a wafer stack 290 takes place along the mesa trenches 201. For example, a mechanical method such as sawing or breaking and / or irradiation using coherent radiation is suitable for singulation. For example, a stealth dicing method can be used. The singulation is in Fig. 3E illustrated by arrows 91.

[0103] The semiconductor bodies 2 are then attached to a carrier assembly. The provided carrier assembly 50 is in Fig. 3F shown in top view.

[0104] In Fig. Figure 3F shows a section of the carrier assembly 50, in which eight unit cells 501 are arranged side by side in a matrix-like configuration. Each unit cell contains a semiconductor mounting area 505. Each semiconductor mounting area 505 is assigned a plurality of first contact surfaces 65 and second contact surfaces 66. A separating groove 59 is arranged between the first contact surfaces 65 and the second contact surfaces 66 of each semiconductor mounting area. In the carrier assembly 50, the first contact surfaces 65 and the second contact surfaces 66 are still electrically connected to each other via the carrier assembly 50. Electrical insulation between the first contact surfaces 65 and the second contact surfaces 66 only occurs when the carrier assembly 50 is separated along the Fig. 3F shown separation lines 95, which run perpendicular to a main extension plane of the separation ditches 59.

[0105] The supporting structure can, for example, be a sheet metal that is unstructured apart from the separation trenches and that, apart from an optional filler material in the separation trenches, is free of electrically insulating material.

[0106] The fastening of the individual semiconductor bodies 2 is in Fig. Figure 3G illustrates this. The semiconductor bodies 2 are each positioned relative to the carrier assembly 50 such that the first contact surfaces 35 overlap with the first contact surfaces 61 and the second contact surfaces 36 overlap with the second contact surfaces 62 of a semiconductor mounting area 505. After the semiconductor bodies are attached to the carrier assembly 50, the carrier assembly is separated, for example by means of coherent radiation, such as by means of a pulsed laser with pulse durations in the picosecond range.

[0107] During the mounting of the semiconductor bodies, the first contact surfaces 35 are electrically short-circuited with the second contact surfaces via the carrier assembly 50. Only during singulation along the separation lines 95 ( Fig. 3F) these are electrically isolated from each other. Fig. Figure 3G shows the case where the semiconductor bodies 2 are already separated from the wafer array when they are attached to the carrier assembly 50. Alternatively, the semiconductor bodies may still be in the wafer array during attachment. The growth substrate 29 can be removed before or after attachment to the carrier assembly 50, or it can remain in the finished semiconductor devices (compare Figure 3G). Fig. 2).

[0108] Furthermore, the radiation conversion element 81 can also be omitted or attached or formed on the semiconductor body 2 only after the semiconductor body is attached to the carrier assembly.

[0109] The completed semiconductor device 1 is in Fig. Figure 1A shows a sectional view. The side surfaces 57 bounding the respective beam 5 are created during the separation of the beam assembly 50.

[0110] The described method enables the simple and reliable fabrication of surface-mount semiconductor devices with two rear contacts, without the need for vias through the substrate 5 of the semiconductor device. For example, the semiconductor bodies can be directly attached, e.g., soldered, to a substrate in the form of a structured sheet.

[0111] The electrical separation between the first contact 61 and the second contact 62 is achieved by dividing the carrier into two carrier bodies. An electrically insulating coating of the main surfaces of the carrier is not required.

[0112] To increase the reflectivity of the substrate, it can be coated with a reflective material, for example, silver. To reinforce the semiconductor device, particularly in the case of a semiconductor device where the growth substrate has been removed, reinforcing ridges, especially made of non-conductive material, can be applied to the substrate. Alternatively or additionally, the radiation conversion element 81 can be designed to be mechanically stable, for example, as a ceramic plate.

[0113] The semiconductor components can be mounted, for example, using conventional surface mount technology. Alternatively, an inverted surface mount technology can be used. Such a method is described in application DE 10 2013 111 977.8, the disclosure of which is explicitly included here by reference.

[0114] This patent application claims priority over German patent application 10 2014 103 828.2, the disclosure content of which is hereby incorporated by reference.

Claims

[1] Optoelectronic semiconductor device (1) comprising a support (5) and a semiconductor body (2) attached to the support comprising a sequence of semiconductor layers with an active region (20) for generating and / or receiving radiation, a first semiconductor layer (21) and a second semiconductor layer (22), wherein - the active area is located between the first semiconductor layer and the second semiconductor layer; - the support is electrically conductive and is divided into a first support body (51) and a second support body (52), wherein the first support body and the second support body are electrically insulated from each other; - the first support body has a first external contact (61) of the semiconductor device on the side facing away from the semiconductor body, wherein the first contact is electrically connected to the first semiconductor layer via the first support body; and - the second support body has a second external contact (62) of the semiconductor device on the side facing away from the semiconductor body, wherein the second contact is electrically connected to the second semiconductor layer via the second support body; - the second semiconductor layer (22) is connected to the second support body (52) via a second connection layer (32); - the second connection layer has a plurality of recesses (325) in which the first semiconductor layer is connected to the first support body (51) via a first connection layer (31); and - in a top view of the semiconductor component, all recesses run within the first carrier body. [2] Semiconductor device according to claim 1, wherein the first support body and the second support body cover at least 80% of a base area of ​​the semiconductor device in a top view. [3] Semiconductor device according to claim 1 or 2, wherein the first support body and the second support body together cover at least 80% of the semiconductor body in a rear view of the semiconductor device. [4] Semiconductor device according to any one of the preceding claims, wherein - the first semiconductor layer is located on the side of the active area facing away from the substrate; - the semiconductor body has at least one recess (27) extending through the second semiconductor layer and the active region into the first semiconductor layer; and - the first connection layer (31) is arranged in the recess, which is electrically connected to the first semiconductor layer. [5] Semiconductor device according to one of the preceding claims, wherein the first support body and the second support body are separated from each other by a separation trench (59). [6] Semiconductor device according to claim 5, wherein the separation trench is filled with an electrically insulating filling material. [7] Semiconductor device according to any of the preceding claims, wherein the support is metallic. [8] Semiconductor device according to one of the preceding claims, wherein the coefficient of thermal expansion of the support differs by no more than 50% from the coefficient of thermal expansion of the semiconductor body. [9] Method for manufacturing a plurality of semiconductor devices (1) comprising the steps: a) Providing a carrier assembly (50) with a plurality of semiconductor body mounting areas (505), wherein each semiconductor body mounting area has at least a first contact surface (65) and a second contact surface (66) and in each semiconductor body mounting area a separation groove (59) is formed in the carrier assembly between the first contact surface and the second contact surface, wherein the separation groove extends completely through the carrier assembly in a vertical direction; b) Attaching a plurality of semiconductor bodies (2) to the semiconductor body mounting areas, wherein a first terminal surface (35) of the semiconductor body is electrically connected to the first contact surface and a second terminal surface (36) of the semiconductor body is electrically connected to the second contact surface; and c) Separating the carrier assembly into the semiconductor devices, wherein each semiconductor device has at least one semiconductor body and a carrier (5) with a first carrier body (51) and a second carrier body (52), wherein the first carrier body and the second carrier body are electrically isolated from each other by the separating trench. [10] Method according to claim 9, wherein the support composite in step a) is a sheet which is unstructured apart from the separation grooves. [11] Method according to claim 9 or 10, wherein the first contact surface and the second contact surface of the carrier assembly are each short-circuited via the carrier assembly when attaching the semiconductor bodies and are electrically isolated from each other when singulating. [12] Method according to any one of claims 9 to 11, wherein the singulation is carried out using a pulsed laser. [13] Method according to any one of claims 9 to 12, wherein the semiconductor bodies are provided in step b) in a wafer composite (290). [14] Method according to any one of claims 9 to 12, wherein the semiconductor bodies are attached separately to the carrier assembly in step b). [15] Method according to any one of claims 9 to 14, wherein a semiconductor device according to any one of claims 1 to 8 is manufactured.

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