Patch-on-interposer package with wireless communication interface

By integrating a wireless connection using a patch-on-interposer architecture, the limitations of traditional socket connections in multi-CPU systems are overcome, achieving high-data-rate and flexible chip-to-chip communication.

DE112015006965B4Active Publication Date: 2025-05-22INTEL CORP
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Patent Information

Application Number
DE112015006965
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Filing Date
2015-12-02
Publication Date
2025-05-22
Estimated Expiration
2035-12-02

AI Technical Summary

Technical Problem

In multi-CPU systems, direct communication between CPUs is limited by the number and data rate of socket connections, which are constrained by the size and materials of the socket and system board, leading to communication overhead and latency.

Method used

The integration of a wireless connection using a patch-on-interposer (PoINT) architecture, where millimeter wave transceiver dies are mounted on small patches near the edge of the package, allowing for flexible and high-speed chip-to-chip communication without the limitations of traditional socket connections.

Benefits of technology

This solution enables cost-effective, high-data-rate, and flexible wireless interconnects in multi-CPU systems, reducing communication latency and overhead while accommodating architectural flexibility and reconfiguration.

✦ Generated by Eureka AI based on patent content.

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Abstract

Integrated circuit die package comprising: an interposer (102, 602, 642); a main patch (112, 612, 652) attached to the interposer (102, 602, 642); a main integrated circuit die (114, 614, 654) attached to the main patch (112, 612, 652); a second patch (104, 604, 644) attached to the interposer (102, 602, 642); and a millimeter-wave radio die (106, 606, 646) attached to the second patch (104, 604, 644) and coupled to the main integrated circuit die (114, 614, 654) via the interposer (102, 602, 642) to communicate data between the main integrated circuit die (114, 614, 654) and an external component, wherein the integrated circuit die package further comprises an antenna (632, 672) on or in the second patch (104, 604, 644) or on or in the interposer (102, 602, 642), the antenna (632, 672) coupled to the millimeter-wave radio die (106, 606, 646) to transmit and receive millimeter-wave signals.
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Description

AREA

[0001] This description relates to communication between integrated circuit packages, and more particularly to communication using a wireless radio transceiver. BACKGROUND

[0002] In multi-CPU servers, multi-CPU high-performance computers, and other multi-chip systems, direct communication between different CPUs can significantly improve overall system performance. Direct communication reduces communication overhead and latency. This is especially true for usage scenarios where data is written to shared memory pools. Direct communication can be achieved by adding a switch or switch matrix on the system board that supports the CPUs.

[0003] Connections to the switch can be made through the system board. This requires data to be transferred over the socket pins for socketed CPUs. The number of socket connections is limited by the size of the socket. The data rate is also limited by the materials and interfaces between the CPU, socket, and system board. Connections to the switch can also be made using flexible top-side interconnects. These connectors connect a chip directly with a dedicated cable, thus bypassing the socket and system board. Top-side connectors offer higher data rates but are more expensive. In addition, the package is more complex, and assembling the package into a system is more complex because the cables must be placed and connected after all the chips are in place.

[0004] US 2016 / 0 181 189 A1 describes techniques and configurations for clustering ground lines to reduce crosstalk in integrated circuits (ICs). In some embodiments, an IC package assembly may include a first package substrate configured to carry input / output (I / O) signals and ground between a chip and a second package substrate. The first package substrate may include a plurality of contacts arranged on one side of the first package substrate and at least two ground vias of a same layer of vias, and the at least two ground vias may form a group of ground vias electrically coupled to a single contact.

[0005] EP 1 152 485 A1 describes a combined antenna and radio communication device comprising a dielectric base on which a multi-slot antenna made of a conductor, a coplanar transmission line, a power supply line, and a radio frequency unit are provided. A conductive housing and the dielectric base hermetically seal the radio frequency unit, the coplanar transmission line, and the multi-slot antenna. The lower surface of the dielectric base faces a conductive plate having an opening for the passage of electromagnetic waves. Electromagnetic waves are guided through the dielectric base and exited through the opening. SUMMARY OF THE INVENTION

[0006] The object underlying the invention is achieved by the subject matter of the independent claims. Further advantageous embodiments are specified in the subclaims. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like reference numerals refer to similar elements. Fig. 1 is a top view of a wireless connection for chip-to-chip communication on a patch-on-an-interposer package according to one embodiment. Fig. 2 is a cross-sectional side view diagram of the package of Fig. 1 mounted on a base, according to one embodiment. Fig. 3 is a block diagram of a radio chip and associated components according to one embodiment. Fig. 4 is a top view of a package with multiple wireless links for chip-to-chip communication according to one embodiment. Fig. 5 is a block diagram of a computer system having multiple high-speed interfaces according to one embodiment. Fig. 6 is a cross-sectional side view diagram of an alternative wireless interconnect for chip-to-chip communication on a patch-on-an-interposer package according to one embodiment. Fig. 7 is a cross-sectional side view diagram of another alternative wireless interconnect for chip-to-chip communication on a patch-on-an-interposer package according to one embodiment. Fig. 8 is a top view of another alternative wireless connection for chip-to-chip communication on a patch-on-the-interposer package according to one embodiment. Fig. 9 is a cross-sectional side view diagram of the package of Fig. 8 according to one embodiment. Fig. 10 is a block diagram of a computing device including wireless interfaces according to one embodiment. DETAILED DESCRIPTION

[0008] As described herein, a wireless connection can be integrated into a server package using PoINT (Patch-on-an-Interposer) architecture and similar types of packages. The patch can be a multilayer organic package substrate using ultra-thin build layers and advanced substrate design rules. The design rules can be compatible with the latest silicon nodes. This allows die to be assembled on a patch with a fine "C4 bump pitch" of a few hundred to less than 100 µm. The patch is attached to an interposer. The interposer can also be based on a multilayer organic substrate technology, but at a much lower cost with lower precision. The interposer design rules can be more similar to those of printed circuit boards at a lower cost. The interposer is typically connected to the patch using solder ball grid arrays.In some embodiments, the patch may be an N-node compatible substrate, whereas the interposer (NM) node is compatible, where M is greater than or equal to 1.

[0009] In a more traditional integrated circuit server and microserver package, a wireless link may be located at the edge of the package. This minimizes interference with obstructions such as the integrated heat spreader (IHS) and heat sink. In a PoINT architecture package, the interposer, which serves as a carrier substrate for the integrated circuit die, typically uses lower-cost and less precise materials and manufacturing processes. As a result, the fine-pitch transceiver chips of a wireless link are difficult to attach to the interposer.

[0010] As described here, additional patches can be applied near the edge of the package to support a millimeter-wave wireless interconnect die. The transceiver die can then be mounted on the patch, and the antenna can be integrated either within the patch or within the interposer.

[0011] The small patches allow millimeter-wave transceiver dies to be placed at any desired location without using a more expensive or precise package substrate. This allows the benefits of the lower cost of the interposer to be combined with the many advantages of package-mounted millimeter-wave wireless links, including architectural flexibility and link reconfiguration. In some embodiments, the antenna implemented in the interposer has a wider bandwidth as a result of the thickness of the interposer compared to more expensive package substrates. Implementing the radio on a patch reduces many of the potential costs associated with enabling fine-pitch mounting on an interposer.

[0012] Fig. Figure 1 is a top view of an exemplary PoINT package showing wireless connections on two opposite sides of the main die. In this embodiment, the main die is a central processing unit (CPU) die. More or fewer wireless connections may be present, and they may be placed in different positions, including positions on the other two sides of the interposer. While space is available on the interposer sides, the design rules for the interposer of a PoINT package substrate are too coarse to accommodate the placement of a fine-pitch millimeter-wave radio die.

[0013] The integrated circuit main die 114, in this case a CPU (central processing unit), is disposed on a patch 112 on the interposer 102 in the center of the package. A similar package may be used for a different processor type, a memory die, or a communications interface. The transceiver dies 106-1 through 106-5 and 110-1 through 110-5 are disposed on one or more patches 104, 108 attached to the edges of the interposer. In some embodiments, the transceiver dies are first attached to the respective patches and then mounted on the interposer. The patches carrying the radio devices are mounted near the edge of the interposer to provide a clearer radiation path to a nearby external component.At the edges, the patches may also be located outside the heat sink 116 to avoid any effect that the heat sink may have on signal propagation.

[0014] The additional small patches 104, 108 can be configured to support a single die, allowing multiple patches to be used on each side. Alternatively, a single patch can support multiple radio dies, as shown. The patch-on-the-interposer package concept offers cost savings through the use of inexpensive interposer material and a small amount of patch material. Accordingly, the size and positions of the patches can be chosen to simplify assembly and minimize costs. The antennas for each radio die can be constructed as part of the corresponding patch or on the interposer. The coarser pitch structure can be easily fabricated to accommodate an antenna structure.

[0015] Two large patches 104, 108 are shown on opposite sides of the CPU and interposer for supporting all of the radio die. This is provided as an example, and other configurations are shown in other drawings. Various linear and rectangular shapes can be used. Alternatively, a "ring patch" can be used to accommodate even more radio devices. With a ring-shaped, arc-shaped, or curved patch, multiple radio dies can be mounted on the patch facing in different directions, and then, as with the other patches, the patch is mounted on the interposer.

[0016] The radio dies 106, 110 are all connected to the integrated circuit die 114 via traces 130, 132 on the top side of the interposer. While the traces are shown on the top side, the traces can also, and alternatively, be routed to the inner metal layers of the interposer. Most traces between the CPU patch and the radio patches carry low-frequency signals, but may require impedance control and noise immunity from external sources. For this reason, grounded coplanar waveguides can be used for surface routing. Routing within the patch and interposer can have better impedance and noise conditions. Stripline-like structures can be used for critical routing within the CPU patch and interposer layers.

[0017] For simplicity, the traces are shown as a single line between the radio and main die, however, there will be multiple, typically four or more, traces for each radio die. These can be combined or kept separate. These can be multiplexed in the main die and then separated by the radio dies. The traces can be on the top or on a bottom layer, depending on the specific implementation. As shown, the traces are all connected to different pins of the main die, however, they can all be connected to the same pin, and the main die patch 112 can reroute the lines from the interposer traces to the main die.

[0018] Fig. 2 is a side view of the package of Fig. 1, in which the package interposer 102 is mounted on a socket 120. The socket is mounted to a motherboard or system board 124. As shown, the heat sink 116 takes the form of an integrated heat spreader (IHS). It is mechanically and electrically attached to the top surface of the die 114 using a thermal interlayer material. It also extends from the die to the two radio dies 106, 110 so that heat from the radio device is distributed to the heat sink. While the heat sink is in contact with the top surfaces of the radio dies, the sides of the radio dies remain uncovered. For die-mounted antennas, this allows the antennas to radiate outward to other external components. Similarly, the sides of the patches are exposed so that patch-mounted antennas are able to radiate outward.

[0019] As shown in this side view, the radio die patches 104, 108 are separate and distinct from the main die patch 112 and placed near the edges of the interposer 102. The radio die patches provide a secure, high-density attachment point for the radio dies. As shown in Fig. 1, multiple radios may be present on each side to communicate with more than one external component or to increase the overall bandwidth or data transmission capacity of the system. In this example, the package also includes a package cover 128, which acts as a heat sink for the IHS and as a protective cover for the die and patches. The cover extends over all components around the interposer and rests on supports 122 on the motherboard. The cover may provide passages through which the wireless transceivers communicate, as shown.

[0020] The radio dies may include antennas, or the antennas may be provided as a separate structure on or in the patch or interposer. Some embodiments are described in the Fig. 6 and Fig. 7, however, the invention is not limited thereto. In the present example, the antennas are formed in the patches, which provide a large platform and are made of suitable antenna materials. The radio signals then travel to and from the patches 104, 108 through the passages in the cover. The passages may be openings or a portion of the cover made of another material. Alternatively, the cover may be made of a material that is thermally conductive but transparent to millimeter-wave radio waves. In such a case, no opening, passage, or window is required. In another embodiment, the cover may be made of a conductive metal on top to radiate heat and another material that is transparent to millimeter-wave radio waves to support the metal portion.

[0021] The interposer is a dielectric structure with an array of stacked via structures as vertical interconnect structures within the interposer. The vertical vias establish connections between patterned horizontal metal layers between the vias. Top-side terminals, such as mid-level interconnect (MLI) solder balls, are used to connect to the patch placed over the MLI solder balls. A ball grid array (BGA), land grid array (LGA), or similar structure is used on the opposite side to connect the interposer to the socket or directly to the motherboard. The patches can have different structures to suit different applications.For a CPU, the patches typically have a thin core (e.g., about 400 µm thick) and support routing (RTG) and power delivery (PD) functions for the die that supports them. A CPU patch may also have buildup layers with integrated circuit routing layers that add up to about 20–30 µm. Stiffeners and passive components, such as die-side capacitors (DSC), may also be used. For radio wave transceiver dies, a different type of patch may be used. For operation at millimeter-wave and sub-THz frequencies, the entire radio patch can have a thickness that varies anywhere from less than 200 µm to more than 600 µm. The radio patch can have an ultra-thin core (e.g., about 40-100 µm) and build-up layers that add up to about 100 µm.For the CPU, the patch is typically made of organic materials that meet specific CPU performance criteria. For mmWave radios, the performance criteria are different and the requirements are less stringent. Although a similar organic substrate can be used, it is not required. Other substrates, including inorganic substrates such as glass, low-temperature fired ceramics, etc., can be used instead.

[0022] The patches are attached to the interposer using MLI solder ball connectors, for example, using thermal pressure bonding (TCB) or solder reflow. Alternatively, mini-ball or surface mount technology can be used. The patches are also adhered to the die. The patches can have wiring layers to redistribute the die connections with coarser pitches. The coarser pitch is more suitable for the interposer material. BGAs can be used as MLI between a CPU patch and the interposer. For radio devices, there are far fewer connections, so the connections can be much shallower. For a shallow junction, an SGA (solder grid array) can be used.

[0023] Fig. Figure 3 is a block diagram of an example of a transceiver or radio chip system architecture and associated components that may be used for the wireless connection described herein. The transceiver chip may take a variety of other forms and may have additional functions depending on the particular implementation. This radio device design is provided only as an example. The radio chip 350 is mounted on the package substrate 352, to which the primary integrated circuit die or chip 202, 203 is also attached, as shown in Fig. 1. The substrate 352 is attached to the PCB or main board. The radio package may include a local oscillator (LO) 302 or a connection to an external LO, and optionally a switch that allows the external LO feed to be used instead of or in addition to the internal LO. The LO signal may pass through an amplifier and a multiplier, such as an active doubler 308 and 0 / 90° quadrature hybrid 310, to drive an upconverter and mixer 314. The patches are not shown in this example to avoid obscuring other details.

[0024] The RX (receive) chain 320 may include a receive antenna 356 in the package coupled to a low-noise amplifier (LNA) 322 and a wideband baseband (BB) amplifier chain 324 with downconverters 312 for analog-to-digital conversion. The TX (transmit) chain 340 may include a digital BB drive chain 342 to the upconverters 314 and a power amplifier (PA) 344 to the transmit antenna 358. Multiple transmit and receive chains may transmit and receive simultaneously over multiple channels. The various channels may be combined or consolidated in various ways depending on the particular implementation.

[0025] The TX and RX chains are both coupled to the antenna through the substrate. There may be a single antenna for TX and RX, or there may be separate RX and TX antennas, as shown. The antennas can be designed to have different radiation patterns to suit different wireless connections. This can allow the chip to communicate with multiple antennas at different locations on the motherboard. A narrow beam transmit and receive pattern allows the energy to be concentrated in a single direction for communication with only one other device.

[0026] Fig. Figure 4 is a top view of an example implementation of multiple wireless links in a single PoINT package. In this example, separate antennas are used for transmit and receive, but it is also possible to split the antenna between the Tx and Rx chains. The antenna size can vary from 1.25 × 1.25 mm or less to 2.5 × 2.5 mm or more, depending on the carrier frequency, the desired gain, and the transmission range.

[0027] A single integrated circuit chip or die 402 includes both processing and baseband systems and is mounted on a package 404. The baseband portions of the chip are connected via traces 430 on the package to radio chips or dies, which in turn are coupled to antennas through the package. In this example, the integrated circuit chip is a CPU for a microserver and is rectangular. Radio chips are located on each of the four sides of the CPU. The sides shown at the top, left, and bottom of the drawing figure each have a radio 424, 410, 420 coupled to a respective Tx, Rx antenna pair 426, 412, 422. The side shown as the right side shows five radios, each connected to a respective antenna pair.The number of radio devices and antennas on each side can be determined based on communication rate requirements in each direction.

[0028] A microserver package may require very few high-speed links. A single link can deliver data rates of more than 40-80 Gb / s over a distance of a few centimeters. The maximum data rate depends on the modulation scheme. The data rate can still be on the order of 5-10 Gb / s for transmission distances of up to 50 centimeters.

[0029] The Fig. Figure 4 shows multiple wireless connections implemented on the same side of a package. This makes it possible to increase the overall data rate. Alternatively, the data can be sent to various other devices located in the same general direction. Both the radio chips and the antennas are placed towards the edge of the package to limit obstructions in the radio path that can come from heat sinks and heat spreaders. In general, the losses for a copper trace baseband signal are much lower than the losses through the same copper trace for an RF (radio frequency) signal. As a result, the radio chips can be kept very close to the antenna. This limits electrical signal and power losses due to the RF routing through the substrate. The radio chip can be installed on the package in any desired manner and can even be embedded or part of the substrate.By using multiple radios, the mmWave links on the packet can be scaled for high-data-rate applications. This can be useful in systems such as servers and media recording, processing, and editing systems. As will be demonstrated, multiple links can be combined to achieve data rates close to 1 Tb / s.

[0030] Fig. 5 is a block diagram of a computer system 500 having multiple high-speed interfaces that may be implemented using the wireless connections described herein. The computer system may be implemented as a server, a microserver, a workstation, or other computing device. The system includes two processors 504, 506 with multiple processor cores, although more processors may be used depending on the particular implementation. The processors are coupled to each other via a suitable connection, such as the wireless connection described herein. The processors are each coupled to a respective DRAM ("Dynamic Random Access Memory") module 508, 510 using a suitable connection, such as the wireless connection described herein. The processors are also each connected to a PCI ("Peripheral Component Interconnect") interface 512, 514.This connection can also be wired or wireless.

[0031] The PCI interfaces enable connections to a variety of additional high-speed components, such as graphics processors 516 and other high-speed I / O systems for display, storage, and I / O. The graphics processor drives a display 518. Alternatively, the graphics processor is a core or die within one or both of the processors. The graphics processor may also be connected to another interface via a chipset.

[0032] The processors are also both coupled to a chipset 502, which provides a single point of contact for many other interfaces and connections. The connection to the chipset may also be wired or wireless, where, depending on the implementation, one or both of the processors may be connected to the chipset. As shown, a processor 504 may have a wireless connection to one or more processors 506, memory 508, peripheral components 512, and a chipset 502. These connections may all be wireless, as indicated by the multiple radios and antennas of Fig. 4. Some of these connections may be wired. The processor may have multiple wireless connections to the other processor. Similarly, chipset 502 may have wireless connections to one or more of the processors, as well as to the various peripheral interfaces, as shown.

[0033] The chipset is connected to the USB ("Universal Serial Bus") interface 520, which may provide ports for connections to a variety of other devices, including a user interface 534. The chipset may be connected to SATA ("Serial Advanced Technology Attachment") interfaces 522, 524, which provide connections for mass storage 536 or other devices. The chipset may be connected to other high-speed interfaces, such as a SAS ("Serial Attached Small Computer Serial Interface") interface 526 with ports for additional mass storage 528, additional PCI interfaces 530, and communications interfaces 532, such as Ethernet, or any other wired or wireless interfaces. The described components are all mounted on one or more boards and cards to provide the described connections.

[0034] Fig. Figure 6 is a cross-sectional side view diagram of an alternative package configuration. In this example, a patch-on-the-interposer package has antennas on the radio patches. A main die 614, such as a CPU, memory, communications or data interface, or other type of die, is attached to a patch 612, which is coupled to an interposer 602. The interposer is mounted on a socket 620 that is mounted to a motherboard 624 or another system board. Each side of the interposer has one or more special small patches 604, 608, only one of which is shown on each side. The radio dies 606, 610 are each attached to a corresponding patch to provide millimeter-wave communications to other packages on the same board or another nearby board, or even to a switch for routing to another location.

[0035] In one example, the radio die 610 is mounted on top of the patch 608, as in the previously described examples. In such a case, there are conductive traces from the main die 614, through the main patch 612, via the interposer to establish an electrical connection to the radio die via the radio patch. The conductive traces and the connections through the patches carry data and may also carry control signals between the main die and the radio die. The radio die is coupled to an antenna 630 to guide the data signals via millimeter waves to the appropriate external component. The antenna, in this case, is formed within the layers of the patch. This can be done by forming suitable metal shapes in the metal layers of the patch and between dielectric layers. Any of a variety of different antenna shapes can be formed by controlling the shapes of the metal layers.

[0036] In the other example, the radio die 606 is located on the underside of the patch 604. A recess is formed on the underside of the patch that is large enough for the radio die to fit into the recess. Because of the recess, the radio die does not interfere with the solder ball connection between the patch and the interposer. This example illustrates that the radio die can be placed in different positions on the patch to accommodate other components. In this case, moving the die to the bottom of the patch allows an antenna 632 to be mounted on the top of the patch. The radio die and the antenna can be connected by the metal layers of the patch. From the top of the radio patch, the antenna can communicate with external components and avoid any obstructions that may be caused by the socket or other nearby devices on the motherboard.

[0037] As shown, the wireless links 606, 610, 630, 632 are fully integrated on the respective patches 606, 608. Both the radio dies and the antennas of the radio transceivers are located on the same patch or substrate.

[0038] In the illustrated example, there is no cover, but heat sink retainers 622 are shown. These are used to hold the heat sink above the package and base when the heat sink is installed. Since the antennas are also covered by the heat sink, openings or windows may be provided in the heat sink to allow millimeter-wave signals to pass through the heat sink.

[0039] Fig. Figure 7 is a cross-sectional side view diagram of another alternative package configuration. In this example, integration is split between the patch 644, 648 and the interposer 642. The fine-pitch radio dies 646, 650 are assembled on the respective patch, while the antennas 670, 672 are implemented on the interposer. As in the example above, the antenna is formed using metal layers embedded within the substrate stack. The manufacturing processes are similar to those for manufacturing a PoINT package with a single CPU die, except that multiple radio patches with pre-mounted radio dies are mounted on the interposer at the same time as the CPU patch.

[0040] The PoINT package includes a main die 654 mounted on a patch 652 mounted on the interposer 642. The interposer also includes the radio die patches 644, 648 with corresponding connected radio dies 646, 650. In this example, the radio dies are mounted on the tops of the radio patches, as in the previous example, however, the radio dies can be mounted in many other positions on the patch, depending on the specific needs of the system.

[0041] In this example, the antennas 670, 672 for both radio devices are formed in the layers of the interposer and not in or on the patch. The coarse pitch of the interposer is well suited for millimeter-wave radio antennas. The radio dies can be coupled to the respective antenna via the patch and through the solder ball connection to the interposer. Although the antennas are shown as being directly beneath the respective radio die, the metal layers of the interposer can be used to transmit the data signals from the radio die to another location. Using the interposer, each antenna can be moved to any suitable location, which can be adjacent to or spaced from the antenna location.

[0042] Fig. Figure 7 also shows the heat sink 668 mounted over the package as a cover and attached to the heat sink mounts 662. As shown, this covers the radio devices and antennas, but the heat sink may be adapted to allow millimeter wave transmission through the heat sink.

[0043] Fig. Figure 8 is a top view of an alternative CPU package without a cover. The package includes an interposer 704. A CPU 708 is connected to a central CPU patch 706, which in turn is mounted near the center of the interposer. A set of radio devices 712 is mounted at many different positions around a ring patch 710. The ring patch is attached to the interposer around the CPU patch. The ring patch forms a ring or enclosure and surrounds the CPU patch. Although the ring patch is shown completely surrounding the main CPU patch on all four sides of the interposer, the ring patch may only surround the main patch on two or three sides and may not extend across an entire side of the interposer.

[0044] The ring patch, like the other radio patches described here, is shown positioned near the edge or periphery of the interposer. This allows for a clearer path from the package to external components. It has been found that radio channel performance is better when the radio is near the edge of the package and the radio is near the antenna. However, the best placement for the radio and antenna will depend on the mechanical properties of the package and antenna, and the intended direction of propagation for the radio signals. If the antennas are formed in or on the patch, there is a significant advantage to placing the patch near the edge of the package and beyond any heat sink or shroud.When the antennas are formed in the interposer, there is still an advantage to placing the patches close to the antenna, but the radio device can be further away from the edge of the interposer.

[0045] Fig. Figure 9 is a side cross-sectional view of the same package. In this view, the interposer 704 has a central stiffener or core 726 that forms the structure of the package. The ring patch 710 extends around the entire outer edge of the interposer and supports multiple radios 712 at different locations. This can be used to enable the radios to better communicate with other components at different positions around the interposer. The radios are attached to the ring patches using a low-cost, fine-pitch attachment 738, such as a solder grid array. The radio or ring patch can be attached to the interposer using a similar SGA 736. The central CPU 708 can be connected to a finer-pitch, higher-thermal-stress system 740.The CPU patch may then be attached to the interposer with a smaller pitch array, such as a ball grid array 734. The interposer is shown externally connected to another BGA 730, although other attachments may be used for each of these connections.

[0046] As shown, the ring patch has numerous wiring layers 720 to connect the radio to antennas and to connect radios to the CPU. Similarly, the interposer has wiring layers 724 above the core 726 to connect the radios to the CPU. Wiring layers 722 below the core can be used to connect the CPU to the external BGA 730 or another connector. The wiring layers above and below the core can be connected together using vias (not shown) or any other desired structure. The CPU patch similarly has multiple wiring layers (not shown) to route the many CPU connections as desired. The wiring layers, interconnect arrangements, and other features may also be part of any of the other embodiments described herein.The patches can be made of different materials with different dimensions, as mentioned above. Although only rectangular patches were shown, the invention is not limited to this, and the patches can be adapted to suit different form factors, radio transmission characteristics, and functions.

[0047] Fig. 10 shows a computing device 100 according to another implementation. The computing device 100 houses a circuit board 2. The circuit board 2 may include a number of components, including, but not limited to, a processor 4 and at least one communication chip 6. The processor 4 is physically and electrically coupled to the circuit board 2. In some implementations, the at least one communication chip 6 is also physically and electrically coupled to the circuit board 2. In further implementations, the communication chip 6 is part of the processor 4.

[0048] Depending on its applications, the computing device 11 may include other components that may or may not be physically and electrically coupled to the circuit board 2. These other components include, but are not limited to, volatile memory (e.g., DRAM) 8, non-volatile memory (e.g.,ROM) 9, flash memory (not shown), a graphics processor 12, a digital signal processor (not shown), a crypto processor (not shown), a chipset 14, an antenna 16, a display 18, such as a touchscreen display, a touchscreen controller 20, a battery 22, an audio codec (not shown), a video codec (not shown), a power amplifier 24, a GPS device 26, a compass 28, an accelerometer (not shown), a gyroscope (not shown), a speaker 30, a camera 32, and a mass storage device (such as a hard disk drive) 10, a compact disk (CD) (not shown), a digital versatile disk (DVD) (not shown), and so on. These components may be connected to the system board 2, mounted to the system board, or combined with one of the other components.

[0049] The communication chip 6 enables wireless and / or wired communication for the transmission of data to and from the computing device 11.

[0050] The term "wireless" and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communication channels, etc., that can transmit data through a non-solid medium using modulated electromagnetic radiation. The term does not imply that the associated devices do not include wires, although some embodiments do. The communication chip 6 may implement any of a number of wireless or wired standards or protocols, including, but not limited to, Wi-Fi (IEEE 802.11 family), WiMAX (IEEE 802.16 family), IEEE 802.20, "Long Term Evolution" (LTE), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPRS, CDMA, TDMA, DECT, Bluetooth, Ethernet derivatives thereof, and all other wireless and wired protocols referred to as 3G, 4G, 5G, and beyond. The computer device 11 may have a plurality of communication chips 6.For example, a first communication chip 6 may be dedicated to shorter-range wireless communication, such as Wi-Fi and Bluetooth, and a second communication chip 6 may be dedicated to longer-range wireless communication, such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, and others.

[0051] In some implementations, one or more of the components may be adapted to use the wireless connection described herein. The features of the system of Fig. 12 can be sent to the Fig. 7 and vice versa. For example, the system can be Fig. 12 multiple processors. The system of Fig. 7 may include one or more of the Fig.12. The term "processor" may refer to a device or part of a device that processes electronic data from registers and / or memory to convert that electronic data into other electronic data that can be stored in registers and / or memory.

[0052] In various implementations, computing device 11 may be a laptop, a netbook, a notebook, an ultrabook, a smartphone, a tablet, a personal digital assistant (PDA), an ultra-mobile PC, a mobile phone, a desktop computer, a server, a printer, a scanner, a monitor, a set-top box, an entertainment control unit, a digital camera, a portable music player, or a digital video recorder. In further implementations, computing device 11 may be any other electronic device that processes data, including a portable device.

[0053] Embodiments may be implemented as part of one or more memory chips, controllers, CPUs (central processing unit), microchips, or integrated circuits interconnected using a motherboard, an application specific integrated circuit (ASIC), and / or a field programmable gate array (FPGA).

[0054] References to "embodiment," "one embodiment," "an embodiment," "exemplary embodiment," "various embodiments," etc., indicate that the embodiment so described may include particular features, structures, or characteristics, but not every embodiment necessarily includes the particular features, structures, or characteristics. Furthermore, some embodiments may include some, all, or none of the features described for other embodiments.

[0055] In the following description and claims, the term "coupled" may be used along with its derivatives. "Coupled" is used to indicate that two or more elements cooperate or interact with each other, but they may or may not have intervening physical or electrical components.

[0056] As used in the claims, the use of the ordinal adjectives "first", "second", "third", etc., to describe a common element, unless otherwise specified, merely indicates that reference is made to different instances of similar elements and is not intended to imply that the elements so described must be in any particular order, whether temporally, spatially, rank-wise, or in any other way.

[0057] The drawings and the foregoing description provide examples of embodiments. Those skilled in the art will recognize that one or more of the described elements may well be combined into a single functional element. Alternatively, certain elements may be separated into multiple functional elements. Elements from one embodiment may be added to another embodiment. For example, orders of processes described herein may be changed and are not limited to the manner described herein. Furthermore, the acts of a flowchart need not be implemented in the order shown, nor do all acts necessarily need to be performed. Also, those acts that are not dependent on other acts may be performed in parallel with the other acts. The scope of the embodiments is by no means limited to these specific examples.Numerous variations, whether explicitly stated in the description or not, such as differences in structure, dimensions, and the use of material, are possible.

[0058] The following examples relate to further embodiments. The various features of the various embodiments can be variously combined with some features included and others excluded to suit a variety of different applications. Some embodiments relate to an integrated circuit die package including an interposer, a main patch attached to the interposer, a main integrated circuit die attached to the patch, a second patch attached to the interposer, and a millimeter-wave radio die attached to the second patch and coupled through the interposer to the main integrated circuit for communicating data between the main die and an external component.

[0059] In some embodiments, the second patch is located near an edge of the interposer.

[0060] Further embodiments include an antenna on the patch coupled to the radio die to transmit and receive millimeter wave signals.

[0061] Further embodiments include an antenna on the interposer coupled to the radio die to transmit and receive millimeter wave signals.

[0062] Further embodiments include a plurality of millimeter wave radios attached to the second path to communicate data between the main die and the external component.

[0063] In some embodiments, the radio die is connected to the main die via traces on the interposer.

[0064] Further embodiments include a third patch attached to the interposer, on a side of the interposer opposite the second patch, and a second millimeter-wave radio attached to the third patch for communicating data between the main die and another external component.

[0065] Further embodiments include a heat spreader over the main die and the radio die to distribute heat from the main die and the radio die.

[0066] In some embodiments, the radio patch has an ultra-thin core of less than 100 µm and built-up layers that add up to less than 100 µm.

[0067] In some embodiments, the radio patch is formed from an inorganic substrate.

[0068] In some embodiments, the main patch is formed from an organic substrate material.

[0069] In some embodiments, a ball grid array and a mid-level interconnect are used to attach the main patch to the interposer, and a solder grid array is used as a mid-level interconnect to attach the second patch to the interposer.

[0070] In some embodiments, the second patch is attached to the interposer with a flat connection.

[0071] In some embodiments, the second patch surrounds the main patch on at least two sides of the interposer.

[0072] Some embodiments relate to a computer system comprising a system board, a central processing unit (CPU), an interposer as a package substrate mounted on the system board to carry the CPU, the CPU being mounted on a patch attached to the interposer, the package substrate having conductive connectors for connecting the CPU to external components, a millimeter wave radio mounted on a radio patch attached to the interposer, coupled through the interposer to the CPU to modulate data onto a carrier and communicate the modulated data to an external component, and a chipset carried by the system board and coupled through the system board to the integrated circuit chip through the package.

[0073] Further embodiments include a second central processing unit (CPU), a second interposer as a package substrate mounted on the system board for carrying the second CPU on a patch, and a second millimeter wave radio mounted on a second radio patch attached to the second interposer, coupled to the CPU via the interposer to modulate the data onto a carrier and communicate the modulated data to the first millimeter wave radio.

[0074] Further embodiments include an antenna formed in the radio patch and coupled to the radio device via the patch.

[0075] Some embodiments relate to a device comprising an interposer, a multi-layer organic patch attached to a central region of the interposer, a central processing unit attached to the organic patch, an inorganic multi-layer patch attached to an edge of the interposer, and a plurality of millimeter-wave radio dies attached to the inorganic patch.

[0076] Further embodiments include conductive traces through the interposer to connect the central processing unit to the radio dies.

[0077] Further embodiments include multiple antennas in the interposer, each coupled to a respective radio die through the inorganic patch.

Claims

[1] Integrated circuit die package comprising: an interposer (102, 602, 642); a main patch (112, 612, 652) attached to the interposer (102, 602, 642); a main integrated circuit die (114, 614, 654) attached to the main patch (112, 612, 652); a second patch (104, 604, 644) attached to the interposer (102, 602, 642); and a millimeter-wave radio die (106, 606, 646) attached to the second patch (104, 604, 644) and coupled to the main integrated circuit die (114, 614, 654) via the interposer (102, 602, 642) to communicate data between the main integrated circuit die (114, 614, 654) and an external component, wherein the integrated circuit die package further comprises an antenna (632, 672) on or in the second patch (104, 604, 644) or on or in the interposer (102, 602, 642), the antenna (632, 672) coupled to the millimeter-wave radio die (106, 606, 646) to transmit and receive millimeter-wave signals. [2] The package of claim 1, wherein the second patch (104, 604, 644) is located near an edge of the interposer (102, 602, 642). [3] The package of one or more of the above claims, further comprising a plurality of millimeter wave radios (410, 420, 424) attached to the second patch (104, 604, 644) for communicating data between the main integrated circuit die (114, 614, 654) and the external component. [4] Package according to one or more of the above claims, wherein the millimeter wave radio die (106, 606, 646) is connected to the main integrated circuit die (114, 614, 654) via conductive traces (130, 132) on the interposer (102, 602, 642). [5] The package of one or more of the above claims, further comprising a third patch (108, 608, 648) attached to the interposer (102, 602, 642) on a side of the interposer (102, 602, 642) opposite the second patch (104, 604, 644), and a second millimeter wave radio (110, 610, 650) attached to the third patch (108, 608, 648) for communicating data between the main integrated circuit die (114, 614, 654) and another external component. [6] The package of one or more of the above claims, further comprising a heat spreader (116) over the main integrated circuit die (114, 614, 654) and the millimeter wave radio die (106, 606, 646) to spread heat from the main integrated circuit die (114, 614, 654) and the millimeter wave radio die (106, 606, 646). [7] A package according to one or more of the above claims, wherein the second patch (104, 604, 644) comprises an ultra-thin core of less than 100 µm and built-up layers that add up to less than 100 µm. [8] The package of claim 7, wherein the second patch (104, 604, 644) is formed from an inorganic substrate. [9] The package of claim 8, wherein the main patch (112, 612, 652) is formed from an organic substrate material. [10] A package according to one or more of the above claims, wherein a ball grid arrangement is used as a mid-level connection to attach the main patch (112, 612, 652) to the interposer (102, 602, 642) and a solder grid arrangement is used as a mid-level connection to attach the second patch (104, 604, 644) to the interposer (102, 602, 642). [11] Package according to one or more of the above claims, wherein the second patch (104, 604, 644) is attached to the interposer (102, 602, 642) with a flat transition. [12] Package according to one or more of the above claims, wherein the second patch (104, 604, 644) surrounds the main patch (112, 612, 652) on at least two sides of the interposer (102, 602, 642). [13] Computer system (500) comprising: a system board; a central processing unit, CPU (114, 504, 614, 654); an interposer (102, 602, 642) as a package substrate attached to the system board to support the CPU (114, 504, 614, 654), the CPU (114, 504, 614, 654) being mounted on a patch (112, 612, 652) attached to the interposer (102, 602, 642), the package substrate having conductive connectors to connect the CPU (114, 504, 614, 654) to external components; a first millimeter-wave radio device (106, 606, 646) mounted on a first radio patch (104, 604, 644) attached to the interposer (102, 602, 642), coupled through the interposer (102, 602, 642) to the CPU (114, 504, 614, 654) to modulate the data on a carrier and communicate the modulated data to an external component; and a chipset (502) carried by the system board, coupled by the system board through the package to the integrated circuit chip, the computer system (500) further comprising: a second central processing unit, CPU (506); a second interposer as a package substrate mounted on the system board to carry the second CPU (506) on a patch; and a second millimeter wave radio mounted on a second radio patch attached to the second interposer, coupled through the interposer to the CPU to modulate the data onto a carrier and communicate the modulated data to the first millimeter wave radio (106, 606, 646). [14] The computer system (500) of claim 13, wherein the first and second radio patches (104, 604, 644) are formed from an inorganic substrate and are attached using a flat transition. [15] The computer system (500) of claim 13, further comprising an antenna (632, 672) formed in the first radio patch (104, 604, 644) and coupled to the first millimeter wave radio device (106, 606, 646) via the first radio patch (104, 604, 644). [16] Device comprising: an interposer (102, 602, 642); an organic multilayer patch (112, 612, 652) attached to a central region of the interposer (102, 602, 642); a central processing unit (114, 614, 654) attached to the organic multilayer patch (112, 612, 652); an inorganic multilayer patch (104, 604, 644, 648) attached to an edge of the interposer (102, 602, 642); and several millimeter-wave radio dies (106, 606, 646, 650) attached to the inorganic patch (104, 604, 644). [17] The apparatus of claim 16, further comprising conductive traces (130, 132) through the interposer (102, 602, 642) to connect the central processing unit (114, 614, 654) to the radio dies (106, 606, 646, 650). [18] The device of claim 16 or 17, further comprising a plurality of antennas (670, 672) in the interposer (642), each coupled to a respective radio die (646, 650) through the inorganic patch (644, 648).

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