Optical on-chip insulator, method for manufacturing an optical on-chip insulator; and optical system

Abstract

Photonic integrated circuit (103, 203, 403, 754) comprising: a laser (104, 204, 404) over an optical waveguide (205, 312, 405); and an on-chip insulator (108, 208, 308, 408, 508) optically coupled to the laser (104, 204, 404), the on-chip insulator (108, 208, 308, 408, 508) comprising the optical waveguide (205, 312, 405), a magneto-optical garnet film (228, 328, 428, 528) grown in liquid phase epitaxy, coupled to a first subsection of the optical waveguide (205, 312, 405), and a grating-matched substrate (229, 429) on the garnet film (228, 328, 428, 528), wherein at least a second subsection of the optical waveguide (205, 312, 405) and / or an oxide coating (406) is formed on the laser (104, 204, 404), and wherein the garnet film (228, 328, 428, 528) lies below an upper surface of the oxide coating (406).

Description

Area

[0001] Embodiments of the present disclosure generally relate to the field of optoelectronics and in particular to photonic integrated circuits with optical on-chip insulators, such as silicon photonic transmission circuits fabricated on silicon-on-insulator (SOI) wafers. background

[0002] The background description provided herein is intended to present the general context of the disclosure. Unless otherwise stated herein, the materials described in this section relating to the claims in this application are not prior art and are not recognized as such by their inclusion in this section.

[0003] Silicon photonics is often considered one of the most popular and successful technology platforms, based on planar photonic circuits for the cost-effective integration of optoelectronics. Optical waveguide-based photonic devices, such as lasers, modulators, and detectors, are typically fabricated on silicon-on-insulator (SOI) wafers. In photonic SOI systems, light is typically confined to a single wafer (or chip) plane. Silicon waveguides are typically designed with submicrometer cross-sections, enabling dense integration of active and passive devices to achieve higher speed and lower drive energy. Light transmitted by photonic silicon SOI systems is typically off-chip coupled in a non-vertical manner, but can also be vertically coupled using optical fibers in a direction orthogonal to the photonic silicon transmitter chip.

[0004] US 2012 / 0002914 A1 shows a photonic integrated circuit with an on-chip isolator coupled to a laser and an optical waveguide.

[0005] US Patent 2010 / 0307678 A1 discloses a method for producing an optical non-reciprocal element by connecting a Si layer on which a waveguide is formed with a magneto-optical material layer.

[0006] In Bi, Lei, et al., “On-chip optical isolation in monolithically integrated nonreciprocal optical resonators,” Nature Photonics, 2011, Vol. 5, No. 12, pp. 758–762, nonreciprocal photonic devices, such as optical isolators, and the integration of such devices on semiconductor platforms are discussed, and a monolithically integrated nonreciprocal optical resonator is presented. In Shoji, Yuya et al., “Silicon Mach-Zehnder interferometer optical isolator having 8 nm bandwidth for over 20 dB isolation,” Japanese Journal of Applied Physics, 2014, Vol. 53, No. 2, p. 022202, a magneto-optical isolator based on a silicon Mach-Zehnder interferometer (MZI) is discussed. Brief description of the drawings

[0007] Embodiments of the photonic integrated circuit with optical on-chip isolator techniques of the present disclosure can overcome these limitations. The techniques are readily apparent from the following detailed description in conjunction with the accompanying drawings. For the sake of clarity, identical reference numerals denote identical structural elements. Embodiments are illustrated in the figures of the accompanying drawings only by way of example and are not intended to be limiting. Fig. Figure 1 is a block diagram of an optoelectronic system incorporating a photonic integrated circuit having an optical on-chip isolator of the present disclosure, according to various embodiments. Fig. Figure 2 schematically illustrates a cross-sectional side view of a photonic integrated circuit with an optical on-chip isolator according to some embodiments. Fig. Figure 3 is a diagram of an optical device showing an additional detail for an on-chip optical isolator according to various embodiments. Fig. 4A to Fig. Figure 4D schematically illustrates a cross-sectional side view of a photonic integrated circuit that incorporates an optical on-chip isolator according to some embodiments at various stages of development. Fig. Figure 5 shows an additional detail of a section of an on-chip optical isolator, including a positioning of polarization rotators, according to various embodiments. Fig. Figure 6 is a flowchart illustrating a method for manufacturing a photonic integrated circuit comprising an optical on-chip isolator according to various embodiments. Fig. Figure 7 schematically illustrates an exemplary computer device and an optical device with an optical on-chip isolator according to various embodiments. Detailed description

[0008] In silicon photonics, a laser can be integrated into a photonic integrated circuit (PIC), which contains a variety of other components (modulators, dividers, couplers, filters, detectors) on the chip. It is desirable for the laser to be robust against feedback due to reflections. Typically, reflections are suppressed using an isolator that allows forward light propagation while significantly attenuating reverse propagation. If an off-chip isolator is used, the laser is subject to feedback from the on-chip components, including any output coupler. In some situations, it may be preferable to use an on-chip isolator directly downstream of the laser to reduce or eliminate reflections both on and off the chip.However, previous on-chip isolators exhibited higher than desirable insertion loss, primarily driven by facet and propagation loss due to a variety of factors, including the type of magneto-optical material used for the isolator, which is typically cerium-substituted yttrium iron garnet (Ce:YIG) deposited by sputter epitaxy. Previous on-chip isolators were also difficult to integrate into photonic processing and / or packaging workflows. These issues have presented barriers to the commercialization of on-chip optical isolators.

[0009] The invention is defined in the independent claims. The dependent claims relate to advantageous embodiments and further developments. Embodiments of the present disclosure describe a photonic integrated circuit (PIC) comprising an optical on-chip isolator configured to reduce feedback to a laser by suppressing reflections on a photonic device such as a silicon photonic transmitter chip. In various embodiments, the optical on-chip isolator may comprise a magneto-optical (MO) garnet film grown in phase epitaxy, a sheathing layer, and / or polarization rotators to rotate light from a laser to enter a transverse magnetic (TM) orientation while remaining beneath the garnet film, and back to a transverse electrical (TE) orientation when the laser is no longer beneath the garnet film.In some embodiments, the garnet film can be coupled to a substrate on a garnet die, and the substrate can be thinned to allow subsequent lithography.

[0010] The following description presents various aspects of the illustrative implementations using terms commonly used by those skilled in the field to communicate the content of their work to other skilled workers. However, it will be obvious to those skilled in the art that the embodiments of the present disclosure can be put into practice using only some of the described aspects. For illustrative purposes, specific figures, materials, and configurations are presented to provide a comprehensive understanding of the illustrative implementations. It will be obvious to those skilled in the art that the embodiments of the present disclosure can be put into practice without these specific details. In other cases, well-known features are omitted or simplified so as not to obscure the illustrative implementations.

[0011] The following detailed description refers to the accompanying drawings, which form part thereof, where identical reference numerals denote identical parts throughout, and which illustrate embodiments in which the subject matter of the present disclosure can be implemented in practice. It must be understood that other embodiments can be used and structural or logical modifications can be made without departing from the scope of protection of the present disclosure. Therefore, the following detailed description is not to be understood in a restrictive sense, the scope of protection of the embodiments being defined by the accompanying claims and their equivalents.

[0012] For the purposes of this disclosure, the expression “A and / or B” means (A), (B) or (A and B). For the purposes of this disclosure, the expression “A, B and / or C” means (A), (B), (C), (A and B), (A and C), (B and C) or (A, B and C).

[0013] The description may use perspective-based terms such as top / bottom, in / out, above / below, and the like. Such descriptions are used solely to facilitate explanation and are in no way intended to restrict the application of the embodiments described herein to any particular orientation.

[0014] The description may use the expressions "in one embodiment" or "in embodiments," each of which may refer to one or more of the same or different embodiments. Furthermore, the terms "comprehensive," "including," "comprising," and the like, as used in relation to embodiments of the present disclosure, are synonymous.

[0015] The term "coupled with" and its derivatives may be used herein. "Coupled" can mean one or more of the following. "Coupled" can mean that two or more elements have direct physical or electrical contact. However, "coupled" can also mean that two or more elements are in indirect contact with each other, but nevertheless interact or work together, and that one or more other elements are coupled or connected between the elements described as coupled. The expression "directly coupled" can mean that two or more elements are in direct contact.

[0016] As used herein, the term "module" may refer to, be part of, or incorporate an application-specific integrated circuit (ASIC), an electronic circuit, a processor (shared, dedicated or group), and / or memory (shared, dedicated or group) that executes one or more software or firmware programs, a combinational logic circuit, and / or other suitable components that provide, are part of, or incorporate the functionality described.

[0017] Fig. Figure 1 is a block diagram of an optoelectronic system 100, which may include a photonic integrated circuit comprising an optical on-chip isolator according to some embodiments. The optoelectronic system 100 can be used to transmit an optical signal modulated with a data signal over an optical fiber, for example, between racks in a data center or over long distances between data storage facilities, data centers, and the like.

[0018] The optoelectronic system 100 can include an optical device (assembly) 102, which has one or more photonic integrated circuits (PICs) 103 with one or more on-chip light sources (e.g., laser devices) 104 for providing a light signal (e.g., a signal with constant light intensity) to one or more photonic devices 106 on the PIC 103, such as a modulator for modulating input light according to a data signal to be transmitted. One or more optical on-chip isolators 108 can be optically coupled to the on-chip light sources and suppress reflections back to the light sources 104. In some embodiments, the isolator 108 can have a magneto-optical garnet film grown in liquid-phase epitaxy. In various embodiments, the isolator 108 can have a cladding layer, such as silicon oxide or silicon nitride, to minimize reflections at the garnet interfaces.In some embodiments, the insulator 108 may have polarization rotators to rotate light from the light source 104 into a transverse magnetic (TM) orientation while it is located beneath the garnet film, and back to a transverse electrical (TE) orientation when it is no longer beneath the garnet film. In some embodiments, the garnet may be thinned to allow subsequent lithography.

[0019] In various embodiments, the light source 104 can be a hybrid laser emitting light with a wavelength of approximately 1310 nanometers (nm). In some embodiments, the light source 104 can emit light with a different wavelength, such as 1550 nm. An optical coupler 126 can be a component of the PIC 103 or coupled to it. The optical coupler 126 can provide an interface to an optical communication channel (e.g., an optical fiber cable or another configuration that may include coupling optics followed by a fiber) 130 and can be configured to transmit an optical signal 132 to the optical communication channel 130 for reception by another optical device 134. In various embodiments, the optical device 102 can include a processor 140, which can be coupled to one or more components of the PIC 103.In some embodiments, the processor 140 can be coupled to a modulator incorporated into the photonic devices 106. In these embodiments, the modulator can modulate a light signal from the light source 104 for transmission via the optical communication channel 130, based at least partially on a signal from the processor 140. In some embodiments, the processor 140 can have one or more modules for generating control signals for the light source 104 and / or one or more of the photonic components incorporated into the photonic devices 106. The photonic devices 106 can include photonic components such as modulators, dividers, couplers, filters, detectors, phase shifters, polarization rotators, multiplexers, and / or other passive or active optical elements in various embodiments.In some embodiments, a multitude of light signals can be multiplexed or otherwise coupled with the optical communication channel 130.

[0020] Fig. Figure 2 schematically illustrates a cross-sectional side view of a photonic integrated circuit (PIC) 203, which includes a laser 204 capable of guiding light to a waveguide 205. In various embodiments, the PIC 203 can be an implementation of the PIC 103, which, with respect to Fig. As described in Figure 1, photonic devices 206, details of which are not shown for clarity, can be incorporated on the PIC 203 in various embodiments. An on-chip optical isolator 208 can suppress reflections of light passing through the waveguide 205 back to the laser 204. In various embodiments, the optical isolator 208 can include a garnet die comprising a garnet film 228 grown in MO liquid phase epitaxy and a grating-matched substrate 229. The photonic devices 206 can include photonic components such as modulators, dividers, couplers, filters, detectors, phase shifters, polarization rotators, multiplexers, and / or other passive or active optical elements in various embodiments. An optical coupler 226 can couple light from the PIC 203 to provide off-chip light transmission.In some embodiments, the optical coupler 226 can couple the light in a first direction 230 orthogonally to a plane of the PIC 203 or in a second direction 232. In various embodiments, one or more components of the PIC 203 can be implemented on a photonic chip such as a silicon or SOI chip. In various embodiments, the PIC 203 can include a silicon waveguide and / or other components formed from an SOI, an optical nitride such as silicon nitride or aluminum nitride, indium phosphide, or other type III-V materials, for example, gallium nitride, tantalum oxide, or germanium.

[0021] Fig. Figure 3 is a diagram of an optical device showing additional details for an on-chip optical isolator 308 according to various embodiments. In some embodiments, the on-chip optical isolator 308 may correspond to the optical isolator 108, which, with respect to Fig. 1 described, or the optical insulator 208, which relates to Fig. 2 was described. In embodiments, the optical isolator 308 can be structured in a Mach-Zehnder interferometer (MZI) configuration. A first splitter 310 can receive light from a laser, such as the light source 104 or the laser 204, in a waveguide 312. The first splitter 310 can split the light from the waveguide 312 into a first insulator waveguide 314 and a second insulator waveguide 316.

[0022] In some embodiments, the photonic silicon circuit components on a PIC, which is different from the insulator, can use transverse electrical (TE) polarization. In some embodiments, transverse magnetic (TM) polarization can be used to achieve significant overlap between the optical mode and the garnet film. In some embodiments, the first insulator waveguide 314 can have a first polarization rotator 318 and a second polarization rotator 320. The second insulator waveguide 316 can have a third polarization rotator 322 and a fourth polarization rotator 324. In some embodiments, the insulator 308 can have a magneto-optical garnet film 328 grown in liquid-phase epitaxy.The garnet film 328 can be adjacent to the first insulator waveguide 314 and the second insulator waveguide 316 and, in various embodiments, can extend over the polarization rotators 318, 320, 322, and 324. In various embodiments, the width of the first insulator waveguide 314 and the second insulator waveguide 316 in the portion of the waveguides passing under the garnet film 328 can be between greater than or equal to 220 nm and less than or equal to 300 nm. In some embodiments, the polarization rotators 318, 320, 322, and 324 can rotate light to be in a TM orientation while they are under the garnet film 328 and to be back in a TE orientation when they are no longer under the garnet film 328.The optical isolator 308 can have a reciprocal phase shifter, such as a reciprocal π / 2 phase shifter 330, along one of the first or second isolator waveguides, such as the first isolator waveguide 314, as shown. A second divider 332 can be coupled to the first isolator waveguide 314 and the second isolator waveguide 316 and can provide an output on an isolator output waveguide 334, which can be coupled to additional photonic components such as the photonic devices 106 or the photonic devices 206. In embodiments, the first divider 310 and / or the second divider 332 can be a multimode interference (MMI) device.

[0023] In various embodiments, a magnetic field can saturate the garnet film 328 and can be applied externally with an external source (not shown) such as a permanent magnet or an induction coil, or the garnet film 328 can have an intrinsic magnetization. The optical isolator 308 can utilize a non-reciprocal phase shift (NRPS) generated by the garnet film 328. In embodiments, light propagating in forward and reverse directions can experience opposite phase shifts, enabling constructive interference in the forward direction and destructive interference in the reverse direction, thus preventing light from propagating back into a laser cavity. In some embodiments, the light can experience a phase shift of approximately 45 degrees in one direction and approximately minus 45 degrees in the opposite direction in each waveguide adjacent to the MO garnet film.In various embodiments, the evanescent end of the optical field can interact with the waveguide and the MO garnet film 328, generating a sufficient NRPS to achieve fully destructive interference in the MZI.

[0024] Fig. 4A to Fig. Figure 4D schematically illustrates a cross-sectional side view of a PIC 403 with an on-chip optical isolator 408 according to several embodiments at various stages of development. In various embodiments, the PIC 403 can correspond to the PIC 103, which differs in terms of Fig. 1 was described, or the PIC 203, which relates to Fig. 2 was described. In some embodiments, the insulator 408 can correspond to the insulator 108, the insulator 208, or the insulator 308, which, with respect to Fig. 1 to 3 were described. Fig. Sections 4A to 4D are described in more detail with reference to Fig. 6 described.

[0025] Fig. Figure 5 shows an additional detail of a section of an on-chip optical isolator 508, which includes the positioning of polarization rotators, according to various embodiments. The optical isolator 508 can be adapted in various embodiments to the one described in reference to Fig. 1 optical insulator 108 described above, which with reference to Fig. 2 optical insulator 208 described above, which refers to Fig. 3 optical insulator 308 described above or the one with reference to Fig. The optical isolator 508 corresponds to the optical isolator 508 described in Figures 4A to 4D. In various embodiments, the optical isolator 508 can have a first waveguide 514 and a second waveguide 516. The first waveguide 514 can have a first polarization rotator (PR) 518 and a second PR 520. The second waveguide 516 can have a third PR 522 and a fourth PR 524. A magneto-optical garnet film 528 can be adjacent to and / or coupled with the first waveguide 514 and the second waveguide 516. In various embodiments, the garnet film 528 can cover the polarization rotators in one or more waveguides of an optical isolator, as described in Figures 4A to 4D. Fig. 3 are described, shown. In some embodiments, the polarization rotators may not be covered by the garnet film 528 in one or more waveguides of an optical isolator, as shown with respect to the first waveguide 514.

[0026] In general, light from a laser such as light source 104, laser 204, or laser 404 can enter one or more waveguides of an optical isolator such as optical isolator 108, 208, 308, 408, or 508 into a transverse electrical (TE) mode. In various embodiments, a first set of polarization rotators, such as polarization rotators 518 and 522, can rotate the polarization of the light in the waveguide such that it is in a transverse magnetic (TM) mode when passing through some or all of the magneto-optical grenade films, such as grenade films 228, 328, 428, or 528. In some embodiments, a second set of polarization rotators, such as polarization rotators 520 and 524, can rotate the polarization of the light back from the TM mode to the TE mode.A significant TM light component can be located above the waveguide, leading to strong reflections at the entrance and exit of the grenade region when the light at the grenade interface is in TM mode. In various embodiments, it may be preferred to enable TE polarization at the grenade interface intersections to reduce this reflection by positioning the polarization rotators below the grenade film, as with respect to the second waveguide 516 and in the optical isolator 308. Fig. 3 shown.

[0027] Fig. Figure 6 is a flowchart illustrating a method 600 for fabricating a photonic integrated circuit comprising an optical on-chip isolator according to the various embodiments. In embodiments, the method 600 can be implemented in practice such that a PIC, like the one referred to in Fig. 1 described PIC 103, which refers to Fig. 2 described PIC 203, which refers to Fig. 3 described optical on-chip isolator 308, which with reference to Fig. 4A to 4D described PIC 403 and / or elements of a such with reference to Fig. The optical on-chip isolator described in section 5 can be fabricated. In embodiments, the PIC can be fabricated on an SOI wafer with a silicon substrate, an insulating layer, and a silicon layer such as the layers below layer 405 described in section 5. Fig. 4A to 4D are shown, and you must be trained.

[0028] In a block 602, method 600 can form at least one waveguide of a PIC, such as the PIC 403, which is in Fig. Figures 4A to 4D are included. In embodiments, the formation of the at least one waveguide may include the formation of one or more waveguides in a waveguide layer of the PIC. In various embodiments, the waveguides may include waveguides such as waveguides 205, 312, 314, 316, 334, 405, 514, and / or 516. In some embodiments, one or more of the waveguides may be formed in a waveguide layer. In embodiments, one or more polarization rotators may be formed in at least one waveguide, such as polarization rotators 318, 320, 322, and 324, which are described in relation to Fig. 3 are described. In some embodiments, the waveguides can be formed in a silicon layer of an SOI wafer.

[0029] In block 604, method 600 may involve forming a laser on the PIC. In some embodiments, the laser may be a hybrid laser, such as those described in relation to Fig. 1 described light source 104, which in relation to Fig. 2 described laser 204 or the one relating to Fig. 4 lasers 404 described. In various embodiments, a photonic wafer, which may be a photonic silicon wafer, an SOI wafer, or another wafer type, can be partially or completely fabricated on one or more of the blocks 602 and 604, including waveguides, lasers, modulators, multiplexers, and / or other optical components. In some embodiments, block 606 may have an oxide coating, such as the oxide coating 406 from Fig. 4A to 4D are deposited onto the waveguide formed in block 602 and / or the laser formed in block 604. Fig. Figures 4A to 4D show the PIC 403 after removing a section of the oxide coating 406 from above the waveguide 405.

[0030] In a block 608, the method 600 can involve removing a section of the oxide cladding formed on block 606 from a waveguide in a subsection of the waveguide following the laser formed at block 604. In embodiments, the oxide cladding can be removed in an insulator region, thereby exposing the silicon. In some embodiments, the removed oxide cladding can correspond to a section of the original oxide cladding layer 406. The oxide cladding can be removed from over a subsection 407 of the waveguide 405, as shown in Fig. Figure 4A shows various embodiments. In some embodiments, the oxide coating can be removed by a dry etching process, a wet etching process, or another technique.

[0031] In a block 610, the process 600 can be used to bond a magneto-optical (MO) grown garnet film in liquid-phase epitaxy to the waveguide in the process of forming an optical insulator, such as an optical insulator 408, which is in Fig. Figures 4B to 4D are included. In various embodiments, the garnet film can form part of an optical isolator such as optical isolator 108, 208, 308, or 508. In some embodiments, the magneto-optical garnet film can correspond to garnet film 228, 328, 428, and / or 528. Prior to PIC bonding, the MO garnet film can be located on a garnet die, which in various embodiments has a lattice-matched substrate. The substrate can correspond to substrate 229 or substrate 429, which is shown in Figure 4B to 4D. Fig. Figures 4B to 4D are shown in some embodiments. In various embodiments, the garnet die can be flip-chip bonded with the front facing down to the waveguide 405, so that the MO film material is in direct contact with the silicon waveguides in the insulator region. In some embodiments, the garnet die can be bonded to the metal outside the waveguide region using plasma activation (hydrophilic) bonding, high vacuum (room temperature hydrophobic) bonding, adhesive bonding, soldering, eutectic metal bonding, or another bonding technique.

[0032] In various embodiments, the garnet film can be formed from a material belonging to a rare-earth garnet family and can exhibit high Faraday rotation and low optical loss to generate a relatively high NRPS over a relatively short length. In some embodiments, the garnet film can be a rare-earth iron garnet (RIG) material (e.g., R3Fe5O). 12 ), a rare-earth gallium garnet (RGG) material (e.g., R3Ga5O) 12 ) or a rare earth aluminum garnet (RAG) material (e.g., R3Al5O) 12The garnet film can exhibit a wide variety of elements, such as bismuth (Bi), lutetium (Lu), holmium (Ho), gadolinium (Gd), yttrium (Y), or others, selected at least in part based on Faraday rotation, magnetization, or other physical properties. In some embodiments, the MO material can be grown as a single crystal on a lattice-matched substrate using liquid-phase epitaxy (LPE), although other growth or deposition methods may be employed. Various embodiments may utilize a bismuth-iron garnet (BIG)-based material grown by LPE on a gadolinium-gallium garnet (GGG) substrate, or a variant that may include elements such as Lu, Gd, Ga, Ho, Al, or others.In some embodiments, the substrate may also include additional elements such as europium (Eu) to more closely match a lattice constant of a desired MO film. In some embodiments, the waveguide may be a silicon waveguide, and the MO garnet film may be directly bonded to a silicon surface of the waveguide, such as by using a plasma-activated or other bonding process between the MO garnet film and the silicon.

[0033] In a block 612, the method 600 can involve depositing a coating onto the garnet film. In various embodiments, the coating can be a coating such as a coating 430, which is in Fig. 4C to 4D, or another cladding material. The cladding can be formed from a material such as silicon dioxide, silicon nitride, an oxynitride, or another cladding material in various embodiments. In some embodiments, the cladding can reduce reflections that would otherwise occur at an interface of one or more edges of the garnet film and the waveguide by reducing a refractive index difference where the waveguide has passed into and out of the garnet-clad region, thereby reducing reflections and optical loss. In some embodiments, the model evidence suggests that the facet loss can be reduced from an approximate 7 dB literature value to approximately a few tenths of a dB by using polarization rotators as described in relation to Fig. 3 are positioned as described and a casing is added as described in relation to block 612.

[0034] In block 614, method 600 may involve removing at least a section of substrate 429 coupled to the garnet film. In various embodiments, the section of substrate may be removed using a technique such as grinding, polishing, wet / dry etching, or another technique. In some embodiments, a section of the encapsulation may also be removed. In various embodiments, the substrate may have a thickness of approximately 500 micrometers before the removal process and may have a thickness greater than or equal to 5 micrometers and less than or equal to 50 micrometers after the removal process. In some embodiments, the substrate may have a thickness of approximately 30 micrometers after the removal process. After removal of the substrate material, the PIC may be similar to that described in Fig. PIC 403 shown in 4D, in which the height of the garnet die of the insulator 408 is compared to its height in Fig. 4C is shown reduced. In various embodiments, the cladding material deposited on block 612 during removal from the top of the garnet die can still be present at the edges of the garnet film 428 and / or between the garnet die and the oxide cladding 406, so that the waveguide 405 in this area is covered by the cladding 430 instead of being exposed to air. In some embodiments, the cladding deposited on block 612 can be deposited after, rather than before, the removal of the substrate from block 614.

[0035] For block 616, procedure 600 may also include performing other actions such as performing additional lithographic techniques, forming conductive areas on the PIC and / or packaging the PIC.

[0036] Fig. Figure 7 shows an exemplary computer device 700, which is designed for use with various components and methods from Fig. 1 to 6 is suitable, such as the optoelectronic system 100 with the optical device 102 with the PIC 103 and the optical isolator 108, which with reference to Fig. 1 are described, the PIC 203 and the optical isolator 208, which with reference to Fig. 2 are described, the optical insulator 308, which in relation to Fig. 3 is described, the PIC 403 and the optical isolator 408, which with reference to Fig. 4 are described, the optical insulator 508, which with reference to Fig. 5 is described, and / or the PIC and the optical isolator, which according to the with reference to Fig. The computer device 700 described in Section 6 has been designed according to various embodiments. As shown, the computer device 700 can have one or more processors or processor cores 702 and a system memory 704. For the purposes of this application, including the claims, the terms "processor" and "processor cores" can be considered synonymous unless the context clearly requires otherwise. The processor 702 can have any type of processor, such as a central processing unit (CPU), a microprocessor, and the like. The processor 702 can be implemented as a multi-core integrated circuit, e.g., a multi-core microprocessor. The computer device 700 can have mass storage devices 706 (such as a floppy disk, a hard disk, volatile memory (e.g., a memory chip)).a dynamic random-access memory (DRAM), read-only compact disc memory (CD-ROM), DVD (Digital Versatile Disc), and so forth). In general, the system memory 704 and / or the mass storage devices 706 can be temporary and / or persistent memory of any type, including, but not limited to, volatile and non-volatile memory, optical, magnetic, and / or solid-state mass storage, and so forth. The volatile memory can be, but is not limited to, static and / or dynamic random-access memory. A non-volatile memory can be, but is not limited to, electrically erasable programmable read-only memory, phase-change memory, resistance memory, etc.

[0037] The computer device 700 may further comprise input / output devices 708 (such as a display (e.g., a touchscreen display), keyboard, cursor control, remote control, game control, image capture device, etc.) and communication interfaces 710 (such as network interface cards, modems, infrared receivers, radio receivers (e.g., Bluetooth), and so on). The computer device 700 may comprise an optoelectronic system 750, which may include an optical device 752 with a PIC 754 having an on-chip optical isolator.In various embodiments, the optoelectronic system can be configured similarly to the optoelectronic system 100, the optical device 752 can be configured similarly to the optical device 102 and / or the PIC 754 can be configured similarly to the PIC 103, PIC 203 or PIC 403 and / or can have an on-chip optical isolator configured similarly to the optical isolator 108, 208, 308, 408 and / or 508.

[0038] The communication interfaces 710 can include communication chips (not shown) configured to operate the device 700 according to a Global Mobile Communications System (GSM), General Packet Radio Service (GPRS), Universal Mobile Telecommunications System (UMTS), High Speed ​​Packet Access (HSPA), Evolved HSPA (E-HSPA), or Long-Term Evolution (LTE) network. The communication chips can also be configured to operate according to Enhanced Data for GSM Evolution (EDGE), GSM EDGE Radio Access Network (GERAN), Universal Terrestrial Radio Access Network (UTRAN), or Evolved UTRAN (E-UTRAN).The communication chips can be configured to operate according to CDMA (Code Division Multiple Access), TDMA (Time Division Multiple Access), DECT (Digital Enhanced Cordless Telecommunications), Evolution-Data Optimized (EV-DO), and derivatives thereof, as well as according to any other wireless protocol designated as 3G, 4G, 5G, and beyond. The 710 communication interfaces can operate according to other wireless protocols in other embodiments.

[0039] The elements of the computer device 700 described above can be interconnected via the system bus 712, which can represent one or more buses. In the case of multiple buses, they can be bridged by one or more bus bridges (not shown). Each of these elements can perform its conventional functions known in the prior art. In particular, the system memory 704 and the mass storage devices 706 can be used to store a working copy and a permanent copy of the programming instructions, such as drivers, for the operation of various components of the computer system 700, including the operation of the optical device 102. Fig. 1, the PIC 203 from Fig. 2, the PIC 403 from Fig. 4, an operating system of the Computer System 700 and / or one or more applications, collectively referred to as the Computing Logic 722, are, but not limited to, the following. The various elements can be implemented by assembly instructions supported by Processor(s) 702 or by high-level languages ​​that can be compiled into such instructions.

[0040] The permanent copy of the programming instructions can be made in mass storage devices 706 at the factory or on-site, e.g., via a distribution medium (not shown), such as a compact disc (CD), or via the communication interface 710 (from a distribution server (not shown)). This means that one or more distribution media containing an implementation of the agent program can be used to distribute the agent and to program the various computer devices.

[0041] The number, capability, and / or capacity of elements 708, 710, and 712 may vary depending on whether the computer device 700 is used as a stationary computer device, such as a set-top box or desktop computer, or as a mobile computer device, such as a tablet computer device, laptop computer, game console, or smartphone. These configurations are otherwise known and are therefore not described further.

[0042] In some embodiments, at least one of the processors 702 can be packed together with all or sections of the computation logic 722, which are configured to enable aspects of embodiments described herein to form a system-in-package (SiP) or a system-on-chip (SoC).

[0043] The computer device 700 may include or otherwise be associated with an optoelectronic system, and may include components and / or implement methods relating to Fig. Sections 1 to 6 describe how the optoelectronic system 100, which implements aspects of the optical device 102, including the PIC 103, 203 or 403 or the optical isolator 108, 208, 308, 408 or 508, as described above, and in particular the embodiments of the optical isolator, which with reference to Fig.as described in sections 1 to 6. In some embodiments, at least some components of the optoelectronic system 100 (e.g., the optical device 102) can be communicatively coupled with the computer device 700 and / or incorporated into one or more components of the computer device 700, such as the communication interfaces 710. In some embodiments, one or more components, such as the processor 702, can be incorporated as part of the optoelectronic system 100.

[0044] In various implementations, the Computer Device 700 can comprise one or more components of a data center, laptop, netbook, notebook, ultrabook, smartphone, tablet, personal digital assistant (PDA), ultramobile PC, mobile phone, or digital camera. In other implementations, the Computer Device 700 can be any other electronic device that processes data. EXAMPLES Example 1 can include a photonic integrated circuit comprising: a laser, and an on-chip insulator optically coupled to the laser, wherein the on-chip insulator has an optical waveguide having a subsection coupled to a magneto-optical garnet film grown in liquid phase epitaxy. Example 2 can include the item from Example 1, wherein the on-chip insulator further comprises a casing coupled to the garnet film. Example 3 can have the object from Example 2, wherein the coating has silicon dioxide, silicon oxynitride or silicon nitride. Example 4 can comprise the object from any one of Example 1 to 3, wherein the optical waveguide is a first optical waveguide and the on-chip insulator further comprises a second optical waveguide, wherein the garnet film is coupled to both the first and the second optical waveguide and the on-chip insulator is arranged in a Mach-Zehnder interferometer configuration. Example 5 can include the object from Example 4, wherein the on-chip insulator further comprises: a first divider coupled to the first and second optical waveguides; and a second divider coupled to the first and second optical waveguides, wherein the garnet film is coupled to a subsection of the first and second optical waveguides between the first and second divider. Example 6 can feature the object from any of Examples 1 to 5, wherein the garnet film is formed from a material from a rare earth garnet family. Example 7 can include the item from Examples 1 to 6, wherein the garnet film comprises a rare earth iron garnet material, a rare earth gallium garnet material, or a rare earth aluminum garnet material. Example 8 may contain the object from any of Examples 1 to 7, wherein the garnet film contains at least one of bismuth, lutetium, holmium, gadolinium or yttrium. Example 9 can include the object from any of Examples 1 to 8, wherein the optical waveguide has a width of more than or equal to 220 nanometers and less than or equal to 300 nanometers along the portion of the optical waveguide that is coupled to the garnet film. Example 10 can comprise the object from any of Examples 1 to 9, wherein the on-chip insulator further comprises: a first polarization rotator; and a second polarization rotator, wherein the first and second polarization rotators are spaced apart from each other along the portion of the optical waveguide coupled to the garnet film. Example 11 can comprise the article of Example 1, wherein the on-chip insulator further comprises a cladding coupled to the garnet film, wherein: the cladding comprises silicon dioxide, silicon oxynitride, or silicon nitride; the garnet film comprises a rare-earth iron garnet material, a rare-earth gallium garnet material, or a rare-earth aluminum garnet material; the optical waveguide is a first optical waveguide, and the on-chip insulator further comprises a second optical waveguide; the garnet film is coupled to the first and second optical waveguides; the on-chip insulator is arranged in a Mach-Zehnder interferometer configuration; and the on-chip insulator further comprises at least one polarization rotator in a subsection of at least one of the first and second optical waveguides coupled to the garnet film. Example 12 may include a method for fabricating a photonic integrated circuit comprising: forming a laser; and forming an on-chip insulator, wherein forming an on-chip insulator includes: providing a waveguide; removing an oxide coating from the waveguide; bonding a magneto-optical garnet film to the waveguide in the area where the oxide coating has been removed; and depositing a coating onto the garnet film. Example 13 can feature the object from Example 12, where the garnet film is a garnet film grown in a liquid phase epitaxy. Example 14 may include the item from Example 13, wherein the coating comprises silicon dioxide, silicon oxynitride or silicon nitride. Example 15 can feature the object from any of Examples 12 to 14, wherein the garnet film is formed from a material from a rare earth garnet family. Example 16 may comprise the object from any of Examples 12 to 15, wherein the garnet film comprises a rare earth iron garnet material, a rare earth gallium garnet material, or a rare earth aluminum garnet material. Example 17 may contain the object from any of Examples 12 to 16, wherein the garnet film contains at least one of bismuth, lutetium, holmium, gadolinium or yttrium. Example 18 can comprise the object from any of Examples 12 to 17, wherein a substrate is coupled to the garnet film and the method further comprises the removal of a section of the substrate. Example 19 can include an optical system comprising: a processor; and an optical device coupled to the processor, wherein the optical device comprises: a photonic integrated circuit comprising: a laser; and an on-chip isolator optically coupled to the laser, wherein the on-chip isolator has an optical waveguide having a subsection coupled to a magneto-optic garnet film grown in liquid phase epitaxy. Example 20 can include the item from Example 19, wherein the on-chip insulator has a casing coupled to the garnet film. Example 21 can feature the object from any of Examples 19 to 20, wherein the garnet film is formed from a material from a rare-earth garnet family. Example 22 may comprise the object from any of Examples 19 to 21, wherein the garnet film comprises a rare earth iron garnet material, a rare earth gallium garnet material, or a rare earth aluminum garnet material. Example 23 may contain the object from any of Examples 19 to 22, wherein the garnet film contains at least one of bismuth, lutetium, holmium, gadolinium or yttrium. Example 24 can include the object from any of Examples 19 to 23, wherein the on-chip insulator has a first polarization rotator and a second polarization rotator, the first and second polarization rotators being spaced apart from each other along the portion of the optical waveguide coupled to the garnet film. Example 25 can include a photonic integrated circuit comprising: a means for emitting coherent light; and a means for optically isolating the means for emitting coherent light coupled to the means for emitting coherent light on the chip, wherein the means for optically isolating the means for emitting coherent light comprises an optical waveguide having a subsection coupled to a magneto-optical garnet film grown in liquid phase epitaxy. Example 26 can include the object from Example 25, wherein the means for optically isolating the means for emitting coherent light comprises a sheath coupled to the garnet film. Example 27 may include the item from Example 26, wherein the coating comprises silicon dioxide, silicon oxynitride or silicon nitride. Example 28 may comprise the subject matter of any of Examples 25 to 27, wherein the optical waveguide is a first optical waveguide and the means for optically isolating the means for emitting coherent light further comprises a second optical waveguide, wherein the garnet film is coupled to both the first and the second optical waveguide and the means for optically isolating the means for emitting coherent light is arranged in a Mach-Zehnder interferometer configuration. Example 29 may comprise the subject matter of any of Examples 25 to 28, wherein the optical isolating means of the coherent light-emitting means further comprising: a first light-splitting means coupled to the first and second optical waveguides; and a second light-splitting means coupled to the first and second optical waveguides, wherein the garnet film is coupled to a subsection of the first and second optical waveguides between the first and second light-splitting means. Example 30 may feature the object from any of Examples 25 to 29, wherein the garnet film is formed from a material from a rare earth garnet family. Example 31 may include the object from any of Examples 25 to 30, wherein the garnet film comprises a rare earth iron garnet material, a rare earth gallium garnet material, or a rare earth aluminum garnet material. Example 32 may contain the object from any of Examples 25 to 31, wherein the garnet film contains at least one of bismuth, lutetium, holmium, gadolinium or yttrium. Example 33 can include the object from any of Examples 25 to 32, wherein the optical waveguide has a width of more than or equal to 220 nanometers and less than or equal to 300 nanometers along the portion of the optical waveguide that is coupled to the garnet film. Example 34 may comprise the subject matter of any of Examples 25 to 33, wherein the means for optically isolating the means for emitting coherent light further comprises: a first means for rotating a polarization of light; and a second means for rotating a polarization of light, wherein the first and the second means for rotating a polarization of light are spaced apart from each other along the portion of the optical waveguide coupled to the garnet film. Example 35 can comprise the article of Example 25, wherein the optical isolating means of the coherent light-emitting means comprises a sheath coupled to the garnet film, wherein: the sheath comprises silicon dioxide, silicon oxynitride, or silicon nitride; the garnet film comprises a rare-earth iron garnet material, a rare-earth gallium garnet material, or a rare-earth aluminum garnet material; the optical waveguide is a first optical waveguide, and the optical isolating means of the coherent light-emitting means further comprises a second optical waveguide; the garnet film is coupled to the first and the second optical waveguides; the optical isolating means of the coherent light-emitting means is arranged in a Mach-Zehnder interferometer configuration;and the means for optically isolating the means for emitting coherent light further comprises at least a means for rotating a polarization of light in a subsection of at least one of the first and second optical waveguides coupled to the garnet film.

[0045] Various embodiments may include any suitable combination of the embodiments described above, including alternative (or) embodiments of embodiments described above in the connecting phrase (and) (e.g., the "and" may be "and / or"). Furthermore, some embodiments may include one or more manufacturing articles (e.g., non-volatile, computer-readable media) with instructions stored thereon that, when executed, result in actions of one of the embodiments described above. Additionally, some embodiments may include devices or systems comprising any suitable means for performing the various operations of the embodiments described above.

[0046] The above description of the illustrated implementations of the invention, including what is described in the abstract, is not intended to be exhaustive or to limit the invention to the exact forms disclosed. While specific implementations of and examples of the invention are described herein for illustrative purposes, various equivalent modifications within the scope of the invention are possible, as a person skilled in the art in the relevant field will recognize.

[0047] These modifications can be made to the invention in light of the detailed description above. The terms used in the following claims are not to be interpreted as limiting the invention to the specific implementations disclosed in the specification and the claims. Rather, the scope of the invention is to be fully determined by the following claims, which are to be interpreted in accordance with the established principles of claim interpretation.

Claims

[1] Photonic integrated circuit (103, 203, 403, 754) comprising: a laser (104, 204, 404) over an optical waveguide (205, 312, 405); and an on-chip insulator (108, 208, 308, 408, 508) optically coupled to the laser (104, 204, 404), the on-chip insulator (108, 208, 308, 408, 508) comprising the optical waveguide (205, 312, 405), a magneto-optical garnet film (228, 328, 428, 528) grown in liquid phase epitaxy, coupled to a first subsection of the optical waveguide (205, 312, 405), and a grating-matched substrate (229, 429) on the garnet film (228, 328, 428, 528), wherein at least a second subsection of the optical waveguide (205, 312, 405) and / or an oxide coating (406) is formed on the laser (104, 204, 404), and wherein the garnet film (228, 328, 428, 528) lies below an upper surface of the oxide coating (406). [2] Photonic integrated circuit (103, 203, 403, 754) according to claim 1, wherein the on-chip insulator (108, 208, 308, 408, 508) further comprises a cladding coupled to the garnet film (228, 328, 428, 528). [3] Photonic integrated circuit (103, 203, 403, 754) according to claim 2, wherein the casing comprises silicon dioxide, silicon oxynitride or silicon nitride. [4] Photonic integrated circuit (103, 203, 403, 754) according to claim 1, wherein the optical waveguide (205, 312, 405) is a first optical waveguide (314, 514) and the on-chip insulator (108, 208, 308, 408, 508) further comprises a second optical waveguide (316, 516), wherein the garnet film (228, 328, 428, 528) is coupled to both the first and the second optical waveguide (314, 316, 514, 516) and the on-chip insulator (108, 208, 308, 408, 508) is arranged in a Mach-Zehnder interferometer configuration. [5] Photonic integrated circuit (103, 203, 403, 754) according to claim 4, wherein the on-chip insulator (108, 208, 308, 408, 508) further comprises: a first divider (310) coupled to the first and second optical waveguides (314, 316, 514, 516); and a second divider (332) coupled to the first and second optical waveguides (314, 316, 514, 516), wherein the garnet film (228, 328, 428, 528) is coupled to a section of the first and second optical waveguides (314, 316, 514, 516) between the first and second divider (310, 332). [6] Photonic integrated circuit (103, 203, 403, 754) according to any one of claims 1 to 5, wherein the garnet film (228, 328, 428, 528) is formed from a material from a rare earth garnet family. [7] Photonic integrated circuit (103, 203, 403, 754) according to any one of claims 1 to 5, wherein the garnet film (228, 328, 428, 528) comprises a rare earth iron garnet material, a rare earth gallium garnet material or a rare earth aluminum garnet material. [8] Photonic integrated circuit (103, 203, 403, 754) according to any one of claims 1 to 5, wherein the garnet film (228, 328, 428, 528) comprises at least one of bismuth, lutetium, holmium, gadolinium or yttrium. [9] Photonic integrated circuit (103, 203, 403, 754) according to any one of claims 1 to 5, wherein the optical waveguide (205, 312, 405) has a width of more than or equal to 220 nanometers and less than or equal to 300 nanometers along the portion of the optical waveguide (205, 312, 405) that is coupled to the garnet film (228, 328, 428, 528). [10] Photonic integrated circuit (103, 203, 403, 754) according to any one of claims 1 to 5, wherein the on-chip insulator (108, 208, 308, 408, 508) further comprises: a first polarization rotator; and a second polarization rotator, wherein the first and the second polarization rotator are spaced apart along the section of the optical waveguide (205, 312, 405) that is coupled to the garnet film (228, 328, 428, 528). [11] Photonic integrated circuit (103, 203, 403, 754) according to claim 1, wherein the on-chip insulator (108, 208, 308, 408, 508) further comprises a cladding coupled to the garnet film (228, 328, 428, 528), wherein: the coating contains silicon dioxide, silicon oxynitride or silicon nitride; the garnet film (228, 328, 428, 528) contains a rare earth iron garnet material, a rare earth gallium garnet material or a rare earth aluminum garnet material; the optical waveguide (205, 312, 405) is a first optical waveguide (314, 514) and the on-chip insulator (108, 208, 308, 408, 508) further comprises a second optical waveguide (316, 516); the grenade film (228, 328, 428, 528) is coupled to the first and second optical waveguides (314, 316, 514, 516); the on-chip isolator (108, 208, 308, 408, 508) is arranged in a Mach-Zehnder interferometer configuration; and the on-chip insulator (108, 208, 308, 408, 508) further comprises at least one polarization rotator in a subsection of at least one of the first and second optical waveguides (314, 316, 514, 516) coupled to the garnet film (228, 328, 428, 528). [12] Method (600) for fabricating a photonic integrated circuit (103, 203, 403, 754), comprising: Forming (602) an optical waveguide (205, 312, 405); Formation (604) of a laser (104, 204, 404) over the optical waveguide (205, 312, 405); and Forming an on-chip isolator (108, 208, 308, 408, 508) optically coupled to the laser (104, 204, 404), wherein forming an on-chip isolator (108, 208, 308, 408, 508) includes: Removal (608) of an oxide coating (406) from a first subsection of the optical waveguide (205, 312, 405); Bonding (610) of a magneto-optical, liquid-phase epitaxy grown grenade film (228, 328, 428, 528) to the waveguide (205, 312, 405) in the first subsection; and Deposition (612) of a coating onto the garnet film (228, 328, 428, 528), wherein the garnet film (228, 328, 428, 528) lies below an upper surface of the oxide coating (406), and wherein a lattice-adapted substrate (229, 429) is coupled to the garnet film (228, 328, 428, 528). [13] Method (600) according to claim 12, wherein the coating comprises silicon dioxide, silicon oxynitride or silicon nitride. [14] Method (600) according to claim 12, wherein the garnet film (228, 328, 428, 528) is formed from a material from a rare earth garnet family. [15] Method (600) according to any one of claims 12 to 14, wherein the garnet film (228, 328, 428, 528) comprises a rare earth iron garnet material, a rare earth gallium garnet material or a rare earth aluminum garnet material. [16] Method (600) according to any one of claims 12 to 14, wherein the garnet film (228, 328, 428, 528) comprises at least one of bismuth, lutetium, holmium, gadolinium or yttrium. [17] Method (600) according to any one of claims 12 to 14, wherein the method further comprises removing a section of the substrate (229, 429). [18] Optical system (100, 750), comprising: a processor (702); and an optical device (752) coupled to the processor (702), wherein the optical device (752) comprises: a photonic integrated circuit (103, 203, 403, 754), comprising: a laser (104, 204, 404) over an optical waveguide (205, 312, 405); and an on-chip insulator (108, 208, 308, 408, 508) optically coupled to the laser (104, 204, 404), the on-chip insulator (108, 208, 308, 408, 508) comprising the optical waveguide (205, 312, 405), a magneto-optical garnet film (228, 328, 428, 528) grown in liquid phase epitaxy, coupled to a first subsection of the optical waveguide (205, 312, 405), and a grating-matched substrate (229, 429) on the garnet film (228, 328, 428, 528), wherein at least a second subsection of the optical waveguide (205, 312, 405) and / or an oxide coating (406) is formed on the laser, wherein the garnet film (228, 328, 428, 528) lies below an upper surface of the oxide coating (406). [19] Optical system (100, 750) according to claim 18, wherein the on-chip insulator (108, 208, 308, 408, 508) has a casing coupled to the garnet film (228, 328, 428, 528). [20] Optical system (100, 750) according to claim 18, wherein the garnet film (228, 328, 428, 528) is formed from a material from a rare earth garnet family. [21] Optical system (100, 750) according to any one of claims 18 to 20, wherein the garnet film (228, 328, 428, 528) comprises a rare earth iron garnet material, a rare earth gallium garnet material or a rare earth aluminum garnet material.

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