Silicon carbide epitaxy substrate and method for fabricating a silicon carbide semiconductor device

Abstract

Silicon carbide epitaxy substrate (100), comprising: a single-crystal silicon carbide substrate (10) with a first main surface (11); and a silicon carbide layer (20) on the first main surface (11), wherein the silicon carbide layer (20) has a surface (14) in contact with the single-crystal silicon carbide substrate (10) and a second main surface (12) opposite the surface (14), the second principal surface (12) is a plane inclined at a dislocation angle in a dislocation direction relative to a {0001} plane, the second main surface (12) has one or more defects (1, 2) and Assuming that the one or more defects satisfying the relationships of formula 1 and formula 2 are first defects (1) and the one or more defects (1, 2) satisfying the relationships of formula 3 and formula 2 are second defects (2), where the dislocation angle is θ°, the thickness of the silicon carbide layer (20) in a direction perpendicular to the second principal surface (12) is W µm, the width of each of the one or more defects (1, 2) in a direction parallel to a direction obtained by projecting the dislocation direction onto the second principal surface (12) is L µm, and the width of each of the one or more defects (1, 2) in a direction perpendicular to the dislocation direction and parallel to the second principal surface (12) is Y µm, then a value obtained by dividing a number of second defects (2) by a sum of a number of first defects (1) and the number of second defects (2) will be receivedgreater than 0.5, , wherein the second defects (2) in view in the direction perpendicular to the second main surface (12) have a polygonal shape with four or more sides, and wherein the second defects (2) originate from a threaded screw displacement (25), where: LY ≦ 1 0.8 × W tan θ < L < 1.2 × W tan θ 1 < LY

Description

AREA OF INVENTION

[0001] The present invention relates to a silicon carbide epitaxy substrate and a method for manufacturing a silicon carbide semiconductor device. STATE OF THE ART

[0002] Document JP 2014 - 170 891 A discloses a method for the epitaxial growth of a silicon carbide layer on a single-crystal silicon carbide substrate.

[0003] From German patent application DE 11 2014 004 068 T5, a silicon carbide epitaxy substrate with a principal area is known. This known epitaxy substrate comprises a support substrate and a silicon carbide epitaxy layer formed on the support substrate, which has the principal area. The principal area has a surface roughness of 0.6 nm or less, wherein the ratio of the standard deviation of a nitrogen concentration in the silicon carbide epitaxy layer on a surface layer with the principal area within a plane of the silicon carbide epitaxy substrate to a mean nitrogen concentration in the silicon carbide epitaxy layer on the surface layer within the plane of the silicon carbide epitaxy substrate is 15% or less.

[0004] Document US 2012 / 0280254A1 describes a SiC epitaxy wafer in which a SiC epitaxy layer is formed on a 4H-SiC single-crystal substrate inclined at an angle of 0.4° to 5°, with a density of triangular defects in the surface of this SiC epitaxy layer of 1 defect / cm². 2 or less. SUMMARY OF THE INVENTION

[0005] The invention, in a first aspect, provides a silicon carbide epitaxy substrate according to independent claim 1, with advantageous embodiments defined in dependent claims 2 to 7. Furthermore, in a second aspect, a method is defined according to independent claim 8.

[0006] The silicon carbide epitaxy substrate according to the first aspect comprises: a single-crystal silicon carbide substrate with a first principal surface; and a silicon carbide layer on the first principal surface. The silicon carbide layer comprises a surface in contact with the single-crystal silicon carbide substrate and a second principal surface opposite the first principal surface. The second principal surface is a plane inclined at a dislocation angle in a dislocation direction relative to a {0001} plane. The second principal surface has at least one defect. Assuming that the at least one defect satisfying the relations of Equation 1 and Equation 2 represents first defects, and that the at least one defect satisfying the relations of Equation 3 and Equation 2 represents second defects, where the dislocation angle is θ°, and the thickness of the silicon carbide layer in a direction perpendicular to the second principal surface is W µm,a width of each of the one or more defects in a direction obtained by projecting a direction parallel to the dislocation direction onto the second principal surface is L µm, and a width of each of the one or more defects in a direction perpendicular to the dislocation direction and parallel to the second principal surface is Y µm, is then a value obtained by dividing a number of second defects by a sum of a number of first defects and the number of second defects, greater than 0.5, wherein the second defects (2) in view in the direction perpendicular to the second principal surface (12) have a polygonal shape with four or more sides, and wherein the second defects (2) originate from a threaded screw dislocation (25), wherein: LY≦1 0.8×Wtanθ <L<1.2×Wtanθ 1 <LY BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a schematic planar view showing the design of a silicon carbide epitaxy substrate according to the present embodiment. Fig. Figure 2 is a schematic sectional view along line II-II in the direction of the arrows in Fig. 3. Fig. Figure 3 is a schematic top view showing the configuration of a first section of a second main surface of the silicon carbide epitaxy substrate according to the present embodiment. Fig. Figure 4 is a schematic planar view showing the configuration of a second section of the second main surface of the silicon carbide epitaxy substrate according to the present embodiment. Fig. Figure 5 is a schematic sectional view along line VV in the direction of the arrows in Fig. 4. Fig. Figure 6 is a partially schematic sectional view showing the construction of a device for producing the silicon carbide epitaxy substrate according to the present embodiment. Fig. Figure 7 is a flowchart that schematically shows a process for producing the silicon carbide epitaxy substrate according to the present embodiment. Fig. Figure 8 is a schematic sectional view showing a first step of the process for producing the silicon carbide epitaxy substrate according to the present embodiment. Fig. Figure 9 is a schematic sectional view showing a second step of the process for producing the silicon carbide epitaxy substrate according to the present embodiment. Fig. Figure 10 is a flowchart that schematically shows a method for manufacturing a silicon carbide semiconductor device according to the present embodiment. Fig. Figure 11 is a schematic sectional view showing a first step of the method for manufacturing the silicon carbide semiconductor device according to the present embodiment. Fig. Figure 12 is a schematic sectional view showing a second step of the method for manufacturing the silicon carbide semiconductor device according to the present embodiment. Fig. Figure 13 is a schematic sectional view showing the configuration of the silicon carbide semiconductor device according to the present embodiment. DETAILED DESCRIPTION [Summary of the embodiment of the present invention]

[0007] First, a summary of one embodiment of the present invention is provided. With regard to crystallographic information, an individual orientation is represented by [ ], a group orientation by < >, an individual plane by ( ), and a group plane by {}. Although a crystallographically negative index is normally expressed by a number with a dash “-” above it, here a negative sign precedes a number to indicate a crystallographically negative index.

[0008] (1) A silicon carbide epitaxy substrate 100 according to the present invention comprises: a single-crystal silicon carbide substrate 10 with a first major surface 11; and a silicon carbide layer 20 on the first major surface 11. The silicon carbide layer 20 comprises a surface 14 in contact with the single-crystal silicon carbide substrate 11 and a second major surface 12 opposite surface 14. The second major surface 12 is a plane inclined at a dislocation angle in a dislocation direction relative to a {0001} plane. The second major surface 12 has one or more defects.Assuming that the one or more defects satisfying the relationships of formula 1 and formula 2 represent first defects 1 and the one or more defects satisfying the relationships of formula 3 and formula 2 represent second defects 2, where the dislocation angle θ° is, the thickness of the silicon carbide layer 20 in a direction perpendicular to the second main surface 12 is W µm, and the width of each of the one or more defects in a direction parallel to a direction obtained by projecting the dislocation direction onto the second main surface 12 is L µm, and the width of each of the one or more defects in a direction perpendicular to the dislocation direction and parallel to the second main surface 12 is Y µm, then a value greater than 0.5 is obtained by dividing a number of second defects 2 by a sum of a number of first defects 1 and the number of second defects 2.As a result, a two-dimensional expansion of one or more defects can be suppressed.

[0009] (2) In the silicon carbide epitaxy substrate 100 according to (1) above, the thickness of the silicon carbide layer 20 can be at least 5 µm and at most 100 µm.

[0010] (3) In the silicon carbide epitaxy substrate 100 according to (1) or (2) above, the dislocation angle can be greater than 0° and less than or equal to 8°.

[0011] (4) In the silicon carbide epitaxy substrate 100 according to one of the above points (1) to (3) the value is obtained by dividing the number of second defects 2 by the sum of the number of first defects 1 and the number of second defects 2, may be greater than 0.6.

[0012] (5) In the silicon carbide epitaxy substrate 100 according to (4) above, the value obtained by dividing the number of second defects 2 by the sum of the number of first defects 1 and the number of second defects 2 may be greater than 0.7.

[0013] (6) In the silicon carbide epitaxy substrate 100 according to (5) above, the value obtained by dividing the number of second defects 2 by the sum of the number of first defects 1 and the number of second defects 2 may be greater than 0.8.

[0014] (7) In the silicon carbide epitaxy substrate 100 according to (6) above, the value obtained by dividing the number of second defects 2 by the sum of the number of first defects 1 and the number of second defects 2 may be greater than 0.9.

[0015] (8) A method for producing a silicon carbide semiconductor device 300 according to the present invention comprises the following steps. A silicon carbide epitaxy substrate 100 is prepared according to one of points (1) to (7) above. The silicon carbide epitaxy substrate 100 is machined. [Details of the embodiment of the present invention]

[0016] The details of the embodiment of the present invention are described below. In the following description, the same or corresponding elements are designated by the same symbols, and the same description is not repeated. (Silicon carbide epitaxy substrate)

[0017] According to the representation in Fig. 1 and Fig. 2 A silicon carbide epitaxy substrate 100 according to the present embodiment comprises a single-crystal silicon carbide substrate 10 and a silicon carbide layer 20. The single-crystal silicon carbide substrate 10 has a first main surface 11 and a third main surface 13 opposite the first main surface 11. The silicon carbide layer 20 comprises a fourth main surface 14, which is in contact with the single-crystal silicon carbide substrate 10, and a second main surface 12, which is opposite the fourth main surface 14. As shown in Fig. 1. The silicon carbide epitaxy substrate 100 can be provided with a first flattening 16 extending in a first direction 101. The silicon carbide epitaxy substrate 100 can be provided with a second flattening (not shown) extending in a second direction 102.

[0018] The first direction 101 is parallel to the second main surface 12 and perpendicular to the second direction 102. The second direction 102 is, for example, a <1-100> direction. As shown in the figure, the maximum diameter 111 of the second main surface 12 is, for example, 100 mm or more. The maximum diameter 111 can be 150 mm or more, 200 mm or more, or 250 mm or more. The upper limit of the maximum diameter 111 is not specifically restricted. The upper limit of the maximum diameter 111 can, for example, be 300 mm.

[0019] The single-crystal silicon carbide substrate 10 is formed from single-crystal silicon carbide. The single-crystal silicon carbide exhibits, for example, a 4H-SiC polytype. 4H-SiC is superior to other polytypes with respect to electron mobility, dielectric strength, and the like. The single-crystal silicon carbide substrate 10 includes an n-type impurity, such as nitrogen (N). The conductivity type of the single-crystal silicon carbide substrate 10 is, for example, n-type. The first principal surface 11 is a plane inclined at an angle of 8° or less relative to a {0001} plane. When the first principal surface 11 is inclined relative to the {0001} plane, one inclination direction of the normal of the first principal surface 11 represents, for example, a <11-20> direction.

[0020] According to the representation in Fig. In 2, the silicon carbide layer 20 is located on the first major surface 11 of the single-crystal silicon carbide substrate 10. The silicon carbide layer 20 is an epitaxial layer. The silicon carbide layer 20 is in contact with the first major surface 11. The silicon carbide layer 20 comprises an n-type impurity, such as nitrogen. The conductivity type of the silicon carbide layer 20 is, for example, n-type. The second major surface 12 is a plane inclined at a dislocation angle θ (°) in a dislocation direction relative to a {0001} plane. In particular, the second major surface 12 can be a plane inclined at 8° or less in a dislocation direction relative to a {0001} plane. Alternatively, the second major surface 12 can be a plane inclined at 8° or less in a dislocation direction relative to a {000-1} plane.The dislocation direction can, for example, be a <11-20> direction. However, the dislocation direction is not limited to the <11-20> direction. It can also be a <1-100> direction or a direction with both a <1-100> and an <11-20> component.

[0021] The dislocation angle θ° represents the inclination angle of the second principal surface relative to a {0001} plane. In other words, the dislocation angle θ° represents the inclination angle of the normal of the second principal surface relative to a <0001> -direction. The dislocation angle θ, for example, is greater than 0° and less than or equal to 8°. The dislocation angle θ° can be at least 1° or at least 2°. The dislocation angle can be at most 7° or at most 6°.

[0022] One in Fig. The second dashed line, indicating plane 15, is for example a {0001} plane. A third direction, 103, is a direction perpendicular to plane 15. The third direction, 103, is, for example, a <0001> -direction. A fourth direction 104 is a direction perpendicular to the third direction 103. The fourth direction 104 is, for example, a <11-20> direction. The fourth direction 104 is the dislocation direction. The normal direction of the second principal surface 12 is a fifth direction 105. The fifth direction is a direction that is offset by a dislocation angle θ° in the dislocation direction relative to the <0001> -direction is inclined.

[0023] The silicon carbide layer 20 comprises a buffer layer 21 and a drift layer 22. The buffer layer 21 is in contact with the first main surface 11. The buffer layer 21 forms the fourth main surface 14 of the silicon carbide layer 20. The drift layer 22 is located on the buffer layer 21. The drift layer 22 forms the second main surface 12 of the silicon carbide layer 20. The buffer layer 21 contains an n-type impurity, such as nitrogen. The concentration of the n-type impurity contained in the buffer layer 21 is, for example, 1 × 10⁻⁶. 18 cm -3 The concentration of the n-type impurity contained in buffer layer 21 can be, for example, 5×10 17 cm -3 or more and 1x10 19 cm -3 or less. For example, the concentration of an n-type impurity contained in the drift layer is 3 × 10 15 cm -3The concentration of the n-type impurity contained in drift layer 22 is lower than the concentration of the n-type impurity contained in buffer layer 21. The concentration of the n-type impurity contained in buffer layer 21 may be lower than the concentration of the n-type impurity contained in the single-crystal silicon carbide substrate 10.

[0024] According to the representation in Fig. 3. The second main surface 12 can have a first defect 1. The first defect 1 is, for example, a triangular defect. As in the Fig. 2 and Fig. In equation 3, the first defect 1 is a defect that satisfies the relationships of the aforementioned formula 1 and the aforementioned formula 2, where the dislocation angle θ (°) is, the thickness of the silicon carbide layer in the fifth direction 105 perpendicular to the second principal surface 12 is W (µm), the width of the defect in the first direction 101, obtained by projecting a direction parallel to the dislocation direction onto the second principal surface, is L (µm), and the width of the defect in the second direction 102 perpendicular to the dislocation direction and parallel to the second principal surface is Y (µm). The thickness W of the silicon carbide layer is, for example, 5 µm or more and 100 µm or less. The lower limit of the thickness W of the silicon carbide layer is not particularly restricted and may, for example, be 10 µm or 20 µm. The upper limit of the thickness W of the silicon carbide layer is not particularly restricted and can be, for example, 80 µm or 50 µm.

[0025] How Fig. 2 and Fig. As shown in Figure 3, the first defect 1 originates, for example, from a threaded screw dislocation 25 and extends in the first direction 101. In a direction perpendicular to the second principal surface, the first defect 1 extends such that it covers an area within ± 45° relative to the first direction 101. In a view perpendicular to the second principal surface 12, the first defect 1 has, for example, a triangular shape. The silicon carbide polytype forming the first defect 1 differs from the silicon carbide polytype forming the first defect 1. The silicon carbide polytype forming the first defect 1 can be, for example, 3C or 8H. The surface of the first defect 1 facing the first direction 101 can be oriented towards the second principal surface 12. The surface of the first defect 1 facing away from the first direction 101 can have a lower height than the second principal surface 12.Ideally, the second main surface has no first defect 1.

[0026] According to the representation in Fig. 4, the second main surface 12 exhibits one or more second defects 2. In the Fig. 4 and Fig. 5 is the second defect 2 a defect that satisfies the relationships of formula 3 and formula 2, where the dislocation angle θ(°) is and the thickness of the silicon carbide layer 20 in the fifth direction 105 perpendicular to the second main surface 12 is W (µm), the width of the defect in the first direction 101, obtained by projecting the direction parallel to the dislocation direction onto the second main surface 12, is L (µm) and the width of the defect in the second direction 102 perpendicular to the dislocation direction and parallel to the second main surface 12 is Y (µm).

[0027] As in the Fig. 4 and Fig. For example, the second defect 2 results from the threaded screw displacement 25 and extends in the first direction 101. In the direction perpendicular to the second main surface 12, the second defect 2 can occupy a portion of the area within ±45° relative to the first direction 101. In the view in the direction perpendicular to the second main surface 12, the second defect 2 can, for example, have a polygonal shape with four or more sides. The polytype of silicon carbide forming the second defect 2 differs from the polytype of silicon carbide forming layer 20. The polytype of silicon carbide forming the second defect 2 can be, for example, 3C or 8H. The surface of the second defect 2 facing the first direction 101 can be oriented towards the second main surface 12. The surface of the second defect 2 opposite the first direction 101 can have a lower height than the second main surface 12.In a view perpendicular to the second main surface 12, the second defect 2 is smaller in area than the first defect 1.

[0028] It is desirable to decrease the number of first defects 1 and increase the number of second defects 2 on the second main surface 12 of the silicon carbide epitaxy substrate 100. According to the silicon carbide epitaxy substrate 100 of the present embodiment, the value obtained by dividing the number of second defects 2 by the sum of the number of first defects 1 and the number of second defects 2 is greater than 0.5. For example, if on the second main surface 12 the number of first defects is one and the number of second defects is nine, the value obtained by dividing the number of second defects 2 by the sum of the number of first defects 1 and the number of second defects 2 is 9 / (1+9) = 0.9.The value obtained by dividing the number of second defects 2 by the sum of the number of first defects 1 and the number of second defects 2 can be greater than 0.6, greater than 0.7, greater than 0.8 or greater than 0.9. (Method for measuring the number of defects)

[0029] The number of first defects 1 and second defects 2 can be measured by observing the second main surface 12 of the silicon carbide epitaxy substrate 100 using a defect detection device, such as a confocal differential interference microscope. For example, the WASAVI "SICA 6X" series from Lasertec Corporation can be used as a defect detection device, including the confocal differential interference microscope. The objective lens has a 10x magnification. A threshold for the detection sensitivity of this defect detection device is determined using a standard sample. With this defect detection device, the number of first defects 1 and second defects 2 can be quantitatively evaluated.

[0030] Specifically, the second principal surface 12 is first subdivided into a multitude of observed areas. An observed area is, for example, a square area of ​​1.3 mm × 1.3 mm. Images of all observed areas are acquired. The image of each observed area is processed using a prescribed procedure to identify defects in the image. Based on the dimensions of the defects, the identified defects are classified as first defect 1, second defect 2, and other defects. The number of first defects 1 and second defects 2 is calculated in each of the observed areas of the second principal surface 12 to determine the total number of first defects 1 and second defects 2 across the entire second principal surface 12. (Device for producing a silicon carbide epitaxy substrate)

[0031] Next, the configuration of a device 200 for producing a silicon carbide epitaxy substrate 100 according to the present embodiment is described.

[0032] According to the representation in Fig. 6 The apparatus 200 for producing the silicon carbide epitaxy substrate 100 is, for example, a CVD (Chemical Vapor Deposition) apparatus of the lateral hot-wall type. The production apparatus 200 mainly comprises a reaction chamber 201, a heating element 203, a quartz tube 204, a thermal insulator 205 and an induction heating coil 206.

[0033] The heating element 203, for example, has a cylindrical shape and forms the reaction chamber 201 within it. The heating element 203 is made of graphite, for example. The thermal insulator 205 surrounds the outer circumference of the heating element 203. The thermal insulator 205 is positioned inside the quartz tube 204 to make contact with an inner circumferential surface of the quartz tube 204. The induction heating coil 206 is wound, for example, along an outer circumferential surface of the quartz tube 204. The induction heating coil 206 is configured to supply an alternating current from an external power supply (not shown). The heating element 203 is thereby inductively heated. As a result, the reaction chamber 201 is heated by the heating element 203.

[0034] The reaction chamber 201 is a space formed by its enclosure by the heating element 203. The single-crystal silicon carbide substrate 10 is arranged within the reaction chamber 201. The reaction chamber 201 is configured to heat the single-crystal silicon carbide substrate 10. The reaction chamber 201 is equipped with a susceptor 210 to hold the single-crystal silicon carbide substrate 10. The susceptor 210 is configured to rotate about a rotation axis 212.

[0035] The manufacturing device 200 has a gas inlet opening 207 and a gas outlet opening 208. The gas outlet opening 208 is connected to an air outlet pump (not shown). Arrows in Fig. Figure 6 indicates a gas flow. Gas is introduced into the reaction chamber 201 through the gas inlet opening 207 and expelled through the gas outlet opening 208. The pressure in the reaction chamber 201 is maintained by an equilibrium between the amount of gas supplied and the amount of gas expelled.

[0036] The manufacturing apparatus 200 includes a gas supply unit (not shown) configured to supply a gas mixture, comprising, for example, silane, ammonia, hydrogen, and propane, to the reaction chamber 201. In particular, the gas supply unit may include a gas cylinder capable of supplying propane, a gas cylinder capable of supplying hydrogen, a gas cylinder capable of supplying silane, and a gas cylinder capable of supplying ammonia or a gas mixture of ammonia and nitrogen.

[0037] The winding density of the induction heating coil 206 can be varied in an axial direction of the reaction chamber 201. The winding density [number / m] refers to the number of turns of the coil per unit length in the axial direction of the device. For example, the winding density of the induction heating coil 206 on the upstream side can be higher than the winding density of the induction heating coil 206 on the downstream side, so that ammonia is effectively thermally decomposed on the upstream side. (Method for the production of a silicon carbide epitaxy substrate)

[0038] Next, a method for producing the silicon carbide epitaxy substrate according to the present embodiment is described.

[0039] First, a preparatory step is performed for a single-crystal silicon carbide substrate (S11: Fig. 7) is carried out. For example, a silicon carbide single crystal with a polytype of 4H is prepared by sublimation. Then, the silicon carbide single crystal is cut, for example, with a wire saw, thereby producing the single-crystal silicon carbide substrate 10. The single-crystal silicon carbide substrate 10 includes an n-type impurity, such as nitrogen. The conductivity type of the single-crystal silicon carbide substrate 10 is, for example, n-type.

[0040] According to the representation in Fig. The single-crystal silicon carbide substrate 10 has a first principal surface 11 and a third principal surface 13 opposite the first principal surface 11. The first principal surface 11 is a plane inclined at a dislocation angle θ in a dislocation direction relative to the {0001} plane 15. The dislocation direction is, for example, an <11-20> direction. The maximum diameter of the first principal surface 11 of the single-crystal silicon carbide substrate 10 is, for example, 150 mm or more. The single-crystal silicon carbide substrate 10 may contain, for example, a threaded screw dislocation 25 or a carbon inclusion. The threaded screw dislocation or the carbon inclusion often serves as the origin for the first defect, such as a triangular defect. The threaded screw dislocation 25 extends in a direction 103 perpendicular to the {0001} plane 15.

[0041] Next, a buffer layer formation step (S12: Fig. 7) is carried out. First, the single-crystal silicon carbide substrate 10 is arranged on the susceptor 210 in the reaction chamber 201 (see Fig. 6) The pressure in reaction chamber 201 is, for example, reduced from atmospheric pressure to approximately 1×10 by means of a vacuum pump. -3 Pa to 1×10 -6 Pa is reduced. After the residual gas, such as atmospheric components and water in reaction chamber 201, is reduced, a temperature increase of the single-crystal silicon carbide substrate 10 is initiated.

[0042] Once the temperature of the single-crystal silicon carbide substrate 10 has reached at least 1600 °C, a starting material gas, a doping gas, and a carrier gas are supplied to the reaction chamber 201. In particular, a gas mixture containing silane, propane, ammonia, and hydrogen is supplied to the reaction chamber 201. The respective gases are thermally decomposed in the reaction chamber 201, thereby forming the buffer layer 21 on the single-crystal silicon carbide substrate 10 (see Fig. 9) In the step of forming the buffer layer 21, the susceptor 210 rotates about the rotation axis 212. The single-crystal silicon carbide substrate 10 rotates about the rotation axis 212 (see Fig. 6).

[0043] In the buffer layer formation step, the flow rates of ammonia, silane, and propane are adjusted to achieve a (C+N) / Si ratio of 1.0 or less. Specifically, the flow rate of silane gas is set to, for example, 96 sccm. The flow rate of propane gas is set to, for example, 30.3 sccm. The flow rate of ammonia gas is set to 0.25 sccm. In this case, (C+N) / Si = (30.3 × 3 + 0.25) / 96 = approximately 0.95 is obtained. The concentration of nitrogen atoms in buffer layer 21 is approximately 1 × 10⁻⁶. 18 cm -3 The thickness of the buffer layer 21 is, for example, 1.0 µm. In this way, the buffer layer 21 is formed on the single-crystal silicon carbide substrate 10 by epitaxial growth.

[0044] Compared to nitrogen gas, which has a triple bond, ammonia gas is more likely to thermally decompose. Compared to nitrogen gas, ammonia gas is more likely to be incorporated into silicon carbide. If the buffer layer 21 is formed with a similar concentration of nitrogen atoms using nitrogen gas instead of ammonia gas, the nitrogen gas must have a flow rate of approximately 50 sccm. In this case, (C+N) / Si = (30.3×3+50×2) / 96 = approximately 1.99 is obtained.

[0045] Next, a step is taken to form a drift layer (S13: Fig. 7) is carried out. A gas mixture of silane, propane, ammonia, and hydrogen is supplied to reaction chamber 201, while the temperature of the single-crystal silicon carbide substrate 10 is maintained at approximately 1640 °C, for example. The respective gases are thermally decomposed in reaction chamber 201, forming the drift layer 22 on the buffer layer 21 (see Fig. 2 and Fig. 5) In the step of forming the drift layer 22, the susceptor 210 rotates about the rotation axis 212. The single-crystal silicon carbide substrate 10 rotates about the rotation axis 212 (see Fig. 6).

[0046] In the drift layer formation step, flow rates of ammonia, silane, and propane are adjusted to achieve a (C+N) / Si ratio of approximately 1.35. Specifically, the silane flow rate is set to, for example, 140 sccm. The propane flow rate is set to, for example, 63 sccm. The ammonia flow rate is set to 0.07 sccm. In this case, (C+N) / Si = (63×3+0.07) / 140 = approximately 1.35 is obtained. The concentration of nitrogen atoms in drift layer 22 is approximately 3×10⁻⁶. 15 cm -3 The thickness of the drift layer 22 is, for example, 30 µm. In this way, the drift layer 22 is formed on the buffer layer 21 by epitaxial growth, thereby producing the epitaxial silicon carbide substrate 100.

[0047] If buffer layer 21 is formed with a similar concentration of nitrogen atoms using nitrogen gas instead of ammonia gas, the nitrogen gas must have a flow rate of approximately 15 sccm. In this case, (C+N) / Si = (63×3+15×2) / 140 = approximately 1.56 is obtained. (Mechanism for suppressing the spread of a defect)

[0048] Next, an estimation mechanism for suppressing the extent of a defect is described.

[0049] During the epitaxial growth of a silicon carbide layer, it is assumed that a nitrogen atom, whose size is closer to that of a carbon atom than to that of a silicon atom, is more likely to enter a carbon site than a silicon site. A radical or precursor containing silicon atoms, compared to carbon and nitrogen atoms, has the property of migrating more readily on a growth surface during growth. Accordingly, if epitaxial growth is carried out under conditions of a higher ratio of silicon atoms to carbon and nitrogen atoms, satisfactory step-flow growth can be achieved, resulting in a flat growth surface.Conversely, if epitaxial growth is carried out under the condition of a lower ratio of Si atoms to C atoms and N atoms, it is difficult to achieve satisfactory step flow growth, and step bundling is likely to occur on the growth surface as a consequence.

[0050] Since ammonia gas, as described above, is more likely to undergo thermal decomposition than nitrogen gas with a triple bond, it is probable that nitrogen atoms will be incorporated into a silicon carbide layer. In the case of ammonia gas, a silicon carbide layer with the same nitrogen atom concentration can be formed at a flow rate of approximately one-hundredth that of nitrogen gas. Thus, a higher ratio of silicon atoms to carbon and nitrogen atoms can be achieved when using ammonia gas than when using nitrogen gas. It is therefore assumed that satisfactory step-flow growth can be achieved when using ammonia gas.

[0051] It is assumed that a defect with a two-dimensional extent, such as a triangular defect, arises due to a screw dislocation, carbon inclusion, or the like. Specifically, the following mechanism is thought to operate: Silicon (Si atoms alone or a radical with Si and hydrogen bonded together) diffuses onto an epitaxial layer surface during film formation, resulting in screw dislocations on the surface. The diffusion of Si at the screw dislocations is inhibited by C and / or N atoms, leading to bonding through interaction. Such bonding does not form 4H-SiC, but rather defects such as 3C-SiC, and these defects each form the core of a two-dimensional defect. That is, each of these defects can contribute to the formation of a triangular defect.By using ammonia gas in one step to form a buffer layer in an early growth phase (early stage of crystal growth), a buffer layer with a high concentration of N atoms of about 1×10 can be obtained. 18 cm -3 can be formed even if the ratio of (C+N) / Si is reduced to approximately 1.0 or less, for example.

[0052] In other words, a buffer layer can be formed using ammonia gas under a Si-rich condition. This allows for satisfactory step-flow growth at an early stage of crystal growth, suppressing the two-dimensional expansion of a defect originating from a threaded screw dislocation or carbon inclusion present in a single-crystal silicon carbide substrate. Consequently, it is believed that the probability of the threaded screw dislocation or carbon inclusion growing into the first defect with large two-dimensional expansion can be reduced, and the probability of the threaded screw dislocation or carbon inclusion growing into the second defect with small two-dimensional expansion can be increased. (Method for manufacturing a silicon carbide semiconductor device)

[0053] Next, a method for manufacturing a silicon carbide semiconductor device 300 according to the present embodiment is described.

[0054] The method for manufacturing the silicon carbide semiconductor device according to the present embodiment mainly comprises an epitaxial substrate preparation step (S10: Fig. 10) and a substrate processing step (S20: Fig. 10) on.

[0055] First, the epitaxy substrate preparation step (S10: Fig. 10). In particular, the silicon carbide epitaxy substrate 100 is prepared using the silicon carbide epitaxy substrate preparation method described above (see Fig. 7).

[0056] Next comes the substrate processing step (S20: Fig. 10) is carried out. In particular, the silicon carbide epitaxy substrate is processed, thereby producing a silicon carbide semiconductor device. The "processing" includes various types of processing, such as ion implantation, heat treatment, etching, oxide film formation, electrode formation, and sawing. That is, the substrate processing step can include at least one of the processing types, including ion implantation, heat treatment, etching, oxide film formation, electrode formation, and sawing.

[0057] The following describes a method for fabricating a MOSFET (metal oxide semiconductor field-effect transistor) as an example of a silicon carbide semiconductor device. The substrate processing step (S20: Fig. 10) includes an ion implantation step (S21: Fig. 10), an oxide film formation step (S22: Fig. 10), an electrode formation step (S23: Fig. 10) and, for example, a cutting step (p. 24: Fig. 10).

[0058] First, the ion implantation step (S21: Fig. 10) is carried out. A p-type impurity such as aluminum (Al) is implanted into the second main surface 12, on which a mask with an opening (not shown) has been formed. Consequently, a body region 132 with p-type conductivity is formed. Then, an n-type impurity such as phosphorus (P) is implanted into a prescribed position within the body region 132. Consequently, a source region 133 with n-type conductivity is formed. Then, a p-type impurity, such as aluminum, is implanted into a prescribed position within the source region 133. Consequently, a contact region 134 with p-type conductivity is formed (see Fig. 11).

[0059] In the silicon carbide layer 20, a section other than the body region 132, the source region 133, and the contact region 134 serve as the drift region 131. The source region 133 is separated from the drift region 131 by the body region 132. Ion implantation can be performed while the silicon carbide epitaxy substrate 100 is heated to approximately 300 °C or more and 600 °C or less. After ion implantation, the silicon carbide epitaxy substrate 100 undergoes an activation anneal. The activation anneal activates the impurities implanted into the silicon carbide layer 20 to create a carrier in each region. The activation anneal is performed, for example, in an argon (Ar) atmosphere. The activation anneal is performed, for example, at a temperature of approximately 1800 °C. The activation process, for example, is carried out for a period of approximately 30 minutes.

[0060] Next, the oxide film formation step (S22: Fig. 10) carried out. For example, the silicon carbide epitaxy substrate 100 is heated in an oxygen-containing atmosphere, forming an oxide film 136 on the second main surface 12 (see Fig. 12) The oxide film 136 consists, for example, of silicon dioxide. The oxide film 136 acts as a gate insulating film. The thermal oxidation process is carried out, for example, at a temperature of approximately 1300 °C. The thermal oxidation process is carried out, for example, for a period of approximately 30 minutes.

[0061] After the oxide film 136 has formed, heat treatment can continue in a nitrogen atmosphere. For example, heat treatment is carried out in a nitric oxide atmosphere at approximately 1100 °C for about one hour. Subsequently, heat treatment is carried out in an argon atmosphere. For example, heat treatment is carried out in an argon atmosphere at approximately 1100 to 1500 °C for about one hour.

[0062] Next, the electrode formation step (S23: Fig. 10) is carried out. A first electrode 141 is formed on the oxide film 136. The first electrode 141 functions as a gate electrode. The first electrode 141 is formed, for example, by CVD. The first electrode 141 consists, for example, of polysilicon with conductivity. The first electrode 141 is formed at a position oriented towards the source region 133 and the body region 132.

[0063] Next, an insulating interlayer film 137 is formed to cover the first electrode 141. The insulating interlayer film 137 is formed, for example, by CVD. The insulating interlayer film 137 consists, for example, of silicon dioxide. The insulating interlayer film 137 is formed in contact with the first electrode 141 and the oxide film 136. Then, the oxide film 136 and the insulating interlayer film 137 are removed at a specified position by etching. Consequently, the source region 133 and the contact region 134 are exposed on the oxide film 136.

[0064] Next, a second electrode 142 is formed on this exposed section, for example by sputtering. The second electrode 142 acts as the source electrode. The second electrode 142 consists, for example, of titanium, aluminum, and silicon. After the second electrode 142 has been formed, the second electrode 142 and the silicon carbide epitaxy substrate 100 are heated, for example, to a temperature of approximately 900 °C or more and 1100 °C or less. Consequently, the second electrode 142 and the silicon carbide epitaxy substrate 100 are brought into ohmic contact with each other. Then, a wiring layer 138 is formed in contact with the second electrode 142. The wiring layer 138 consists, for example, of a material that includes aluminum.

[0065] Next, a third electrode 143 is formed on the third main surface 13. The third electrode 143 acts as a drain electrode. The third electrode 143 consists of an alloy comprising, for example, nickel and silicon (e.g., NiSi).

[0066] Next comes the division step (S24: Fig. 10) is carried out. For example, the silicon carbide epitaxy substrate 100 is cut along the dividing lines, thereby dividing the silicon carbide epitaxy substrate 100 into a multitude of semiconductor chips. In this way, the silicon carbide semiconductor device 300 is produced (see Fig. 13).

[0067] Although the method for fabricating the silicon carbide semiconductor device according to the present invention was described above with reference to a MOSFET as an example, the fabrication method according to the present invention is not limited as such. The fabrication method according to the present invention can be applied to silicon carbide semiconductor devices such as an IGBT (insulated-gate bipolar transistor), an SBD (Schottky barrier diode), a thyristor, a GTO (gate-off thyristor), and a PiN diode. LIST OF REFERENCE MARKS

[0068] 1 First defect; 2 Second defect; 10 Single-crystal silicon carbide substrate; 11 First main surface; 12 Second main surface; 13 Third main surface; 14 Fourth main surface; 15 {0001} plane; 16 First flattening; 20 Silicon carbide layer; 21 Buffer layer; 22 Drift layer; 25 Threaded screw dislocation; 100 Silicon carbide epitaxy substrate; 101 First direction; 102 Second direction; 103 Third direction; 104 Fourth direction; 105 Fifth direction; 111 Maximum diameter; 131 Drift region; 132 Body region; 133 Source region; 134 Contact region; 136 Oxide film; 137 Insulating interlayer film; 138 Wiring layer; 141 First electrode; 142 Second electrode; 143 Third electrode; 200 Manufacturing device; 201 Reaction chamber; 203 Heating element; 204 Quartz tube; 205 Thermal insulator; 206 Induction heating coil; 207 Gas inlet opening; 208 Gas outlet opening; 210 Susceptor; 212 Rotation axis; 300 Silicon carbide semiconductor device.

Claims

[1] Silicon carbide epitaxy substrate (100), comprising: a single-crystal silicon carbide substrate (10) with a first main surface (11); and a silicon carbide layer (20) on the first main surface (11), wherein the silicon carbide layer (20) has a surface (14) in contact with the single-crystal silicon carbide substrate (10) and a second main surface (12) opposite the surface (14), the second principal surface (12) is a plane inclined at a dislocation angle in a dislocation direction relative to a {0001} plane, the second main surface (12) has one or more defects (1, 2) and Assuming that the one or more defects satisfying the relations of formula 1 and formula 2 are first defects (1) and the one or more defects (1, 2) satisfying the relations of formula 3 and formula 2 are second defects (2), where the dislocation angle is θ°, the thickness of the silicon carbide layer (20) in a direction perpendicular to the second principal surface (12) is W µm, the width of each of the one or more defects (1, 2) in a direction parallel to a direction obtained by projecting the dislocation direction onto the second principal surface (12) is L µm, and the width of each of the one or more defects (1, 2) in a direction perpendicular to the dislocation direction and parallel to the second principal surface (12) is Y µm, then a value obtained by dividing a number of second defects (2) by a sum of a number of first defects (1) and the number of second defects (2) will be receivedgreater than 0.5 wherein the second defects (2) in view in the direction perpendicular to the second main surface (12) have a polygonal shape with four or more sides, and wherein the second defects (2) originate from a threaded screw displacement (25), where: LY≦1 0.8×Wtanθ <L<1.2×Wtanθ 1 <LY [2] Silicon carbide epitaxy substrate (100) according to claim 1, wherein the thickness of the silicon carbide layer (20) is 5 µm or more and 100 µm or less. [3] Silicon carbide epitaxy substrate (100) according to claim 1 or 2, wherein the dislocation angle is greater than 0° and less than or equal to 8°. [4] Silicon carbide epitaxy substrate (100) according to any one of claims 1 to 3, wherein the value obtained by dividing the number of second defects (2) by the sum of the number of first defects (1) and the number of second defects (2) is greater than 0.

6. [5] Silicon carbide epitaxy substrate (100) according to claim 4, wherein the value obtained by dividing the number of second defects (2) by the sum of the number of first defects (1) and the number of second defects (2) is greater than 0.

7. [6] Silicon carbide epitaxy substrate (100) according to claim 5, wherein the value obtained by dividing the number of second defects (2) by the sum of the number of first defects (1) and the number of second defects (2) is greater than 0.

8. [7] Silicon carbide epitaxy substrate (100) according to claim 6, wherein the value obtained by dividing the number of second defects (2) by the sum of the number of first defects (1) and the number of second defects (2) is greater than 0.

9. [8] Method for manufacturing a silicon carbide semiconductor device (300), the method comprising: Preparing (S10) the silicon carbide epitaxy substrate (100) according to any one of claims 1 to 7; and Processing (S20) of the silicon carbide epitaxy substrate (100).

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